For PowerPC esdhc pre divider starts at 1, fixing this increases
the actual clock from 40 MHz to 50 MHz.
Signed-off-by: Joakim Tjernlund
---
drivers/mmc/host/sdhci-of-esdhc.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/mmc/host/sdhci-of-esdhc.c
b/drivers/mmc
Signed-off-by: Joakim Tjernlund
---
drivers/mmc/host/sdhci-of-esdhc.c | 10 ++
1 file changed, 10 insertions(+)
diff --git a/drivers/mmc/host/sdhci-of-esdhc.c
b/drivers/mmc/host/sdhci-of-esdhc.c
index 22e9111..7130130 100644
--- a/drivers/mmc/host/sdhci-of-esdhc.c
+++ b/drivers/mmc
On Mon, 2015-05-04 at 19:31 +0200, Arnd Bergmann wrote:
> On Monday 04 May 2015 18:31:31 Joakim Tjernlund wrote:
> > @@ -252,6 +260,8 @@ static void esdhc_of_platform_init(struct sdhci_host
> > *host)
> >
> > if (vvn > VENDOR_V_22)
&g
On Mon, 2015-05-04 at 21:17 +, Joakim Tjernlund wrote:
> On Mon, 2015-05-04 at 19:31 +0200, Arnd Bergmann wrote:
> > On Monday 04 May 2015 18:31:31 Joakim Tjernlund wrote:
> > > @@ -252,6 +260,8 @@ static void esdhc_of_platform_init(struct sdhci_host
> > > *host)
&g
Christophe Leroy wrote on 2014/08/29 11:14:37:
>
> Exception InstructionAccess does not exist on MPC8xx. No need to branch
there from somewhere else.
> Handling can be done directly in InstructionTLBError Exception.
>
> Signed-off-by: Christophe Leroy
>
> ---
> arch/powerpc/kernel/head_8xx.
Christophe Leroy wrote on 2014/08/29 11:14:40:
>
> No need to re-set this bit at each TLB miss. Let's set it in the PTE.
>
> Signed-off-by: Christophe Leroy
>
> ---
> arch/powerpc/include/asm/pgtable-ppc32.h | 21 +
> arch/powerpc/include/asm/pte-8xx.h |7 +
Christophe Leroy wrote on 2014/08/29 11:14:37:
>
> SCRATCH0 and SCRATCH1 are only used in Exceptions prologs where no other
> exception can happen. There is therefore no need to preserve them
accross
> TLB handlers, we can use them there as in other exceptions. One of the
> advantages is that th
Christophe Leroy wrote on 2014/08/29 11:13:24:
>
> This patchset:
> 1) provides several MMU TLB handling optimisation on MPC8xx.
> 2) adds support of 16k pages on MPC8xx.
> All changes have been successfully tested on a custom board equipped
with MPC885
>
> The two differences with first versio
Christophe Leroy wrote on 2014/09/17 18:36:57:
>
> Exception InstructionAccess does not exist on MPC8xx. No need to branch
there from somewhere else.
> Handling can be done directly in InstructionTLBError Exception.
>
> Signed-off-by: Christophe Leroy
>
> ---
> Changes in v2:
> - None
>
> C
leroy christophe wrote on 2014/09/18 18:42:14:
>
> Le 18/09/2014 17:15, Joakim Tjernlund a écrit :
> > Christophe Leroy wrote on 2014/09/17
18:36:57:
> >> Exception InstructionAccess does not exist on MPC8xx. No need to
branch
> > there from somewhere else.
> &g
christophe leroy wrote on 2014/09/18 21:11:01:
>
>
> Le 18/09/2014 20:12, Joakim Tjernlund a écrit :
> > leroy christophe wrote on 2014/09/18
18:42:14:
> >
> >> Le 18/09/2014 17:15, Joakim Tjernlund a écrit :
> >>> Christophe Leroy wrote on
inline function.
>
> Signed-off-by: Christophe Leroy
>
> ---
Ouch, this is still so. Back in 2010 I reported this to gcc:
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=43892
Anyway,
Acked-by: Joakim Tjernlund
___
Linuxppc-dev
Christophe Leroy wrote on 2014/09/19 15:57:56:
> +#define HAVE_ARCH_CSUM_ADD
> +static inline __wsum csum_add(__wsum csum, __wsum addend)
> +{
> +__asm__("\n\
> + addc %0,%0,%1 \n\
> + addze %0,%0 \n\
> + "
> + : "=r" (csum)
> + : "r" (addend), "0"(csum));
hmm, I wonder if not this
"Linuxppc-dev"
wrote on 2014/09/23 07:45:06:
>
> On Mon, 2014-09-22 at 23:52 -0400, Bob Cochran wrote:
> > On 09/22/2014 06:21 PM, Scott Wood wrote:
> > > Highlights include DMA32 zone support (SATA, USB, etc now works on
64-bit
> > > FSL kernels), MSI changes, 8xx optimizations and cleanup, t
> >
> > The TBI implements transmit/receive portions of PCS, it's not used in
> > Linux. The PCS on Fman V3 are not just for SGMII, it has more
> > implementations, it's used in Linux.
It is used for PHY less mode(aka fixed PHY) and needs to be exposed to
linux so it is possible to select SGMII/10
On Tue, 2014-12-16 at 16:03 +0100, Christophe Leroy wrote:
> L1 base address is now aligned so we can insert L1 index into r11 directly and
> then preserve r10
>
> Signed-off-by: Christophe Leroy
Acked-by: Joakim Tjernlund
>
> ---
> arch/powerpc/k
On Mon, 2014-12-22 at 11:14 +0100, Christophe Leroy wrote:
> On powerpc 8xx, in TLB entries, 0x400 bit is set to 1 for read-only pages
> and is set to 0 for RW pages. So we should use _PAGE_RO instead of _PAGE_RW
>
> Signed-off-by: Christophe Leroy
Hi Christophe, been meaning to look over all y
time for handling invalid entries.
>
> Signed-off-by: Christophe Leroy
Nice :)
Acked-by: Joakim Tjernlund
>
> ---
> arch/powerpc/kernel/head_8xx.S | 41 -
> 1 file changed, 8 insertions(+), 33 deletions(-)
>
> diff --git a/arch/powerpc/
ould be just as happy with not supporting different TASK_SIZEs, but
why not ..
Acked-by: Joakim Tjernlund
>
> Signed-off-by: Christophe Leroy
>
> ---
> arch/powerpc/kernel/head_8xx.S | 29 +
> 1 file changed, 21 insertions(+), 8 deletions(-)
>
&
On Tue, 2014-12-16 at 16:03 +0100, Christophe Leroy wrote:
> CR only needs to be preserved when checking if we are handling a kernel
> address.
> So we can preserve CR in a register:
> - In ITLBMiss, check is done only when CONFIG_MODULES is defined. Otherwise we
> don't need to do anything at al
On Tue, 2014-12-16 at 16:03 +0100, Christophe Leroy wrote:
> All accessed to PGD entries are done via 0(r11).
> By using lower part of swapper_pg_dir as load index to r11, we can remove the
> ori instruction.
>
> Signed-off-by: Christophe Leroy
Nice :)
Acked-by: J
On Tue, 2015-01-06 at 08:03 +0100, leroy christophe wrote:
> Le 05/01/2015 19:12, Joakim Tjernlund a écrit :
> > On Mon, 2014-12-22 at 11:14 +0100, Christophe Leroy wrote:
> > > On powerpc 8xx, in TLB entries, 0x400 bit is set to 1 for read-only pages
> > > and is s
On Mon, 2015-01-12 at 11:55 +1100, Anton Blanchard wrote:
> Hi David,
>
> > The unrolled loop (deleted) looks excessive.
> > On a modern cpu with multiple execution units you can usually
> > manage to get the loop overhead to execute in parallel to the
> > actual 'work'.
> > So I suspect that a m
"Linuxppc-dev"
wrote 2013/05/13 12:38:13:
>
> On Mon, 2013-05-13 at 11:33 +0100, David Woodhouse wrote:
> >
> > On Mon, 2013-05-13 at 09:33 +0200, Gabriel Paubert wrote:
> > > Actually, I'd swap the two mr instructions to never
> > > have an instruction that uses the result from the
> > > prev
"Linuxppc-dev"
wrote on 2013/05/13 12:51:59:
>
> "Linuxppc-dev"
>
> wrote 2013/05/13 12:38:13:
> >
> > On Mon, 2013-05-13 at 11:33 +0100, David Woodhouse wrote:
> > >
> > > On Mon, 2013-05-13 at 09:33 +0200, Gabriel Paubert wrote:
> > > > Actually, I'd swap the two mr instructions to never
Scott Wood wrote on 2013/06/25 02:51:00:
>
> On Fri, Jul 20, 2012 at 10:37:17AM +0200, Joakim Tjernlund wrote:
> > Zang Roy-R61911 wrote on 2012/07/20 10:27:52:
> > >
> > >
> > >
> > > > -Original Message-
> > > > From:
l
On Wed, 2015-04-01 at 19:19 +0300, Madalin Bucur wrote:
> This introduces the Freescale Data Path Acceleration Architecture
> (DPAA) Ethernet driver (dpaa_eth) that builds upon the DPAA QMan,
> BMan, PAMU and FMan drivers to deliver Ethernet connectivity on
> the Freescale DPAA QorIQ platforms.
>
On Mon, 2015-07-20 at 09:54 +0200, Joakim Tjernlund wrote:
> On Wed, 2015-04-01 at 19:19 +0300, Madalin Bucur wrote:
> > This introduces the Freescale Data Path Acceleration Architecture
> > (DPAA) Ethernet driver (dpaa_eth) that builds upon the DPAA QMan,
> > BMan, PAM
On Wed, 2015-04-29 at 12:29 +0300, Igal.Liberman wrote:
> From: Igal Liberman
>
> This patch adds the Ethernet MAC driver support.
>
> Signed-off-by: Igal Liberman
> ---
> drivers/net/ethernet/freescale/fman/inc/mac.h | 125 +
> drivers/net/ethernet/freescale/fman/mac/Makefile |3
On Mon, 2015-07-20 at 12:18 +, Madalin-Cristian Bucur wrote:
> Hi Joakim
>
> > -Original Message-
> > From: Joakim Tjernlund [mailto:joakim.tjernl...@transmode.se]
> > Sent: Monday, July 20, 2015 10:57 AM
> > To: linuxppc-dev@lists.ozlabs.org; net...@
On Mon, 2015-07-20 at 12:28 +, Madalin-Cristian Bucur wrote:
> Hi Joakim,
>
> It seems we just need to align to the API introduced by Thomas Petazzoni
> in 3be2a49e.
>
> Madalin
So it seems, any idea when the next spin will be ready?
Could you also push it onto
http://git.freescale.com/gi
On Mon, 2015-07-20 at 13:33 +, Madalin-Cristian Bucur wrote:
> > -Original Message-
> > From: Joakim Tjernlund [mailto:joakim.tjernl...@transmode.se]
> > Sent: Monday, July 20, 2015 3:57 PM
> > To: net...@vger.kernel.org; Liberman Igal-B31950; Bucur Madalin-Cri
On Wed, 2015-07-22 at 19:16 +0300, Madalin Bucur wrote:
> This introduces the Freescale Data Path Acceleration Architecture
> (DPAA) Ethernet driver (dpaa_eth) that builds upon the DPAA QMan,
> BMan, PAMU and FMan drivers to deliver Ethernet connectivity on
> the Freescale DPAA QorIQ platforms.
>
I upgraded our kernel for our custom p2010rdb based board from 3.4 to 4.1 and I
cannot get the
PCI controller to work, it is not initialized as can be seem by the below dmesg
fro 3.4 and 4.1.
Sorry to say, PCI is not my cup of tea so I don't not know how to find the
culprit.
I have checked what
On Fri, 2015-08-14 at 13:15 +, Joakim Tjernlund wrote:
> I upgraded our kernel for our custom p2010rdb based board from 3.4 to 4.1 and
> I cannot get the
> PCI controller to work, it is not initialized as can be seem by the below
> dmesg fro 3.4 and 4.1.
> Sorry to say, PCI i
"Linuxppc-dev"
wrote on 2013/08/29 19:11:48:
> The mpc8xx powerpc has an errata identified CPU15 which is that whenever
> the last instruction of a page is a conditional branch to the last
> instruction of the next page, the CPU might do crazy things.
>
> To work around this errata, one of t
leroy christophe wrote on 2013/08/29 23:04:03:
>
> Le 29/08/2013 19:57, Joakim Tjernlund a écrit :
> > "Linuxppc-dev"
> >
> > wrote on 2013/08/29 19:11:48:
> >> The mpc8xx powerpc has an errata identified CPU15 which is that
whenever
> >> th
Christophe Leroy wrote on 2013/09/11 17:50:28:
> From: Christophe Leroy
> To: Benjamin Herrenschmidt , Paul Mackerras
,
> Cc: linux-ker...@vger.kernel.org, linuxppc-dev@lists.ozlabs.org, Joakim
Tjernlund
> Date: 2013/09/11 18:43
> Subject: [PATCH] powerpc 8xx: R
"Linuxppc-dev"
wrote on 2013/10/11 14:56:40:
>
> Activating CONFIG_PIN_TLB allows access to the 24 first Mbytes of memory
at
> bootup instead of 8. It is needed for "big" kernels for instance when
activating
> CONFIG_LOCKDEP_SUPPORT. This needs to be taken into account in init_32
too,
> othe
leroy christophe wrote on 2013/10/15 18:27:00:
>
>
> Le 11/10/2013 17:13, Joakim Tjernlund a écrit :
> > "Linuxppc-dev"
> >
> > wrote on 2013/10/11 14:56:40:
> >> Activating CONFIG_PIN_TLB allows access to the 24 first Mbytes of
memory
> >
Rojhalat Ibrahim wrote on 2013/03/11 15:47:30:
>
> Hi,
>
> this issue was brought up before.
> See this thread:
https://lists.ozlabs.org/pipermail/linuxppc-dev/2012-July/099529.html
>
> The following patch works for me.
> Hot-added devices appear after "echo 1 > /sys/bus/pci/rescan".
> I test
---
I took a stab at impl. IFF_UNICAST_FLT as an exercise but I
didn't get around to test it. So I figured perhaps someone else
wants/need it so here is a start. With any luck it will work
as is. This is on 3.0 so it might not apply without tweaks.
drivers/net/ethernet/freescale/ucc_geth.c | 22
"Linuxppc-dev"
wrote on 2014/05/06 08:28:42:
>
.
>
> > That said,
> > I don't object to having a way to label a PHY as attached via TBI if
> > that's useful. I'm giving a mild, non-nacking (given the history)
> > objection to using device_type for that (given other history).
>
> Person
/08/2014 9:04
Cc: linux-ker...@vger.kernel.org, linuxppc-dev@lists.ozlabs.org, Joakim
Tjernlund , scottw...@freescale.com
Subject: [PATCH 00/20] powerpc/8xx: Optimise MMU TLB handling and add support
of 16k pages
===
This patchset:
* provides several MMU TLB handling
I found the same on MPC8321 long time ago(when 64 bits change went in),
the 32 bits were much faster. I guess the "smaller"
CPUs cannot handle the cache trashing these big tables impose, I didn't
look into the details though.
So I think this is a good change for 8xx.
Acked-by: J
gt; -Scott
>
> On Tue, 2013-11-19 at 15:11 +0100, Joakim Tjernlund wrote:
> > I found the same on MPC8321 long time ago(when 64 bits change went
in),
> > the 32 bits were much faster. I guess the "smaller"
> > CPUs cannot handle the cache trashing these big
On Fri, 2015-02-20 at 09:43 -0500, Bob Cochran wrote:
> On 02/05/2015 10:52 AM, Emil Medve wrote:
> > Hello Bob,
> >
> >
> > On 02/05/2015 09:48 AM, Bob Cochran wrote:
> > > On 02/04/2015 09:48 AM, Emil Medve wrote:
> > > >
> > > > Hello,
> > > >
> > > >
> > > > This is the first attempt to pu
On Wed, 2016-03-30 at 16:50 +0800, Zhao Qiang wrote:
> QE has module to support TDM, some other protocols
> supported by QE are based on TDM.
> add a qe-tdm lib, this lib provides functions to the protocols
> using TDM to configurate QE-TDM.
>
> Signed-off-by: Zhao Qiang
> ---
> drivers/soc/fsl/
On Thu, 2015-08-27 at 15:58 +0200, leroy christophe wrote:
> Hi,
>
> Has anybody already used 'perf' tool on powerpc MPC83xx ?
>
> I have been succesfully using perf on MPC8xx, but on MPC83xx I get
> something strange.
>
> perf record/report reports addresses on user stack, as if it was mixing
Hi Christophe
Really nice patchset!
On Tue, 2015-09-22 at 18:51 +0200, Christophe Leroy wrote:
> clear_pages() is never used, and PPC32 is the only architecture
> (still) having this function. Neither PPC64 nor any other
> architecture has it.
>
> This patch removes clear_page() and move clear_p
On Tue, 2015-09-22 at 18:51 +0200, Christophe Leroy wrote:
> flush/clean/invalidate _dcache_range() functions are all very
> similar and are quite short. They are mainly used in __dma_sync()
> perf_event locate them in the top 3 consumming functions during
> heavy ethernet activity
>
> They are go
On Tue, 2015-09-22 at 13:58 -0500, Scott Wood wrote:
> On Tue, 2015-09-22 at 18:12 +0000, Joakim Tjernlund wrote:
> > On Tue, 2015-09-22 at 18:51 +0200, Christophe Leroy wrote:
> > > flush/clean/invalidate _dcache_range() functions are all very
> > > similar and are q
On Tue, 2015-09-22 at 14:42 -0500, Scott Wood wrote:
> On Tue, 2015-09-22 at 19:34 +0000, Joakim Tjernlund wrote:
> > On Tue, 2015-09-22 at 13:58 -0500, Scott Wood wrote:
> > > On Tue, 2015-09-22 at 18:12 +, Joakim Tjernlund wrote:
> > > > On Tue, 2015-09-22 at
> > And generally the one proposing uglification-for-optimization should
> > provide
> > the evidence. :-)
>
> When it comes to gcc, past history is my evidence until proven otherwise :)
> Maybe I will check again ...
OK then:
static inline void mb(void)
{
__asm__ __volatile__ ("sync" :
On Tue, 2015-09-22 at 15:14 -0500, Scott Wood wrote:
> On Tue, 2015-09-22 at 19:55 +0000, Joakim Tjernlund wrote:
> > On Tue, 2015-09-22 at 14:42 -0500, Scott Wood wrote:
> > > On Tue, 2015-09-22 at 19:34 +, Joakim Tjernlund wrote:
> > > > On Tue, 2015-09-22 at
On Tue, 2015-09-22 at 15:35 -0500, Scott Wood wrote:
> On Tue, 2015-09-22 at 20:32 +0000, Joakim Tjernlund wrote:
> > On Tue, 2015-09-22 at 15:14 -0500, Scott Wood wrote:
> > > On Tue, 2015-09-22 at 19:55 +, Joakim Tjernlund wrote:
> > > > On Tue, 2015-09-22 at
I am trying to figure out how to describe/map external IRQ7 in the devicetree.
Basically either IRQ7 to be left alone by Linux(becase u-boot already set it up)
or map IRQ7 to sie 0(MPIC_EILR7=0xf0) and prio=0xf(MPIC_EIVPR7=0x4f)
There is no need for SW handler because IRQ7 will be routed to t
On Wed, 2015-10-14 at 19:11 -0500, Scott Wood wrote:
> On Wed, 2015-10-14 at 19:37 +0000, Joakim Tjernlund wrote:
> > I am trying to figure out how to describe/map external IRQ7 in the
> > devicetree.
> >
> > Basically either IRQ7 to be left alone by Linux(becase u-
On Mon, 2015-11-02 at 19:31 +0200, Madalin Bucur wrote:
> + if (unlikely(fd_status & FM_FD_STAT_RX_ERRORS) != 0) {
> + if (net_ratelimit())
> + netif_warn(priv, hw, net_dev, "FD status = 0x%08x\n",
> + fd_status & FM_FD_STAT
On Tue, 2015-11-03 at 09:37 +, Madalin-Cristian Bucur wrote:
> > -Original Message-
> > From: Joakim Tjernlund [mailto:joakim.tjernl...@transmode.se]
> >
> > On Mon, 2015-11-02 at 19:31 +0200, Madalin Bucur wrote:
> > > + if (unlikely(fd_st
On Tue, 2015-12-22 at 06:18 +0200, igal.liber...@freescale.com wrote:
> From: Igal Liberman
>
> Signed-off-by: Igal Liberman
> ---
> .../devicetree/bindings/powerpc/fsl/fman.txt | 39
>
> 1 file changed, 39 insertions(+)
>
> diff --git a/Documentation/devicetree/b
Should this one go stable 4.14/4.19 too?
On Fri, 2019-03-29 at 16:00 +0200, laurentiu.tu...@nxp.com wrote:
>
> From: Laurentiu Tudor
>
> Fix issue with the entry indexing in the sg frame cleanup code being
> off-by-1. This problem showed up when doing some basic iperf tests and
> manifested in
On Fri, 2019-03-29 at 22:26 +1100, Michael Ellerman wrote:
>
> From: Diana Craciun
>
> commit ebcd1bfc33c7a90df941df68a6e5d4018c022fba upstream.
>
> Implement the barrier_nospec as a isync;sync instruction sequence.
> The implementation uses the infrastructure built for BOOK3S 64.
>
> Signed-o
On Tue, 2019-04-02 at 17:19 +1100, Michael Ellerman wrote:
>
> Joakim Tjernlund writes:
> > On Fri, 2019-03-29 at 22:26 +1100, Michael Ellerman wrote:
> > > From: Diana Craciun
> > >
> > > commit ebcd1bfc33c7a90df941df68a6e5d4018c022fba upstream.
> &g
On Wed, 2019-04-03 at 11:53 +1100, Michael Ellerman wrote:
>
> Joakim Tjernlund writes:
> > On Tue, 2019-04-02 at 17:19 +1100, Michael Ellerman wrote:
> > > Joakim Tjernlund writes:
> ...
> > > > Can I compile it away?
> > >
> > > You
We have an embedded T1042 NXP CDC ethernet gadget which seems to completely
freeze when an
usb0 I/F is established and one do 1 of two things:
1) reboot the connected Linux laptop -> CDC gadget appears to enter complete
system freeze.
2) on laptop, ifconfig usb0 down; rmmod cdc_ether -> CDC gag
In __die(), see below, there is this call to notify_send() with SIGSEGV
hardcoded, this seems odd
to me as the variable "err" holds the true signal(in my case SIGBUS)
Should not SIGSEGV be replaced with the true signal no.?
Jocke
static int __die(const char *str, struct pt_regs *regs, long err
ophe Leroy a écrit :
> >
> > Le 23/03/2020 à 15:17, Joakim Tjernlund a écrit :
> > > In __die(), see below, there is this call to notify_send() with
> > > SIGSEGV hardcoded, this seems odd
> > > to me as the variable "err" holds the true signal(in my case S
On Mon, 2020-03-23 at 16:31 +0100, Christophe Leroy wrote:
>
> Le 23/03/2020 à 16:08, Joakim Tjernlund a écrit :
> > On Mon, 2020-03-23 at 15:45 +0100, Christophe Leroy wrote:
> > > CAUTION: This email originated from outside of the organization. Do not
> > > c
On Wed, 2020-03-25 at 17:02 +, David Laight wrote:
> CAUTION: This email originated from outside of the organization. Do
> not click links or open attachments unless you recognize the sender
> and know the content is safe.
>
>
> From: Joakim Tjernlund
> > S
On Thu, 2020-03-26 at 11:28 +1100, Michael Ellerman wrote:
> CAUTION: This email originated from outside of the organization. Do not click
> links or open attachments unless you recognize the sender and know the
> content is safe.
>
>
> Joakim Tjernlund writes:
> > On
On Thu, 2020-03-26 at 11:28 +1100, Michael Ellerman wrote:
> CAUTION: This email originated from outside of the organization. Do not click
> links or open attachments unless you recognize the sender and know the
> content is safe.
>
>
> Joakim Tjernlund writes:
> > On
We see corrupt HW clock time every now and then(really hard to reproduce)
Our RTC is a DS1388 on an I2C bus.
Looking at ntp_notify_cmos_timer() and it's delayed work queue impl. I wonder
if there could be a race here w.r.t reboot ?
Could the 11 minute update kick in just as the system is about to
On Wed, 2018-08-29 at 09:18 +0200, Christophe LEROY wrote:
> CAUTION: This email originated from outside of the organization. Do not click
> links or open attachments unless you recognize the sender and know the
> content is safe.
>
>
> Le 29/08/2018 à 04:54, Qiang Zhao a écrit :
> > From: Davi
to_tm() hardcodes wday to -1 as "No-one uses the day of the week".
But recently rtc driver ds1307 does care and tries to correct wday.
Add wday calculation(stolen from rtc_time64_to_tm) to to_tm() to please ds1307.
Signed-off-by: Joakim Tjernlund
---
arch/powerpc/kernel/time.c | 8 +
On Tue, 2018-09-18 at 10:08 +0200, Mathieu Malaterre wrote:
>
>
> On Wed, Aug 29, 2018 at 10:03 AM Joakim Tjernlund
> wrote:
> >
> > to_tm() hardcodes wday to -1 as "No-one uses the day of the week".
> > But recently rtc driver ds1307 does care and
On Tue, 2018-10-16 at 12:33 +, Christophe Leroy wrote:
>
>
> GCC 4.6 is the minimum supported now.
Ouch, from kernel 4.19 or earlier even ?
Jocke
SPI (and others) has a way to define bus number in a aliases:
aliases {
ethernet4 = &enet4;
ethernet0 = &enet0;
ethernet1 = &enet1;
ethernet2 = &enet2;
ethernet3 = &enet3;
spi0 = &spi0
};
On Tue, 2018-10-23 at 10:03 -0700, Florian Fainelli wrote:
> CAUTION: This email originated from outside of the organization. Do not click
> links or open attachments unless you recognize the sender and know the
> content is safe.
>
>
> On 10/23/18 9:49 AM, Joakim Tjernlund w
On Tue, 2018-10-23 at 11:20 -0700, Florian Fainelli wrote:
>
> On 10/23/18 11:02 AM, Joakim Tjernlund wrote:
> > On Tue, 2018-10-23 at 10:03 -0700, Florian Fainelli wrote:
> > >
> > >
> > > On 10/23/18 9:49 AM, Joakim Tjernlund wrote:
> > > > S
On Tue, 2018-10-23 at 13:07 -0700, Florian Fainelli wrote:
>
> On 10/23/18 1:02 PM, Joakim Tjernlund wrote:
> > On Tue, 2018-10-23 at 11:20 -0700, Florian Fainelli wrote:
> > > On 10/23/18 11:02 AM, Joakim Tjernlund wrote:
> > > > On Tue, 2018-10-23 at 10
> Florian Fainelli wrote:
>
> > On 10/23/18 11:02 AM, Joakim Tjernlund wrote:
> > > On Tue, 2018-10-23 at 10:03 -0700, Florian Fainelli wrote:
> > > I also noted that using status = "disabled" didn't work either to
> > > create a fix name scheme.
This cousin to gpio-mpc8xxx was lacking a multiple pins method,
add one.
Signed-off-by: Joakim Tjernlund
---
drivers/soc/fsl/qe/gpio.c | 28
1 file changed, 28 insertions(+)
diff --git a/drivers/soc/fsl/qe/gpio.c b/drivers/soc/fsl/qe/gpio.c
index 3b27075c21a7
espi does not look for a OF cell-index property which
makes the bus numbering dynamic only. This add an
optional cell-index.
Signed-off-by: Joakim Tjernlund
---
drivers/spi/spi-fsl-espi.c | 8
1 file changed, 8 insertions(+)
diff --git a/drivers/spi/spi-fsl-espi.c b/drivers/spi/spi
On Thu, 2018-06-21 at 02:38 +, Qiang Zhao wrote:
>
> On 06/19/2018 09:22 AM, Joakim Tjernlund wrote:
> -Original Message-
> From: Linuxppc-dev
> [mailto:linuxppc-dev-bounces+qiang.zhao=nxp@lists.ozlabs.org] On Behalf
> Of Joakim Tjernlund
> Sent: 2018年6月20
On Tue, 2018-06-26 at 23:41 +1000, Michael Ellerman wrote:
>
> Joakim Tjernlund writes:
> > On Thu, 2018-06-21 at 02:38 +, Qiang Zhao wrote:
> > > On 06/19/2018 09:22 AM, Joakim Tjernlund wrote:
> > > -Original Message-
> > > From: Linuxppc-
bs.org; m...@ellerman.id.au; Qiang Zhao
> >
> > Subject: Re: [PATCH] QE GPIO: Add qe_gpio_set_multiple
> >
> > +Leo
> >
> > On 07/03/2018 03:30 AM, Joakim Tjernlund wrote:
> > > On Tue, 2018-06-26 at 23:41 +1000, Michael Ellerman wrote:
> > >
On Tue, 2020-01-14 at 16:02 +, Christophe Leroy wrote:
> CAUTION: This email originated from outside of the organization. Do not click
> links or open attachments unless you recognize the sender and know the
> content is safe.
>
>
> No need to 'goto err;' for just doing a return.
> return d
On Tue, 2020-01-14 at 14:54 +, Colin King wrote:
>
> From: Colin Ian King
>
> Array utdm_info is declared as an array of MAX_HDLC_NUM (4) elements
> however up to UCC_MAX_NUM (8) elements are potentially being written
> to it. Currently we have an array out-of-bounds write error on the
> la
On Mon, 2020-02-03 at 16:47 +, Christophe Leroy wrote:
> CAUTION: This email originated from outside of the organization. Do not click
> links or open attachments unless you recognize the sender and know the
> content is safe.
>
>
> _tlbia() is a function used only on 603/603e core, ie on C
PPC __arch_swab32 and __arch_swab16 generates non optimal code.
They do not schedule very well, need to copy its input register
and swab16 needs an extra insn to clear its upper bits.
Fix this with better inline ASM.
Signed-off-by: Joakim Tjernlund
---
arch/powerpc/include/asm/swab.h | 28
Benjamin Herrenschmidt wrote on 2011/09/10 11:24:39:
>
> On Fri, 2011-09-09 at 14:10 +0200, Joakim Tjernlund wrote:
> > PPC __arch_swab32 and __arch_swab16 generates non optimal code.
> > They do not schedule very well, need to copy its input register
> > and swab16 need
not
needed in 2.4
8 MB Large page support will follow.
Joakim Tjernlund (14):
8xx: Use a macro to simpliy CPU6 errata code.
8xx: Tag DAR with 0x00f0 to catch buggy instructions.
8xx: invalidate non present TLBs
8xx: Fix CONFIG_PIN_TLB
8xx: Update TLB asm so it behaves as linux mm
dcbz, dcbf, dcbi, dcbst and icbi do not set DAR when they
cause a DTLB Error. Dectect this by tagging DAR with 0x00f0
at every exception exit that modifies DAR.
This also fixes MachineCheck to pass DAR and DSISR as well.
Signed-off-by: Joakim Tjernlund
---
arch/ppc/kernel/head_8xx.S | 18
8xx sometimes need to load a invalid/non-present TLBs in
it DTLB asm handler.
These must be invalidated separately as 8xx MMU don't.
Signed-off-by: Joakim Tjernlund
---
arch/ppc/kernel/head_8xx.S | 12 ++--
1 files changed, 10 insertions(+), 2 deletions(-)
diff --git a/arc
Signed-off-by: Joakim Tjernlund
---
arch/ppc/kernel/head_8xx.S | 84 +++
1 files changed, 22 insertions(+), 62 deletions(-)
diff --git a/arch/ppc/kernel/head_8xx.S b/arch/ppc/kernel/head_8xx.S
index f9a30f3..ba05a57 100644
--- a/arch/ppc/kernel
The wrong register was loaded into MD_RPN.
Signed-off-by: Joakim Tjernlund
---
arch/ppc/kernel/head_8xx.S |4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/ppc/kernel/head_8xx.S b/arch/ppc/kernel/head_8xx.S
index b3aff21..9d8a1b5 100644
--- a/arch/ppc/kernel
This is an assembler version to fixup DAR not being set
by dcbX, icbi instructions. There are two versions, one
uses selfmodifing code, the other uses a
jump table but is much bigger(default).
Signed-off-by: Joakim Tjernlund
---
arch/ppc/kernel/head_8xx.S | 149
space.
- Free up 2 SW TLB bits in the linux pte(add back _PAGE_WRITETHRU ?)
- kernel RO/user NA support. Not sure this is really needed, would save
a few insn if not required.
Cons:
- A few more instructions in the DTLB Miss routine.
Signed-off-by: Joakim Tjernlund
---
arch/ppc/kernel
branch to common code in DTLB Miss instead.
Signed-off-by: Joakim Tjernlund
---
arch/ppc/kernel/head_8xx.S | 23 ++-
1 files changed, 2 insertions(+), 21 deletions(-)
diff --git a/arch/ppc/kernel/head_8xx.S b/arch/ppc/kernel/head_8xx.S
index 0891b96..367fec0 100644
--- a
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