[PATCH v5 00/21] Initial Prefixed Instruction support

2020-04-06 Thread Jordan Niethe
A future revision of the ISA will introduce prefixed instructions. A prefixed instruction is composed of a 4-byte prefix followed by a 4-byte suffix. All prefixes have the major opcode 1. A prefix will never be a valid word instruction. A suffix may be an existing word instruction or a new instruc

[PATCH v5 01/21] powerpc/xmon: Remove store_inst() for patch_instruction()

2020-04-06 Thread Jordan Niethe
For modifying instructions in xmon, patch_instruction() can serve the same role that store_inst() is performing with the advantage of not being specific to xmon. In some places patch_instruction() is already being using followed by store_inst(). In these cases just remove the store_inst(). Otherwis

[PATCH v5 02/21] powerpc/xmon: Move out-of-line instructions to text section

2020-04-06 Thread Jordan Niethe
To execute an instruction out of line after a breakpoint, the NIP is set to the address of struct bpt::instr. Here a copy of the instruction that was replaced with a breakpoint is kept, along with a trap so normal flow can be resumed after XOLing. The struct bpt's are located within the data sectio

[PATCH v5 03/21] powerpc: Change calling convention for create_branch() et. al.

2020-04-06 Thread Jordan Niethe
create_branch(), create_cond_branch() and translate_branch() return the instruction that they create, or return 0 to signal an error. Seperate these concerns in preparation for an instruction type that is not just an unsigned int. Fill the created instruction to a pointer passed as the first param

[PATCH v5 04/21] powerpc: Use a macro for creating instructions from u32s

2020-04-06 Thread Jordan Niethe
In preparation for instructions having a more complex data type start using a macro, ppc_inst(), for making an instruction out of a u32. A macro is used so that instructions can be used as initializer elements. Currently this does nothing, but it will allow for creating a data type that can repres

[PATCH v5 05/21] powerpc: Use a function for getting the instruction op code

2020-04-06 Thread Jordan Niethe
In preparation for using a data type for instructions that can not be directly used with the '>>' operator use a function for getting the op code of an instruction. Signed-off-by: Jordan Niethe --- v4: New to series --- arch/powerpc/include/asm/inst.h | 5 + arch/powerpc/kernel/align.c

[PATCH v5 06/21] powerpc: Use an accessor for instructions

2020-04-06 Thread Jordan Niethe
In preparation for introducing a more complicated instruction type to accomodate prefixed instructions use an accessor for getting an instruction as a u32. Currently this does nothing. Signed-off-by: Jordan Niethe --- v4: New to series v5: Remove references to 'word' instructions --- arch/powerp

[PATCH v5 07/21] powerpc: Use a function for byte swapping instructions

2020-04-06 Thread Jordan Niethe
Use a function for byte swapping instructions in preparation of a more complicated instruction type. Signed-off-by: Jordan Niethe --- arch/powerpc/include/asm/inst.h | 5 + arch/powerpc/kernel/align.c | 2 +- 2 files changed, 6 insertions(+), 1 deletion(-) diff --git a/arch/powerpc/incl

[PATCH v5 08/21] powerpc: Introduce functions for instruction equality

2020-04-06 Thread Jordan Niethe
In preparation for an instruction data type that can not be directly used with the '==' operator use functions for checking equality. Signed-off-by: Jordan Niethe --- v5: Remove ppc_inst_null() --- arch/powerpc/include/asm/inst.h | 5 + arch/powerpc/kernel/trace/ftrace.c | 15 +++

[PATCH v5 09/21] powerpc: Use a datatype for instructions

2020-04-06 Thread Jordan Niethe
Currently unsigned ints are used to represent instructions on powerpc. This has worked well as instructions have always been 4 byte words. However, a future ISA version will introduce some changes to instructions that mean this scheme will no longer work as well. This change is Prefixed Instruction

[PATCH v5 10/21] powerpc: Use a function for reading instructions

2020-04-06 Thread Jordan Niethe
Prefixed instructions will mean there are instructions of different length. As a result dereferencing a pointer to an instruction will not necessarily give the desired result. Introduce a function for reading instructions from memory into the instruction data type. Signed-off-by: Jordan Niethe --

[PATCH v5 11/21] powerpc: Define and use __get_user_instr{, inatomic}()

2020-04-06 Thread Jordan Niethe
Define specific __get_user_instr() and __get_user_instr_inatomic() macros for reading instructions from user space. Signed-off-by: Jordan Niethe --- arch/powerpc/include/asm/uaccess.h | 5 + arch/powerpc/kernel/align.c | 2 +- arch/powerpc/kernel/hw_breakpoint.c | 2 +- arch/powerpc

[PATCH v5 12/21] powerpc: Introduce a function for reporting instruction length

2020-04-06 Thread Jordan Niethe
Currently all instructions have the same length, but in preparation for prefixed instructions introduce a function for returning instruction length. Signed-off-by: Jordan Niethe --- arch/powerpc/include/asm/inst.h | 5 + arch/powerpc/kernel/kprobes.c | 6 -- arch/powerpc/kernel/uprobes

[PATCH v5 13/21] powerpc/xmon: Use a function for reading instructions

2020-04-06 Thread Jordan Niethe
Currently in xmon, mread() is used for reading instructions. In preparation for prefixed instructions, create and use a new function, mread_instr(), especially for reading instructions. Signed-off-by: Jordan Niethe --- v5: New to series, seperated from "Add prefixed instructions to instruction da

[PATCH v5 14/21] powerpc/xmon: Move insertion of breakpoint for xol'ing

2020-04-06 Thread Jordan Niethe
When a new breakpoint is created, the second instruction of that breakpoint is patched with a trap instruction. This assumes the length of the instruction is always the same. In preparation for prefixed instructions, remove this assumption. Insert the trap instruction at the same time the first ins

[PATCH v5 15/21] powerpc: Make test_translate_branch() independent of instruction length

2020-04-06 Thread Jordan Niethe
test_translate_branch() uses two pointers to instructions within a buffer, p and q, to test patch_branch(). The pointer arithmetic done on them assumes a size of 4. This will not work if the instruction length changes. Instead do the arithmetic relative to the void * to the buffer. Signed-off-by:

[PATCH v5 16/21] powerpc: Enable Prefixed Instructions

2020-04-06 Thread Jordan Niethe
From: Alistair Popple Prefix instructions have their own FSCR bit which needs to enabled via a CPU feature. The kernel will save the FSCR for problem state but it needs to be enabled initially. If prefixed instructions are made unavailable by the [H]FSCR, attempting to use them will cause a faci

[PATCH v5 17/21] powerpc: Define new SRR1 bits for a future ISA version

2020-04-06 Thread Jordan Niethe
Add the BOUNDARY SRR1 bit definition for when the cause of an alignment exception is a prefixed instruction that crosses a 64-byte boundary. Add the PREFIXED SRR1 bit definition for exceptions caused by prefixed instructions. Bit 35 of SRR1 is called SRR1_ISI_N_OR_G. This name comes from it being

[PATCH v5 18/21] powerpc64: Add prefixed instructions to instruction data type

2020-04-06 Thread Jordan Niethe
For powerpc64, redefine the ppc_inst type so both word and prefixed instructions can be represented. On powerpc32 the type will remain the same. Update places which had assumed instructions to be 4 bytes long. Signed-off-by: Jordan Niethe --- v4: New to series v5: - Distinguish normal instructi

[PATCH v5 19/21] powerpc: Support prefixed instructions in alignment handler

2020-04-06 Thread Jordan Niethe
If a prefixed instruction results in an alignment exception, the SRR1_PREFIXED bit is set. The handler attempts to emulate the responsible instruction and then increment the NIP past it. Use SRR1_PREFIXED to determine by how much the NIP should be incremented. Prefixed instructions are not permitt

[PATCH v5 20/21] powerpc sstep: Add support for prefixed load/stores

2020-04-06 Thread Jordan Niethe
This adds emulation support for the following prefixed integer load/stores: * Prefixed Load Byte and Zero (plbz) * Prefixed Load Halfword and Zero (plhz) * Prefixed Load Halfword Algebraic (plha) * Prefixed Load Word and Zero (plwz) * Prefixed Load Word Algebraic (plwa) * Prefixed Load

[PATCH v5 21/21] powerpc sstep: Add support for prefixed fixed-point arithmetic

2020-04-06 Thread Jordan Niethe
This adds emulation support for the following prefixed Fixed-Point Arithmetic instructions: * Prefixed Add Immediate (paddi) Reviewed-by: Balamuruhan S Signed-off-by: Jordan Niethe --- v3: Since we moved the prefixed loads/stores into the load/store switch statement it no longer makes sense to

Re: [PATCH v5 05/21] powerpc: Use a function for getting the instruction op code

2020-04-06 Thread Christophe Leroy
Le 06/04/2020 à 10:09, Jordan Niethe a écrit : In preparation for using a data type for instructions that can not be directly used with the '>>' operator use a function for getting the op code of an instruction. Signed-off-by: Jordan Niethe --- v4: New to series --- arch/powerpc/include/as

Re: [PATCH v3] powerpc/powernv: add NULL check after kzalloc in opal_add_one_export

2020-04-06 Thread Oliver O'Halloran
On Mon, Apr 6, 2020 at 11:15 AM Qiujun Huang wrote: > > On Mon, Apr 6, 2020 at 3:06 AM Markus Elfring wrote: > > > > > Here needs a NULL check. > quite obvious? > > > > I find this change description questionable > > (despite of a reasonable patch subject). > > > > > > > Issue found by coccinelle

Re: [PATCH v3] powerpc/powernv: add NULL check after kzalloc in opal_add_one_export

2020-04-06 Thread Qiujun Huang
On Mon, Apr 6, 2020 at 5:01 PM Oliver O'Halloran wrote: > > On Mon, Apr 6, 2020 at 11:15 AM Qiujun Huang wrote: > > > > On Mon, Apr 6, 2020 at 3:06 AM Markus Elfring wrote: > > > > > > > Here needs a NULL check. > > quite obvious? > > > > > > I find this change description questionable > > > (de

Re: [PATCH v5 05/21] powerpc: Use a function for getting the instruction op code

2020-04-06 Thread Jordan Niethe
On Mon, Apr 6, 2020 at 6:22 PM Christophe Leroy wrote: > > > > Le 06/04/2020 à 10:09, Jordan Niethe a écrit : > > In preparation for using a data type for instructions that can not be > > directly used with the '>>' operator use a function for getting the op > > code of an instruction. > > > > Sig

[PATCH v4] powerpc/powernv: add NULL check after kzalloc in opal_add_one_export

2020-04-06 Thread Qiujun Huang
Here needs a NULL check as kzalloc may fail returning NULL. Issue was found by coccinelle. Generated by: scripts/coccinelle/null/kmerr.cocci Signed-off-by: Qiujun Huang Reviewed-by: Oliver O'Halloran --- v3->v4: Added the information about coccinelle script. Added change log.

Re: [PATCH 1/7] powerpc/powernv/npu: Clean up compound table group initialisation

2020-04-06 Thread Alexey Kardashevskiy
On 06/04/2020 13:07, Oliver O'Halloran wrote: > Re-work the control flow a bit so what's going on is a little clearer. > This also ensures the table_group is only initialised once in the P9 > case. This shouldn't be a functional change since all the GPU PCI > devices should have the same table_g

Re: [PATCH 2/7] powerpc/powernv/iov: Don't add VFs to iommu group during PE config

2020-04-06 Thread Alexey Kardashevskiy
On 06/04/2020 13:07, Oliver O'Halloran wrote: > In pnv_ioda_setup_vf_PE() we register an iommu group for the VF PE > then call pnv_ioda_setup_bus_iommu_group() to add devices to that group. > However, this function is called before the VFs are scanned so there's > no devices to add. > > Signed-

Re: [PATCH 3/7] powerpc/powernv/pci: Register iommu group at PE DMA setup

2020-04-06 Thread Alexey Kardashevskiy
On 06/04/2020 13:07, Oliver O'Halloran wrote: > Move the registration of IOMMU groups out of the post-phb init fixup and > into when we configure DMA for a PE. For most devices this doesn't > result in any functional changes, but for NVLink attached GPUs it > requires a bit of care. When the GPU

Re: [PATCH 4/7] powerpc/powernv/pci: Add device to iommu group during dma_dev_setup()

2020-04-06 Thread Alexey Kardashevskiy
On 06/04/2020 13:07, Oliver O'Halloran wrote: > Historically adding devices to their respective iommu group has been > handled by the post-init phb fixup for most devices. This was done > because: > > 1) The IOMMU group is tied to the PE (usually) so we can only setup the >iommu groups afte

Re: [PATCH v5 18/21] powerpc64: Add prefixed instructions to instruction data type

2020-04-06 Thread Alistair Popple
> diff --git a/arch/powerpc/include/asm/inst.h > b/arch/powerpc/include/asm/inst.h index 70b37a35a91a..7e23e7146c66 100644 > --- a/arch/powerpc/include/asm/inst.h > +++ b/arch/powerpc/include/asm/inst.h > @@ -8,23 +8,67 @@ > > struct ppc_inst { > u32 val; > +#ifdef __powerpc64__ > +

Re: [PATCH 5/7] powerpc/powernv/pci: Delete old iommu recursive iommu setup

2020-04-06 Thread Alexey Kardashevskiy
On 06/04/2020 13:07, Oliver O'Halloran wrote: > No longer used. > > Signed-off-by: Oliver O'Halloran Nit: you could fold it into 4/7. Reviewed-by: Alexey Kardashevskiy > --- > arch/powerpc/platforms/powernv/pci-ioda.c | 32 --- > 1 file changed, 32 deletions(-) >

Re: [PATCH 6/7] powerpc/powernv/pci: Move tce size parsing to pci-ioda-tce.c

2020-04-06 Thread Alexey Kardashevskiy
On 06/04/2020 13:07, Oliver O'Halloran wrote: > Move it in with the rest of the TCE wrangling rather than carting around > a static prototype in pci-ioda.c > > Signed-off-by: Oliver O'Halloran Reviewed-by: Alexey Kardashevskiy > --- > arch/powerpc/platforms/powernv/pci-ioda-tce.c | 28 +

Re: [PATCH 7/7] powerpc/powernv/npu: Move IOMMU group setup into npu-dma.c

2020-04-06 Thread Alexey Kardashevskiy
On 06/04/2020 13:07, Oliver O'Halloran wrote: > The NVlink IOMMU group setup is only relevant to NVLink devices so move > it into the NPU containment zone. This let us remove some prototypes in > pci.h and staticfy some function definitions. > > Signed-off-by: Oliver O'Halloran Reviewed-by:

Re: Make PowerNV IOMMU group setup saner (and fix it for hotpug)

2020-04-06 Thread Alexey Kardashevskiy
On 06/04/2020 13:07, Oliver O'Halloran wrote: > Currently on PowerNV the IOMMU group of a device is initialised in > boot-time fixup which runs after devices are probed. Because this is > only run at boot time hotplugged devices do not recieve an iommu group > assignment which prevents them from

Re: [PATCH v3] powerpc/powernv: add NULL check after kzalloc in opal_add_one_export

2020-04-06 Thread Markus Elfring
Here needs a NULL check. >> quite obvious? I suggest to consider another fine-tuning for the wording also around such “obvious” programming items. >>> I find this change description questionable >>> (despite of a reasonable patch subject). I got further development concerns. https://git.ke

Re: [PATCH v5 18/21] powerpc64: Add prefixed instructions to instruction data type

2020-04-06 Thread Christophe Leroy
Le 06/04/2020 à 11:52, Alistair Popple a écrit : [...] @@ -32,14 +76,31 @@ static inline struct ppc_inst ppc_inst_swab(struct ppc_inst x) return ppc_inst(swab32(ppc_inst_val(x))); } +static inline u32 ppc_inst_val(struct ppc_inst x) +{ + return x.val; +} + static inline struct ppc

Re: [PATCH v5 03/21] powerpc: Change calling convention for create_branch() et. al.

2020-04-06 Thread kbuild test robot
Hi Jordan, Thank you for the patch! Yet something to improve: [auto build test ERROR on v5.6] [also build test ERROR on next-20200406] [cannot apply to powerpc/next kvm-ppc/kvm-ppc-next scottwood/next] [if your patch is applied to the wrong git tree, please drop us a note to help improve the

Re: [PATCH v4] powerpc/powernv: add NULL check after kzalloc in opal_add_one_export

2020-04-06 Thread Michael Ellerman
Qiujun Huang writes: > Here needs a NULL check as kzalloc may fail returning NULL. > > Issue was found by coccinelle. > Generated by: scripts/coccinelle/null/kmerr.cocci > > Signed-off-by: Qiujun Huang > Reviewed-by: Oliver O'Halloran > > --- Thanks for putting up with all the review comments :

Re: [PATCH v5 09/21] powerpc: Use a datatype for instructions

2020-04-06 Thread kbuild test robot
Hi Jordan, Thank you for the patch! Yet something to improve: [auto build test ERROR on v5.6] [cannot apply to powerpc/next kvm-ppc/kvm-ppc-next scottwood/next next-20200406] [if your patch is applied to the wrong git tree, please drop us a note to help improve the system. BTW, we also suggest

Re: [PATCH v5 09/21] powerpc: Use a datatype for instructions

2020-04-06 Thread kbuild test robot
Hi Jordan, Thank you for the patch! Yet something to improve: [auto build test ERROR on v5.6] [cannot apply to powerpc/next kvm-ppc/kvm-ppc-next scottwood/next next-20200406] [if your patch is applied to the wrong git tree, please drop us a note to help improve the system. BTW, we also suggest

Re: [PATCH v3] powerpc/powernv: add NULL check after kzalloc in opal_add_one_export

2020-04-06 Thread Qiujun Huang
On Mon, Apr 6, 2020 at 6:02 PM Markus Elfring wrote: > > Here needs a NULL check. > >> quite obvious? > > I suggest to consider another fine-tuning for the wording also around > such “obvious” programming items. > > > >>> I find this change description questionable > >>> (despite of a reasona

Re: [PATCH v4] powerpc/powernv: add NULL check after kzalloc in opal_add_one_export

2020-04-06 Thread Qiujun Huang
On Mon, Apr 6, 2020 at 6:30 PM Michael Ellerman wrote: > > Qiujun Huang writes: > > Here needs a NULL check as kzalloc may fail returning NULL. > > > > Issue was found by coccinelle. > > Generated by: scripts/coccinelle/null/kmerr.cocci > > > > Signed-off-by: Qiujun Huang > > Reviewed-by: Oliver

Re: [GIT PULL] Please pull powerpc/linux.git powerpc-5.7-1 tag

2020-04-06 Thread Michael Ellerman
Linus Torvalds writes: > On Sun, Apr 5, 2020 at 5:53 AM Michael Ellerman wrote: >> >> There is one conflict in fs/sysfs/group.c, between our: >> >> 9255782f7061 ("sysfs: Wrap __compat_only_sysfs_link_entry_to_kobj function >> to change the symlink name") > [...] > > The conflict was trivial. >

Re: [PATCH v5 18/21] powerpc64: Add prefixed instructions to instruction data type

2020-04-06 Thread Jordan Niethe
On Mon, 6 Apr 2020, 7:52 pm Alistair Popple, wrote: > > diff --git a/arch/powerpc/include/asm/inst.h > > b/arch/powerpc/include/asm/inst.h index 70b37a35a91a..7e23e7146c66 100644 > > --- a/arch/powerpc/include/asm/inst.h > > +++ b/arch/powerpc/include/asm/inst.h > > @@ -8,23 +8,67 @@ > > > > str

Re: [PATCH v5 18/21] powerpc64: Add prefixed instructions to instruction data type

2020-04-06 Thread kbuild test robot
Hi Jordan, Thank you for the patch! Yet something to improve: [auto build test ERROR on v5.6] [cannot apply to powerpc/next kvm-ppc/kvm-ppc-next scottwood/next next-20200406] [if your patch is applied to the wrong git tree, please drop us a note to help improve the system. BTW, we also suggest

Re: [PATCH v5 18/21] powerpc64: Add prefixed instructions to instruction data type

2020-04-06 Thread Jordan Niethe
On Mon, Apr 6, 2020 at 8:25 PM Christophe Leroy wrote: > > > > Le 06/04/2020 à 11:52, Alistair Popple a écrit : > > [...] > > >> @@ -32,14 +76,31 @@ static inline struct ppc_inst ppc_inst_swab(struct > >> ppc_inst x) return ppc_inst(swab32(ppc_inst_val(x))); > >> } > >> > >> +static inline u32 p

Re: [PATCH v5 20/21] powerpc sstep: Add support for prefixed load/stores

2020-04-06 Thread kbuild test robot
Hi Jordan, Thank you for the patch! Yet something to improve: [auto build test ERROR on v5.6] [cannot apply to powerpc/next kvm-ppc/kvm-ppc-next scottwood/next next-20200406] [if your patch is applied to the wrong git tree, please drop us a note to help improve the system. BTW, we also suggest

Re: [PATCH 1/2] dma-mapping: add a dma_ops_bypass flag to struct device

2020-04-06 Thread Christoph Hellwig
On Fri, Apr 03, 2020 at 07:38:11PM +1100, Alexey Kardashevskiy wrote: > > > On 26/03/2020 12:26, Alexey Kardashevskiy wrote: > > > > > > On 25/03/2020 19:37, Christoph Hellwig wrote: > >> On Wed, Mar 25, 2020 at 03:51:36PM +1100, Alexey Kardashevskiy wrote: > > This is for persistent memory

Re: [PATCH v4] powerpc/powernv: add NULL check after kzalloc in opal_add_one_export

2020-04-06 Thread Markus Elfring
>>> Here needs a NULL check as kzalloc may fail returning NULL. I find this wording potentially confusing. * Such function calls will usually succeed to return a pointer. * The desired memory allocation can fail. * Please choose an imperative wording for the change description. >>> Issue was

remove set_fs calls from the exec and coredump code

2020-04-06 Thread Christoph Hellwig
Hi all, this series gets rid of playing with the address limit in the exec and coredump code. Most of this was fairly trivial, the biggest changes are those to the spufs coredump code.

[PATCH 1/6] powerpc/spufs: simplify spufs core dumping

2020-04-06 Thread Christoph Hellwig
Replace the coredump ->read method with a ->dump method that must call dump_emit itself. That way we avoid a buffer allocation an messing with set_fs() to call into code that is intended to deal with user buffers. For the ->get case we can now use a small on-stack buffer and avoid memory allocatio

[PATCH 2/6] binfmt_elf: open code copy_siginfo_to_user to kernelspace buffer

2020-04-06 Thread Christoph Hellwig
Instead of messing with the address limit just open code the trivial memcpy + memset logic. Signed-off-by: Christoph Hellwig --- fs/binfmt_elf.c | 7 +++ 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/fs/binfmt_elf.c b/fs/binfmt_elf.c index f4713ea76e82..d744ce9a4b52 100644 --

[PATCH 3/6] binfmt_elf: remove the set_fs(KERNEL_DS) in elf_core_dump

2020-04-06 Thread Christoph Hellwig
There is no logic in elf_core_dump itself that uses uaccess routines on kernel pointers, the file writes are nicely encapsulated in dump_emit which does its own set_fs. Signed-off-by: Christoph Hellwig --- fs/binfmt_elf.c | 40 +--- 1 file changed, 13 insertio

[PATCH 4/6] binfmt_elf_fdpic: remove the set_fs(KERNEL_DS) in elf_fdpic_core_dump

2020-04-06 Thread Christoph Hellwig
There is no logic in elf_fdpic_core_dump itself that uses uaccess routines on kernel pointers, the file writes are nicely encapsulated in dump_emit which does its own set_fs. Signed-off-by: Christoph Hellwig --- fs/binfmt_elf_fdpic.c | 31 --- 1 file changed, 12 inser

[PATCH 5/6] exec: simplify the copy_strings_kernel calling convention

2020-04-06 Thread Christoph Hellwig
copy_strings_kernel is always used with a single argument, adjust the calling convention to that. Signed-off-by: Christoph Hellwig --- fs/binfmt_em86.c| 6 +++--- fs/binfmt_misc.c| 4 ++-- fs/binfmt_script.c | 6 +++--- fs/exec.c | 13 ++--- include/

[PATCH 6/6] exec: open code copy_string_kernel

2020-04-06 Thread Christoph Hellwig
Currently copy_string_kernel is just a wrapper around copy_strings that simplifies the calling conventions and uses set_fs to allow passing a kernel pointer. But due to the fact the we only need to handle a single kernel argument pointer, the logic can be sigificantly simplified while getting rid

Re: [PATCH 6/6] exec: open code copy_string_kernel

2020-04-06 Thread Matthew Wilcox
On Mon, Apr 06, 2020 at 02:03:12PM +0200, Christoph Hellwig wrote: > + int len = strnlen(arg, MAX_ARG_STRLEN) + 1 /* terminating null */; If you end up doing another version of this, it's a terminating NUL, not null. I almost wonder if we shouldn't have #define TERMINATING_NUL 1 in

[Bug 207129] PowerMac G4 DP (5.6.2 debug kernel + inline KASAN) freezes shortly after booting with "do_IRQ: stack overflow: 1760"

2020-04-06 Thread bugzilla-daemon
https://bugzilla.kernel.org/show_bug.cgi?id=207129 --- Comment #2 from Erhard F. (erhar...@mailbox.org) --- Created attachment 288229 --> https://bugzilla.kernel.org/attachment.cgi?id=288229&action=edit screenshot01.jpg Without CONFIG_DEBUG_STACKOVERFLOW things are better. The rsync completes,

[Bug 207129] PowerMac G4 DP (5.6.2 debug kernel + inline KASAN) freezes shortly after booting with "do_IRQ: stack overflow: 1760"

2020-04-06 Thread bugzilla-daemon
https://bugzilla.kernel.org/show_bug.cgi?id=207129 --- Comment #3 from Erhard F. (erhar...@mailbox.org) --- Created attachment 288231 --> https://bugzilla.kernel.org/attachment.cgi?id=288231&action=edit screenshot02.jpg -- You are receiving this mail because: You are watching the assignee of t

[PATCH v5 1/2] powerpc/powernv: Remove redundant assignments to attr and name

2020-04-06 Thread Qiujun Huang
We don't need to go to the labal of out when of_property_read_u64_array fails, as there is nothing to do. Just return. And we can remove the redundant assignments to attr and name. Signed-off-by: Qiujun Huang Reviewed-by: Oliver O'Halloran --- arch/powerpc/platforms/powernv/opal.c | 6 +++--- 1

[PATCH v5 0/2] Fix opal_add_one_export

2020-04-06 Thread Qiujun Huang
We should check the return value of kzalloc, as kzalloc may fail returning NULL. --- v4->v5: Separate the patch into two. v3->v4: Added the information about coccinelle script. Added change log. Added Oliver's Reviewed-by. v2->v3: Removed redundant assignmen

[PATCH v5 2/2] powerpc/powernv: Add NULL check after kzalloc in opal_add_one_export

2020-04-06 Thread Qiujun Huang
Here needs a NULL check, as kzalloc may fail returning NULL. Issue was found by coccinelle. Generated by: scripts/coccinelle/null/kmerr.cocci Signed-off-by: Qiujun Huang Reviewed-by: Oliver O'Halloran --- arch/powerpc/platforms/powernv/opal.c | 3 +++ 1 file changed, 3 insertions(+) diff --gi

Re: [PATCH 2/6] binfmt_elf: open code copy_siginfo_to_user to kernelspace buffer

2020-04-06 Thread Arnd Bergmann
On Mon, Apr 6, 2020 at 2:03 PM Christoph Hellwig wrote: > > Instead of messing with the address limit just open code the trivial > memcpy + memset logic. > > Signed-off-by: Christoph Hellwig > --- > fs/binfmt_elf.c | 7 +++ > 1 file changed, 3 insertions(+), 4 deletions(-) > > diff --git a/f

Re: [PATCH 3/6] binfmt_elf: remove the set_fs(KERNEL_DS) in elf_core_dump

2020-04-06 Thread Al Viro
On Mon, Apr 06, 2020 at 02:03:09PM +0200, Christoph Hellwig wrote: > There is no logic in elf_core_dump itself that uses uaccess routines > on kernel pointers, the file writes are nicely encapsulated in dump_emit > which does its own set_fs. ... assuming you've checked the asm/elf.h to see that no

Re: [PATCH 3/6] binfmt_elf: remove the set_fs(KERNEL_DS) in elf_core_dump

2020-04-06 Thread Christoph Hellwig
On Mon, Apr 06, 2020 at 02:02:38PM +0100, Al Viro wrote: > On Mon, Apr 06, 2020 at 02:03:09PM +0200, Christoph Hellwig wrote: > > There is no logic in elf_core_dump itself that uses uaccess routines > > on kernel pointers, the file writes are nicely encapsulated in dump_emit > > which does its own

Re: [PATCH 2/6] binfmt_elf: open code copy_siginfo_to_user to kernelspace buffer

2020-04-06 Thread Christoph Hellwig
On Mon, Apr 06, 2020 at 03:01:24PM +0200, Arnd Bergmann wrote: > > static void fill_siginfo_note(struct memelfnote *note, user_siginfo_t > > *csigdata, > > const kernel_siginfo_t *siginfo) > > { > > - mm_segment_t old_fs = get_fs(); > > - set_fs(KERNEL_DS); > > -

Re: [PATCH v2] powerpc/time: Replace by

2020-04-06 Thread Michael Ellerman
On Thu, 2020-02-13 at 08:38:04 UTC, Geert Uytterhoeven wrote: > The PowerPC time code is not a clock provider, and just needs to call > of_clk_init(). > > Hence it can include instead of . > > Remove the #ifdef protecting the of_clk_init() call, as a stub is > available for the !CONFIG_COMMON_CL

Re: [PATCH v4 1/2] powerpc/perf: Implement a global lock to avoid races between trace, core and thread imc events.

2020-04-06 Thread Michael Ellerman
On Fri, 2020-03-13 at 05:52:37 UTC, Anju T Sudhakar wrote: > IMC(In-memory Collection Counters) does performance monitoring in > two different modes, i.e accumulation mode(core-imc and thread-imc events), > and trace mode(trace-imc events). A cpu thread can either be in > accumulation-mode or trace

Re: [PATCH v2] powerpc/pseries: Fix MCE handling on pseries

2020-04-06 Thread Michael Ellerman
On Fri, 2020-03-20 at 11:01:19 UTC, Ganesh Goudar wrote: > MCE handling on pSeries platform fails as recent rework to use common > code for pSeries and PowerNV in machine check error handling tries to > access per-cpu variables in realmode. The per-cpu variables may be > outside the RMO region on p

Re: [PATCH v12 1/8] powerpc: Add back __ARCH_WANT_SYS_LLSEEK macro

2020-04-06 Thread Michael Ellerman
On Fri, 2020-03-20 at 10:20:12 UTC, Michal Suchanek wrote: > This partially reverts commit caf6f9c8a326 ("asm-generic: Remove > unneeded __ARCH_WANT_SYS_LLSEEK macro") > > When CONFIG_COMPAT is disabled on ppc64 the kernel does not build. > > There is resistance to both removing the llseek syscal

Re: [PATCH 1/9] powerpc/ps3: Remove duplicate error messages

2020-04-06 Thread Michael Ellerman
On Fri, 2020-03-27 at 20:26:23 UTC, Geoff Levand wrote: > From: Markus Elfring > > Remove duplicate memory allocation failure error messages. > > Signed-off-by: Markus Elfring > Signed-off-by: Geoff Levand Applied to powerpc next, thanks. https://git.kernel.org/powerpc/c/7ee417497a29028502cf

Re: [PATCH 4/9] powerpc/ps3: remove an unneeded NULL check

2020-04-06 Thread Michael Ellerman
On Fri, 2020-03-27 at 20:26:23 UTC, Geoff Levand wrote: > From: Dan Carpenter > > Static checkers don't like the inconsistent NULL checking on "ops". > This function is only called once and "ops" isn't NULL so the check can > be removed. > > Signed-off-by: Dan Carpenter > Signed-off-by: Geoff L

Re: [PATCH] selftests/eeh: Skip ahci adapters

2020-04-06 Thread Michael Ellerman
On Thu, 2020-03-26 at 06:11:44 UTC, Michael Ellerman wrote: > The ahci driver doesn't support error recovery, and if your root > filesystem is attached to it the eeh-basic.sh test will likely kill > your machine. > > So skip any device we see using the ahci driver. > > Signed-off-by: Michael Elle

Re: [PATCH 6/9] powerpc/ps3: Set CONFIG_UEVENT_HELPER=y in ps3_defconfig

2020-04-06 Thread Michael Ellerman
On Fri, 2020-03-27 at 20:26:23 UTC, Geoff Levand wrote: > Set CONFIG_UEVENT_HELPER=y in ps3_defconfig. > > commit 1be01d4a57142ded23bdb9e0c8d9369e693b26cc (driver: base: Disable > CONFIG_UEVENT_HELPER by default) disabled the CONFIG_UEVENT_HELPER option > that is needed for hotplug and module load

Re: [PATCH kernel] powerpc/pseries/ddw: Extend upper limit for huge DMA window for persistent memory

2020-04-06 Thread Michael Ellerman
On Tue, 2020-03-31 at 01:23:38 UTC, Alexey Kardashevskiy wrote: > Unlike normal memory ("memory" compatible type in the FDT), > the persistent memory ("ibm,pmemory" in the FDT) can be mapped anywhere > in the guest physical space and it can be used for DMA. > > In order to maintain 1:1 mapping via

Re: [PATCH] Revert "powerpc/64: irq_work avoid interrupt when called with hardware irqs enabled"

2020-04-06 Thread Michael Ellerman
On Thu, 2020-04-02 at 12:04:01 UTC, Nicholas Piggin wrote: > This reverts commit ebb37cf3ffd39fdb6ec5b07111f8bb2f11d92c5f. > > That commit does not play well with soft-masked irq state manipulations > in idle, interrupt replay, and possibly others due to tracing code > sometimes using irq_work_que

Re: [PATCH] powerpc/64s: Fix doorbell wakeup msgclr optimisation

2020-04-06 Thread Michael Ellerman
On Thu, 2020-04-02 at 12:12:12 UTC, Nicholas Piggin wrote: > Commit 3282a3da25bd ("powerpc/64: Implement soft interrupt replay in C") > broke the doorbell wakeup optimisation introduced by commit a9af97aa0a12 > ("powerpc/64s: msgclr when handling doorbell exceptions from system > reset"). > > This

Re: [PATCH] selftests/powerpc: Always build the tm-poison test 64-bit

2020-04-06 Thread Michael Ellerman
On Fri, 2020-04-03 at 09:56:56 UTC, Michael Ellerman wrote: > The tm-poison test includes inline asm which is 64-bit only, so the > test must be built 64-bit in order to work. > > Otherwise it fails, eg: > # file tm-poison > tm-poison: ELF 32-bit MSB executable, PowerPC or cisco 4500, version

Re: [PATCH] powerpc: improve ppc_save_regs

2020-04-06 Thread Michael Ellerman
On Fri, 2020-04-03 at 13:10:05 UTC, Nicholas Piggin wrote: > Make ppc_save_regs a bit more useful: > - Set NIP to our caller rather rather than the caller's caller (which is > what we save to LR in the stack frame). > - Set SOFTE to the current irq soft-mask state rather than > uninitialised. >

Re: [PATCH 1/6] powerpc/spufs: simplify spufs core dumping

2020-04-06 Thread Arnd Bergmann
On Mon, Apr 6, 2020 at 2:03 PM Christoph Hellwig wrote: > > Replace the coredump ->read method with a ->dump method that must call > dump_emit itself. That way we avoid a buffer allocation an messing with > set_fs() to call into code that is intended to deal with user buffers. > For the ->get cas

Re: [PATCH 1/2] dma-mapping: add a dma_ops_bypass flag to struct device

2020-04-06 Thread Alexey Kardashevskiy
On 06/04/2020 21:50, Christoph Hellwig wrote: > On Fri, Apr 03, 2020 at 07:38:11PM +1100, Alexey Kardashevskiy wrote: >> >> >> On 26/03/2020 12:26, Alexey Kardashevskiy wrote: >>> >>> >>> On 25/03/2020 19:37, Christoph Hellwig wrote: On Wed, Mar 25, 2020 at 03:51:36PM +1100, Alexey Kardashe

Re: [PATCH v5 1/2] powerpc/powernv: Remove two unnecessary variable initialisations in opal_add_one_export()

2020-04-06 Thread Markus Elfring
> And we can remove the redundant assignments to attr and name. How do you think about a wording like the following? Two local variables will eventually be set to appropriate pointers a bit later. Thus omit their explicit initialisation at the beginning. Regards, Markus

Re: [PATCH v5 2/2] powerpc/powernv: Add NULL check after kzalloc in opal_add_one_export

2020-04-06 Thread Markus Elfring
> Here needs a NULL check, as kzalloc may fail returning NULL. > > Issue was found by coccinelle. * Do you really try to ignore (my) specific patch review comments (for a moment)? https://lore.kernel.org/linuxppc-dev/b7d64d4a-74dd-ee21-db7b-018070f12...@web.de/ https://lore.kernel.org/patch

Re: [PATCH v8 1/7] perf expr: Add expr_ prefix for parse_ctx and parse_id

2020-04-06 Thread Arnaldo Carvalho de Melo
Em Thu, Apr 02, 2020 at 02:03:34AM +0530, Kajol Jain escreveu: > From: Jiri Olsa > > Adding expr_ prefix for parse_ctx and parse_id, > to straighten out the expr* namespace. > > There's no functional change. Next time please add your Signed-off-by: as well when pushing 3rd party patches. Appli

Re: [PATCH v5 1/2] powerpc/powernv: Return directly after a failed of_property_read_u64_array() in opal_add_one_export()

2020-04-06 Thread Markus Elfring
> We don't need to go to the labal of out … Please avoid a typo for this change description. > fails, as there is nothing to do. Just return. I suggest to reconsider also this wording. Return directly after a call of the function “of_property_read_u64_array” failed at the beginning. > An

Re: [PATCH v3 1/1] powerpc/kernel: Enables memory hot-remove after reboot on pseries guests

2020-04-06 Thread Leonardo Bras
Hello Bharata, On Fri, 2020-04-03 at 20:08 +0530, Bharata B Rao wrote: > The patch would be more complete with the following change that ensures > that DRCONF_MEM_HOTREMOVABLE flag is set for non-boot-time hotplugged > memory too. This will ensure that ibm,dynamic-memory-vN property > reflects the

[PATCH v2] powerpc/vio: drop bus_type from parent device

2020-04-06 Thread Thadeu Lima de Souza Cascardo
Commit df44b479654f62b478c18ee4d8bc4e9f897a9844 ("kobject: return error code if writing /sys/.../uevent fails") started returning failure when writing to /sys/devices/vio/uevent. This causes an early udevadm trigger to fail. On some installer versions of Ubuntu, this will cause init to exit, thus

Re: [PATCH 1/2] dma-mapping: add a dma_ops_bypass flag to struct device

2020-04-06 Thread Christoph Hellwig
On Mon, Apr 06, 2020 at 11:25:09PM +1000, Alexey Kardashevskiy wrote: > >> Do you see any serious problem with this approach? Thanks! > > > > Do you have a link to the whole branch? The github UI is unfortunately > > unusable for that (or I'm missing something). > > The UI shows the branch but s

Re: [PATCH] powerpc/mce: Add MCE notification chain

2020-04-06 Thread Mahesh J Salgaonkar
On 2020-04-06 12:17:22 Mon, Nicholas Piggin wrote: > Ganesh's on April 4, 2020 11:05 pm: > > On 4/3/20 7:38 AM, Nicholas Piggin wrote: > > > >> Ganesh Goudar's on March 30, 2020 5:12 pm: > >>> From: Santosh S > >>> > >>> Introduce notification chain which lets know about uncorrected memory > >>>

[PATCH 1/1] powerpc/crash: Use NMI context for printk after crashing other CPUs

2020-04-06 Thread Leonardo Bras
Currently, if printk lock (logbuf_lock) is held by other thread during crash, there is a chance of deadlocking the crash on next printk, and blocking a possibly desired kdump. After sending IPI to all other CPUs, make printk enter in NMI context, as it will use per-cpu buffers to store the message

[RFC PATCH v3 01/15] powerpc/syscall: Refactorise from Nick

2020-04-06 Thread Christophe Leroy
From: Nicholas Piggin Christophe Leroy's on April 6, 2020 3:44 am: > ifdef out specific PPC64 stuff to allow building > syscall_64.c on PPC32. > > Modify Makefile to always build syscall.o > > Signed-off-by: Christophe Leroy > --- > arch/powerpc/kernel/Makefile | 5 ++--- > arch/powerpc/kerne

[RFC PATCH v3 02/15] powerpc/radix: Make kuap_check_amr() and kuap_restore_amr() generic

2020-04-06 Thread Christophe Leroy
In preparation of porting powerpc32 to C syscall entry/exit, rename kuap_check_amr() and kuap_restore_amr() as kuap_check() and kuap_restore(), and move the stub for when CONFIG_PPC_KUAP is not selected in the generic asm/kup.h Signed-off-by: Christophe Leroy --- arch/powerpc/include/asm/book3s/

[RFC PATCH v3 03/15] powerpc/32s: Create C version of kuap_restore() and kuap_check()

2020-04-06 Thread Christophe Leroy
In preparation of porting PPC32 to C syscall entry/exit, create C version of kuap_restore() and kuap_check() on book3s/32. Signed-off-by: Christophe Leroy --- arch/powerpc/include/asm/book3s/32/kup.h | 21 + 1 file changed, 21 insertions(+) diff --git a/arch/powerpc/include/

[RFC PATCH v3 04/15] powerpc/8xx: Create C version of kuap_restore() and kuap_check()

2020-04-06 Thread Christophe Leroy
In preparation of porting PPC32 to C syscall entry/exit, create C version of kuap_restore() and kuap_check() on 8xx Signed-off-by: Christophe Leroy --- arch/powerpc/include/asm/nohash/32/kup-8xx.h | 13 + 1 file changed, 13 insertions(+) diff --git a/arch/powerpc/include/asm/nohash/

[RFC PATCH v3 05/15] powerpc/irq: Add helpers to get and set regs->softe

2020-04-06 Thread Christophe Leroy
regs->softe doesn't exist on PPC32. Add helpers to get and set regs->softe. Those helpers will void on PPC32. Signed-off-by: Christophe Leroy --- arch/powerpc/include/asm/hw_irq.h | 21 +++-- 1 file changed, 19 insertions(+), 2 deletions(-) diff --git a/arch/powerpc/include/asm

[RFC PATCH v3 06/15] powerpc/irq: Add new helpers to play with MSR_EE and MSR_RI on PPC32

2020-04-06 Thread Christophe Leroy
In preparation of porting PPC32 to C syscall entry/exit, add PPC32 version of following helpers: __hard_irq_enable() __hard_irq_disable() __hard_EE_RI_disable() __hard_RI_enable() Signed-off-by: Christophe Leroy --- arch/powerpc/include/asm/hw_irq.h | 15 +

[RFC PATCH v3 08/15] powerpc/syscall: Rename syscall_64.c into syscall.c

2020-04-06 Thread Christophe Leroy
syscall_64.c will be reused almost as is for PPC32. Rename it syscall.c Signed-off-by: Christophe Leroy --- arch/powerpc/kernel/Makefile| 2 +- arch/powerpc/kernel/{syscall_64.c => syscall.c} | 0 2 files changed, 1 insertion(+), 1 deletion(-) rename arch/powerpc/kernel/{sy

[RFC PATCH v3 09/15] powerpc/syscall: Make syscall_64.c buildable on PPC32

2020-04-06 Thread Christophe Leroy
ifdef out specific PPC64 stuff to allow building syscall_64.c on PPC32. Modify Makefile to always build syscall.o Signed-off-by: Christophe Leroy --- arch/powerpc/kernel/Makefile | 5 ++--- arch/powerpc/kernel/syscall.c | 9 + 2 files changed, 7 insertions(+), 7 deletions(-) diff --gi

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