Re: [PATCH V2] powerpc/mm: Don't do debug print before we do feature fixup

2016-06-20 Thread Denis Kirjanov
On 6/19/16, Benjamin Herrenschmidt wrote: > On Sat, 2016-06-18 at 23:57 +0530, Aneesh Kumar K.V wrote: >> We use feature fixup in segment and page fault path and hence we should >> not call any function that can cause either of these before we finish >> feature fixup. >> >> Calling into early debu

Re: [PATCH 12/12] leds: Only descend into leds directory when CONFIG_NEW_LEDS is set

2016-06-20 Thread Jacek Anaszewski
On 06/18/2016 12:46 AM, Andrew F. Davis wrote: On 06/15/2016 01:48 AM, Jacek Anaszewski wrote: Hi Andrew, Thanks for the patch. Please address the issue [1] raised by test bot and resubmit. Thanks, Jacek Anaszewski [1] https://lkml.org/lkml/2016/6/13/1091 It looks like some systems use 'g

[PATCH v2] tools/perf: Fix the mask in regs_dump__printf and

2016-06-20 Thread Madhavan Srinivasan
When decoding the perf_regs mask in regs_dump__printf(), we loop through the mask using find_first_bit and find_next_bit functions. "mask" is of type "u64", but sent as a "unsigned long *" to lib functions along with sizeof(). While the exisitng code works fine in most of the case, the logic is bro

Re: [v6, 1/2] cxl: Add mechanism for delivering AFU driver specific events

2016-06-20 Thread Vaibhav Jain
Hi Philippe, Few points Philippe Bergheaud writes: > +int cxl_unset_driver_ops(struct cxl_context *ctx) > +{ > + if (atomic_read(&ctx->afu_driver_events)) > + return -EBUSY; > + > + ctx->afu_driver_ops = NULL; Need a write memory barrier so that afu_driver_ops isnt possibly

[PATCH] devpts: remove DEVPTS_MULTIPLE_INSTANCES from all configs

2016-06-20 Thread Alexandru Moise
As each mount of devpts is now an independent filesystem, the DEVPTS_MULTIPLE_INSTANCES config option no longer exists. So remove it. Signed-off-by: Alexandru Moise <00moses.alexande...@gmail.com> --- arch/arc/configs/tb10x_defconfig| 1 - arch/arm/configs/mxs_defconfig |

Re: [PATCH v2] tools/perf: Fix the mask in regs_dump__printf and

2016-06-20 Thread Jiri Olsa
On Mon, Jun 20, 2016 at 02:14:01PM +0530, Madhavan Srinivasan wrote: > When decoding the perf_regs mask in regs_dump__printf(), > we loop through the mask using find_first_bit and find_next_bit functions. > "mask" is of type "u64", but sent as a "unsigned long *" to > lib functions along with sizeo

Re: [PATCH v2] tools/perf: Fix the mask in regs_dump__printf and

2016-06-20 Thread Jiri Olsa
On Mon, Jun 20, 2016 at 02:14:01PM +0530, Madhavan Srinivasan wrote: SNIP > diff --git a/tools/perf/builtin-script.c b/tools/perf/builtin-script.c > index e3ce2f34d3ad..76d5006ebcc3 100644 > --- a/tools/perf/builtin-script.c > +++ b/tools/perf/builtin-script.c > @@ -412,11 +412,16 @@ static void

Re: unrecoverable exception on G5 with CONFIG_PPC_EARLY_DEBUG enabled

2016-06-20 Thread Michael Ellerman
On Sat, 2016-06-18 at 22:47 +0530, Aneesh Kumar K.V wrote: > Michael Ellerman writes: > > On Fri, 2016-06-17 at 08:33 +1000, Benjamin Herrenschmidt wrote: > > > On Thu, 2016-06-16 at 22:49 +0300, Denis Kirjanov wrote: > > > > - > > > > +BEGIN_MMU_FTR_SECTION > > > > + b 2f > > > > +END

Re: [PATCH v2] tools/perf: Fix the mask in regs_dump__printf and

2016-06-20 Thread Wangnan (F)
On 2016/6/20 17:18, Jiri Olsa wrote: On Mon, Jun 20, 2016 at 02:14:01PM +0530, Madhavan Srinivasan wrote: When decoding the perf_regs mask in regs_dump__printf(), we loop through the mask using find_first_bit and find_next_bit functions. "mask" is of type "u64", but sent as a "unsigned long *"

Re: [PATCH v2] tools/perf: Fix the mask in regs_dump__printf and

2016-06-20 Thread Jiri Olsa
On Mon, Jun 20, 2016 at 05:27:25PM +0800, Wangnan (F) wrote: > > > On 2016/6/20 17:18, Jiri Olsa wrote: > > On Mon, Jun 20, 2016 at 02:14:01PM +0530, Madhavan Srinivasan wrote: > > > When decoding the perf_regs mask in regs_dump__printf(), > > > we loop through the mask using find_first_bit and f

Re: [PATCH v2] tools/perf: Fix the mask in regs_dump__printf and

2016-06-20 Thread Madhavan Srinivasan
On Monday 20 June 2016 03:10 PM, Jiri Olsa wrote: > On Mon, Jun 20, 2016 at 05:27:25PM +0800, Wangnan (F) wrote: >> >> On 2016/6/20 17:18, Jiri Olsa wrote: >>> On Mon, Jun 20, 2016 at 02:14:01PM +0530, Madhavan Srinivasan wrote: When decoding the perf_regs mask in regs_dump__printf(), w

Re: unrecoverable exception on G5 with CONFIG_PPC_EARLY_DEBUG enabled

2016-06-20 Thread Aneesh Kumar K.V
Michael Ellerman writes: > On Sat, 2016-06-18 at 22:47 +0530, Aneesh Kumar K.V wrote: >> Michael Ellerman writes: >> > On Fri, 2016-06-17 at 08:33 +1000, Benjamin Herrenschmidt wrote: >> > > On Thu, 2016-06-16 at 22:49 +0300, Denis Kirjanov wrote: >> > > > - >> > > > +BEGIN_MMU_FTR_SECTION >> >

Re: [PATCH 1/3] cxlflash: Fix to drain operations from previous reset

2016-06-20 Thread Matthew R. Ochs
> On Jun 15, 2016, at 6:49 PM, Uma Krishnan wrote: > > From: "Manoj N. Kumar" > > While running 'sg_reset -H' in a loop with a user-space application active, > hit the following exception: > > cpu 0x2: Vector: 300 (Data Access) >pc: : afu_attach+0x50/0x240 [cxlflash] >lr: : cxlflash_af

[PATCH] powerpc/pseries: Auto online hotplugged memory

2016-06-20 Thread Nathan Fontenot
Auto online hotplugged memory A recent update (commit id 31bc3858ea3) to the core mm hotplug code introduced the memhp_auto_online variable to allow for automatically onlining memory that is added. This patch update the pseries memory hotplug code to enable this so that any memory DLPAR added to

Re: [PATCH] tracing: Expose CPU physical addresses (resource values) for PCI devices

2016-06-20 Thread Steven Rostedt
On Sat, 18 Jun 2016 08:23:23 +1000 Benjamin Herrenschmidt wrote: > On Fri, 2016-06-17 at 17:59 -0400, Steven Rostedt wrote: > > Sorry for the late reply, this patch got pushed down in my INBOX. > > > > Could I get someone from PPC to review this patch, just to be safe? > > The patch makes sen

[PATCH 0/2] powerpc/pseries: Dynamic associativity-lookup-arrays updating

2016-06-20 Thread Nathan Fontenot
The ibm,dynamic-reconfiguration-memory/ibm,associativity-lookup-arrays property used to track the associativity for LMBs assigned to a system may not contain all of the possible associativity arrays for the system at boot time. When a LMB is added to the system and its associativity array is not pr

[PATCH 1/2] powerpc/pseries: Move property cloning into its own routine

2016-06-20 Thread Nathan Fontenot
Move property cloning code into its own routine Split the pieces of dlpar_clone_drconf_property() that create a copy of the property struct into its own routine. This allows for creating clones of more than just the ibm,dynamic-memory property used in memory hotplug. Signed-off-by: Nathan Fonteno

[PATCH 2/2] powerpc/pseries: Dynamic add entires to associativity lookup array

2016-06-20 Thread Nathan Fontenot
Dynamically add entries to the associativity lookup array The ibm,associativity-lookup-arrays property may only contain associativity arrays for LMBs present at boot time. When hotplug adding a LMB its associativity array may not be in the associativity lookup array, this patch adds the ability to

Re: [PATCH 3/4] kvm/stats: Add provisioning for 64-bit vcpu statistics

2016-06-20 Thread Paolo Bonzini
On 20/06/2016 02:08, Paul Mackerras wrote: > Paolo, > > Can I have an ack for Suraj's patch below? If it's OK with you, > I'll take his series through my tree. Yes, please do. Paolo > Thanks, > Paul. > > On Wed, Jun 15, 2016 at 07:21:07PM +1000, Suraj Jitindar Singh wrote: >> vcpus have sta

Re: [PATCH] ibmvnic: fix to use list_for_each_safe() when delete items

2016-06-20 Thread Thomas Falcon
On 06/17/2016 09:53 PM, weiyj...@163.com wrote: > From: Wei Yongjun > > Since we will remove items off the list using list_del() we need > to use a safe version of the list_for_each() macro aptly named > list_for_each_safe(). > > Signed-off-by: Wei Yongjun > --- > drivers/net/ethernet/ibm/ibmvni

Re: [PATCH v2 2/9] kexec_file: Generalize kexec_add_buffer.

2016-06-20 Thread Thiago Jung Bauermann
Am Montag, 20 Juni 2016, 10:26:05 schrieb Dave Young: > kexec_buf should go within #ifdef for kexec file like struct > purgatory_info > > Other than that it looks good. Great! Here it is. -- []'s Thiago Jung Bauermann IBM Linux Technology Center kexec_file: Generalize kexec_add_buffer.

Re: [PATCH 2/3] cxlflash: Add device dependent flags

2016-06-20 Thread Matthew R. Ochs
> On Jun 15, 2016, at 6:49 PM, Uma Krishnan wrote: > > Device dependent flags are needed to support functions that are > specific to a particular device. > > One such case is - some CXL Flash cards need to be notified of > device shutdown. For other CXL devices, this feature does not prove > to

Re: [PATCH 3/3] cxlflash: Shutdown notify support for CXL Flash cards

2016-06-20 Thread Matthew R. Ochs
> On Jun 15, 2016, at 6:49 PM, Uma Krishnan wrote: > > Some CXL Flash cards need notification of device shutdown > in order to flush pending I/Os. > > A PCI notification hook for shutdown has been added where > the driver notifies the card and returns. When the device > is removed in the PCI rem

Re: [PATCH] ppc: Fix BPF JIT for ABIv2

2016-06-20 Thread Thadeu Lima de Souza Cascardo
On Sun, Jun 19, 2016 at 11:19:14PM +0530, Naveen N. Rao wrote: > On 2016/06/17 10:00AM, Thadeu Lima de Souza Cascardo wrote: > > On Fri, Jun 17, 2016 at 10:53:21PM +1000, Michael Ellerman wrote: > > > On Tue, 2016-07-06 at 13:32:23 UTC, "Naveen N. Rao" wrote: > > > > diff --git a/arch/powerpc/net/b

[PATCH] leds: Add no-op gpio_led_register_device when LED subsystem is disabled

2016-06-20 Thread Andrew F. Davis
Some systems use 'gpio_led_register_device' to make an in-memory copy of their LED device table so the original can be removed as .init.rodata. When the LED subsystem is not enabled source in the led directory is not built and so this function may be undefined. Fix this here. Signed-off-by: Andrew

Re: [6/6] ppc: ebpf/jit: Implement JIT compiler for extended BPF

2016-06-20 Thread Michael Ellerman
On Sun, 2016-06-19 at 23:06 +0530, Naveen N. Rao wrote: > On 2016/06/17 10:53PM, Michael Ellerman wrote: > > On Tue, 2016-07-06 at 13:32:23 UTC, "Naveen N. Rao" wrote: > > > diff --git a/arch/powerpc/net/bpf_jit_comp64.c > > > b/arch/powerpc/net/bpf_jit_comp64.c > > > new file mode 100644 > > > in

Re: [Patch v2 1/2] powerpc: Send SIGBUS on unaligned copy and paste

2016-06-20 Thread Chris Smart
On Thu, Jun 16, 2016 at 11:04:12PM -0500, Segher Boessenkool wrote: On Fri, Jun 17, 2016 at 09:33:45AM +1000, Chris Smart wrote: +#define PPC_INST_COPY 0x7c00060c +#define PPC_INST_COPY_FIRST0x7c20060c +#define PPC_INST_PASTE 0x7c00070c +#define PP

Re: [FIX, v2, 1/2] powerpc, numa: Fix whitespace in hot_add_drconf_memory_max()

2016-06-20 Thread Michael Ellerman
On Thu, 2016-12-05 at 13:34:14 UTC, Bharata B Rao wrote: > Signed-off-by: Bharata B Rao > Reviewed-by: David Gibson Applied to powerpc next, thanks. https://git.kernel.org/powerpc/c/e70bd3ae914ec40d8505ed842d cheers ___ Linuxppc-dev mailing list Linu

Re: [1/4] powerpc/sparse: make some things static

2016-06-20 Thread Michael Ellerman
On Wed, 2016-18-05 at 01:16:49 UTC, Daniel Axtens wrote: > This is just a smattering of things picked up by sparse that should > be made static. > > Signed-off-by: Daniel Axtens Applied to powerpc next, thanks. https://git.kernel.org/powerpc/c/34852ed5511ec5d07897f22d56 cheers

Re: [FIX,v2,2/2] powerpc,numa: Fix memory_hotplug_max()

2016-06-20 Thread Michael Ellerman
On Thu, 2016-12-05 at 13:34:15 UTC, Bharata B Rao wrote: > memory_hotplug_max() uses hot_add_drconf_memory_max() to get maxmimum > addressable memory by referring to ibm,dyanamic-memory property. There > are three problems with the current approach: > > 1 hot_add_drconf_memory_max() assumes that i

Re: [2/4] powerpc: Introduce asm-prototypes.h

2016-06-20 Thread Michael Ellerman
On Wed, 2016-18-05 at 01:16:50 UTC, Daniel Axtens wrote: > Sparse picked up a number of functions that are implemented in C and > then only referred to in asm code. > > This introduces asm-prototypes.h, which provides a place for > prototypes of these functions. > > This silences some sparse warn

Re: cxl: Abstract the differences between the PSL and XSL

2016-06-20 Thread Michael Ellerman
On Mon, 2016-23-05 at 17:39:18 UTC, Ian Munsie wrote: > From: Frederic Barrat > > The XSL (Translation Service Layer) is a stripped down version of the > PSL (Power Service Layer) used in some cards such as the Mellanox CX4. > > Like the PSL, it implements the CAIA architecture, but has a number

Re: [3/4] powerpc/sparse: Include headers containing prototypes

2016-06-20 Thread Michael Ellerman
On Wed, 2016-18-05 at 01:16:51 UTC, Daniel Axtens wrote: > Sometimes headers that provide prototypes for functions are > accidentally omitted from the files that define the functions. > > Fix a couple of times that occurs. > > Signed-off-by: Daniel Axtens Applied to powerpc next, thanks. https

Re: [RFC] cxl: Add support for CAPP DMA mode

2016-06-20 Thread Michael Ellerman
On Wed, 2016-08-06 at 05:09:54 UTC, Ian Munsie wrote: > From: Ian Munsie > > This adds support for using CAPP DMA mode, which is required for XSL > based cards such as the Mellanox CX4 to function. > > This is currently an RFC as it depends on the corresponding support to > be merged into skiboo

Re: cxl: Make vPHB device node match adapter's

2016-06-20 Thread Michael Ellerman
On Wed, 2016-15-06 at 14:42:16 UTC, Frederic Barrat wrote: > Tested by cxlflash on bare-metal and powerVM. > > Signed-off-by: Frederic Barrat > Reviewed-by: Matthew R. Ochs > Acked-by: Ian Munsie > Signed-off-by: Frederic Barrat Applied to powerpc next, thanks. https://git.kernel.org/powerpc

Re: cxl: static-ify variables to fix sparse warnings

2016-06-20 Thread Michael Ellerman
On Mon, 2016-18-04 at 05:03:50 UTC, Andrew Donnellan wrote: > Make a couple more variables static. Found by sparse. > > Signed-off-by: Andrew Donnellan > Reviewed-by: fbar...@linux.vnet.ibm.com > Reviewed-by: Matthew R. Ochs > Acked-by: Ian Munsie Applied to powerpc next, thanks. https://git.

Re: cxl: Update process element after allocating interrupts

2016-06-20 Thread Michael Ellerman
On Mon, 2016-23-05 at 16:14:05 UTC, Ian Munsie wrote: > From: Ian Munsie > > In the kernel API, it is possible to attempt to allocate AFU interrupts > after already starting a context. Since the process element structure > used by the hardware is only filled out at the time the context is > start

Re: [v2] powerpc/mm: Ensure "special" zones are empty

2016-06-20 Thread Michael Ellerman
On Wed, 2016-11-05 at 09:22:18 UTC, Oliver O'Halloran wrote: > The mm zone mechanism was traditionally used by arch specific code to > partition memory into allocation zones. However there are several zones > that are managed by the mm subsystem rather than the architecture. Most > architectures se

Re: powerpc: Add array bounds checking to crash_shutdown_handlers

2016-06-20 Thread Michael Ellerman
On Wed, 2016-11-05 at 00:57:32 UTC, Suraj Jitindar Singh wrote: > The array crash_shutdown_handles is an array of size CRASH_HANDLER_MAX+1 > containing up to CRASH_HANDLER_MAX shutdown_handlers. It is assumed to > be NULL terminated, which it is under normal circumstances. Array > accesses in the f

Re: [v4] powerpc: spinlock: Fix spin_unlock_wait()

2016-06-20 Thread Michael Ellerman
On Fri, 2016-10-06 at 03:51:28 UTC, Boqun Feng wrote: > There is an ordering issue with spin_unlock_wait() on powerpc, because > the spin_lock primitive is an ACQUIRE and an ACQUIRE is only ordering > the load part of the operation with memory operations following it. ... > > Suggested-by: "Paul E

Re: powerpc/align: Use #ifdef __BIG_ENDIAN__ #else for REG_BYTE

2016-06-20 Thread Michael Ellerman
On Thu, 2016-16-06 at 12:33:41 UTC, Michael Ellerman wrote: > From: Daniel Axtens > > Sparse complains that it doesn't know what REG_BYTE is: > > arch/powerpc/kernel/align.c:313:29: error: undefined identifier 'REG_BYTE' > > REG_BYTE is defined differently based on whether we're compiling for

Re: powerpc/asm: Remove unused symbols in asm-offsets.c

2016-06-20 Thread Michael Ellerman
On Wed, 2016-01-06 at 22:56:47 UTC, Rashmica Gupta wrote: > THREAD_DSCR: Added in commit efcac6589a27 ("powerpc: Per process DSCR + ... > > Signed-off-by: Rashmica Gupta Applied to powerpc next, thanks. https://git.kernel.org/powerpc/c/aac6a91fea93e6bdd7ac20365d cheers

Re: [PATCH] powerpc/align: Use #ifdef __BIG_ENDIAN__ #else for REG_BYTE

2016-06-20 Thread Michael Ellerman
On Fri, 2016-06-17 at 12:46 +0200, Arnd Bergmann wrote: > On Friday, June 17, 2016 1:35:35 PM CEST Daniel Axtens wrote: > > > It would be better to fix the sparse compilation so the same endianess > > > is set that you get when calling gcc. > > > > I will definitely work on a patch to sparse! I'd

Re: [PATCH] powerpc/pseries: Auto online hotplugged memory

2016-06-20 Thread Michael Ellerman
On Mon, 2016-06-20 at 08:51 -0500, Nathan Fontenot wrote: > Auto online hotplugged memory > > A recent update (commit id 31bc3858ea3) to the core mm hotplug code > introduced the memhp_auto_online variable to allow for automatically > onlining memory that is added. > > This patch update the pser

Re: unrecoverable exception on G5 with CONFIG_PPC_EARLY_DEBUG enabled

2016-06-20 Thread Michael Ellerman
On Mon, 2016-06-20 at 15:51 +0530, Aneesh Kumar K.V wrote: > Michael Ellerman writes: > > diff --git a/arch/powerpc/kernel/exceptions-64s.S > > b/arch/powerpc/kernel/exceptions-64s.S > > index 4c9440629128..8bcc1b457115 100644 > > --- a/arch/powerpc/kernel/exceptions-64s.S > > +++ b/arch/powerpc/

Re: [PATCH] powerpc/align: Use #ifdef __BIG_ENDIAN__ #else for REG_BYTE

2016-06-20 Thread Daniel Axtens
Hi Arnd, > Something like the (untested) patch below, similar to how we > already handle the word size and how some other architectures > handle setting __BIG_ENDIAN__. I tested this by reverting Michael's patch and applying yours. Not only does it successfully fix the errors that patch fixes, i

Re: [PATCH 0/3] cxlflash: Shutdown notification and reset patch

2016-06-20 Thread Martin K. Petersen
> "Uma" == Uma Krishnan writes: Uma> This patch set contains support to notify CXL Flash devices of an Uma> impending shutdown and a fix to drain operations prior to a reset. Uma> This series is intended for 4.8 and is bisectable. Applied to 4.8/scsi-queue. -- Martin K. Petersen Orac

Re: [RESEND PATCH v2 1/4] PCI: Ignore resource_alignment if PCI_PROBE_ONLY was set\\

2016-06-20 Thread Bjorn Helgaas
On Thu, Jun 02, 2016 at 01:46:48PM +0800, Yongji Xie wrote: > The resource_alignment will releases memory resources allocated > by firmware so that kernel can reassign new resources later on. > But this will cause the problem that no resources can be > allocated by kernel if PCI_PROBE_ONLY was set,

[PATCH 0/6] kexec_file: Add buffer hand-over for the next kernel

2016-06-20 Thread Thiago Jung Bauermann
Hello, This patch series implements a mechanism which allows the kernel to pass on a buffer to the kernel that will be kexec'd. This buffer is passed as a segment which is added to the kimage when it is being prepared by kexec_file_load. How the second kernel is informed of this buffer is archite

[PATCH 1/6] kexec_file: Add buffer hand-over support for the next kernel

2016-06-20 Thread Thiago Jung Bauermann
The buffer hand-over mechanism allows the currently running kernel to pass data to kernel that will be kexec'd via a kexec segment. The second kernel can check whether the previous kernel sent data and retrieve it. This is the architecture-independent part of the feature. Signed-off-by: Thiago Ju

[PATCH 2/6] powerpc: kexec_file: Add buffer hand-over support for the next kernel

2016-06-20 Thread Thiago Jung Bauermann
The buffer hand-over mechanism allows the currently running kernel to pass data to kernel that will be kexec'd via a kexec segment. The second kernel can check whether the previous kernel sent data and retrieve it. This is the architecture-specific part. Signed-off-by: Thiago Jung Bauermann ---

[PATCH 3/6] kexec_file: Allow skipping checksum calculation for some segments.

2016-06-20 Thread Thiago Jung Bauermann
Adds checksum argument to kexec_add_buffer specifying whether the given segment should be part of the checksum calculation. The next patch will add a way to update segments after a kimage is loaded. Segments that will be updated in this way should not be checksummed, otherwise they will cause the

[PATCH 4/6] kexec_file: Add mechanism to update kexec segments.

2016-06-20 Thread Thiago Jung Bauermann
kexec_update_segment allows a given segment in kexec_image to have its contents updated. This is useful if the current kernel wants to send information to the next kernel that is up-to-date at the time of reboot. Signed-off-by: Thiago Jung Bauermann --- include/linux/kexec.h | 2 ++ kernel/kexe

[PATCH 5/6] kexec: Share logic to copy segment page contents.

2016-06-20 Thread Thiago Jung Bauermann
Make kimage_load_normal_segment and kexec_update_segment share code which they currently duplicate. Signed-off-by: Thiago Jung Bauermann --- kernel/kexec_core.c | 159 +++- 1 file changed, 95 insertions(+), 64 deletions(-) diff --git a/kernel/kexe

[PATCH 6/6] IMA: Demonstration code for kexec buffer passing.

2016-06-20 Thread Thiago Jung Bauermann
This shows how kernel code can use the kexec buffer passing mechanism to pass information to the next kernel. This patch is not intended to be committed. Signed-off-by: Thiago Jung Bauermann --- include/linux/ima.h | 11 + kernel/kexec_file.c | 4 ++ sec

Re: [V3, 2/2] powerpc/drivers: Add driver for operator panel on FSP machines

2016-06-20 Thread Suraj Jitindar Singh
On Thu, 16 Jun 2016 20:22:39 +1000 (AEST) Michael Ellerman wrote: > On Thu, 2016-28-04 at 07:02:38 UTC, Suraj Jitindar Singh wrote: > > Implement new character device driver to allow access from user > > space to the 2x16 character operator panel display present on IBM > > Power Systems machines

Re: [RESEND PATCH v2 2/4] PCI: Do not Use IORESOURCE_STARTALIGN to identify bridge resources

2016-06-20 Thread Bjorn Helgaas
On Thu, Jun 02, 2016 at 01:46:49PM +0800, Yongji Xie wrote: > Now we use the IORESOURCE_STARTALIGN to identify bridge resources > in __assign_resources_sorted(). That's quite fragile. We can't > make sure that the PCI devices' resources will not use > IORESOURCE_STARTALIGN any more. Can you explai

Re: [RESEND PATCH v2 3/4] PCI: Add a new option for resource_alignment to reassign alignment

2016-06-20 Thread Bjorn Helgaas
On Thu, Jun 02, 2016 at 01:46:50PM +0800, Yongji Xie wrote: > When using resource_alignment kernel parameter, the current > implement reassigns the alignment by changing resources' size > which can potentially break some drivers. For example, the driver > uses the size to locate some register whose

Re: [PATCH] powerpc/pseries: Auto online hotplugged memory

2016-06-20 Thread Nathan Fontenot
On 06/20/2016 07:57 PM, Michael Ellerman wrote: > On Mon, 2016-06-20 at 08:51 -0500, Nathan Fontenot wrote: > >> Auto online hotplugged memory >> >> A recent update (commit id 31bc3858ea3) to the core mm hotplug code >> introduced the memhp_auto_online variable to allow for automatically >> onlini

Re: [RESEND PATCH v2 1/4] PCI: Ignore resource_alignment if PCI_PROBE_ONLY was set\\

2016-06-20 Thread Yongji Xie
On 2016/6/21 9:43, Bjorn Helgaas wrote: On Thu, Jun 02, 2016 at 01:46:48PM +0800, Yongji Xie wrote: The resource_alignment will releases memory resources allocated by firmware so that kernel can reassign new resources later on. But this will cause the problem that no resources can be allocated

Re: [RESEND PATCH v2 4/4] PCI: Add support for enforcing all MMIO BARs to be page aligned

2016-06-20 Thread Bjorn Helgaas
On Thu, Jun 02, 2016 at 01:46:51PM +0800, Yongji Xie wrote: > When vfio passthrough a PCI device of which MMIO BARs are > smaller than PAGE_SIZE, guest will not handle the mmio > accesses to the BARs which leads to mmio emulations in host. > > This is because vfio will not allow to passthrough one

[PATCH] powerpc/powernv: Print correct PHB type names

2016-06-20 Thread Gavin Shan
We're initializing "IODA1" and "IODA2" PHBs though they are IODA2 and NPU PHBs as below kernel log indicates. Initializing IODA1 OPAL PHB /pciex@3fffe4070 Initializing IODA2 OPAL PHB /pciex@3fff00040 This fixes the PHB names. After it's applied, we get: Initializing IODA2 PHB (/

[PATCH] powerpc/powernv: Exclude MSI region in extended bridge window

2016-06-20 Thread Gavin Shan
The windows of root port and bridge behind that are extended to the PHB's windows to accomodate the PCI hotplug happening in future. The PHB's 64KB 32-bits MSI region is included in bridge's M32 windows (in hardware) though it's excluded in the corresponding resource, as the bridge's M32 windows ha

Re: [PATCH] powerpc/powernv: Exclude MSI region in extended bridge window

2016-06-20 Thread Gavin Shan
On Tue, Jun 21, 2016 at 12:41:05PM +1000, Gavin Shan wrote: >The windows of root port and bridge behind that are extended to >the PHB's windows to accomodate the PCI hotplug happening in >future. The PHB's 64KB 32-bits MSI region is included in bridge's >M32 windows (in hardware) though it's exclud

Re: [RFC PATCH 2/2] KVM: PPC: Don't take lock when check irq's resend flag

2016-06-20 Thread Li Zhong
> On Jun 20, 2016, at 13:27, Paul Mackerras wrote: > > On Mon, May 16, 2016 at 03:02:13PM +0800, Li Zhong wrote: >> It seems that we don't need to take the lock before evaluating irq's >> resend flag. What needed is to make sure when we clear the ics's bit >> in the icp's resend_map, we don't mi

Re: [RESEND PATCH v2 2/4] PCI: Do not Use IORESOURCE_STARTALIGN to identify bridge resources

2016-06-20 Thread Yongji Xie
On 2016/6/21 9:50, Bjorn Helgaas wrote: On Thu, Jun 02, 2016 at 01:46:49PM +0800, Yongji Xie wrote: Now we use the IORESOURCE_STARTALIGN to identify bridge resources in __assign_resources_sorted(). That's quite fragile. We can't make sure that the PCI devices' resources will not use IORESOURCE_

Re: [PATCH 10/12] lguest: Only descend into lguest directory when CONFIG_LGUEST is set

2016-06-20 Thread Rusty Russell
"Andrew F. Davis" writes: > When CONFIG_LGUEST is not set make will still descend into the lguest > directory but nothing will be built. This produces unneeded build > artifacts and messages in addition to slowing the build. Fix this here. > > Signed-off-by: Andrew F. Davis > --- > drivers/Makef

Re: [RFC PATCH 1/2] KVM: PPC: divide the ics lock into smaller ones for each irq

2016-06-20 Thread Li Zhong
On Jun 20, 2016, at 13:25, Paul Mackerras wrote:On Mon, May 16, 2016 at 02:58:18PM +0800, Li Zhong wrote:This patch tries to use smaller locks for each irq in the ics, insteadof a lock at the ics level, to provide better scalability.This looks like a worth-while thing to do.  Do you have anyperfor

Re: [RESEND PATCH v2 3/4] PCI: Add a new option for resource_alignment to reassign alignment

2016-06-20 Thread Yongji Xie
On 2016/6/21 9:57, Bjorn Helgaas wrote: On Thu, Jun 02, 2016 at 01:46:50PM +0800, Yongji Xie wrote: When using resource_alignment kernel parameter, the current implement reassigns the alignment by changing resources' size which can potentially break some drivers. For example, the driver uses th

[PATCH v20 01/20] perf, tools: Add jsmn `jasmine' JSON parser

2016-06-20 Thread Sukadev Bhattiprolu
From: Andi Kleen I need a JSON parser. This adds the simplest JSON parser I could find -- Serge Zaitsev's jsmn `jasmine' -- to the perf library. I merely converted it to (mostly) Linux style and added support for non 0 terminated input. The parser is quite straight forward and does not copy any

[PATCH v20 00/20] perf, tools: Add support for PMU events in JSON format

2016-06-20 Thread Sukadev Bhattiprolu
CPUs support a large number of performance monitoring events (PMU events) and often these events are very specific to an architecture/model of the CPU. To use most of these PMU events with perf, we currently have to identify them by their raw codes: perf stat -e r100f2 sleep 1 This patchs

[PATCH v20 02/20] perf, tools, jevents: Program to convert JSON file to C style file

2016-06-20 Thread Sukadev Bhattiprolu
From: Andi Kleen This is a modified version of an earlier patch by Andi Kleen. We expect architectures to describe the performance monitoring events for each CPU in a corresponding JSON file, which look like: [ { "EventCode": "0x00", "UMask": "0x01", "Eve

[PATCH v20 03/20] perf, tools: Use pmu_events table to create aliases

2016-06-20 Thread Sukadev Bhattiprolu
At run time (when 'perf' is starting up), locate the specific table of PMU events that corresponds to the current CPU. Using that table, create aliases for the each of the PMU events in the CPU. The use these aliases to parse the user specified perf event. In short this would allow the user to spe

[PATCH v20 04/20] perf, tools: Support CPU ID matching for Powerpc

2016-06-20 Thread Sukadev Bhattiprolu
Implement code that returns the generic CPU ID string for Powerpc. This will be used to identify the specific table of PMU events to parse/compare user specified events against. Signed-off-by: Sukadev Bhattiprolu Acked-by: Jiri Olsa --- Changelog[v14] - [Jiri Olsa] Move this independent

[PATCH v20 05/20] perf, tools: Support CPU id matching for x86 v2

2016-06-20 Thread Sukadev Bhattiprolu
From: Andi Kleen Implement the code to match CPU types to mapfile types for x86 based on CPUID. This extends an existing similar function, but changes it to use the x86 mapfile cpu description. This allows to resolve event lists generated by jevents. Signed-off-by: Andi Kleen Signed-off-by: Suk

[PATCH v20 06/20] perf, tools: Support alias descriptions

2016-06-20 Thread Sukadev Bhattiprolu
From: Andi Kleen Add support to print alias descriptions in perf list, which are taken from the generated event files. The sorting code is changed to put the events with descriptions at the end. The descriptions are printed as possibly multiple word wrapped lines. Example output: % perf list .

[PATCH v20 07/20] perf, tools: Query terminal width and use in perf list

2016-06-20 Thread Sukadev Bhattiprolu
From: Andi Kleen Automatically adapt the now wider and word wrapped perf list output to wider terminals. This requires querying the terminal before the auto pager takes over, and exporting this information from the pager subsystem. Signed-off-by: Andi Kleen Signed-off-by: Sukadev Bhattiprolu A

[PATCH v20 08/20] perf, tools: Add a --no-desc flag to perf list

2016-06-20 Thread Sukadev Bhattiprolu
From: Andi Kleen Add a --no-desc flag to perf list to not print the event descriptions that were earlier added for JSON events. This may be useful to get a less crowded listing. It's still default to print descriptions as that is the more useful default for most users. Signed-off-by: Andi Kleen

[PATCH v20 09/20] perf, tools: Add override support for event list CPUID

2016-06-20 Thread Sukadev Bhattiprolu
From: Andi Kleen Add a PERF_CPUID variable to override the CPUID of the current CPU (within the current architecture). This is useful for testing, so that all event lists can be tested on a single system. Signed-off-by: Andi Kleen Signed-off-by: Sukadev Bhattiprolu Acked-by: Jiri Olsa --- v2

[PATCH v20 11/20] perf, tools: Add alias support for long descriptions

2016-06-20 Thread Sukadev Bhattiprolu
Previously we were dropping the useful longer descriptions that some events have in the event list completely. Now that jevents provides support for longer descriptions (see previous patch), add support for parsing the long descriptions Signed-off-by: Andi Kleen Signed-off-by: Sukadev Bhattiprolu

[PATCH v20 12/20] perf, tools: Support long descriptions with perf list

2016-06-20 Thread Sukadev Bhattiprolu
Previously we were dropping the useful longer descriptions that some events have in the event list completely. This patch makes them appear with perf list. Old perf list: baclears: baclears.all [Counts the number of baclears] vs new: perf list -v: ... baclears: baclears.all [T

[PATCH v20 13/20] perf, tools, jevents: Add support for event topics

2016-06-20 Thread Sukadev Bhattiprolu
Allow assigning categories "Topics" field to the PMU events i.e. process the topic field from the JSON file and add a corresponding topic field to the generated C events tables. Signed-off-by: Andi Kleen Signed-off-by: Sukadev Bhattiprolu Acked-by: Jiri Olsa --- Changelog[v14] [Jiri O

[PATCH v20 15/20] perf, tools: Handle header line in mapfile

2016-06-20 Thread Sukadev Bhattiprolu
From: Andi Kleen To work with existing mapfiles, assume that the first line in 'mapfile.csv' is a header line and skip over it. Signed-off-by: Andi Kleen Signed-off-by: Sukadev Bhattiprolu Acked-by: Jiri Olsa --- Changelog[v2] All architectures may not use the "Family" to identify. S

[PATCH v20 14/20] perf, tools: Add support for event list topics

2016-06-20 Thread Sukadev Bhattiprolu
From: Andi Kleen Add support to group the output of perf list by the Topic field in the JSON file. Example output: % perf list ... Cache: l1d.replacement [L1D data line replacements] l1d_pend_miss.pending [L1D miss oustandings duration in cycles] l1d_pend_miss.pending_cycles

[PATCH v20 17/20] perf, tools: Make alias matching case-insensitive

2016-06-20 Thread Sukadev Bhattiprolu
From: Andi Kleen Make alias matching the events parser case-insensitive. This is useful with the JSON events. perf uses lower case events, but the CPU manuals generally use upper case event names. The JSON files use lower case by default too. But if we search case insensitively then users can cut

[PATCH v20 16/20] perf, tools: Add README for info on parsing JSON/map files

2016-06-20 Thread Sukadev Bhattiprolu
Signed-off-by: Sukadev Bhattiprolu Acked-by: Jiri Olsa --- tools/perf/pmu-events/README | 122 +++ 1 file changed, 122 insertions(+) create mode 100644 tools/perf/pmu-events/README diff --git a/tools/perf/pmu-events/README b/tools/perf/pmu-events/README

[PATCH v20 10/20] perf, tools, jevents: Add support for long descriptions

2016-06-20 Thread Sukadev Bhattiprolu
Implement support in jevents to parse long descriptions for events that may have them in the JSON files. A follow on patch will make this long description available to user through the 'perf list' command. Signed-off-by: Andi Kleen Signed-off-by: Sukadev Bhattiprolu Acked-by: Jiri Olsa --- Cha

[PATCH v20 18/20] perf, tools, pmu-events: Fix fixed counters on Intel

2016-06-20 Thread Sukadev Bhattiprolu
From: Andi Kleen The JSON event lists use a different encoding for fixed counters than perf for instructions and cycles (ref-cycles is ok) This lead to some common events like inst_retired.any or cpu_clk_unhalted.thread not counting, when specified with their JSON name. Special case these event

[PATCH v20 19/20] perf, tools, pmu-events: Add Skylake frontend MSR support

2016-06-20 Thread Sukadev Bhattiprolu
From: Andi Kleen Add support for the "frontend" extra MSR on Skylake in the JSON conversion. Signed-off-by: Andi Kleen --- tools/perf/pmu-events/jevents.c | 1 + 1 file changed, 1 insertion(+) diff --git a/tools/perf/pmu-events/jevents.c b/tools/perf/pmu-events/jevents.c index c8d8e4a..0e43dc

[PATCH v20 20/20] Allow period= in perf stat CPU event descriptions.

2016-06-20 Thread Sukadev Bhattiprolu
This avoids the JSON PMU events parser having to know whether its aliases are for perf stat or perf record. Signed-off-by: Andi Kleen Signed-off-by: Sukadev Bhattiprolu --- tools/perf/util/parse-events.c | 1 + 1 file changed, 1 insertion(+) diff --git a/tools/perf/util/parse-events.c b/tools/

Re: unrecoverable exception on G5 with CONFIG_PPC_EARLY_DEBUG enabled

2016-06-20 Thread Denis Kirjanov
> How about this? Denis does this work? > > cheers > > diff --git a/arch/powerpc/kernel/exceptions-64s.S > b/arch/powerpc/kernel/exceptions-64s.S > index 4c9440629128..8bcc1b457115 100644 > --- a/arch/powerpc/kernel/exceptions-64s.S > +++ b/arch/powerpc/kernel/exceptions-64s.S > @@ -1399,11 +1399,1

Re: [PATCH] powerpc/mm: Prevent unlikely crash in copro_calculate_slb()

2016-06-20 Thread Ian Munsie
Acked-by: Ian Munsie ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev

Re: powerpc/powernv: Exclude MSI region in extended bridge window

2016-06-20 Thread Michael Ellerman
On Tue, 2016-21-06 at 02:41:05 UTC, Gavin Shan wrote: > The windows of root port and bridge behind that are extended to > the PHB's windows to accomodate the PCI hotplug happening in > future. The PHB's 64KB 32-bits MSI region is included in bridge's > M32 windows (in hardware) though it's excluded

Re: [v6, 1/2] cxl: Add mechanism for delivering AFU driver specific events

2016-06-20 Thread Ian Munsie
Excerpts from Vaibhav Jain's message of 2016-06-20 14:20:16 +0530: > > +int cxl_unset_driver_ops(struct cxl_context *ctx) > > +{ > > +if (atomic_read(&ctx->afu_driver_events)) > > +return -EBUSY; > > + > > +ctx->afu_driver_ops = NULL; > Need a write memory barrier so that afu_driver

Re: [PATCH] devpts: remove DEVPTS_MULTIPLE_INSTANCES from all configs

2016-06-20 Thread Vineet Gupta
On Monday 20 June 2016 02:44 PM, Alexandru Moise wrote: > As each mount of devpts is now an independent filesystem, > the DEVPTS_MULTIPLE_INSTANCES config option no longer exists. > So remove it. > > Signed-off-by: Alexandru Moise <00moses.alexande...@gmail.com> For arch/arc Acked-by: Vineet Gupt

Re: powerpc/powernv: Exclude MSI region in extended bridge window

2016-06-20 Thread Gavin Shan
On Tue, Jun 21, 2016 at 02:30:48PM +1000, Michael Ellerman wrote: >On Tue, 2016-21-06 at 02:41:05 UTC, Gavin Shan wrote: >> The windows of root port and bridge behind that are extended to >> the PHB's windows to accomodate the PCI hotplug happening in >> future. The PHB's 64KB 32-bits MSI region is

Re: [v6, 08/11] powerpc/powernv: Add platform support for stop instruction

2016-06-20 Thread Michael Neuling
> > > +#define OPAL_PM_TIMEBASE_STOP0x0002 > > > +#define OPAL_PM_LOSE_HYP_CONTEXT 0x2000 > > > +#define OPAL_PM_LOSE_FULL_CONTEXT0x4000 > > >  #define OPAL_PM_NAP_ENABLED 0x0001 > > >  #define OPAL_PM_SLEEP_ENABLED0x0002 > > >  #def

Re: [RESEND PATCH v2 4/4] PCI: Add support for enforcing all MMIO BARs to be page aligned

2016-06-20 Thread Yongji Xie
On 2016/6/21 10:26, Bjorn Helgaas wrote: On Thu, Jun 02, 2016 at 01:46:51PM +0800, Yongji Xie wrote: When vfio passthrough a PCI device of which MMIO BARs are smaller than PAGE_SIZE, guest will not handle the mmio accesses to the BARs which leads to mmio emulations in host. This is because vfi