On Mon, 2016-23-05 at 17:39:18 UTC, Ian Munsie wrote: > From: Frederic Barrat <fbar...@linux.vnet.ibm.com> > > The XSL (Translation Service Layer) is a stripped down version of the > PSL (Power Service Layer) used in some cards such as the Mellanox CX4. > > Like the PSL, it implements the CAIA architecture, but has a number of > differences, mostly in it's implementation dependent registers. This > adds an ops structure to abstract these differences to bring initial > support for XSL CAPI devices. > > The XSL does not implement the optional architected SERR register, > however while it treats it as a reserved register and should work with > no special treatment, attempting to access it will cause the XSL_FEC > (First Error Capture) register to be filled out, preventing it from > capturing any subsequent errors. Therefore, this patch also prevents the > kernel from trying to set up the SERR register so that the FEC register > may still be useful, and to save one interrupt. > > The XSL also uses a special DMA cxl mode, which uses a slightly > different init sequence for the CAPP and PHB. The kernel support for > this will be in a future patch once the corresponding support has been > merged into skiboot. > > Co-authored-by: Ian Munsie <imun...@au1.ibm.com> > Signed-off-by: Ian Munsie <imun...@au1.ibm.com>
Applied to powerpc next, thanks. https://git.kernel.org/powerpc/c/6d382616ac2283ed65c7a6a52d cheers _______________________________________________ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
