On Tue, Jun 21, 2016 at 02:30:48PM +1000, Michael Ellerman wrote: >On Tue, 2016-21-06 at 02:41:05 UTC, Gavin Shan wrote: >> The windows of root port and bridge behind that are extended to >> the PHB's windows to accomodate the PCI hotplug happening in >> future. The PHB's 64KB 32-bits MSI region is included in bridge's >> M32 windows (in hardware) though it's excluded in the corresponding >> resource, as the bridge's M32 windows have 1MB as their minimal >> alignment. We observed EEH error during system boot when the MSI >> region is included in bridge's M32 window. >> >> This excludes top 1MB (including 64KB 32-bits MSI region) region >> from bridge's M32 windows when extending them. > >AFAICS you added that code in "powerpc/powernv: Extend PCI bridge resources", >so >I'll squash it into that. That way there is no window of breakage. >
Yeah, I guess it's the best way to go. Thanks a lot, Michael. Thanks, Gavin _______________________________________________ Linuxppc-dev mailing list [email protected] https://lists.ozlabs.org/listinfo/linuxppc-dev
