-Original Message-
From: Wood Scott-B07421
Sent: Tuesday, July 23, 2013 7:00 AM
To: Liu Po-B43644
Cc: linuxppc-...@ozlabs.org; Hu Mingkai-B21284
Subject: Re: [4/4] powerpc/85xx: Update mpc85xx_defconfig for C293PCIE
On Thu, Apr 25, 2013 at 09:54:17AM +0800, Po Liu wrote:
> From: Mingk
> -Original Message-
> From: Wood Scott-B07421
> Sent: Tuesday, July 23, 2013 6:59 AM
> To: Liu Po-B43644
> Cc: linuxppc-...@ozlabs.org; Hu Mingkai-B21284
> Subject: Re: [3/4] powerpc/85xx: Add C293PCIE board support
>
> On Thu, Apr 25, 2013 at 09:54:16AM +0800, Po Liu wrote:
> >
On Mon, 2013-07-22 at 19:53 -0700, Joe Perches wrote:
> Anyway, you cc'd all the right people already.
>
> If no one responds after a couple weeks, either
> send it to Jiri or directly to Linus.
Or I'll just merge it with the rest of the series.
Cheers,
Ben.
___
> -Original Message-
> From: Wood Scott-B07421
> Sent: Tuesday, July 23, 2013 6:41 AM
> To: Liu Po-B43644
> Cc: linuxppc-...@ozlabs.org; Hu Mingkai-B21284
> Subject: Re: [1/4] powerpc/85xx: Add SEC6.0 device tree
>
> On Thu, Apr 25, 2013 at 09:54:14AM +0800, Po Liu wrote:
> > Fro
We use bit 63 of the event code for userspace to request that the event
be counted using EBB (Event Based Branches). Export this value, making
it part of the API - though only on processors that support EBB.
Signed-off-by: Michael Ellerman
---
arch/powerpc/include/asm/perf_event_server.h | 6 +-
Following patch series ports the cpuidle framework for powernv
platform and also implements a cpuidle back-end powernv
idle driver calling on to power7_nap and snooze idle states.
Moving the idle states over to cpuidle framework can take advantage
of advanced heuristics, tunables and features pr
This patch implements a back-end cpuidle driver for
powernv calling power7_nap and snooze idle states.
This can be extended by adding more idle states
in the future to the existing framework.
Signed-off-by: Deepthi Dharwar
---
arch/powerpc/platforms/powernv/Kconfig |9 +
arch/powerp
This patch enables idle powernv cpu to hook on to the cpuidle
framework, if available, else call on to default idle platform
code.
Signed-off-by: Deepthi Dharwar
---
arch/powerpc/platforms/powernv/setup.c | 12 +++-
1 file changed, 11 insertions(+), 1 deletion(-)
diff --git a/arch/pow
smt-snooze-delay is a tunable that is supported on
powerpc platform to delay the entry to nap state.
This can be set either via sysfs, kernel commandline
or pp64_cpu util.
Signed-off-by: Deepthi Dharwar
---
arch/powerpc/include/asm/processor.h|2 +
arch/powerpc/platforms/powernv/
On 07/23/2013 12:23 PM, Alex Williamson wrote:
> On Tue, 2013-07-16 at 10:53 +1000, Alexey Kardashevskiy wrote:
>> VFIO is designed to be used via ioctls on file descriptors
>> returned by VFIO.
>>
>> However in some situations support for an external user is required.
>> The first user is KVM on P
From: Wang Dongsheng
The module can not be removed when execute "rmmod". rmmod not use
"--force".
Log:
root:~# rmmod cpuidle-e500
incs[9], decs[1]
rmmod: can't unload 'cpuidle_e500': Resource temporarily unavailable
Signed-off-by: Wang Dongsheng
---
Branch: pm-cpuidle
drivers/cpuidle/cpuidle
From: Wang Dongsheng
Export cpuidle_idle_call symbol, make this function can be invoked
in the module.
Signed-off-by: Wang Dongsheng
---
Branch: pm-cpuidle
drivers/cpuidle/cpuidle.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/cpuidle/cpuidle.c b/drivers/cpuidle/cpuidle.c
index
Make some functions public in order to support hotplug on either specific
PCI bus or PCI device in future.
Signed-off-by: Gavin Shan
---
arch/powerpc/include/asm/eeh.h |9 +
arch/powerpc/kernel/eeh.c |6 +++---
2 files changed, 12 insertions(+), 3 deletions(-)
diff --git a/
The patch overrides pcibios_release_device() to release EEH
resources (EEH cache, unbinding EEH device) for the indicated PCI
device.
Signed-off-by: Gavin Shan
---
arch/powerpc/kernel/pci-hotplug.c | 11 +++
1 files changed, 11 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/k
When we do normal hotplug, the PE shouldn't be kept. However, we
need the PE if the hotplug caused by EEH errors. Since we remove
EEH device through the PCI hook pcibios_stop_dev(), the flag
"purge_pe" passed to various functions is meaningless. So the patch
removes the meaningless flag and introdu
We will rely on pcibios_release_device() to remove the EEH cache
and unbind EEH device for the specific PCI device. So we shouldn't
hold the reference to the PCI device from EEH cache and EEH device.
Otherwise, pcibios_release_device() won't be called as we expected.
The patch removes the reference
Since pcibios_release_device() called by pci_stop_and_remove_bus_device()
has removed the EEH cache, we needn't do that again.
Cc: Bjorn Helgaas
Acked-by: Bjorn Helgaas
Signed-off-by: Gavin Shan
---
drivers/pci/hotplug/rpadlpar_core.c |1 -
1 files changed, 0 insertions(+), 1 deletions(-)
While restoring BARs for one specific PCI device, the pci_dev
instance should have been released. So it's not reliable to use
the pci_dev instance on restoring BARs. However, we still need
some information (e.g. PCIe capability position, header type) from
the pci_dev instance. So we have to store t
When EEH error happens to one specific PE, the device drivers
of its attached EEH devices (PCI devices) are checked to see
the further action: reset with complete hotplug, or reset without
hotplug. However, that's not enough for those PCI devices whose
drivers can't support EEH, or those PCI device
When EEH error happens to one specific PE, some devices with drivers
supporting EEH won't except hotplug on the deivce. However, there
might have other deivces without driver, or with driver without EEH
support. For the case, we need do partial hotplug in order to make
sure that the PE becomes abso
The patch introduces flag EEH_DEV_SYSFS to trace that the sysfs for
the corresponding EEH device (then PCI device) has been added or
removed, in order to avoid race condition.
Signed-off-by: Gavin Shan
---
arch/powerpc/include/asm/eeh.h |2 ++
arch/powerpc/kernel/eeh.c
The series of patches bases on linux-poerpc-next initially and intends to
resolve
the following problems:
- On pSeries platform, the EEH doesn't work after PHB hotplug
with "drmgr". The root cause is that the EEH resources (
EEH devices, EEH caches) aren't released co
Currently, we're transversing EEH devices by list_for_each_entry().
That's not safe enough because the EEH devices might be removed from
its parent PE while doing iteration. The patch replaces that with
list_for_each_entry_safe().
Signed-off-by: Gavin Shan
---
arch/powerpc/include/asm/eeh.h |
The patch fixes following issue:
Unbalanced enable for IRQ 23
[ cut here ]
WARNING: at kernel/irq/manage.c:437
:
NIP [c016de8c] .__enable_irq+0x11c/0x140
LR [c016de88] .__enable_irq+0x118/0x140
Call Trace:
[c03ea1f23880] [c016de88] .__enable_irq+
On Mon, Jul 22, 2013 at 14:31 +0200, Marc Kleine-Budde wrote:
>
> On 07/22/2013 02:14 PM, Gerhard Sittig wrote:
> > the .get_clock() callback is run from probe() and might allocate
> > resources, introduce a .put_clock() callback that is run from remove()
> > to undo any allocation activities
>
>
[ devicetree@vger adjusted ]
On Mon, Jul 22, 2013 at 15:09 +0100, Mark Brown wrote:
>
> On Mon, Jul 22, 2013 at 02:14:28PM +0200, Gerhard Sittig wrote:
>
> > + ret = clk_prepare_enable(clk);
> > + if (ret) {
> > + devm_clk_put(dev, clk);
> > + goto free_irq;
>
> The main
[ adjusted devtree to use the vger address ]
On Mon, Jul 22, 2013 at 15:04 +0200, Marc Kleine-Budde wrote:
>
> On 07/22/2013 02:14 PM, Gerhard Sittig wrote:
> > implement a .get_clock() callback for the MPC512x platform which uses
> > the common clock infrastructure (eliminating direct access to
When an associativity level change is found for one thread, the
siblings threads need to be updated as well. This is done today
for PRRN in stage_topology_update() but is missing for VPHN in
update_cpu_associativity_changes_mask().
All threads should be updated to move to the new node. Without t
On 07/23/2013 01:53 PM, Gerhard Sittig wrote:
> On Mon, Jul 22, 2013 at 14:31 +0200, Marc Kleine-Budde wrote:
>>
>> On 07/22/2013 02:14 PM, Gerhard Sittig wrote:
>>> the .get_clock() callback is run from probe() and might allocate
>>> resources, introduce a .put_clock() callback that is run from re
On 07/23/2013 02:07 PM, Gerhard Sittig wrote:
[...]
>>> + return freq_calc;
>>> +
>>> +err_invalid:
>>> + dev_err(&ofdev->dev, "invalid clock source specification\n");
>>> + return 0;
>>
>> return 0 in case of error? Please add a comment what this 0 means here.
>
> The .get_clock() callback
[ summary: "shared gate" support desirable? approach acceptable? ]
On Mon, Jul 22, 2013 at 14:14 +0200, Gerhard Sittig wrote:
>
> this change implements a clock driver for the MPC512x PowerPC platform
> which follows the COMMON_CLK approach and uses common clock drivers
> shared with other platfo
On Mon, Jul 22, 2013 at 04:48:16PM +1000, Benjamin Herrenschmidt wrote:
> On Mon, 2013-07-22 at 12:09 +0530, Anshuman Khandual wrote:
> > These patches have not been applied yet. Would like me to correct
> > these spellings myself and send out again. Please do let me know.
> > Thanks !
>
> No, it'
On Fri, Jul 19, 2013 at 05:59:30PM -0500, Scott Wood wrote:
> On 07/17/2013 11:00:45 PM, Anton Blanchard wrote:
> >
> >Hi Scott,
> >
> >> What specifically should I do to test it?
> >
> >Could you double check perf annotate works? I'm 99% sure it will but
> >that is what was failing on ppc64.
>
>
On Tue, Jul 16, 2013 at 11:09:30AM +0800, Tiejun Chen wrote:
> The SOFT_DISABLE_INTS seems an odd name for something that updates the
> software state to be consistent with interrupts being hard disabled, so
> rename SOFT_DISABLE_INTS with RECONCILE_IRQ_STATE to avoid this confusion.
Yes!
I have
On Tue, Jul 16, 2013 at 10:56:38AM +0200, Paul Bolle wrote:
> The Kconfig symbol 8XX_MINIMAL_FPEMU was removed in commit 968219fa33
> ("powerpc/8xx: Remove 8xx specific "minimal FPU emulation""). But that
> commit didn't remove all code depending on that symbol. Do so now.
>
> Signed-off-by: Paul
On Mon, Jul 22, 2013 at 08:54:31PM +0530, Aneesh Kumar K.V wrote:
> Denis Kirjanov writes:
>
> > Fix a typo in pSeries_lpar_hpte_insert()
> >
> > Signed-off-by: Denis Kirjanov
>
> looks good
>
> Reviewed-by: Aneesh Kumar K.V
>
> We may want to add the commit that introduced the change ?
>
>
On Mon, Jul 22, 2013 at 12:21:16PM +0530, Srivatsa S. Bhat wrote:
> On 07/22/2013 12:10 PM, Chen Gang wrote:
> > Since not need 'max_cpus' after the related commit, the related code
> > are useless too, need be removed.
> >
> > The related commit:
> >
> > c1aa687 powerpc: Clean up obsolete code
On Mon, Jul 22, 2013 at 03:02:53PM +0800, Chen Gang wrote:
> Hello Maintainers:
>
> With allmodconfig and EXTRA_CFLAGS=-W", it reports warnings below:
>
> arch/powerpc/xmon/xmon.c:3027:6: warning: variable ‘i’ might be clobbered by
> ‘longjmp’ or ‘vfork’ [-Wclobbered]
> arch/powerpc/xmon/xmon.c
On Tue, Jul 23, 2013 at 10:23:57AM +0530, Deepthi Dharwar wrote:
> smt-snooze-delay is a tun-able provided currently on powerpc to delay the
> entry of an idle cpu to NAP state. By default, the value is 100us,
> which is entry criteria for NAP state i.e only if the idle period is
> above 100us it w
On Tue, Jul 23, 2013 at 02:31:41PM +0530, Deepthi Dharwar wrote:
> This patch implements a back-end cpuidle driver for
> powernv calling power7_nap and snooze idle states.
> This can be extended by adding more idle states
> in the future to the existing framework.
Other than the state table and a
Commit 801eb73f45371accc78ca9d6d22d647eeb722c11 introduced
a bug while checking PTE flags. We have to drop the _PAGE_COHERENT flag
when __PAGE_NO_CACHE is set and the cache update policy is not write-through
(i.e. _PAGE_WRITETHRU is not set)
Signed-off-by: Denis Kirjanov
Reviewed-by: Aneesh Kumar
On 07/22/2013 05:33 PM, Scott Wood wrote:
> On Mon, May 13, 2013 at 02:27:08PM -0700, York Sun wrote:
>> Erratum A-006037 indicates I2C controller executes the write to I2CCR only
>> after it sees SCL idle for 64K cycle of internal I2C controller clocks. If
>> during this waiting period, I2C contro
On 07/22/2013 09:59:04 PM, Haijun Zhang wrote:
eSDHC of T4240 had 1.8v voltage support. Add this node to specify
eSDHC voltage capacity. If this node not specified eSDHC driver
still can read from eSDHC host capacity register.
Signed-off-by: Haijun Zhang
Signed-off-by: Anton Vorontsov
---
chan
On 07/23/2013 07:32 PM, Michael Ellerman wrote:
> On Tue, Jul 23, 2013 at 10:23:57AM +0530, Deepthi Dharwar wrote:
>> smt-snooze-delay is a tun-able provided currently on powerpc to delay the
>> entry of an idle cpu to NAP state. By default, the value is 100us,
>> which is entry criteria for NAP st
On 07/23/2013 02:47:18 AM, Liu Po-B43644 wrote:
> > +partition@190 {
> > +/* 7MB for User Area */
> > +reg = <0x0190 0x0070>;
> > +label = "NAND User area";
> > +};
>
> Above you say there's 4 Gi
On 07/23/2013 10:37:46 AM, York Sun wrote:
On 07/22/2013 05:33 PM, Scott Wood wrote:
> On Mon, May 13, 2013 at 02:27:08PM -0700, York Sun wrote:
>> Erratum A-006037 indicates I2C controller executes the write to
I2CCR only
>> after it sees SCL idle for 64K cycle of internal I2C controller
clo
The latency is in milliseconds scale rather than microseconds based on
measurements on iMac G5 and Xscale G5. The patch also enables to use
ondemand governor on the latter.
Signed-off-by: Aaro Koskinen
---
drivers/cpufreq/pmac64-cpufreq.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-
Some functions on switch path use msleep() which is inaccurate, and
depends on HZ. With HZ=100 msleep(1) takes actually over ten times longer.
Using usleep_range() we get more accurate sleeps.
I measured the "pfunc_slewing_done" polling to take 300us at max (on
2.3GHz dual-processor Xserve G5), so
On 07/23/2013 11:43 AM, Scott Wood wrote:
>>
>> Yes. The max divider from sys clock to i2c clcok is 32K.
>> i2c->real_clk is the clock I2C controller pumps out, not its internal
>> operation clock.
>
> 32K is the max for all implementations?
Yes, according to application note 2919 (published).
>
Enable cpufreq on iMac G5 (iSight) model. Tested with the 2.1 GHz version.
Signed-off-by: Aaro Koskinen
---
drivers/cpufreq/pmac64-cpufreq.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/cpufreq/pmac64-cpufreq.c b/drivers/cpufreq/pmac64-cpufreq.c
index f9e399b..1f
On Tue, 2013-07-23 at 23:20 +0200, Rafael J. Wysocki wrote:
> All looks good in the patchset from 1 feet (or more), but I need
> Ben to speak here.
I want to give it a quick spin on the HW here, I'll ack then. But yes,
it looks good.
Cheers,
Ben.
On Tuesday, July 23, 2013 11:24:37 PM Aaro Koskinen wrote:
> Some functions on switch path use msleep() which is inaccurate, and
> depends on HZ. With HZ=100 msleep(1) takes actually over ten times longer.
> Using usleep_range() we get more accurate sleeps.
>
> I measured the "pfunc_slewing_done"
On Tuesday, July 23, 2013 05:28:01 PM Dongsheng Wang wrote:
> From: Wang Dongsheng
>
> Export cpuidle_idle_call symbol, make this function can be invoked
> in the module.
Why?
Rafael
> Signed-off-by: Wang Dongsheng
> ---
> Branch: pm-cpuidle
>
> drivers/cpuidle/cpuidle.c | 1 +
> 1 file ch
On Tuesday, July 23, 2013 05:28:00 PM Dongsheng Wang wrote:
> From: Wang Dongsheng
>
> The module can not be removed when execute "rmmod". rmmod not use
> "--force".
>
> Log:
> root:~# rmmod cpuidle-e500
> incs[9], decs[1]
> rmmod: can't unload 'cpuidle_e500': Resource temporarily unavailable
>
On 06/06/2013 09:00:20 PM, Kevin Hao wrote:
On Mon, Jun 03, 2013 at 11:42:03AM -0500, Scott Wood wrote:
> On 06/01/2013 07:07:20 PM, Kevin Hao wrote:
> >On Sat, Jun 01, 2013 at 09:47:16PM +1000, Benjamin Herrenschmidt
> >wrote:
> >> On Sat, 2013-06-01 at 18:59 +0800, Kevin Hao wrote:
> >>
> >> >
On 07/23/2013 03:01:17 AM, Liu Po-B43644 wrote:
> -Original Message-
> From: Wood Scott-B07421
> Sent: Tuesday, July 23, 2013 6:41 AM
> To: Liu Po-B43644
> Cc: linuxppc-...@ozlabs.org; Hu Mingkai-B21284
> Subject: Re: [1/4] powerpc/85xx: Add SEC6.0 device tree
>
> On Thu, Apr 25,
On 07/02/2013 06:20:04 AM, Catalin Udma wrote:
If CONFIG_E500 is enabled, the compilation flags are updated
specifying the target core -mcpu=e5500/e500mc/8540
Also remove -Wa,-me500, being incompatible with -mcpu=e5500/e6500
The assembler option is redundant if the -mcpu= flag is set.
The patch f
On 07/23/2013 09:44 PM, Michael Ellerman wrote:
> On Mon, Jul 22, 2013 at 12:21:16PM +0530, Srivatsa S. Bhat wrote:
>> On 07/22/2013 12:10 PM, Chen Gang wrote:
>>> Since not need 'max_cpus' after the related commit, the related code
>>> are useless too, need be removed.
>>>
>>> The related commit:
On 07/23/2013 09:58 PM, Michael Ellerman wrote:
> On Mon, Jul 22, 2013 at 03:02:53PM +0800, Chen Gang wrote:
>> Hello Maintainers:
>>
>> With allmodconfig and EXTRA_CFLAGS=-W", it reports warnings below:
>
>>
>> arch/powerpc/xmon/xmon.c:3027:6: warning: variable ‘i’ might be clobbered by
>> ‘long
eSDHC of T4240 had 1.8v voltage support. Add this node to specify
eSDHC voltage capacity. If this node not specified eSDHC driver
still can read from eSDHC host capacity register.
Signed-off-by: Haijun Zhang
Signed-off-by: Anton Vorontsov
---
changes for v2:
- rewrite the voltage-ranges
On Wed, Jul 24, 2013 at 08:28:07AM +0800, Chen Gang wrote:
> On 07/23/2013 09:44 PM, Michael Ellerman wrote:
> > On Mon, Jul 22, 2013 at 12:21:16PM +0530, Srivatsa S. Bhat wrote:
> >> On 07/22/2013 12:10 PM, Chen Gang wrote:
> >>> Since not need 'max_cpus' after the related commit, the related code
Erratum A-006598 says that 64-bit mftb is not atomic -- it's subject
to a similar race condition as doing mftbu/mftbl on 32-bit. The lower
half of timebase is updated before the upper half; thus, we can share
the workaround for a similar bug on Cell. This workaround involves
looping if the lower
On 07/24/2013 09:16 AM, Michael Ellerman wrote:
> On Wed, Jul 24, 2013 at 08:28:07AM +0800, Chen Gang wrote:
>> > On 07/23/2013 09:44 PM, Michael Ellerman wrote:
>>> > > On Mon, Jul 22, 2013 at 12:21:16PM +0530, Srivatsa S. Bhat wrote:
> >> On 07/22/2013 12:10 PM, Chen Gang wrote:
> > >>>
> -Original Message-
> From: Rafael J. Wysocki [mailto:r...@sisk.pl]
> Sent: Wednesday, July 24, 2013 5:33 AM
> To: Wang Dongsheng-B40534
> Cc: daniel.lezc...@linaro.org; linux...@vger.kernel.org; linuxppc-
> d...@lists.ozlabs.org
> Subject: Re: [PATCH 2/2] cpuidle: export cpuidle_idle_ca
The series of patches bases on linux-poerpc-next initially and intends to
resolve
the following problems:
- On pSeries platform, the EEH doesn't work after PHB hotplug
with "drmgr". The root cause is that the EEH resources (
EEH devices, EEH caches) aren't released co
Since pcibios_release_device() called by pci_stop_and_remove_bus_device()
has removed the EEH cache, we needn't do that again.
Cc: Bjorn Helgaas
Acked-by: Bjorn Helgaas
Signed-off-by: Gavin Shan
---
drivers/pci/hotplug/rpadlpar_core.c |1 -
1 files changed, 0 insertions(+), 1 deletions(-)
When we do normal hotplug, the PE shouldn't be kept. However, we
need the PE if the hotplug caused by EEH errors. Since we remove
EEH device through the PCI hook pcibios_stop_dev(), the flag
"purge_pe" passed to various functions is meaningless. So the patch
removes the meaningless flag and introdu
Make some functions public in order to support hotplug on either specific
PCI bus or PCI device in future.
Signed-off-by: Gavin Shan
---
arch/powerpc/include/asm/eeh.h |9 +
arch/powerpc/kernel/eeh.c |6 +++---
2 files changed, 12 insertions(+), 3 deletions(-)
diff --git a/
We will rely on pcibios_release_device() to remove the EEH cache
and unbind EEH device for the specific PCI device. So we shouldn't
hold the reference to the PCI device from EEH cache and EEH device.
Otherwise, pcibios_release_device() won't be called as we expected.
The patch removes the reference
When EEH error happens to one specific PE, the device drivers
of its attached EEH devices (PCI devices) are checked to see
the further action: reset with complete hotplug, or reset without
hotplug. However, that's not enough for those PCI devices whose
drivers can't support EEH, or those PCI device
Currently, we're transversing EEH devices by list_for_each_entry().
That's not safe enough because the EEH devices might be removed from
its parent PE while doing iteration. The patch replaces that with
list_for_each_entry_safe().
Signed-off-by: Gavin Shan
---
arch/powerpc/include/asm/eeh.h |
While restoring BARs for one specific PCI device, the pci_dev
instance should have been released. So it's not reliable to use
the pci_dev instance on restoring BARs. However, we still need
some information (e.g. PCIe capability position, header type) from
the pci_dev instance. So we have to store t
The patch fixes following issue:
Unbalanced enable for IRQ 23
[ cut here ]
WARNING: at kernel/irq/manage.c:437
:
NIP [c016de8c] .__enable_irq+0x11c/0x140
LR [c016de88] .__enable_irq+0x118/0x140
Call Trace:
[c03ea1f23880] [c016de88] .__enable_irq+
The patch overrides pcibios_release_device() to release EEH
resources (EEH cache, unbinding EEH device) for the indicated PCI
device.
Signed-off-by: Gavin Shan
---
arch/powerpc/kernel/pci-hotplug.c | 11 +++
1 files changed, 11 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/k
When EEH error happens to one specific PE, some devices with drivers
supporting EEH won't except hotplug on the deivce. However, there
might have other deivces without driver, or with driver without EEH
support. For the case, we need do partial hotplug in order to make
sure that the PE becomes abso
The patch introduces flag EEH_DEV_SYSFS to trace that the sysfs for
the corresponding EEH device (then PCI device) has been added or
removed, in order to avoid race condition.
Signed-off-by: Gavin Shan
---
arch/powerpc/include/asm/eeh.h |2 ++
arch/powerpc/kernel/eeh.c
> -Original Message-
> From: Rafael J. Wysocki [mailto:r...@sisk.pl]
> Sent: Wednesday, July 24, 2013 5:33 AM
> To: Wang Dongsheng-B40534
> Cc: daniel.lezc...@linaro.org; linux...@vger.kernel.org; linuxppc-
> d...@lists.ozlabs.org
> Subject: Re: [PATCH 1/2] cpuidle: fix cpu idle driver as
On Fri, Jul 19, 2013 at 6:46 AM, Gerhard Sittig wrote:
> So: No, not having to fiddle with DMA stuff when doing PCI need
> not be a problem, it's actually expected. But since a DMA engine
> might be involved (that's just not under your command), the
> accompanying problems may arise. You may ne
On Tue, 2013-07-23 at 21:22 -0700, Peter LaDow wrote:
> On Fri, Jul 19, 2013 at 6:46 AM, Gerhard Sittig wrote:
> > So: No, not having to fiddle with DMA stuff when doing PCI need
> > not be a problem, it's actually expected. But since a DMA engine
> > might be involved (that's just not under you
On Tue, 2013-07-23 at 07:33 -0500, Robert Jennings wrote:
> When an associativity level change is found for one thread, the
> siblings threads need to be updated as well. This is done today
> for PRRN in stage_topology_update() but is missing for VPHN in
> update_cpu_associativity_changes_mask().
On 24 July 2013 01:54, Aaro Koskinen wrote:
> Some functions on switch path use msleep() which is inaccurate, and
> depends on HZ. With HZ=100 msleep(1) takes actually over ten times longer.
> Using usleep_range() we get more accurate sleeps.
>
> I measured the "pfunc_slewing_done" polling to take
On 24 July 2013 01:54, Aaro Koskinen wrote:
> Enable cpufreq on iMac G5 (iSight) model. Tested with the 2.1 GHz version.
>
> Signed-off-by: Aaro Koskinen
> ---
> drivers/cpufreq/pmac64-cpufreq.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
Acked-by: Viresh Kumar
__
On 24 July 2013 01:54, Aaro Koskinen wrote:
> The patch also enables to use ondemand governor on the latter.
How? I can't see anything obvious here. :(
>
> Signed-off-by: Aaro Koskinen
> ---
> drivers/cpufreq/pmac64-cpufreq.c | 5 ++---
> 1 file changed, 2 insertions(+), 3 deletions(-)
>
> dif
From: Hongbo Zhang
Hi Vinod, Dan, Scott and Leo, please have a look at these V2 patches.
Freescale QorIQ T4 and B4 introduce new 8-channel DMA engines, this patch set
adds support this DMA engine.
V4->V5 changes:
- update description in the dt binding document, to make it more resonable
- add n
From: Hongbo Zhang
This patch updates the discription of each type of DMA controller and its
channels, it is preparation for adding another new DMA controller binding, it
also fixes some defects of indent for text alignment at the same time.
Signed-off-by: Hongbo Zhang
---
.../devicetree/bindi
From: Hongbo Zhang
Freescale QorIQ T4 and B4 introduce new 8-channel DMA engines, this patch add
the device tree nodes for them.
Signed-off-by: Hongbo Zhang
---
.../devicetree/bindings/powerpc/fsl/dma.txt| 66
arch/powerpc/boot/dts/fsl/b4si-post.dtsi |4
From: Hongbo Zhang
This patch adds support to 8-channel DMA engine, thus the driver works for both
the new 8-channel and the legacy 4-channel DMA engines.
Signed-off-by: Hongbo Zhang
---
drivers/dma/Kconfig |9 +
drivers/dma/fsldma.c |9 ++---
drivers/dma/fsldma.h |2 +
From: Hongbo Zhang
The variable cookie is initialized in a list_for_each_entry loop, if(unlikely)
the list is empty, this variable will be used uninitialized, so we get a gcc
compiling warning about this. This patch fixes this defect by setting an
initial value to the varialble cookie.
Signed-of
On Wed, Jul 24, 2013 at 2:21 PM, wrote:
> From: Hongbo Zhang
>
> Hi Vinod, Dan, Scott and Leo, please have a look at these V2 patches.
Looks fine after the rounds of review.
Acked-by: Li Yang
PS: The original email was in html and rejected by lists thanks to the
new gmail composer. Sorry if
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