Why no commit message with what issue this change was trying to fix?
- k
On Mar 25, 2015, at 8:49 AM, Emil Medve wrote:
> Signed-off-by: Emil Medve
> ---
>
> v3: Rebased and updated due to upstream changes since v2
>
> v2: Rebased and updated due to upstream changes since v1
>
> arch/powerp
On Mar 17, 2015, at 1:58 PM, Madalin Bucur wrote:
> This introduces the Freescale Data Path Acceleration Architecture
> (DPAA) Ethernet driver (dpaa_eth) that builds upon the DPAA QMan,
> BMan, PAMU and FMan drivers to deliver Ethernet connectivity on
> the Freescale DPAA QorIQ platforms.
>
> S
On Mar 11, 2015, at 12:04 AM, Igal.Liberman wrote:
> From: Igal Liberman
commit message?
>
> Signed-off-by: Igal Liberman
> ---
> drivers/soc/fsl/fman/Kconfig | 10 +
> drivers/soc/fsl/fman/Makefile |2 +
> drivers/soc/fsl/fman/port/Makefile|3 +
> drivers/soc/fs
On Mar 11, 2015, at 12:04 AM, Igal.Liberman wrote:
> From: Igal Liberman
>
> Signed-off-by: Igal Liberman
> ---
> drivers/soc/Kconfig |1 +
> drivers/soc/Makefile |1 +
> drivers/soc/fsl/Kconfig |1 +
> drivers/soc/fsl/Makefile |1 +
> drivers/soc/fsl
On Mar 11, 2015, at 12:03 AM, Igal.Liberman wrote:
> From: Igal Liberman
>
> The Freescale Data Path Acceleration Architecture (DPAA) is a set of
> hardware components on specific QorIQ multicore processors. This
> architecture provides the infrastructure to support simplified
> sharing of net
On Mar 11, 2015, at 12:07 AM, Igal.Liberman wrote:
> From: Igal Liberman
>
> Add Frame Manager Multi-User RAM support.
>
> Signed-off-by: Igal Liberman
> ---
> drivers/soc/fsl/fman/Kconfig|1 +
> drivers/soc/fsl/fman/Makefile |5 +-
> drivers/soc/fsl/fman/fm_muram
On Mar 4, 2015, at 11:45 PM, Emil Medve wrote:
> From: Igal Liberman
>
> The Freescale Data Path Acceleration Architecture (DPAA) is a set of
> hardware components on specific QorIQ P and T series multicore processors.
> This architecture provides the infrastructure to support simplified
> sha
On Jan 20, 2015, at 6:03 AM, Igal.Liberman wrote:
> From: Igal Liberman
Really should have some commit text
>
> Signed-off-by: Igal Liberman
>
> This patch is based on https://patchwork.ozlabs.org/patch/430966/
This belongs below the ---
> ---
> drivers/clk/clk-ppc-corenet.c | 250 +
On Feb 16, 2015, at 9:46 AM, Emil Medve wrote:
> v2: Moved out of staging into soc/freescale
>
> Hello,
>
>
> This is the se attempt to publish the . They are
> not to be applied yet.
>
> These are the Freescale DPAA B/QMan drivers. At this stage, this is more or
> less
> the drivers fr
On Feb 16, 2015, at 9:46 AM, Emil Medve wrote:
> From: Geoff Thorpe
>
> Change-Id: I075944acf740dbaae861104c17a9ff7247dec1be
> Signed-off-by: Geoff Thorpe
> ---
> drivers/soc/Kconfig |1 +
> drivers/soc/Makefile |1 +
> drivers/soc/freescale/Kconfig
On Oct 31, 2014, at 2:24 AM, qiang.z...@freescale.com wrote:
> On Oct 30, 2014, at 9:37 AM, Kumar Gala wrote:
>
>
>> -Original Message-
>> From: Kumar Gala [mailto:ga...@kernel.crashing.org]
>> Sent: Thursday, October 30, 2014 9:37 PM
>> To: Zhao
On Oct 30, 2014, at 2:31 AM, Zhao Qiang wrote:
> LS1 is arm cpu and it has qe ip block.
> move qe code from platform directory to public directory.
>
> QE is an IP block integrates several comunications peripheral
> controllers. It can implement a variety of applications, such
> as uart, usb an
On Oct 30, 2014, at 2:31 AM, Zhao Qiang wrote:
> qe need to use the rheap, so move it to public directory.
>
> Signed-off-by: Zhao Qiang
> ---
> arch/powerpc/Kconfig| 3 ---
> arch/powerpc/include/asm/fsl_85xx_cache_sram.h | 2 +-
> arch/powerpc/lib/M
On Oct 28, 2014, at 4:15 AM, Emil Medve wrote:
> Portals are memory mapped interfaces to BMan that allow low-latency,
> lock-less interaction by software running on processor cores, accelerators
> and network interfaces with the BMan
>
> Signed-off-by: Emil Medve
> Change-Id: I6d245ffc14ba3d0e
On Oct 28, 2014, at 4:15 AM, Emil Medve wrote:
> The Buffer Manager is part of the Data-Path Acceleration Architecture (DPAA).
> BMan supports hardware allocation and deallocation of buffers belonging to
> pools originally created by software with configurable depletion thresholds.
> This bindin
On Oct 22, 2014, at 9:09 AM, Emil Medve wrote:
> The Buffer Manager is part of the Data-Path Acceleration Architecture (DPAA).
> BMan supports hardware allocation and deallocation of buffers belonging to
> pools originally created by software with configurable depletion thresholds.
> This bindin
On Oct 17, 2014, at 5:13 AM, b29...@freescale.com wrote:
> From: Tang Yuantian
>
> Freescale introduced new ARM core-based SoCs which support dynamic
> frequency switch feature. DFS on new SoCs are compatible with current
> PowerPC CoreNet platforms. In order to support those new platforms,
> t
On Sep 25, 2014, at 4:47 AM, Zhao Qiang wrote:
> qe need to use the rheap, so move it to public directory.
>
> Signed-off-by: Zhao Qiang
> ---
> arch/powerpc/Kconfig| 3 ---
> arch/powerpc/include/asm/fsl_85xx_cache_sram.h | 2 +-
> arch/powerpc/lib/M
On Sep 17, 2014, at 1:56 AM, Ganapatrao Kulkarni
wrote:
> From: Ganapatrao Kulkarni
>
> This patch adds property "nid" to memory node to provide the memory range to
> numa node id mapping.
>
> Signed-off-by: Ganapatrao Kulkarni
>
> —
Adding the PPC guys as they’ve been doing NUMA on IBM P
On May 25, 2014, at 10:08 PM, shengzhou@freescale.com wrote:
>
>> -Original Message-
>> From: Wood Scott-B07421
>> Sent: Saturday, May 24, 2014 1:06 AM
>> To: Liu Shengzhou-B36685
>> Cc: linuxppc-dev@lists.ozlabs.org
>> Subject: Re: [2/2] powerpc/corenet64_smp_defconfig: enable RTC s
On Apr 18, 2014, at 8:11 AM, Diana Craciun wrote:
> From: Diana Craciun
>
> The CoreNet coherency fabric is a fabric-oriented, conectivity
> infrastructure that enables the implementation of coherent, multicore
> systems. The CCF acts as a central interconnect for cores,
> platform-level cache
On May 5, 2014, at 10:58 AM, Diana Craciun wrote:
> From: Diana Craciun
>
> The CoreNet coherency fabric is a fabric-oriented, conectivity
> infrastructure that enables the implementation of coherent, multicore
> systems. The CCF acts as a central interconnect for cores,
> platform-level cache
On Mar 5, 2014, at 1:21 AM, Zhao Qiang wrote:
> There is QE on platform T104x, add support.
> Call funcs qe_ic_init and qe_init if CONFIG_QUICC_ENGINE is defined.
>
> Signed-off-by: Zhao Qiang
> ---
> Changes for v2:
> - use mpc85xx_qe_init() instead
> arch/powerpc/platforms/85xx/corenet
On Mar 5, 2014, at 2:16 AM, Shengzhou Liu wrote:
> Add support for Cortina CS4315/CS4340 10G PHY.
> (Tested with CS4315 on T2080RDB and CS4340 on T4240RDB).
>
> Signed-off-by: YongHua Cao
> Signed-off-by: Shengzhou Liu
> ---
> drivers/net/phy/Kconfig | 5 +++
> drivers/net/phy/Makefile |
On Feb 28, 2014, at 2:48 AM, Zhao Qiang wrote:
> There is QE on platform T104x, add support.
> Call funcs qe_ic_init and qe_init if CONFIG_QUICC_ENGINE is defined.
>
> Signed-off-by: Zhao Qiang
> ---
> arch/powerpc/platforms/85xx/corenet_generic.c | 32 +++
> 1 file chan
On Feb 14, 2014, at 9:53 AM, Rob Herring wrote:
> On Thu, Feb 13, 2014 at 11:22 PM, Kevin Hao wrote:
>> Currently, of_match_node compares each given match against all node's
>> compatible strings with of_device_is_compatible.
>>
>> To achieve multiple compatible strings per node with ordering
On Feb 14, 2014, at 9:53 AM, Rob Herring wrote:
> On Thu, Feb 13, 2014 at 11:22 PM, Kevin Hao wrote:
>> Currently, of_match_node compares each given match against all node's
>> compatible strings with of_device_is_compatible.
>>
>> To achieve multiple compatible strings per node with ordering
On Feb 11, 2014, at 2:57 PM, Stephen N Chivers wrote:
> I have been trial booting a 3.14-rc2 kernel for a 85xx platform
> (dtbImage).
>
> After mounting the root filesystem there are no messages from the init
> scripts
> and the serial console is not available for login.
>
> In the kernel lo
On Feb 7, 2014, at 3:02 AM, Torsten Duwe wrote:
> On Thu, Feb 06, 2014 at 02:19:52PM -0600, Scott Wood wrote:
>> On Thu, 2014-02-06 at 18:37 +0100, Torsten Duwe wrote:
>>> On Thu, Feb 06, 2014 at 05:38:37PM +0100, Peter Zijlstra wrote:
>>
Can you pair lwarx with sthcx ? I couldn't immediat
On Jan 29, 2014, at 8:38 PM, Michael Ellerman wrote:
> This patch adds some documentation on the different cpu families
> supported by arch/powerpc.
>
> Signed-off-by: Michael Ellerman
> ---
> Documentation/powerpc/cpu_families.txt | 76 ++
> 1 file changed, 76 i
On Jan 25, 2014, at 6:06 AM, Prabhakar Kushwaha wrote:
> Freescale IFC controller has been used for mpc8xxx. It will be used
> for ARM-based SoC as well. This patch moves the driver to driver/memory
> and fix the header file includes.
>
> Also remove module_platform_driver() and instead call
>
On Jan 18, 2014, at 12:21 AM, Prabhakar Kushwaha
wrote:
> Freescale IFC controller has been used for mpc8xxx. It will be used
> for ARM-based SoC as well. This patch moves the driver to driver/memory
> and fix the header file includes.
>
> Also remove module_platform_driver() and instead call
On Jan 15, 2014, at 11:42 PM, Prabhakar Kushwaha
wrote:
> Freescale IFC controller has been used for mpc8xxx. It will be used
> for ARM-based SoC as well. This patch moves the driver to driver/memory
> and fix the header file includes.
>
> Also remove module_platform_driver() and instead call
On Jan 16, 2014, at 2:14 AM, Minghuan Lian wrote:
> For PEXCSRBAR, bit 3-0 indicate prefetchable and address type.
> So when getting base address, these bits should be masked,
> otherwise we may get incorrect base address.
>
> Signed-off-by: Minghuan Lian
> ---
> arch/powerpc/sysdev/fsl_pci.c
On Jan 17, 2014, at 12:09 AM, Prabhakar Kushwaha
wrote:
> Currently IFC NAND driver is enabled in corenet32smp_defconfig. But IFC
> controller is not enabled
>
> So, Enable IFC controller in corenet32smp_defconfig.
>
> Signed-off-by: Prabhakar Kushwaha
> ---
> Based upon git://git.kernel.org
On Dec 31, 2013, at 2:35 PM, jeclark2006 wrote:
> As the subject says... where to post problems with ppc & linux that does not
> involve 'apple' implementations.
>
> The 'embedded' list appears to be pretty much dead.
This is now the list for any ppc linux issues for embedded, server, etc.
-
On Nov 22, 2013, at 2:12 AM, Liu Gang wrote:
> For MPC8572/MPC8536, the status of GPIOs defined as output
> cannot be determined by reading GPDAT register, so the code
> use shadow data register instead. But the code may give the
> wrong status of GPIOs defined as input under some scenarios:
>
On Nov 20, 2013, at 10:41 AM, Scott Wood wrote:
> On Wed, 2013-11-20 at 16:35 +0800, Tiejun Chen wrote:
>> CONFIG_ALTIVEC is always enabled for CoreNet64.
>
> In the defconfig perhaps, but this isn't a generally true statement.
>
>> And if we select CONFIG_E{5,6}500_CPU this may introduce -mcp
On Nov 11, 2013, at 1:25 PM, Lijun Pan wrote:
> mpc85xx_smp_defconfig and mpc85xx_defconfig already have CONFIG_P1023RDS=y.
> Merge CONFIG_P1023RDB=y and other relevant configurations into
> mpc85xx_smp_defconfig and mpc85_defconfig.
>
> Signed-off-by: Lijun Pan
> ---
> arch/powerpc/configs/8
SSI Dual FIFO
>
> The third cell specifies the transfer priority as below.
For the DT-Binding portion:
Acked-by: Kumar Gala
- k
--
Employee of Qualcomm Innovation Center, Inc.
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by
The Linux Foundation
___
On Oct 25, 2013, at 8:02 AM, Benjamin Herrenschmidt wrote:
> On Fri, 2013-10-25 at 10:58 +0100, David Laight wrote:
>>> This is not a distro issue. It's a libstdc++ portability issue. libstdc++
>>> hardcodes lwsync unless __NO_LWSYNC__ is explicitly defined,
>>> which you only get with -mcpu=8540
On Oct 24, 2013, at 4:05 PM, James Yang wrote:
> On Thu, 24 Oct 2013, Kumar Gala wrote:
>
>> On Oct 24, 2013, at 4:45 AM, Benjamin Herrenschmidt wrote:
>>
>>> On Wed, 2013-10-23 at 23:06 -0500, Kumar Gala wrote:
>>>> On Oct 23, 2013, at 5:15 AM, Scott Woo
On Oct 24, 2013, at 4:45 AM, Benjamin Herrenschmidt wrote:
> On Wed, 2013-10-23 at 23:06 -0500, Kumar Gala wrote:
>> On Oct 23, 2013, at 5:15 AM, Scott Wood wrote:
>>
>>> On Wed, 2013-10-23 at 00:07 -0500, Kumar Gala wrote:
>>>> On Oct 18, 2013, at 2:38 AM, W
On Oct 23, 2013, at 5:41 AM, Minghuan Lian wrote:
> PowerPC uses structure pci_controller to describe PCI controller,
> but ARM uses structure pci_sys_data. In order to support PowerPC
> and ARM simultaneously, the patch adds a structure fsl_pci that
> contains most of the members of the pci_cont
On Oct 23, 2013, at 5:15 AM, Scott Wood wrote:
> On Wed, 2013-10-23 at 00:07 -0500, Kumar Gala wrote:
>> On Oct 18, 2013, at 2:38 AM, Wolfgang Denk wrote:
>>> diff --git a/arch/powerpc/kernel/traps.c b/arch/powerpc/kernel/traps.c
>>> index f783c93..f330374 100644
&g
On Oct 19, 2013, at 5:24 PM, Ben Hutchings wrote:
> When building lib/raid6/altivec8.o with gcc 4.8 on Debian, the compiler
> is generating references to two new runtime subroutines which are
> apparently not included in the kernel:
>
> ERROR: "_restvr_20" [lib/raid6/raid6_pq.ko] undefined!
> ER
On Oct 18, 2013, at 2:38 AM, Wolfgang Denk wrote:
> Default Debian PowerPC doesn't work on e500 because the code contains
> "lwsync" instructions, which are unsupported on this core. As a
> result, applications using this will crash with an "unhandled signal 4"
> "Illegal instruction" error.
>
On Oct 15, 2013, at 8:16 AM, Gerhard Sittig wrote:
> On Mon, Oct 14, 2013 at 13:09 -0700, Greg Kroah-Hartman wrote:
>>
>> On Mon, Oct 14, 2013 at 02:40:44PM -0500, Kumar Gala wrote:
>>>
>>> Greg,
>>>
>>> Wondering your thoughts on driver
On Oct 14, 2013, at 2:26 PM, Kumar Gala wrote:
>
> On Oct 14, 2013, at 6:37 AM, Xie Xiaobo wrote:
>
>> The QUICC Engine (QE) is a communications coprocessors on Freescale
>> embedded processors. The QE had been applied in PowerPC architecture
>> previously, an
On Oct 14, 2013, at 2:26 PM, Kumar Gala wrote:
>
> On Oct 14, 2013, at 6:37 AM, Xie Xiaobo wrote:
>
>> The QUICC Engine (QE) is a communications coprocessors on Freescale
>> embedded processors. The QE had been applied in PowerPC architecture
>> previously, an
On Oct 14, 2013, at 6:37 AM, Xie Xiaobo wrote:
> The QUICC Engine (QE) is a communications coprocessors on Freescale
> embedded processors. The QE had been applied in PowerPC architecture
> previously, and it will be applied in ARM architecture too.
> So move the qe_lib from arch/powerpc to drive
On Sep 27, 2013, at 11:15 AM, Scott Wood wrote:
> On Fri, 2013-09-27 at 10:52 -0500, Kumar Gala wrote:
>> On Sep 26, 2013, at 7:18 PM, Scott Wood wrote:
>>
>>> Otherwise, we get a debug traceback due to the use of
>>> smp_processor_id() (or get_pac
On Sep 26, 2013, at 7:18 PM, Scott Wood wrote:
> Otherwise, we get a debug traceback due to the use of
> smp_processor_id() (or get_paca()) inside hard_smp_processor_id().
> mpic_host_map() is just looking for a default CPU, so it doesn't matter
> if we migrate after getting the CPU ID.
>
> Sign
; When this attribute isn't used, eTSEC system clock will serve as
> IEEE 1588 timer reference clock.
>
> Signed-off-by: Aida Mynzhasova
> ---
> Documentation/devicetree/bindings/net/fsl-tsec-phy.txt | 18 +-
> drivers/net/ethernet/freescale/gianfar_ptp.
On Sep 25, 2013, at 2:24 AM, Aida Mynzhasova wrote:
> Currently IEEE 1588 timer reference clock source is determined through
> hard-coded value in gianfar_ptp driver. This patch allows to select ptp
> clock source by means of device tree file node.
>
> For instance:
>
> fsl,cksel = <0>;
>
On Sep 24, 2013, at 6:21 AM, Bhushan Bharat-R65777 wrote:
>
>
>> -Original Message-
>> From: Linuxppc-dev [mailto:linuxppc-dev-
>> bounces+bharat.bhushan=freescale@lists.ozlabs.org] On Behalf Of Dongsheng
>> Wang
>> Sent: Tuesday, September 24, 2013 2:58 PM
>> To: Wood Scott-B07421
On Sep 12, 2013, at 8:11 PM, Kevin Hao wrote:
> On Thu, Sep 12, 2013 at 01:44:46PM -0500, Scott Wood wrote:
>> On Thu, 2013-09-12 at 15:13 +0800, Kevin Hao wrote:
Just a nit, but subject is missing 'e' in 'cornet' :)
- k
___
Linuxppc-dev mailing lis
On Sep 13, 2013, at 4:14 AM, Valentin Longchamp wrote:
> On 09/11/2013 08:58 AM, Prabhakar Kushwaha wrote:
>> The QorIQ T1040/T1042 processor support four integrated 64-bit e5500 PA
>> processor cores with high-performance data path acceleration architecture
>> and network peripheral interfaces r
On Sep 12, 2013, at 1:54 AM, Liu Shengzhou-B36685 wrote:
>
>
>> -Original Message-----
>> From: Kumar Gala [mailto:ga...@kernel.crashing.org]
>> Sent: Wednesday, September 11, 2013 11:13 PM
>> To: Zhao Qiang-B45475
>> Cc: linuxppc-dev@lists.ozlabs.org;
On Sep 10, 2013, at 10:49 PM, Zhao Qiang wrote:
> Since P1010RDB-PA and P1010RDB-PB boards use different external PHY
> interrupt signals.
> And actually the PHY interrupt is not used effectively with
> corresponding interrupt handler.
> So we can remove the interrupts node without side-effect to
On Sep 10, 2013, at 12:50 AM, Zhao Qiang wrote:
> Update phy node according to new P1010RDB-PB board.
>
> Signed-off-by: Shengzhou Liu
> Signed-off-by: Zhao Qiang
> ---
> arch/powerpc/boot/dts/p1010rdb.dtsi | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
What about the old boards?
On Sep 6, 2013, at 10:36 AM, Scott Wood wrote:
> On Fri, 2013-09-06 at 10:01 -0500, Kumar Gala wrote:
>> On Sep 5, 2013, at 1:37 PM, Scott Wood wrote:
>>
>>> On Thu, 2013-09-05 at 13:34 -0500, Kumar Gala wrote:
>>>> On Apr 2, 2013, at 9:03 PM, Jia Hongta
On Sep 5, 2013, at 10:33 PM, Jia Hongtao-B38951 wrote:
>> -Original Message-
>> From: Kumar Gala [mailto:ga...@kernel.crashing.org]
>> Sent: Friday, September 06, 2013 2:41 AM
>> To: Jia Hongtao-B38951
>> Cc: linuxppc-dev@lists.ozlabs.org; Wood Scott-B07
On Sep 5, 2013, at 1:37 PM, Scott Wood wrote:
> On Thu, 2013-09-05 at 13:34 -0500, Kumar Gala wrote:
>> On Apr 2, 2013, at 9:03 PM, Jia Hongtao wrote:
>>> + msi->feature |= MSI_HW_ERRATA_ENDIAN;
>>> + }
>>> +
>>> /*
>&
On Sep 4, 2013, at 9:41 PM, Jia Hongtao wrote:
> In both B4 and T4240QDS platform PCA9547 I2C bus multiplexer is used.
> The sub-nodes are also reorganized according to right I2C topology.
>
> Signed-off-by: Jia Hongtao
> ---
> V2 change log:
> Reorganized the sub-nodes under I2C multiplexer to
On Apr 2, 2013, at 9:03 PM, Jia Hongtao wrote:
> The MPIC version 2.0 has a MSI errata (errata PIC1 of mpc8544), It causes
> that neither MSI nor MSI-X can work fine. This is a workaround to allow
> MSI-X to function properly.
>
> Signed-off-by: Liu Shuo
> Signed-off-by: Li Yang
> Signed-off-b
> arch/powerpc/kernel/eeh.c |3 +--
> arch/powerpc/sysdev/fsl_pci.c |2 +-
> 2 files changed, 2 insertions(+), 3 deletions(-)
Acked-by: Kumar Gala
(for the fsl_pci.c) change
- k
___
Linuxppc-dev mailing list
Linuxppc-dev@lists.ozlabs.o
On Aug 15, 2013, at 11:57 PM, Henry Bausley wrote:
>
> Is there any reason that a Critical Input Interrupt will not work reliably on
> a 44x powerpc?
>
> I am using an AMCC now Applied Micro AMCC460EX
>
> and changed
>
> CRITICAL_EXCEPTION(0x0100, CriticalInput, unknown_exception)
> to
> CR
On Aug 16, 2013, at 2:23 AM, Dongsheng Wang wrote:
> From: Wang Dongsheng
>
> Each core's AltiVec unit may be placed into a power savings mode
> by turning off power to the unit. Core hardware will automatically
> power down the AltiVec unit after no AltiVec instructions have
> executed in N cy
On Aug 9, 2013, at 1:24 PM, Sukadev Bhattiprolu wrote:
>
> I am tryng to compile clean mainline kernel with a few different config files
> and running into errors with some configs.
>
> I am building on RHEL6.3 with following binaries:
>
> gcc (GCC) 4.4.6 20120305 (Red Hat 4.4.6-4)
>
On Jul 31, 2013, at 1:25 AM, Haijun Zhang wrote:
> Add function to support get voltage from device-tree.
> If there are voltage-range specified in device-tree node, this function
> will parse it and return the avail voltage mask.
>
> Signed-off-by: Haijun Zhang
> ---
> changes for v2:
> -
On Aug 9, 2013, at 1:03 AM, Benjamin Herrenschmidt wrote:
> On Thu, 2013-08-08 at 17:45 -0500, Scott Wood wrote:
>> The following changes since commit 3b2f64d00c46e1e4e9bd0bb9bb12619adac27a4b:
>>
>> Linux 3.11-rc2 (2013-07-21 12:05:29 -0700)
>>
>> are available in the git repository at:
>
> N
On Aug 9, 2013, at 1:24 AM, Stephen Rothwell wrote:
> We cannot put the unsetting of config options in the Kconfig file, nor
> the integer or string options.
>
> I checked that after this we get the same .config files generated (except
> for the addition of the new PPC64_DEFCONFIG* config option
On Aug 7, 2013, at 7:03 PM, Stephen N Chivers wrote:
> Add support for the Motorola/Emerson MVME5100 Single Board Computer.
>
> The MVME5100 is a 6U form factor VME64 computer with:
>
>- A single MPC7410 or MPC750 CPU
>- A HAWK Processor Host Bridge (CPU to PCI) and
> M
On Aug 6, 2013, at 3:43 PM, Gerhard Sittig wrote:
> this series
> - fixes several drivers that are used in the MPC512x platform (UART,
> SPI, ethernet, PCI, USB, CAN, NAND flash, video capture) in how they
> handle clocks (appropriately acquire and setup them, hold references
> during use, releas
On Aug 5, 2013, at 4:11 PM, Scott Wood wrote:
> On Thu, 2013-08-01 at 11:05 -0500, Kumar Gala wrote:
>> On Aug 1, 2013, at 6:02 AM, Shaveta Leekha wrote:
>>
>>> Signed-off-by: Shaveta Leekha
>>> ---
>>> .../devicetree/bindings/powerpc/fsl/maple.txt
On Aug 1, 2013, at 6:02 AM, Shaveta Leekha wrote:
> Signed-off-by: Shaveta Leekha
> ---
> .../devicetree/bindings/powerpc/fsl/maple.txt | 30
> 1 files changed, 30 insertions(+), 0 deletions(-)
> create mode 100644 Documentation/devicetree/bindings/powerpc/fsl/maple.tx
On Jul 25, 2013, at 5:02 PM, Andy Fleming wrote:
> T4, Cell, powernv, and pseries had the same implementation, so switch
> them to use a generic version. A2 apparently had a version, but
> removed it at some point, so we remove the declaration, too.
>
> Signed-off-by: Andy Fleming
>
> Conflict
On Jul 25, 2013, at 6:54 AM, Catalin Udma wrote:
> If CONFIG_E500 is enabled, the compilation flags are updated
> specifying the target core -mcpu=e5500/e500mc/8540
> Also remove -Wa,-me500, being incompatible with -mcpu=e5500/e6500
> The assembler option is redundant if the -mcpu= flag is set.
>
On Jul 22, 2013, at 4:47 AM, Wrobel Heinz-R39252 wrote:
>> Subject: [PATCH 1/2] Powerpc: Add voltage ranges support for T4
>>
>> Special voltages that can be support by eSDHC of T4 in esdhc node.
>>
>> Signed-off-by: Haijun Zhang
>> Signed-off-by: Anton Vorontsov
>
>> --- a/Documentation/dev
On Jul 16, 2013, at 6:57 AM, Kevin Hao wrote:
> For some SoC (such as the FSL BookE) even though there does have
> a hardware FPU, but not all floating point instructions are
> implemented. Unfortunately some versions of gcc do use these
> unimplemented instructions. Then we have to enable the ma
On Jul 17, 2013, at 5:11 AM, Haijun Zhang wrote:
> Vender version and sdhc spec version of T4240-R1.0 is incorrect.
> The right value should be VVN=0x13, SVN = 0x1. The wrong version
> number will break down the ADMA data transfer.
> This defect only exist in T4240-R1.0. Will be fixed in T4240-R2
On Jul 5, 2013, at 1:27 AM,
wrote:
> From: Hongbo Zhang
>
> Freescale QorIQ T4 and B4 introduce new 8-channel DMA engines, this patch add
> the device tree nodes for them.
>
> Signed-off-by: Hongbo Zhang
> ---
> arch/powerpc/boot/dts/fsl/elo3-dma-0.dtsi | 90 +++
On Jul 5, 2013, at 1:27 AM,
wrote:
> From: Hongbo Zhang
>
> Freescale QorIQ T4 and B4 introduce new 8-channel DMA engines, this patch add
> the device tree nodes for them.
>
> Signed-off-by: Hongbo Zhang
> ---
> arch/powerpc/boot/dts/fsl/elo3-dma-0.dtsi | 90 +++
On Jun 18, 2013, at 3:14 PM, Scott Wood wrote:
> This fixes a regression that causes 83xx to oops on boot if a
> non-express PCI bus is present.
>
> The following changes since commit 17858ca65eef148d335ffd4cfc09228a1c1cbfb5:
>
> Merge tag 'please-pull-fixia64' of
> git://git.kernel.org/pub/s
On Jun 7, 2013, at 7:14 AM, Benjamin Herrenschmidt wrote:
> On Fri, 2013-06-07 at 11:48 +0100, David Laight wrote:
>>> For those interested, this is the Quake3 sqrt from Carmack ...
>> there's
>>> plenty of literature about it one or two google clicks away :-)
>>
>> I guess that is a rough enoug
On May 30, 2013, at 2:21 PM, Mike Turquette wrote:
> Quoting Mike Turquette (2013-05-30 11:57:32)
>> Quoting yuantian.t...@freescale.com (2013-05-22 01:22:19)
>>> From: Tang Yuantian
>>>
>>> The compatible string of clock is changed from *-2 to *-2.0
>>> on chassis 2. So updated it accordingly.
On May 28, 2013, at 5:45 PM, Scott Wood wrote:
> On 05/16/2013 01:29:45 AM, Kevin Hao wrote:
>> All these boards use the same configuration file p1_p2_rdb_pc.h in
>> u-boot. So they have the same pci bus address set by the u-boot.
>> But in some of these boards the bus address set in dtb don't ma
Jiucheng Xu (1):
powerpc/85xx: Reserve a partition of NOR flash for QE ucode firmware
Kevin Hao (2):
powerpc/fsl-pci: don't unmap the PCI SoC controller registers in
setup_pci_atmu
powerpc/fsl-booke: add the reg prop for pci bridge device node for T4/B4
Kumar Gal
On Mar 24, 2013, at 8:23 PM, Zhicheng Fan wrote:
> fix the following errors:
> Error: arch/powerpc/boot/dts/p1025rdb.dtsi:326.2-3 label or path, 'qe',
> not found
> Error: arch/powerpc/boot/dts/fsl/p1021si-post.dtsi:242.2-3 label or
> path, 'qe', not found
> FATAL ERROR: Synta
On Apr 14, 2013, at 12:40 AM, Kevin Hao wrote:
> The reg property in the pci bridge device node is used to bind this
> device node to the pci bridge device. Then all the pci devices under
> this bridge could use the interrupt maps defined in this device node
> to do the irq translation. So if thi
On Apr 13, 2013, at 2:14 AM, Kevin Hao wrote:
> In patch 34642bbb (powerpc/fsl-pci: Keep PCI SoC controller registers in
> pci_controller) we choose to keep the map of the PCI SoC controller
> registers. But we missed to delete the unmap in setup_pci_atmu
> function. This will cause the following
On Apr 23, 2013, at 12:44 AM, Zang Roy-R61911 wrote:
>
>
>> -Original Message-
>> From: Zang Roy-R61911
>> Sent: Tuesday, April 23, 2013 2:36 AM
>> To: linuxppc-dev@lists.ozlabs.org
>> Cc: ga...@kernel.crashing.org; Zang Roy-R61911; Chen Yuanquan-B41889
>> Subject: [PATCH] powerpc/fsl-p
On Apr 5, 2013, at 2:53 AM, Bhushan Bharat-R65777 wrote:
> Hi Kumar/Benh,
>
> After further looking into the code I think that if we correct the vector
> range below in DebugDebug handler then we do not need the change I provided
> in this patch.
>
> Here is the snapshot for 32 bit (head_book
a device is attached to a domain.
>
> Signed-off-by: Varun Sethi
> ---
> - no change in v11.
> - no change in v10.
> - Added CONFIG_IOMMU_API in v9.
> arch/powerpc/include/asm/device.h |6 ++
> 1 files changed, 6 insertions(+), 0 dele
On Apr 11, 2013, at 10:44 AM, Chris Friesen wrote:
>
> Hi all,
>
> We've got a powerpc system that uses u-boot. In our environment on bootup
> u-boot does a DHCP to get networking info, then uses TFTP to get the kernel,
> which then does DHCP again and NFS-mounts the initial root filesystem.
On Apr 11, 2013, at 3:36 AM, Jia Hongtao wrote:
> A PCIe erratum of mpc85xx may causes a core hang when a link of PCIe
> goes down. when the link goes down, Non-posted transactions issued
> via the ATMU requiring completion result in an instruction stall.
> At the same time a machine-check except
On Apr 10, 2013, at 4:58 PM, Kim Phillips wrote:
> From: Kumar Gala
>
> The localbus node should be in at 0xfffe05000 not 0xffe05000. Also
> fixed the names of the localbus and pci nodes to reflect the addresses
> they are actually at.
>
> Signed-off-by: Kumar Gala
On Apr 10, 2013, at 5:40 PM, Scott Wood wrote:
> From: Roy ZANG
>
> Some 85xx board, for example, P1020RDB-PC has on board silicon image
> PCIe to SATA controller and when booting up, the filesystem will auto mount
> to the SATA disk. So enable silicon image 3132 pcie to sata controller
> by de
On Apr 10, 2013, at 10:45 PM, Vakul Garg wrote:
> The crypto node now contains a new property 'fsl,sec-era'.
> This is required so that applications can retrieve era info without
> having to be able to read SEC's register space.
>
> Signed-off-by: Vakul Garg
> ---
> Changelog:
>
> v2: Ad
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