> -Original Message-
> From: Anton Vorontsov [mailto:cbouatmai...@gmail.com]
> Sent: Monday, September 20, 2010 23:37 PM
> To: Zang Roy-R61911
> Cc: linux-...@lists.infradead.org; dw...@infradead.org; dedeki...@gmail.com;
> a...@linux-foundation.org; Lan Chunhe-B25806; Wood Scott-B07421;
[ should fix the compile issue and pulled in 2 other minor patches ]
The following changes since commit 4108d9ba9091c55cfb968d42dd7dcae9a098b876:
powerpc/Makefiles: Change to new flag variables (2010-10-13 16:19:22 +1100)
are available in the git repository at:
git://git.kernel.org/pub/scm/l
On Oct 14, 2010, at 1:14 AM, Kumar Gala wrote:
>
> On Oct 13, 2010, at 9:04 PM, Shaohui Xie wrote:
>
>> From: Li Yang
>>
>> The access to HID1 register is only legitimate for e500 v1/v2 cores.
>> Also fixes magic number.
>>
>> Signed-off-by: Li Yang
>> Signed-off-by: Shaohui Xie
>> ---
>>
On Oct 13, 2010, at 9:04 PM, Shaohui Xie wrote:
> From: Li Yang
>
> The access to HID1 register is only legitimate for e500 v1/v2 cores.
> Also fixes magic number.
>
> Signed-off-by: Li Yang
> Signed-off-by: Shaohui Xie
> ---
> arch/powerpc/sysdev/fsl_rio.c |9 ++---
> 1 files changed
On Oct 13, 2010, at 9:04 PM, Shaohui Xie wrote:
> Add some comments to make sRIO registers map better readable.
>
> Signed-off-by: Shaohui Xie
> ---
> arch/powerpc/sysdev/fsl_rio.c | 65 +
> 1 files changed, 40 insertions(+), 25 deletions(-)
applied to
On Oct 13, 2010, at 2:19 PM, Timur Tabi wrote:
> The PowerPC Book-E watchdog driver (booke_wdt.c) defines a default timeout
> value in the code based on whether it's a Freescale Book-E part of not.
> Instead of having hard-coded values in the driver, make it a Kconfig option.
>
> As newer chips
The following commit broke 83xx because it assumed the 83xx platforms
exposed the "IMMR" address in BAR0 like the 85xx/86xx/QoriQ devices do:
commit 3da34aae03d498ee62f75aa7467de93cce3030fd
Author: Kumar Gala
Date: Tue May 12 15:51:56 2009 -0500
powerpc/fsl: Support unique MSI addresses pe
WANG YiFei wrote:
> Hi TieJun,
>
> I saw you name in \arch\powerpc\boot\cuboot-kilauea.c,
> I think I found right person for help, since our board
Unfortunately I'm not do anything for SPI resided on Kilauea.
> is based on Kilauea evaluation board, and currently I
> used 40x/kilauea_defconfig to
> -Original Message-
> From: Anton Vorontsov [mailto:cbouatmai...@gmail.com]
> Sent: Monday, September 20, 2010 21:19 PM
> To: Zang Roy-R61911
> Cc: linux-...@lists.infradead.org; dw...@infradead.org; dedeki...@gmail.com;
> a...@linux-foundation.org; Lan Chunhe-B25806; Wood Scott-B07421;
>Subject: [PATCH 2/3] fsl_rio: fix non-standard HID1 register access
>
>From: Li Yang
>
>The access to HID1 register is only legitimate for e500 v1/v2 cores.
>Also fixes magic number.
>
>Signed-off-by: Li Yang
>Signed-off-by: Shaohui Xie
This patch is depending on another patch at
http://patchw
tiejun.chen wrote:
> Scott Wood wrote:
>> On Wed, 13 Oct 2010 09:17:01 +0800
>> "tiejun.chen" wrote:
>>
>>> Scott Wood wrote:
The crash is happening somewhere in mpic_set_irq_type():
>>> Agreed. That is just where I pointed out on my email replied for OOPS. To
>>> enable
>>> DBG to figure ou
> -Original Message-
> From: Wood Scott-B07421
> Sent: Monday, October 04, 2010 23:38 PM
> To: Zang Roy-R61911
> Cc: Anton Vorontsov; linux-...@lists.infradead.org;
dw...@infradead.org;
> dedeki...@gmail.com; a...@linux-foundation.org; Lan Chunhe-B25806;
Wood Scott-
> B07421; Gala Kumar-B
The sRIO controller reports errors to the core with one signal, it uses
register EPWISR to provides the core quick access to where the error occurred.
The EPWISR indicates that there are 4 interrupts sources, port1, port2, message
unit and port write receive, but the sRIO driver does not support po
Add some comments to make sRIO registers map better readable.
Signed-off-by: Shaohui Xie
---
arch/powerpc/sysdev/fsl_rio.c | 65 +
1 files changed, 40 insertions(+), 25 deletions(-)
diff --git a/arch/powerpc/sysdev/fsl_rio.c b/arch/powerpc/sysdev/fsl_ri
From: Li Yang
The access to HID1 register is only legitimate for e500 v1/v2 cores.
Also fixes magic number.
Signed-off-by: Li Yang
Signed-off-by: Shaohui Xie
---
arch/powerpc/sysdev/fsl_rio.c |9 ++---
1 files changed, 6 insertions(+), 3 deletions(-)
diff --git a/arch/powerpc/sysdev/
Kumar Gala wrote:
>> > arch/powerpc/configs/mpc85xx_defconfig |3 +
>> > arch/powerpc/configs/mpc85xx_smp_defconfig |3 +
>> > arch/powerpc/platforms/85xx/p1022_ds.c | 213
>> > +++-
>> > 3 files changed, 217 insertions(+), 2 deletions(-)
> I dropped this
Scott Wood wrote:
> On Wed, 13 Oct 2010 09:17:01 +0800
> "tiejun.chen" wrote:
>
>> Scott Wood wrote:
>>> The crash is happening somewhere in mpic_set_irq_type():
>> Agreed. That is just where I pointed out on my email replied for OOPS. To
>> enable
>> DBG to figure out 'src' and 'mpic->irq_count
On Wed, 2010-10-13 at 17:08 -0500, Kumar Gala wrote:
> The following changes since commit 4108d9ba9091c55cfb968d42dd7dcae9a098b876:
>
> powerpc/Makefiles: Change to new flag variables (2010-10-13 16:19:22 +1100)
>
> are available in the git repository at:
> git://git.kernel.org/pub/scm/linux/
On Wed, 2010-10-13 at 09:16 -0400, Josh Boyer wrote:
> On Tue, Sep 28, 2010 at 09:09:41AM -0400, Josh Boyer wrote:
> >Hi Ben,
> >
> >A few small updates for the next branch. A new board/SoC from AMCC, and
> >some 476 changes from Shaggy. Please pull.
>
> OK, below is a fixed up tree that drops t
On Fri, 2010-09-24 at 13:01 -0500, Dave Kleikamp wrote:
> On PPC_MMU_NOHASH processors that support a large number of contexts,
> implement a lazy flush_tlb_mm() that switches to a free context, marking
> the old one stale. The tlb is only flushed when no free contexts are
> available.
>
> The la
On Fri, 2010-10-08 at 14:06 -0500, Kumar Gala wrote:
> On Freescale parts typically have TLB array for large mappings that we can
> bolt the linear mapping into. We utilize the code that already exists
> on PPC32 on the 64-bit side to setup the linear mapping to be cover by
> bolted TLB entries.
The following changes since commit 4108d9ba9091c55cfb968d42dd7dcae9a098b876:
powerpc/Makefiles: Change to new flag variables (2010-10-13 16:19:22 +1100)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/galak/powerpc.git next
Harninder Rai (1):
power
On Oct 7, 2010, at 2:36 PM, Timur Tabi wrote:
> The Freescale P1022DS has an on-chip video controller called the DIU, and a
> driver for this device already exists. Update the platform file for the
> P1022DS reference board to enable the driver, and update the defconfig for
> Freescale MPC85xx b
On Oct 13, 2010, at 5:02 PM, Kumar Gala wrote:
> The new e5500 core is similar to the e500mc core but adds 64-bit
> support. We support running it in 32-bit mode as it is identical to the
> e500mc.
>
> Signed-off-by: Kumar Gala
> ---
> * Further kconfig cleanup
>
> arch/powerpc/kernel/Makefil
The new e5500 core is similar to the e500mc core but adds 64-bit
support. We support running it in 32-bit mode as it is identical to the
e500mc.
Signed-off-by: Kumar Gala
---
* Further kconfig cleanup
arch/powerpc/kernel/Makefile |4 +++-
arch/powerpc/kernel/cpu_setup_fsl_book
The P5020DS is in the same family of boards as the P4080 DS and thus
shares the corenet_ds code.
Signed-off-by: Kumar Gala
---
* minor kconfig mods because of e5500 patch changes
arch/powerpc/platforms/85xx/Kconfig| 12 ++
arch/powerpc/platforms/85xx/Makefile |1 +
arch/powerpc/
> On Wed, 13 Oct 2010 12:08:16 -0500
> I'd just rip the whole thing out of the board code, and pass zero in
> isu_size to mpic_alloc(), if you can undo whatever is depending on the
> remapping.
OK, what I did was to change
mpic1 = mpic_alloc(np, res.start,
MPIC_PRIMARY | M
On Wed, Oct 13, 2010 at 2:19 PM, Timur Tabi wrote:
> the value a Kconfig option allows BSPs to configure a new value with requiring
That should say, "without requiring"
--
Timur Tabi
Linux kernel developer at Freescale
___
Linuxppc-dev mailing list
L
On Wed, 13 Oct 2010 12:08:16 -0500
wrote:
> Do you have any suggestions on where to find out what parameters I should
> pass to mpic_assign_isu() to map the interrupts? It's another of those
> charmingly undocumented functions, even in the most recent git pull of the
> mainline kernel.
I'd just
The PowerPC Book-E watchdog driver (booke_wdt.c) defines a default timeout
value in the code based on whether it's a Freescale Book-E part of not.
Instead of having hard-coded values in the driver, make it a Kconfig option.
As newer chips gets faster, the current default values become less appropr
Mel Gorman writes:
>
> On Mon, Oct 11, 2010 at 02:00:39PM -0700, Andrew Morton wrote:
> >
> > It's corruption of user memory, which is unusual. I'd be wondering if
> > there was a pre-existing bug which 6dda9d55bf545013597 has exposed -
> > previously the corruption was hitting something harmles
On 13.10.2010 [15:56:00 +1100], Benjamin Herrenschmidt wrote:
> On Wed, 2010-09-15 at 12:33 -0600, Grant Likely wrote:
> > On Wed, Sep 15, 2010 at 12:05 PM, Nishanth Aravamudan
> > wrote:
> > > Use the set_dma_ops helper. Instead of modifying vio_dma_mapping_ops,
> > > just create a trivial wrapp
On Oct 13, 2010, at 10:58 AM, Scott Wood wrote:
> On Wed, 13 Oct 2010 08:17:11 -0500
> Kumar Gala wrote:
>
>> The new e5500 core is similar to the e500mc core but adds 64-bit
>> support. We support running it in 32-bit mode as it is identical to the
>> e500mc.
>>
>> Signed-off-by: Kumar Gala
Do you have any suggestions on where to find out what parameters I should
pass to mpic_assign_isu() to map the interrupts? It's another of those
charmingly undocumented functions, even in the most recent git pull of the
mainline kernel.
___
Linuxppc-de
On Wed, 13 Oct 2010 08:17:11 -0500
Kumar Gala wrote:
> The new e5500 core is similar to the e500mc core but adds 64-bit
> support. We support running it in 32-bit mode as it is identical to the
> e500mc.
>
> Signed-off-by: Kumar Gala
> ---
> * clean up kconfig further to reduce use of E500MC
> How the host ID is set on your host board?
Normally rio_enum_host() should increment next_destid in your case.
The hostID is set to 0x0 with the riohdid parameter as boot argument.
> Make sure that you have the MASTER bit is set in agent's GCCSR register
(0xC_013C).
If your board uses HW config
Bastiaan Nijkamp wrote:
>> How the host ID is set on your host board?
>> Normally rio_enum_host() should increment next_destid in your case.
>
> The hostID is set to 0x0 with the riohdid parameter as boot argument.
>
In this case I would expect to see ID=1 assigned to the endpoint. I will take
On Wed, 13 Oct 2010 09:17:01 +0800
"tiejun.chen" wrote:
> Scott Wood wrote:
> > The crash is happening somewhere in mpic_set_irq_type():
>
> Agreed. That is just where I pointed out on my email replied for OOPS. To
> enable
> DBG to figure out 'src' and 'mpic->irq_count' from the file,
> arch/p
Hi TieJun,
I saw you name in \arch\powerpc\boot\cuboot-kilauea.c,
I think I found right person for help, since our board
is based on Kilauea evaluation board, and currently I
used 40x/kilauea_defconfig to config kernel. Also I used
Kilauea.dts as starting point to modify as shown in my
previous em
On Mon, Oct 11, 2010 at 02:00:39PM -0700, Andrew Morton wrote:
> (cc linuxppc-dev@lists.ozlabs.org)
>
> On Mon, 11 Oct 2010 15:30:22 +0100
> Mel Gorman wrote:
>
> > On Sat, Oct 09, 2010 at 04:57:18AM -0500, pac...@kosh.dhis.org wrote:
> > > (What a big Cc: list... scripts/get_maintainer.pl made
On Oct 13, 2010, at 7:00 AM,
wrote:
> From: Harninder Rai
>
> It adds cache-sram support in P1/P2 QorIQ platforms as under:
>
>* A small abstraction over powerpc's remote heap allocator
>* Exports mpc85xx_cache_sram_alloc()/free() APIs
>* Supports only one contiguous SRAM window
On Oct 7, 2010, at 2:36 PM, Timur Tabi wrote:
> The Freescale P1022DS has an on-chip video controller called the DIU, and a
> driver for this device already exists. Update the platform file for the
> P1022DS reference board to enable the driver, and update the defconfig for
> Freescale MPC85xx b
On Oct 7, 2010, at 2:36 PM, Timur Tabi wrote:
> The device tree for Freescale's P1022DS reference board is missing the node
> for the ngPIXIS FPGA.
>
> Signed-off-by: Timur Tabi
> ---
> arch/powerpc/boot/dts/p1022ds.dts | 11 +++
> 1 files changed, 11 insertions(+), 0 deletions(-)
app
On Oct 12, 2010, at 12:19 PM, Hollis Blanchard wrote:
> On Tue, Oct 12, 2010 at 10:02 AM, Rai Harninder-B01044
> wrote:
>> Currently the design is that we divide the sram portion into 2 equal
>> parts for AMP
>> That was the part of initial requirement
>> Do we want to remove that?
>
> Why woul
Bastiaan Nijkamp wrote:
>Has the driver ever been tested/used without a switch attached? Because when
>the host >(which has ID 0x0) enumerates the other board it also assigns ID 0x0
>to the agent, it seems >that the agent should have been assigned 0x1 as ID.
How the host ID is set on your host
The P5020DS is in the same family of boards as the P4080 DS and thus
shares the corenet_ds code.
Signed-off-by: Kumar Gala
---
* Updated based on e5500 support patch
arch/powerpc/platforms/85xx/Kconfig| 13 ++
arch/powerpc/platforms/85xx/Makefile |1 +
arch/powerpc/platforms/85x
The new e5500 core is similar to the e500mc core but adds 64-bit
support. We support running it in 32-bit mode as it is identical to the
e500mc.
Signed-off-by: Kumar Gala
---
* clean up kconfig further to reduce use of E500MC
arch/powerpc/include/asm/reg_booke.h |2 +-
arch/powerpc/ke
On Tue, Sep 28, 2010 at 09:09:41AM -0400, Josh Boyer wrote:
>Hi Ben,
>
>A few small updates for the next branch. A new board/SoC from AMCC, and
>some 476 changes from Shaggy. Please pull.
OK, below is a fixed up tree that drops the patch Shaggy said was
broken, and rebases on top of your new -ne
On Oct 12, 2010, at 3:11 PM, Scott Wood wrote:
> On Tue, 12 Oct 2010 14:55:42 -0500
> Kumar Gala wrote:
>
>>
>> On Oct 12, 2010, at 12:33 PM, Scott Wood wrote:
>>
>>> On Tue, 12 Oct 2010 10:50:52 -0500
>>> Kumar Gala wrote:
>>>
The new e5500 core is similar to the e500mc core but adds
Hi,
I want to rectify my last e-mail. It seemed to be a weird bug in the tool
suite that we are using, since it would be impossible that all the read-only
registers also had that same strange value, it did not happen again
either. I do have another question, however.
Has the driver ever been test
Hi,
I'm getting a problem while trying to bring mpc8548cds board up.
BSP used:-MPC8548CDS_20071214-ltib.iso
Bootloader used:- CFE
When i try to boot the kernel image, throws following and gets struck.
" OF-device-tree at 0xff00"
Why this is happening?
Thanks & Regards
Raj
From: Harninder Rai
It adds cache-sram support in P1/P2 QorIQ platforms as under:
* A small abstraction over powerpc's remote heap allocator
* Exports mpc85xx_cache_sram_alloc()/free() APIs
* Supports only one contiguous SRAM window
* Drivers can do the following in Kconfig to us
Hi Harninder,
On Wed, 2010-10-13 at 14:47 +0530, harninder@freescale.com wrote:
> +int __init instantiate_cache_sram(struct platform_device *dev,
> + struct sram_parameters sram_params)
> +{
> + if (cache_sram) {
> + dev_err(&dev->dev, "Already initialized cache-sra
From: Harninder Rai
It adds cache-sram support in P1/P2 QorIQ platforms as under:
* A small abstraction over powerpc's remote heap allocator
* Exports mpc85xx_cache_sram_alloc()/free() APIs
* Supports only one contiguous SRAM window
* Drivers can do the following in Kconfig to us
WANG YiFei wrote:
> Hi TieJun,
>
> Thanks a lot for your reply.
> So far, I can get ppc405 spi to initialize, however
> failed at MCP23S17's probe() routine, I checked the
> code, it's due to un-initialized platform data. Here
> is my part of dts:
>
> s...@ef600600 {
> device_
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