Re: [PATCH] KVM: x86: Add lowest-priority support for vt-d posted-interrupts

2015-11-24 01:26+, Wu, Feng: >> From: Paolo Bonzini [mailto:pbonz...@redhat.com] >> On 16/11/2015 20:03, Radim Krčmář wrote: >> > 2015-11-09 10:46+0800, Feng Wu: >> >> Use vector-hashing to handle lowest-priority interrupts for >> >> posted-interrupts. As an example, modern Intel CPUs use this

Re: [PATCH] KVM: x86: Add lowest-priority support for vt-d posted-interrupts

2015-11-25 03:21+, Wu, Feng: > From: Radim Krčmář [mailto:rkrc...@redhat.com] >> The hash function just interprets a subset of vector's bits as a number >> and uses that as a starting offset in a search for an enabled APIC >> within the destination set? >> >> For example: >> The x2APIC destina

Re: [PATCH] KVM: x86: Add lowest-priority support for vt-d posted-interrupts

2015-11-26 06:24+, Wu, Feng: >> From: Radim Krčmář [mailto:rkrc...@redhat.com] >> 2015-11-25 15:38+0100, Paolo Bonzini: >>> On 25/11/2015 15:12, Radim Krcmár wrote: >>>> I think it's ok to pick any algorithm we like. It's unlikely that >>>

Re: [PATCH v3 1/4] KVM: Recover IRTE to remapped mode if the interrupt is not single-destination

2016-01-22 01:49+, Wu, Feng: >> From: Radim Krčmář [mailto:rkrc...@redhat.com] >> 2016-01-20 09:42+0800, Feng Wu: >> > - if (!kvm_intr_is_single_vcpu(kvm, &irq, &vcpu)) >> > + if (!kvm_intr_is_single_vcpu(kvm, &irq, &vcpu)) { >> > + /* >> > +

Re: [PATCH v3 2/4] KVM: x86: Use vector-hashing to deliver lowest-priority interrupts

2016-01-22 05:12+, Wu, Feng: >> From: Radim Krčmář [mailto:rkrc...@redhat.com] >> 2016-01-20 09:42+0800, Feng Wu: >> > +{ >> > + u32 mod; >> > + int i, idx = 0; >> > + >> > + mod = vector % dest_vcpus; >> > + >> > + for (i = 0; i <= mod; i++) { >> > + idx = find_next_bit(bitmap, bi

Re: [PATCH v3 3/4] KVM: x86: Add lowest-priority support for vt-d posted-interrupts

2016-01-22 05:12+, Wu, Feng: >> From: Radim Krčmář [mailto:rkrc...@redhat.com] >> 2016-01-20 09:42+0800, Feng Wu: >>> - if (kvm_intr_is_single_vcpu_fast(kvm, irq, dest_vcpu)) >>> + if (kvm_intr_can_posting_fast(kvm, irq, dest_vcpu)) >>> return true; >> >> There is one pitfall:

Re: [PATCH] KVM: x86: Add lowest-priority support for vt-d posted-interrupts

2015-12-10 01:52+, Wu, Feng: >> From: Radim Krčmář [mailto:rkrc...@redhat.com] >> (Physical xAPIC+x2APIC mode is still somewhat reasonable and xAPIC CPUs >> start with LDR=0, which means that operating system doesn't need to >> utilize mixed mode, as defined by KVM, when switching to x2APIC.)

Re: [PATCH v3 1/4] KVM: Recover IRTE to remapped mode if the interrupt is not single-destination

2016-01-25 12:26+, Wu, Feng: >> From: Paolo Bonzini [mailto:paolo.bonz...@gmail.com] On Behalf Of Paolo >> It may be necessary because IRTE writes (128 bits) are not atomic. > > IRTE is updated atomically, I added the patch to support this. Please > refer to 344cb4e0b6f3a0dbef0643eacb4946338eb

Re: [PATCH v3 2/4] KVM: x86: Use vector-hashing to deliver lowest-priority interrupts

2016-01-25 13:25+0100, Paolo Bonzini: > On 22/01/2016 15:01, Radim Krcmár wrote: >>> for (i = 0; i <= mod; i++) { >>> idx = find_next_bit(bitmap, bitmap_size, idx + 1); >>> BUG_ON(idx == bitmap_size); >>>