2016-01-25 12:26+0000, Wu, Feng: >> From: Paolo Bonzini [mailto:paolo.bonz...@gmail.com] On Behalf Of Paolo >> It may be necessary because IRTE writes (128 bits) are not atomic. > > IRTE is updated atomically, I added the patch to support this. Please > refer to 344cb4e0b6f3a0dbef0643eacb4946338eb228c0.
I also think that SN bit is not affected by atomicity: if the IRTE could have been read half-updated while changing from posted to non-posted, then it wouldn't point to the correct PID, because its address is not within 64 bits, so the SN bit wouldn't matter. IRTE invalidation seems important in VT-d ...
