> 在 2017年1月10日，下午2:06，Julia Lawall 写道：
>
>
>
> On Mon, 9 Jan 2017, Kees Cook wrote:
>
>> Okay, this adds a few tests, for people to examine.
>>
>> reusercopy-cook.cocci:
>> My original test, with recent updates from Julia.
>>
>> reusercopy-wang.cocci:
>> This is Pengfei's test, but with hea
Add binding for hisilicon Hi3660 SoC and HiKey960 Board.
Signed-off-by: Chen Feng
Acked-by: Rob Herring
---
Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt | 4
1 file changed, 4 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt
b/Docu
Hi Hans,
Thank you for your comments.
On 1/9/2017 20:10, Hans Verkuil wrote:
+
+static int isc_s_ctrl(struct v4l2_ctrl *ctrl)
+{
+ struct isc_device *isc = container_of(ctrl->handler,
+struct isc_device, ctrls.handler);
+ struct isc_ctrls
On Mon, Jan 09, 2017 at 11:35:54PM -0800, Andrey Smirnov wrote:
> Remove pwm0grp since it is:
>
> a) Not referenced anywhere in the DTS file (unlike Tower board it
> is based on, this board does not use/expose FTM0)
>
> b) Configures PTB2 and PTB3 in a way that contradicts
>
Add binding for hisilicon Hi3660 SoC and HiKey960 Board.
Signed-off-by: Chen Feng
Acked-by: Rob Herring
---
Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt | 4
1 file changed, 4 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt
b/Docu
Also add dts file to support HiKey960 development board which
based on Hi3660 SoC.
The output console is earlycon "earlycon=pl011,0xfdf05000".
And the con_init uart5 with a fixed clock, which already
configured at bootloader.
When clock is available, the uart5 will be modified.
Tested on HiKey960
On 10 January 2017 at 02:31, Linus Walleij wrote:
> On Sun, Jan 8, 2017 at 10:42 PM, SF Markus Elfring
> wrote:
>
>> From: Markus Elfring
>> Date: Sun, 8 Jan 2017 18:44:26 +0100
>>
>> * A multiplication for the size determination of a memory allocation
>> indicated that an array data structure
Add .dts file for rev. C of the board by factoring out commonalities
into a shared include file (vf610-zii-dev-rev-b-c.dtsi) and deriving
revision specific file from it (vf610-zii-dev-rev-b.dts and
vf610-zii-dev-reb-c.dts).
Cc: Shawn Guo
Cc: Rob Herring
Cc: Mark Rutland
Cc: Russell King
Cc: Sa
Remove pwm0grp since it is:
a) Not referenced anywhere in the DTS file (unlike Tower board it
is based on, this board does not use/expose FTM0)
b) Configures PTB2 and PTB3 in a way that contradicts
pinctrl-mdio-mux
Cc: Shawn Guo
Cc: Rob Herring
Cc: Mark Rutland
Christoph, thanks for clear input.
Arnd, I think that given this discussion, best short-term solution is
indeed the patch I've submitted yesterday. That is, your version +
coherent mask support. With that, set_dma_mask(DMA_BIT_MASK(64)) will
succeed and hardware with work with swiotlb.
Possible
Hi David：
The Patch "rcu: Fix soft lockup for rcu_nocb_kthread" has been added to several
stable tree， it may introduced an issue in certain special scenarios,
The Patch "softirq: Let ksoftirqd do its job" could fix this issue, so I hope
you could add this patch to stable tree, thanks.
Ding
On
On Sun, Jan 8, 2017 at 7:42 PM, noman pouigt wrote:
> Hello,
>
> I am trying to see how to disable the sub device nodes in
> gpio_keys device node.
>
> I have this in my base dtsi file:
>
> #include "vendor_file.dtsi"
>
> gpio_keys {
> compatible = "gpio-keys";
>
Hi
On 01/10/2017 04:20 PM, Ziyuan wrote:
> Hi,
>
> On 01/10/2017 09:04 AM, S. Gilles wrote:
>> On 2017-01-10T08:47:16+0800, Shawn Lin wrote:
>>> Hi
>>>
>>> On 2017/1/9 22:49, S. Gilles wrote:
On 2017-01-09T09:19:55-0500, S. Gilles wrote:
> Hi,
>
> I have a C201, a veyron_speedy
Hi,
On 01/10/2017 09:04 AM, S. Gilles wrote:
On 2017-01-10T08:47:16+0800, Shawn Lin wrote:
Hi
On 2017/1/9 22:49, S. Gilles wrote:
On 2017-01-09T09:19:55-0500, S. Gilles wrote:
Hi,
I have a C201, a veyron_speedy device (which uses rk3288) running vanilla
kernels. With recent kernels it will
On Tue, Jan 10, 2017 at 09:47:21AM +0300, Nikita Yushchenko wrote:
> I'm now working with HW that:
> - is now way "low end" or "obsolete", it has 4G of RAM and 8 CPU cores,
> and is being manufactured and developed,
> - has 75% of it's RAM located beyond first 4G of address space,
> - can't physica
During tuning execution for HS400 mode, HW sequence recommends
to select MCLK_SEL/2(0x3) in VENDOR_SPEC & sdhc msm clock at GCC
to be 400MHZ (nearest supported clk). Add this change in tuning
sequence during HS400 tuning.
Signed-off-by: Ritesh Harjani
---
drivers/mmc/host/sdhci-msm.c | 16 ++
Clear SDHCI_HS400_TUNING flag after platform_execute_tuning
so that platform_execute_tuning may use it if needed.
Signed-off-by: Ritesh Harjani
---
drivers/mmc/host/sdhci.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci
This provides enhanced_strobe mode feature support in sdhci-msm
driver.
Signed-off-by: Ritesh Harjani
---
drivers/mmc/host/sdhci-msm.c | 34 +-
1 file changed, 25 insertions(+), 9 deletions(-)
diff --git a/drivers/mmc/host/sdhci-msm.c b/drivers/mmc/host/sdhci-msm
On Sat, Jan 07, 2017 at 10:54:56AM +0200, Krzysztof Kozlowski wrote:
> On Thu, Jan 05, 2017 at 02:01:53PM +0800, Peter Chen wrote:
> > We have an well-known problem that the device needs to do some power
> > sequence before it can be recognized by related host, the typical
> > example like hard-wir
From: Subhash Jadavani
Program CORE_CSR_CDC_DELAY_CFG for hardware recommended 1.25ns delay.
We may see data CRC errors if it's programmed for any other delay
value.
Signed-off-by: Subhash Jadavani
Signed-off-by: Ritesh Harjani
---
drivers/mmc/host/sdhci-msm.c | 2 +-
1 file changed, 1 insert
Factor out sdhci_msm_hs400 used for DLL calibration in HS400
modes. This function will be needed for enhanced_strobe as well.
Signed-off-by: Ritesh Harjani
---
drivers/mmc/host/sdhci-msm.c | 32 ++--
1 file changed, 26 insertions(+), 6 deletions(-)
diff --git a/drive
Hi,
Resending this patch series, as no one could review it -possibly due to
holidays during that time.
This patch series mainly provides enhanced strobe support to sdhci-msm driver
along with some additions of HW recommended sequence. This has been tested on
8996 based internal target & on db410
From: Venkat Gopalakrishnan
The vendor specific func register doesn't get reset when using the
software reset register. The various bootloader's could leave this
in an unknown state, hence reset this register to it's power on reset
value during probe.
Signed-off-by: Venkat Gopalakrishnan
Signed
Factor out msm_set/get_clock_rate_for_bus_mode for it's later
use in changing the tuning sequence for selecting HS400
bus speed mode.
Signed-off-by: Ritesh Harjani
---
drivers/mmc/host/sdhci-msm.c | 64 +++-
1 file changed, 40 insertions(+), 24 deletions(-
This factors out sdhci_msm_hc_select_mode to later use
it during enhanced_strobe mode select.
It also further breaks sdhci_msm_hc_select_mode
into separate functions for configuring HS400 mode
or other modes.
Signed-off-by: Ritesh Harjani
---
drivers/mmc/host/sdhci-msm.c | 201 ++
On 08/01/2017 14:30, Andreas Färber wrote:
>
> Andreas Färber (4):
> Documentation: devicetree: Add vendor prefix for AsiaRF
> Documentation: devicetree: arm: mediatek: Add Geek Force board
> ARM: dts: mt7623: Add Geek Force config
> MAINTAINERS: Extend ARM/Mediatek SoC support section
>
On 2017-01-10 00:24, Andy Shevchenko wrote:
> On Mon, Jan 9, 2017 at 7:11 PM, Jan Kiszka wrote:
>> On 2017-01-05 22:56, Andy Shevchenko wrote:
>>> On Thu, Jan 5, 2017 at 1:56 AM, Andy Shevchenko
>>> wrote:
>>>
>>> Ah, Jan, perhaps you would like to comment on this one as well
>>> http://marc.info
From: Khiem Nguyen
CS2000 needs re-setup when redume, otherwise, it can't
handle correct clock rate.
Signed-off-by: Khiem Nguyen
[Kuninori: cleanup original patch]
Signed-off-by: Kuninori Morimoto
---
drivers/clk/clk-cs2000-cp.c | 22 ++
1 file changed, 22 insertions(+)
d
On Mon, Jan 09, 2017 at 05:00:18PM +0100, Sébastien Szymanski wrote:
> OPOS6UL is an i.MX6UL based SoM.
> OPOS6ULDev is a carrier board for the OPOS6UL SoM.
>
> For more details see:
> http://www.opossom.com/english/products-processor_boards-opos6ul.html
> http://www.opossom.com/english/products-d
>> I believe the bounce buffering code you refer to is not in SATA/SCSI/MMC
>> but in block layer, in particular it should be controlled by
>> blk_queue_bounce_limit(). [Yes there is CONFIG_MMC_BLOCK_BOUNCE but it
>> is something completely different, namely it is for request merging for
>> hw not
The nvmem cell with a NULL cell name/id should be the one
with no accompanying 'nvmem-cell-names' property, and thus
will be the cell at index 0 in the device tree.
So, we default to index 0 and update the cell index only when
nvmem cell name id exists.
Suggested-by: Stephen Boyd
Signed-off-by: V
Correct the documentation for arguments to a number
of functions.
Signed-off-by: Vivek Gautam
---
Based on torvald's master branch.
Changes since v1:
- Removed unnecessary whitespaces.
drivers/nvmem/core.c | 30 --
1 file changed, 16 insertions(+), 14 deletions(-)
Hi guys,
Could you help to review this patch set?
Thanks!
Liang
> -Original Message-
> From: Li, Liang Z
> Sent: Wednesday, December 21, 2016 2:52 PM
> To: k...@vger.kernel.org
> Cc: virtio-...@lists.oasis-open.org; qemu-de...@nongnu.org; linux-
> m...@kvack.org; linux-kernel@vger.kernel
From: Sahitya Tummala
Add new host operation ->platform_dumpregs to provide a
mechanism through which host drivers can dump platform
specific registers in addition to SDHC registers
during error conditions.
Signed-off-by: Sahitya Tummala
Signed-off-by: Ritesh Harjani
---
drivers/mmc/host/sdhc
print error log message and dump sdhc registers for debugging
purpose in case of data errors (except when tuning commands
generate CRC/timeout/end bit errors).
Signed-off-by: Ritesh Harjani
Signed-off-by: Asutosh Das
---
drivers/mmc/host/sdhci.c | 21 +++--
1 file changed, 19 in
From: Sahitya Tummala
Implement ->platform_dumpregs host operation to print the
platform specific registers in addition to standard SDHC
register during error conditions.
Signed-off-by: Sahitya Tummala
Signed-off-by: Ritesh Harjani
---
drivers/mmc/host/sdhci-msm.c | 34 +++
Resending this small set of patches.
Below is a small set of patches which provide useful info for
debugging issues.
Patch 1 :- This provide callback mechanism for platform drivers
to dump their necessary register info at the time of sdhci_dumpregs.
Patch 2 :- This implements this callback (->pl
ATTENZIONE;
La cassetta postale ha superato il limite di archiviazione, che è 5 GB come
definiti dall'amministratore, che è attualmente in esecuzione su 10.9GB, non si
può essere in grado di inviare o ricevere nuovi messaggi fino a ri-convalidare
la tua mailbox. Per rinnovare la vostra casella
On Sat, Jan 07, 2017 at 12:15:29PM +0530, Kedareswara rao Appana wrote:
> When VDMA is configured for more than one frame in the h/w
> for example h/w is configured for n number of frames and user
> Submits n number of frames and triggered the DMA using issue_pending API.
title case in middle if s
On Sat, Jan 07, 2017 at 12:15:28PM +0530, Kedareswara rao Appana wrote:
> Add channel idle state to ensure that dma descriptor is not
> submitted when VDMA engine is in progress.
any reason why you want to make your own varible and not use the HW to query
as done earlier. It is not clear to me why
On Sat, Jan 07, 2017 at 12:06:54PM -0800, Andrey Smirnov wrote:
> Add .dts file for rev. C of the board by factoring out commonalities
> into a shared include file (vf610-zii-dev-rev-b-c.dtsi) and deriving
> revision specific file from it (vf610-zii-dev-rev-b.dts and
> vf610-zii-dev-reb-c.dts).
>
Hi Dave,
here's the pull request with the important rtlwifi fix, more info in the
tag below.
During the long weekend we had here I finally updated Ubuntu on my
workstation and git was updated along that. If you see anything funny or
problems in my pull request due to the upgrade, please let me kn
On 09/01/17 22:17, Boris Ostrovsky wrote:
> On 01/06/2017 10:05 AM, Juergen Gross wrote:
>> Handling of multiple concurrent Xenstore accesses through xenbus driver
>> either from the kernel or user land is rather lame today: xenbus is
>> capable to have one access active only at one point of time.
Add support for rockchip,grf property which is used for GRF muxes
on RK3399.
Signed-off-by: Xing Zheng
---
Changes in v4:
- update the decription for rockchip,grf property
Changes in v3: None
Changes in v2: None
Documentation/devicetree/bindings/clock/rockchip,rk3399-cru.txt | 6 ++
1 fil
Hi,
The structure rockchip_clk_provider needs to refer the GRF regmap
in somewhere, if the CRU node has not "rockchip,grf" property,
calling syscon_regmap_lookup_by_phandle will return an invalid GRF
regmap, and the MUXGRF type clock will be not supported.
Therefore, we need to add them.
Thank
The structure rockchip_clk_provider needs to refer the GRF regmap
in somewhere, if the CRU node has not "rockchip,grf" property,
calling syscon_regmap_lookup_by_phandle will return an invalid GRF
regmap, and the MUXGRF type clock will be not supported.
Therefore, we need to add them.
Signed-off-b
On Thu, 22 Dec 2016, Mickaël Salaün wrote:
> Replace arguments @mnt and @dentry with @path.
>
> Signed-off-by: Mickaël Salaün
> Cc: James Morris
> Cc: Serge E. Hallyn
> ---
> include/linux/lsm_hooks.h | 3 +--
> 1 file changed, 1 insertion(+), 2 deletions(-)
Applied to
git://git.kernel.org/p
Hi Andi,
just a very minor cosmetic detail, but your editor seems to use tabs while
there were 8 spaces around, causing visual alignment defects below :
On Mon, Jan 09, 2017 at 05:02:21PM -0800, Andi Kleen wrote:
> diff --git a/tools/build/Makefile.feature b/tools/build/Makefile.feature
> index e
Hi Vivek,
On 01/10/2017 03:07 PM, Vivek Gautam wrote:
> Hi Jaehoon,
>
>
> On 01/04/2017 06:04 PM, Jaehoon Chung wrote:
>> This patch supports to use Generic Phy framework for Exynos PCIe phy.
>> When Exynos that supported the pcie want to use the PCIe,
>> it needs to control the phy resgister.
>
Hi Jaehoon,
On 01/04/2017 06:04 PM, Jaehoon Chung wrote:
This patch supports to use Generic Phy framework for Exynos PCIe phy.
When Exynos that supported the pcie want to use the PCIe,
it needs to control the phy resgister.
But it should be more complex to control in their own PCIe device drive
On 2017-01-10 06:36, Rob Herring wrote:
> On Mon, Jan 09, 2017 at 09:45:28AM +0100, Peter Rosin wrote:
>> Signed-off-by: Peter Rosin
>> ---
>> Documentation/devicetree/bindings/arm/axentia.txt | 19 ++
>> MAINTAINERS | 8 +
>> arch/arm/boot/dts/Makefile
On Mon, 9 Jan 2017, Kees Cook wrote:
> Okay, this adds a few tests, for people to examine.
>
> reusercopy-cook.cocci:
> My original test, with recent updates from Julia.
>
> reusercopy-wang.cocci:
> This is Pengfei's test, but with heavily modified reporting to fit in the
> kernel coccicheck tar
Hi Rob,
Thanks for the review.
> -Original Message-
> From: Rob Herring [mailto:r...@kernel.org]
> Sent: Tuesday, January 10, 2017 11:06 AM
> To: Punnaiah Choudary Kalluri
> Cc: dw...@infradead.org; computersforpe...@gmail.com;
> boris.brezil...@free-electrons.com; marek.va...@gma
Once a gdsc is brought in and out of HW control, there is a
power down and up cycle which can take upto 1us. Polling on
the gdsc status immediately after the hw control enable/disable
can mislead software/firmware to belive the gdsc is already either on
or off, while its yet to complete the power c
On Tue, Jan 10, 2017 at 05:41:45AM +, Zheng, Lv wrote:
> Hi, Rafael and Paul
>
> > From: Paul E. McKenney [mailto:paul...@linux.vnet.ibm.com]
> > Subject: Re: 174cc7187e6f ACPICA: Tables: Back port
> > acpi_get_table_with_size() and
> > early_acpi_os_unmap_memory() from Linux kernel
> >
> >
On Tue, Jan 10, 2017 at 11:20:40AM +0800, Ding Tianhong wrote:
>
>
> On 2017/1/4 21:48, Paul E. McKenney wrote:
> > On Wed, Jan 04, 2017 at 03:02:30PM +0800, Ding Tianhong wrote:
> >>
> >>
> >> On 2017/1/4 8:57, Paul E. McKenney wrote:
> >>> On Wed, Dec 28, 2016 at 04:13:15PM -0800, Paul E. McKen
Remove .owner field if calls are used which set it automatically
Generated by: scripts/coccinelle/api/platform_no_drv_owner.cocci
CC: Jaghathiswari Rankappagounder Natarajan
Signed-off-by: Julia Lawall
Signed-off-by: Fengguang Wu
---
aspeed-pwm-tacho.c |1 -
1 file changed, 1 deletion(-)
Device node iterators put the previous value of the index variable, so an
explicit put causes a double put.
Generated by: scripts/coccinelle/iterators/device_node_continue.cocci
CC: Jaghathiswari Rankappagounder Natarajan
Signed-off-by: Julia Lawall
Signed-off-by: Fengguang Wu
---
The patch w
Use PTR_ERR_OR_ZERO rather than if(IS_ERR(...)) + PTR_ERR
Generated by: scripts/coccinelle/api/ptr_ret.cocci
CC: Jaghathiswari Rankappagounder Natarajan
Signed-off-by: Julia Lawall
Signed-off-by: Fengguang Wu
---
aspeed-pwm-tacho.c |5 +
1 file changed, 1 insertion(+), 4 deletions(-)
Hi, Rafael
> From: rjwyso...@gmail.com [mailto:rjwyso...@gmail.com] On Behalf Of Rafael J.
> Wysocki
> Sent: Tuesday, January 10, 2017 7:35 AM
> Subject: Re: [PATCH] ACPI / OSL: Fix rcu synchronization logic
>
> On Mon, Jan 9, 2017 at 10:56 AM, Lv Zheng wrote:
> > The rcu synchronization logic
Hi, Rafael and Paul
> From: Paul E. McKenney [mailto:paul...@linux.vnet.ibm.com]
> Subject: Re: 174cc7187e6f ACPICA: Tables: Back port
> acpi_get_table_with_size() and
> early_acpi_os_unmap_memory() from Linux kernel
>
> On Tue, Jan 10, 2017 at 02:27:16AM +0100, Rafael J. Wysocki wrote:
> > On T
Remove unneeded semicolon.
Generated by: scripts/coccinelle/misc/semicolon.cocci
CC: Jaghathiswari Rankappagounder Natarajan
Signed-off-by: Julia Lawall
Signed-off-by: Fengguang Wu
---
url:
https://github.com/0day-ci/linux/commits/Jaghathiswari-Rankappagounder-Natar
ajan/Support-for-ASPEED-AS
On Fri, Jan 06, 2017 at 11:38:14AM +0100, Alexander Koch wrote:
> Add bindings documentation for the ADC128D818 driver, featuring default I2C
> properties along with the optional 'mode' property for chip operation mode
> selection (see datasheet, sec. 8.4.1).
>
> Signed-off-by: Alexander Koch
> A
On Sat, Jan 07, 2017 at 01:38:06PM +0800, Baoyou Xie wrote:
> This patch adds dt-binding documentation for zx2967 family thermal sensor.
>
> Signed-off-by: Baoyou Xie
> ---
> .../devicetree/bindings/thermal/zx2967-thermal.txt | 22
> ++
> 1 file changed, 22 insertions(+)
>
On Sat, Jan 07, 2017 at 12:15:29PM +0530, Kedareswara rao Appana wrote:
> When VDMA is configured for more than one frame in the h/w
> for example h/w is configured for n number of frames and user
> Submits n number of frames and triggered the DMA using issue_pending API.
> In the current driver fl
On Sat, Jan 07, 2017 at 07:04:27PM +0800, YiPing Xu wrote:
> From: XuYing
>
> memset in of_build_overlay_info is redundant, the ovinfo has been
> zeroed in of_fill_overlay_info when error.
>
> Signed-off-by: YiPing Xu
> ---
> drivers/of/overlay.c | 1 -
> 1 file changed, 1 deletion(-)
Applied
On Mon, Jan 09, 2017 at 04:50:52PM +0200, Peter Ujfalusi wrote:
> We do not yet have users of port_window. The following errors were found
> when converting the tusb6010_omap.c musb driver:
>
> - The peripheral side must have SRC_/DST_PACKED disabled
> - when configuring the burst for the peripher
On Fri, Jan 06, 2017 at 06:11:31PM -0800, Steve Longerbeam wrote:
> From: Philipp Zabel
>
> This driver can handle SoC internal and external video bus multiplexers,
> controlled either by register bit fields or by a GPIO. The subdevice
> passes through frame interval and mbus configuration of the
On Sat, Jan 07, 2017 at 12:51:31PM -0500, Jonathan Cameron wrote:
> On 07/01/17 05:16, Allen Liu wrote:
> > Add ADC driver for the ADC controller found on HiSilicon BVT SOCs, like
> > Hi3516CV300, etc.
> > The ADC controller is primarily in charge of detecting voltage.
> >
> > Reviewed-by: Kevin
On Sun, Jan 08, 2017 at 02:30:57PM +0100, Andreas Färber wrote:
> Signed-off-by: Andreas Färber
> ---
> Documentation/devicetree/bindings/vendor-prefixes.txt | 1 +
> 1 file changed, 1 insertion(+)
Acked-by: Rob Herring
On Fri, Jan 06, 2017 at 02:59:22PM +0100, gabriel.fernan...@st.com wrote:
> From: Gabriel Fernandez
>
> This patch introduces the stm32f7 clock DT bindings.
>
> Signed-off-by: Gabriel Fernandez
> ---
> .../devicetree/bindings/clock/st,stm32-rcc.txt | 20
>
> include
On Mon, Jan 09, 2017 at 09:45:28AM +0100, Peter Rosin wrote:
> Signed-off-by: Peter Rosin
> ---
> Documentation/devicetree/bindings/arm/axentia.txt | 19 ++
> MAINTAINERS | 8 +
> arch/arm/boot/dts/Makefile| 1 +
> arch/arm/boot/d
On Sat, Jan 07, 2017 at 10:14:45PM +0100, Yegor Yefremov wrote:
> Signed-off-by: Yegor Yefremov
> ---
> Documentation/devicetree/bindings/display/arm,pl11x.txt | 2
> +-
> Documentation/devicetree/bindings/display/bridge/analogix_dp.txt| 2
> +-
> Documentation/devicetre
On Mon, Jan 09, 2017 at 08:30:17PM +0530, Imran Khan wrote:
> Add initial pinctrl driver to support pin configuration with
> pinctrl framework for msm8998.
>
> Signed-off-by: Imran Khan
> ---
> .../bindings/pinctrl/qcom,msm8998-pinctrl.txt | 200 ++
Acked-by: Rob Herring
> drivers/pinct
On Mon, Jan 09, 2017 at 08:28:53AM +0530, Punnaiah Choudary Kalluri wrote:
> This patch adds the dts binding document for arasan nand flash
> controller.
>
> Signed-off-by: Punnaiah Choudary Kalluri
> ---
> Changes in v7:
> - Corrected the acronyms those should be in caps
> changes in v6:
> - Re
On Sun, Jan 08, 2017 at 02:30:58PM +0100, Andreas Färber wrote:
> Signed-off-by: Andreas Färber
> ---
> Documentation/devicetree/bindings/arm/mediatek.txt | 3 +++
> 1 file changed, 3 insertions(+)
Acked-by: Rob Herring
On Fri, Jan 06, 2017 at 05:16:00PM +0800, Baoyou Xie wrote:
> This patch adds device tree bindings document for ZTE zx2967
> family power domain controller.
>
> Signed-off-by: Baoyou Xie
> ---
> .../devicetree/bindings/soc/zte/pd-2967xx.txt | 19
> +++
> 1 file changed,
On Fri, Jan 06, 2017 at 03:22:58PM -0800, David Daney wrote:
> From: David Daney
>
> Signed-off-by: David Daney
> ---
> .../devicetree/bindings/gpio/gpio-thunderx.txt | 27
> ++
> 1 file changed, 27 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/g
From: Chris Lapa
This commit adds the BQ27520G4 chip definition to specifically match the
bq27520-G4 functionality as described in the datasheet.
tested: no
Signed-off-by: Chris Lapa
Acked-by: Pali Rohár
Reviewed-by: Andrew F. Davis
---
drivers/power/supply/bq27xxx_battery.c | 39 ++
From: Chris Lapa
The BQ275XX definition exists only to satisfy backwards compatibility.
tested: yes
Signed-off-by: Chris Lapa
Acked-by: Pali Rohár
Reviewed-by: Andrew F. Davis
---
drivers/power/supply/bq27xxx_battery.c | 10 --
drivers/power/supply/bq27xxx_battery_i2c.c | 6 +++
From: Chris Lapa
This commit adds the BQ27510G1 chip definition to specifically match the
bq27510-G1 functionality as described in the datasheet.
tested: no
Signed-off-by: Chris Lapa
Acked-by: Pali Rohár
Reviewed-by: Andrew F. Davis
---
drivers/power/supply/bq27xxx_battery.c | 43 ++
From: Chris Lapa
This commit adds the BQ27520G1 chip definition to specifically match the
bq27520-G1 functionality as described in the datasheet.
tested: no
Signed-off-by: Chris Lapa
Acked-by: Pali Rohár
Reviewed-by: Andrew F. Davis
---
drivers/power/supply/bq27xxx_battery.c | 42 ++
On Monday, January 09, 2017 04:42:58 PM Jeff Moyer wrote:
> Commit 20ce44d545844 ("do_direct_IO: Use inode->i_blkbits to compute
> block count to be cleaned") introduced a regression: if the block size
> of the block device is changed while a direct I/O request is being
> setup, it can result in a
> On Mon, 09 Jan 2017 14:26:31 +0100,
> Michał Kępień wrote:
> >
> > > > On Thu Dec 15 15:46:28 2016 Michał Kępień wrote:
> > > > > > On Thursday 08 December 2016 13:36:14 Michał Kępień wrote:
> > > > > > > --- a/sound/pci/hda/dell_wmi_helper.c
> > > > > > > +++ b/sound/pci/hda/dell_wmi_helper.c
On Fri, Dec 16, 2016 at 04:10:05PM +0100, Radim Krčmář wrote:
> The check in kvm_set_pic_irq() and kvm_set_ioapic_irq() was just a
> temporary measure until the code improved enough for us to do this.
>
> This changes APIC in a case when KVM_SET_GSI_ROUTING is called to set up pic
> and ioapic rou
From: Chris Lapa
The bq27xxx binding is a standard i2c style binding, however the
deprecated compatible fields and different revisions warrant its own
documentation.
Signed-off-by: Chris Lapa
Acked-by: Pali Rohár
Reviewed-by: Andrew F. Davis
---
.../devicetree/bindings/power/supply/bq27xxx.t
From: Chris Lapa
This commit adds the BQ27520G3 chip definition to specifically match the
bq27520-G3 functionality as described in the datasheet.
tested: no
Signed-off-by: Chris Lapa
Acked-by: Pali Rohár
Reviewed-by: Andrew F. Davis
---
drivers/power/supply/bq27xxx_battery.c | 42 ++
From: Chris Lapa
This commit adds the BQ27510G3 chip definition to specifically match the
bq27510-G3 functionality as described in the datasheet.
tested: yes
Signed-off-by: Chris Lapa
Acked-by: Pali Rohár
Reviewed-by: Andrew F. Davis
---
drivers/power/supply/bq27xxx_battery.c | 39 +
From: Chris Lapa
This commit adds the BQ27520G2 chip definition to specifically match the
bq27520-G2 functionality as described in the datasheet.
tested: no
Signed-off-by: Chris Lapa
Acked-by: Pali Rohár
Reviewed-by: Andrew F. Davis
---
drivers/power/supply/bq27xxx_battery.c | 43 ++
From: Chris Lapa
This commit adds the BQ27510G2 chip definition to specifically match the
bq27510-G2 functionality as described in the datasheet.
tested: no
Signed-off-by: Chris Lapa
Acked-by: Pali Rohár
Reviewed-by: Andrew F. Davis
---
drivers/power/supply/bq27xxx_battery.c | 43 ++
From: Chris Lapa
This patch series renames the patch subject prefix to 'power: supply: bq27xxx'
and also rebases onto sre/linux-power-supply/for-next.
It also drops the overtemp cleanup patch from v3 as it has already been applied.
Otherwise the patch content is the same functionally as the v3
From: Chris Lapa
This commit adds the BQ27500 chip definition to specifically match the
bq27500/1 functionality as described in the datasheet.
tested: no
Signed-off-by: Chris Lapa
Acked-by: Pali Rohár
Reviewed-by: Andrew F. Davis
---
drivers/power/supply/bq27xxx_battery.c | 27 +
On Thu, Jan 05, 2017 at 09:09:40AM +0100, M'boumba Cedric Madianga wrote:
> This patch adds some error messages when a slave device fails to request a
> channel.
Applied now
--
~Vinod
On Tue, Jan 03, 2017 at 01:56:23PM +0100, David Hildenbrand wrote:
> Am 16.12.2016 um 16:10 schrieb Radim Krčmář:
> >irqchip_in_kernel() tried to save a bit by reusing pic_irqchip(), but it
> >just complicated the code.
> >Add a separate state for the irqchip mode.
> >
> >Signed-off-by: Radim Krčmá
On Mon, Jan 09, 2017 at 08:51:02PM +0530, Bhumika Goyal wrote:
> Declare target_core_fabric_ops strucrues as const as they are only
> passed as an argument to the functions target_register_template and
> target_unregister_template. The arguments are of type const struct
> target_core_fabric_ops *
> "Kees" == Kees Cook writes:
Kees> From: Emese Revfy This adds the missing
Kees> __printf attribute which allows compile time format string
Kees> checking (and will be used by the coming initify gcc
Kees> plugin). Additionally, this fixes the warnings exposed by the
Kees> attribute.
Applie
> "Sreekanth" == Sreekanth Reddy writes:
Sreekanth> We are fine with this patch. Can we rename function
Sreekanth> 'set_satl_pending()' name to '_scsih_set_satl_pending()' and
Sreekanth> can add headers to this function.
Sreekanth> other wise I am OK.
Sreekanth> Acked-by: Sreekanth Reddy
[]..
>> static int gdsc_toggle_logic(struct gdsc *sc, bool en)
>> {
>> int ret;
>> @@ -164,16 +171,28 @@ static int gdsc_enable(struct generic_pm_domain
>> *domain)
>> */
>> udelay(1);
>>
>> +/* Turn on HW trigger mode if supported */
>> +if (sc->flags & HW_CTRL)
>> +
Fixed Alignment should match open parenthesis checkpatch CHECK
Signed-off-by: Scott Matheina
---
drivers/staging/vt6656/mac.c | 42 ++
1 file changed, 22 insertions(+), 20 deletions(-)
diff --git a/drivers/staging/vt6656/mac.c b/drivers/staging/vt6656/mac
Fixed Alignment should match open parenthesis checkpatch CHECK
Signed-off-by: Scott Matheina
---
drivers/staging/vt6656/key.c | 14 +++---
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/drivers/staging/vt6656/key.c b/drivers/staging/vt6656/key.c
index 0246a8f..cc18cb1 1006
1 - 100 of 935 matches
Mail list logo
