Re: [Intel-gfx] [PATCH 1/1] drm/i915: Apply Wa_1406680159 as a clk_gating workaround

2020-04-24 Thread Matt Roper
On Wed, Apr 22, 2020 at 05:30:37AM -0700, Radhakrishna Sripada wrote: > The workaround is moved from render engine context to intel_pm > clk gating functions like the previous platforms. I don't think this is the right way to go. There's some GT-related stuff in the clock gating handlers for hist

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Use proper fault mask in interrupt postinstall too

2020-04-24 Thread Patchwork
== Series Details == Series: drm/i915: Use proper fault mask in interrupt postinstall too URL : https://patchwork.freedesktop.org/series/76466/ State : failure == Summary == CI Bug Log - changes from CI_DRM_8363 -> Patchwork_17462 Summary -

[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/4] drm/i915: Add engine scratch register to live_lrc_fixed (rev3)

2020-04-24 Thread Patchwork
== Series Details == Series: series starting with [1/4] drm/i915: Add engine scratch register to live_lrc_fixed (rev3) URL : https://patchwork.freedesktop.org/series/76460/ State : failure == Summary == CI Bug Log - changes from CI_DRM_8363 -> Patchwork_17461 =

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/4] drm/i915: Add engine scratch register to live_lrc_fixed (rev3)

2020-04-24 Thread Patchwork
== Series Details == Series: series starting with [1/4] drm/i915: Add engine scratch register to live_lrc_fixed (rev3) URL : https://patchwork.freedesktop.org/series/76460/ State : warning == Summary == $ dim checkpatch origin/drm-tip 987eaf2a4f2c drm/i915: Add engine scratch register to live

[Intel-gfx] [PATCH] drm/i915: Use proper fault mask in interrupt postinstall too

2020-04-24 Thread Matt Roper
The IRQ postinstall handling had open-coded pipe fault mask selection that never got updated for gen11. Switch it to use gen8_de_pipe_fault_mask() to ensure we don't miss updates for new platforms. Cc: José Roberto de Souza Fixes: d506a65d56fd ("drm/i915: Catch GTT fault errors for gen11+ planes

Re: [Intel-gfx] [CI 2/2] drm/i915/selftets: Check random hang recovery

2020-04-24 Thread Mika Kuoppala
Chris Wilson writes: > Userspace is untrusted and allowed to submit anything to the GPU for > execution, including random garbage. Our recovery should do the right > thing. > Subject: s/tets/tests > Signed-off-by: Chris Wilson > Cc: Mika Kuoppala > --- > .../drm/i915/gem/selftests/i915_gem_c

[Intel-gfx] [PATCH 4/4] drm/i915: Use indirect ctx bb to mend CMD_BUF_CCTL

2020-04-24 Thread Mika Kuoppala
Use indirect ctx bb to load cmd buffer control value from context image to avoid corruption. v2: add to lrc layout (Chris) v3: end to a cacheline (Chris) v4: add to lrc fixed (Chris) v5: value in offset+1 Testcase: igt/i915_selftest/gt_lrc Signed-off-by: Mika Kuoppala Acked-by: Chris Wilson ---

[Intel-gfx] [PATCH 2/4] drm/i915: Add per ctx batchbuffer wa for timestamp

2020-04-24 Thread Mika Kuoppala
Restoration of a previous timestamp can collide with updating the timestamp, causing a value corruption. Combat this issue by using indirect ctx bb to modify the context image during restoring process. We can preload value into scratch register. From which we then do the actual write with LRR. LR

[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/4] drm/i915: Add engine scratch register to live_lrc_fixed

2020-04-24 Thread Patchwork
== Series Details == Series: series starting with [1/4] drm/i915: Add engine scratch register to live_lrc_fixed URL : https://patchwork.freedesktop.org/series/76460/ State : failure == Summary == CI Bug Log - changes from CI_DRM_8363 -> Patchwork_17460

Re: [Intel-gfx] [PATCH v13 00/11] Convert PWM period and duty cycle to u64

2020-04-24 Thread Guru Das Srinagesh
On Fri, Apr 24, 2020 at 07:43:03AM +0100, Lee Jones wrote: > A great deal of mailing lists contain numerous protections against > things like flooding and spamming. One of those protections is a > check for "Too many recipients to the message". Most of the time this > simply requires moderator in

Re: [Intel-gfx] [PATCH v13 01/11] drm/i915: Use 64-bit division macro

2020-04-24 Thread Guru Das Srinagesh
On Fri, Apr 24, 2020 at 09:17:58AM +0300, Jani Nikula wrote: > On Tue, 21 Apr 2020, Guru Das Srinagesh wrote: > > Since the PWM framework is switching struct pwm_state.duty_cycle's > > datatype to u64, prepare for this transition by using DIV_ROUND_UP_ULL > > to handle a 64-bit dividend. > > > > T

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/4] drm/i915: Add engine scratch register to live_lrc_fixed

2020-04-24 Thread Patchwork
== Series Details == Series: series starting with [1/4] drm/i915: Add engine scratch register to live_lrc_fixed URL : https://patchwork.freedesktop.org/series/76460/ State : warning == Summary == $ dim checkpatch origin/drm-tip d5008c5aac16 drm/i915: Add engine scratch register to live_lrc_fi

[Intel-gfx] [PATCH 1/4] drm/i915: Add engine scratch register to live_lrc_fixed

2020-04-24 Thread Mika Kuoppala
General purpose registers are per engine and in a fixed location. Add to live_lrc_fixed. Signed-off-by: Mika Kuoppala Reviewed-by: Chris Wilson Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/gt/intel_lrc.c| 12 drivers/gpu/drm/i915/gt/selftest_lrc.c | 5 + 2 files c

[Intel-gfx] [PATCH 3/4] drm/i915: Add live selftests for indirect ctx batchbuffers

2020-04-24 Thread Mika Kuoppala
Indirect ctx batchbuffers are a hw feature of which batch can be run, by hardware, during context restoration stage. Driver can setup a batchbuffer and also an offset into the context image. When context image is marshalled from memory to registers, and when the offset from the start of context reg

[Intel-gfx] [PATCH 2/4] drm/i915: Add per ctx batchbuffer wa for timestamp

2020-04-24 Thread Mika Kuoppala
Restoration of a previous timestamp can collide with updating the timestamp, causing a value corruption. Combat this issue by using indirect ctx bb to modify the context image during restoring process. We can preload value into scratch register. From which we then do the actual write with LRR. LR

[Intel-gfx] [PATCH 4/4] drm/i915: Use indirect ctx bb to mend CMD_BUF_CCTL

2020-04-24 Thread Mika Kuoppala
Use indirect ctx bb to load cmd buffer control value from context image to avoid corruption. v2: add to lrc layout (Chris) v3: end to a cacheline (Chris) v4: add to lrc fixed (Chris) v5: value in offset+1 Testcase: igt/i915_selftest/gt_lrc Signed-off-by: Mika Kuoppala Acked-by: Chris Wilson ---

[Intel-gfx] ✓ Fi.CI.IGT: success for drm: make drm_file use keyed wakeups (rev2)

2020-04-24 Thread Patchwork
== Series Details == Series: drm: make drm_file use keyed wakeups (rev2) URL : https://patchwork.freedesktop.org/series/76444/ State : success == Summary == CI Bug Log - changes from CI_DRM_8361_full -> Patchwork_17457_full Summary ---

Re: [Intel-gfx] [PATCH] drm/i915: Drop rq->ring->vma peeking from error capture

2020-04-24 Thread Andi Shyti
> static void engine_record_execlists(struct intel_engine_coredump *ee) > @@ -1231,8 +1235,10 @@ static void engine_record_execlists(struct > intel_engine_coredump *ee) > struct i915_request * const *port = el->active; > unsigned int n = 0; > > - while (*port) > - re

Re: [Intel-gfx] [PATCH] drm/i915: Drop rq->ring->vma peeking from error capture

2020-04-24 Thread Mika Kuoppala
Chris Wilson writes: > We only hold the active spinlock while dumping the error state, and this > does not prevent another thread from retiring the request -- as it is > quite possible that despite us capturing the current state, the GPU has > completed the request. As such, it is dangerous to de

Re: [Intel-gfx] [PATCH] drm/i915/mst: filter out the display mode exceed sink's capability

2020-04-24 Thread Lyude Paul
Hi! Sorry this took me a little while to get back to, I had a couple of MST regressions that I had to look into On Sat, 2020-04-18 at 05:24 +0800, Lee Shawn C wrote: > So far, max dot clock rate for MST mode rely on physcial > bandwidth limitation. It would caused compatibility issue > if source d

[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [CI,1/2] drm/i915/gt: Trace RPS events

2020-04-24 Thread Patchwork
== Series Details == Series: series starting with [CI,1/2] drm/i915/gt: Trace RPS events URL : https://patchwork.freedesktop.org/series/76442/ State : success == Summary == CI Bug Log - changes from CI_DRM_8361_full -> Patchwork_17455_full

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Drop rq->ring->vma peeking from error capture

2020-04-24 Thread Patchwork
== Series Details == Series: drm/i915: Drop rq->ring->vma peeking from error capture URL : https://patchwork.freedesktop.org/series/76448/ State : failure == Summary == CI Bug Log - changes from CI_DRM_8362 -> Patchwork_17459 Summary --

[Intel-gfx] [PATCH] drm/i915: Drop rq->ring->vma peeking from error capture

2020-04-24 Thread Chris Wilson
We only hold the active spinlock while dumping the error state, and this does not prevent another thread from retiring the request -- as it is quite possible that despite us capturing the current state, the GPU has completed the request. As such, it is dangerous to dereference state below the reque

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/gem: Lazily acquire the device wakeref for freeing objects

2020-04-24 Thread Patchwork
== Series Details == Series: drm/i915/gem: Lazily acquire the device wakeref for freeing objects URL : https://patchwork.freedesktop.org/series/76440/ State : success == Summary == CI Bug Log - changes from CI_DRM_8360_full -> Patchwork_17453_full ==

[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/4] drm/i915: Add engine scratch register to live_lrc_fixed (rev3)

2020-04-24 Thread Patchwork
== Series Details == Series: series starting with [1/4] drm/i915: Add engine scratch register to live_lrc_fixed (rev3) URL : https://patchwork.freedesktop.org/series/76443/ State : failure == Summary == CI Bug Log - changes from CI_DRM_8361 -> Patchwork_17458 =

Re: [Intel-gfx] [PATCH 59/59] drm/bochs: Remove explicit drm_connector_register

2020-04-24 Thread Sam Ravnborg
On Wed, Apr 15, 2020 at 09:40:34AM +0200, Daniel Vetter wrote: > This is leftovers from the old drm_driver->load callback > upside-down issues. It doesn't do anything for not-hotplugged > connectors since drm_dev_register takes care of that. > > Signed-off-by: Daniel Vetter > Cc: Gerd Hoffmann >

Re: [Intel-gfx] [PATCH 58/59] drm/ast: Drop explicit connector register/unregister

2020-04-24 Thread Sam Ravnborg
On Wed, Apr 15, 2020 at 09:40:33AM +0200, Daniel Vetter wrote: > This is only needed for hotpluggable connectors set up after > drm_dev_register(). > > Signed-off-by: Daniel Vetter > Cc: Dave Airlie > Cc: Thomas Zimmermann > Cc: Gerd Hoffmann > Cc: Daniel Vetter > Cc: Sam Ravnborg > Cc: Emil

Re: [Intel-gfx] [PATCH 56/59] drm/aspeed: Use managed drmm_mode_config_cleanup

2020-04-24 Thread Sam Ravnborg
On Wed, Apr 15, 2020 at 09:40:31AM +0200, Daniel Vetter wrote: > Since aspeed doesn't use devm_kzalloc anymore we can use the managed > mode config cleanup. > > Signed-off-by: Daniel Vetter > Cc: Joel Stanley > Cc: Andrew Jeffery > Cc: linux-asp...@lists.ozlabs.org > Cc: linux-arm-ker...@lists.

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/4] drm/i915: Add engine scratch register to live_lrc_fixed (rev3)

2020-04-24 Thread Patchwork
== Series Details == Series: series starting with [1/4] drm/i915: Add engine scratch register to live_lrc_fixed (rev3) URL : https://patchwork.freedesktop.org/series/76443/ State : warning == Summary == $ dim checkpatch origin/drm-tip 48f89e7502e0 drm/i915: Add engine scratch register to live

Re: [Intel-gfx] [PATCH 55/59] drm/aspeed: Use devm_drm_dev_alloc

2020-04-24 Thread Sam Ravnborg
On Wed, Apr 15, 2020 at 09:40:30AM +0200, Daniel Vetter wrote: > As usual, we can drop the drm_dev_put() and need to embed the > drm_device. Since it's so few, also go right ahead and leave > drm_device->dev_private set to NULL, so that we always use the > container_of() upcast, which is faster any

[Intel-gfx] ✓ Fi.CI.BAT: success for drm: make drm_file use keyed wakeups (rev2)

2020-04-24 Thread Patchwork
== Series Details == Series: drm: make drm_file use keyed wakeups (rev2) URL : https://patchwork.freedesktop.org/series/76444/ State : success == Summary == CI Bug Log - changes from CI_DRM_8361 -> Patchwork_17457 Summary --- **SUCCE

Re: [Intel-gfx] [PATCH 54/59] drm/aspeed: Drop aspeed_gfx->fbdev

2020-04-24 Thread Sam Ravnborg
On Wed, Apr 15, 2020 at 09:40:29AM +0200, Daniel Vetter wrote: > No longer used since the conversion to generic fbdev. > > Signed-off-by: Daniel Vetter > Cc: Joel Stanley > Cc: Andrew Jeffery > Cc: linux-asp...@lists.ozlabs.org > Cc: linux-arm-ker...@lists.infradead.org Acked-by: Sam Ravnborg

Re: [Intel-gfx] [PATCH 52/59] drm/arc: Initialize sim connector before display pipe

2020-04-24 Thread Sam Ravnborg
On Wed, Apr 15, 2020 at 09:40:27AM +0200, Daniel Vetter wrote: > That way we can get rid of this final piece of init code, and use the > simple pipe helpers as intended. > > Signed-off-by: Daniel Vetter > Cc: Alexey Brodkin One nit below, with this addressed: Acked-by: Sam Ravnborg > --- > d

Re: [Intel-gfx] [PATCH 51/59] drm/arc: Inline remaining files

2020-04-24 Thread Sam Ravnborg
On Wed, Apr 15, 2020 at 09:40:26AM +0200, Daniel Vetter wrote: > At less than 500 lines total feels like the right thing to do. > > Also noticed that the simple wrapper around drm_connector_cleanup can > be dropped. > > Signed-off-by: Daniel Vetter Acked-by: Sam Ravnborg > --- > drivers/gpu/dr

Re: [Intel-gfx] [PATCH 50/59] drm/arc: Inline arcpgu_drm_hdmi_init

2020-04-24 Thread Sam Ravnborg
Hi Daniel. On Wed, Apr 15, 2020 at 09:40:25AM +0200, Daniel Vetter wrote: > Really not worth the function, much less the separate file now that > almost all the code is gone. > > Signed-off-by: Daniel Vetter > --- > drivers/gpu/drm/arc/Makefile | 2 +- > drivers/gpu/drm/arc/arcpgu.h

Re: [Intel-gfx] [PATCH 49/59] drm/arc: Inline arcpgu_crtc.c

2020-04-24 Thread Sam Ravnborg
Hi Daniel. On Wed, Apr 15, 2020 at 09:40:24AM +0200, Daniel Vetter wrote: > Really not big anymore. > > Signed-off-by: Daniel Vetter A few things below that maybe should be addressed. Otherwise: Acked-by: Sam Ravnborg > --- > drivers/gpu/drm/arc/Makefile | 2 +- > drivers/gpu/drm/arc/

Re: [Intel-gfx] [PATCH v2 4/6] drm/i915: Make commit call blocking in case of async flips

2020-04-24 Thread Paulo Zanoni
Em seg, 2020-04-20 às 15:17 +0530, Karthik B S escreveu: > Make the commit call blocking in case of async flips > so that there is no delay in completing the flip. > I'm trying to understand the code. Can you please elaborate more here in this commit message? Why exactly does the call need to blo

Re: [Intel-gfx] [PATCH 48/59] drm/arc: Drop fb/crtc check in arc_pgu_update

2020-04-24 Thread Sam Ravnborg
Hi Daniel. On Wed, Apr 15, 2020 at 09:40:23AM +0200, Daniel Vetter wrote: > First it's redundant, fb and crtc are only ever both set or not set. > 2nd, the atomic_check code in simple display pipe helpers guarantees > that this never happens. I looked at drm_simple_kms_plane_atomic_check() - whi

Re: [Intel-gfx] [PATCH v2 1/6] drm/i915: Add enable/disable flip done and flip done handler

2020-04-24 Thread Paulo Zanoni
Em seg, 2020-04-20 às 15:17 +0530, Karthik B S escreveu: > Add enable/disable flip done functions and the flip done handler > function which handles the flip done interrupt. > > Enable the flip done interrupt in IER. > > Enable flip done function is called before writing the > surface address reg

Re: [Intel-gfx] [PATCH 47/59] drm/arc: Convert to drm_simple_kms_pipe_helper

2020-04-24 Thread Sam Ravnborg
On Wed, Apr 15, 2020 at 09:40:22AM +0200, Daniel Vetter wrote: > Really straighforward, only slight issue is that the sim connector is > created after the pipe is set up, so can't use the helpers perfectly > yet. Subsequent patches will fix that. > > Aside from lots of deleting code no functional

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm: make drm_file use keyed wakeups (rev2)

2020-04-24 Thread Patchwork
== Series Details == Series: drm: make drm_file use keyed wakeups (rev2) URL : https://patchwork.freedesktop.org/series/76444/ State : warning == Summary == $ dim checkpatch origin/drm-tip 3ac07bd26367 drm: make drm_file use keyed wakeups -:28: CHECK:PARENTHESIS_ALIGNMENT: Alignment should mat

Re: [Intel-gfx] [PATCH 45/59] drm/arc: Use drmm_mode_config_cleanup

2020-04-24 Thread Sam Ravnborg
On Wed, Apr 15, 2020 at 09:40:20AM +0200, Daniel Vetter wrote: > With autocleanup through drm_device management we can delete all the > code. Possible now that there's no confusion against devm_kzalloc'ed > structures anymore. > > I inlined arcpgu_setup_mode_config because it's tiny and the newly

Re: [Intel-gfx] [PATCH 43/59] drm/arc: Embedd a drm_connector for sim case

2020-04-24 Thread Sam Ravnborg
On Wed, Apr 15, 2020 at 09:40:18AM +0200, Daniel Vetter wrote: > Removes the last devm_kzalloc, which means we're now prepared to use > drmm_mode_config_cleanup! > > Signed-off-by: Daniel Vetter > Cc: Alexey Brodkin Acked-by: Sam Ravnborg > --- > drivers/gpu/drm/arc/arcpgu.h | 1 + > driv

Re: [Intel-gfx] [PATCH 42/59] drm/arc: Embedded a drm_simple_display_pipe

2020-04-24 Thread Sam Ravnborg
On Wed, Apr 15, 2020 at 09:40:17AM +0200, Daniel Vetter wrote: > This is a prep step to convert arc over to the simple kms helpers, for > now we just use this as an embedding container to drop all the various > allocations. Big change is the removal of the various devm_kzalloc, > which have the wro

[Intel-gfx] ✗ Fi.CI.BUILD: failure for drm: Put drm_display_mode on diet (rev3)

2020-04-24 Thread Patchwork
== Series Details == Series: drm: Put drm_display_mode on diet (rev3) URL : https://patchwork.freedesktop.org/series/73674/ State : failure == Summary == CALLscripts/checksyscalls.sh CALLscripts/atomic/check-atomics.sh DESCEND objtool CHK include/generated/compile.h CC [M]

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [CI,1/2] drm/i915/gt: Trace RPS events

2020-04-24 Thread Patchwork
== Series Details == Series: series starting with [CI,1/2] drm/i915/gt: Trace RPS events URL : https://patchwork.freedesktop.org/series/76442/ State : success == Summary == CI Bug Log - changes from CI_DRM_8361 -> Patchwork_17455 Summary --

Re: [Intel-gfx] [PATCH 2/4] drm/i915: Add per ctx batchbuffer wa for timestamp

2020-04-24 Thread Chris Wilson
Quoting Mika Kuoppala (2020-04-24 17:54:27) > if (wa_ctx->indirect_ctx.size) { > - const u32 ggtt_offset = i915_ggtt_offset(wa_ctx->vma); > + const u32 bb_offset = i915_ggtt_offset(wa_ctx->vma) + > + wa_ctx->indirect_ctx.offset; > +

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [CI,1/2] drm/i915/gt: Trace RPS events

2020-04-24 Thread Patchwork
== Series Details == Series: series starting with [CI,1/2] drm/i915/gt: Trace RPS events URL : https://patchwork.freedesktop.org/series/76442/ State : warning == Summary == $ dim checkpatch origin/drm-tip 695be7381970 drm/i915/gt: Trace RPS events 1d1b796b4dd3 drm/i915/gt: Use the RPM config r

[Intel-gfx] [PATCH 4/4] drm/i915: Use indirect ctx bb to mend CMD_BUF_CCTL

2020-04-24 Thread Mika Kuoppala
Use indirect ctx bb to load cmd buffer control value from context image to avoid corruption. v2: add to lrc layout (Chris) v3: end to a cacheline (Chris) v4: add to lrc fixed (Chris) v5: value in offset+1 Testcase: igt/i915_selftest/gt_lrc Signed-off-by: Mika Kuoppala Acked-by: Chris Wilson ---

[Intel-gfx] [PATCH 2/4] drm/i915: Add per ctx batchbuffer wa for timestamp

2020-04-24 Thread Mika Kuoppala
Restoration of a previous timestamp can collide with updating the timestamp, causing a value corruption. Combat this issue by using indirect ctx bb to modify the context image during restoring process. We can preload value into scratch register. From which we then do the actual write with LRR. LR

Re: [Intel-gfx] [PATCH 44/59] drm/arc: Drop surplus connector registration

2020-04-24 Thread Sam Ravnborg
Hi Daniel. On Wed, Apr 15, 2020 at 09:40:19AM +0200, Daniel Vetter wrote: > drm_connector_register does nothing before drm_dev_register(), it > is meant for hotpluggable connectors only. Same for the unregister side. Strange changelog for a patch that removes two calls to drm_connector_unregister

[Intel-gfx] [PATCH v2] drm: make drm_file use keyed wakeups

2020-04-24 Thread Kenny Levinsen
Some processes, such as systemd, are only polling for EPOLLERR|EPOLLHUP. As drm_file uses unkeyed wakeups, such a poll can receive many spurious wakeups from uninteresting events if, for example, the file description is subscribed to vblank events. This is the case with systemd, as it polls a file

[Intel-gfx] [PATCH] drm: make drm_file use keyed wakeups

2020-04-24 Thread Kenny Levinsen
Some processes, such as systemd, are only polling for EPOLLERR|EPOLLHUP. As drm_file uses unkeyed wakeups, such a poll receives many spurious wakeups from uninteresting events. Use keyed wakeups to allow the wakeup target to more efficiently discard these uninteresting events. Signed-off-by: Kenn

Re: [Intel-gfx] [PATCH 41/59] drm/arcpgu: Delete arcpgu_priv->fb

2020-04-24 Thread Sam Ravnborg
On Wed, Apr 15, 2020 at 09:40:16AM +0200, Daniel Vetter wrote: > Leftover from the conversion to the generic fbdev emulation. > > Signed-off-by: Daniel Vetter > Cc: Alexey Brodkin Subject: drm/arc: arcpgu: Delete arcpgu_priv->fb With subject fixed: Acked-by: Sam Ravnborg Sam > --- >

Re: [Intel-gfx] [PATCH 40/59] drm/arcpgu: Stop using drm_device->dev_private

2020-04-24 Thread Sam Ravnborg
Hi Daniel. On Wed, Apr 15, 2020 at 09:40:15AM +0200, Daniel Vetter wrote: > Upcasting using a container_of macro is more typesafe, faster and > easier for the compiler to optimize. > > Signed-off-by: Daniel Vetter > Cc: Alexey Brodkin Subject: drm/arc: arcpgu: Stop using drm_device->dev_privat

Re: [Intel-gfx] [PATCH 39/59] drm/arcpgu: Switch to devm_drm_dev_alloc

2020-04-24 Thread Sam Ravnborg
Hi Daniel. On Wed, Apr 15, 2020 at 09:40:14AM +0200, Daniel Vetter wrote: > - Need to embedded the drm_device, but for now we keep the usual > pointer chasing. > - No more devm_kzalloc, which fixes a lifetime issues on driver > remove. > - No more drm_dev_put, that's done by devm_ now. > > Si

[Intel-gfx] [PATCH 3/4] drm/i915: Add live selftests for indirect ctx batchbuffers

2020-04-24 Thread Mika Kuoppala
Indirect ctx batchbuffers are a hw feature of which batch can be run, by hardware, during context restoration stage. Driver can setup a batchbuffer and also an offset into the context image. When context image is marshalled from memory to registers, and when the offset from the start of context reg

[Intel-gfx] [PATCH 1/4] drm/i915: Add engine scratch register to live_lrc_fixed

2020-04-24 Thread Mika Kuoppala
General purpose registers are per engine and in a fixed location. Add to live_lrc_fixed. Signed-off-by: Mika Kuoppala Reviewed-by: Chris Wilson Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/gt/intel_lrc.c| 12 drivers/gpu/drm/i915/gt/selftest_lrc.c | 5 + 2 files c

[Intel-gfx] [PATCH 4/4] drm/i915: Use indirect ctx bb to mend CMD_BUF_CCTL

2020-04-24 Thread Mika Kuoppala
Use indirect ctx bb to load cmd buffer control value from context image to avoid corruption. v2: add to lrc layout (Chris) v3: end to a cacheline (Chris) v4: add to lrc fixed (Chris) Testcase: igt/i915_selftest/gt_lrc Signed-off-by: Mika Kuoppala Acked-by: Chris Wilson --- drivers/gpu/drm/i915

[Intel-gfx] [PATCH 2/4] drm/i915: Add per ctx batchbuffer wa for timestamp

2020-04-24 Thread Mika Kuoppala
Restoration of a previous timestamp can collide with updating the timestamp, causing a value corruption. Combat this issue by using indirect ctx bb to modify the context image during restoring process. We can preload value into scratch register. From which we then do the actual write with LRR. LR

Re: [Intel-gfx] [PATCH 37/59] drm/cirrus: Move to drm/tiny

2020-04-24 Thread Sam Ravnborg
On Wed, Apr 15, 2020 at 09:40:12AM +0200, Daniel Vetter wrote: > Because it is. Huge congrats to everyone who made this kind of > refactoring happen! > > Signed-off-by: Daniel Vetter > Cc: Dave Airlie > Cc: Gerd Hoffmann > Cc: virtualizat...@lists.linux-foundation.org Acked-by: Sam Ravnborg >

Re: [Intel-gfx] [PATCH 03/59] drm/vboxvideo: Use devm_drm_dev_alloc

2020-04-24 Thread Sam Ravnborg
On Wed, Apr 15, 2020 at 09:39:38AM +0200, Daniel Vetter wrote: > Straightforward conversion. > > Signed-off-by: Daniel Vetter > Cc: Hans de Goede Acked-by: Sam Ravnborg > --- > drivers/gpu/drm/vboxvideo/vbox_drv.c | 19 +-- > 1 file changed, 5 insertions(+), 14 deletions(-) >

[Intel-gfx] [CI 2/2] drm/i915/gt: Use the RPM config register to determine clk frequencies

2020-04-24 Thread Chris Wilson
For many configuration details within RC6 and RPS we are programming intervals for the internal clocks. From gen11, these clocks are configuration via the RPM_CONFIG and so for convenience, we would like to convert to/from more natural units (ns). Signed-off-by: Chris Wilson Cc: Andi Shyti Cc: M

[Intel-gfx] [CI 1/2] drm/i915/gt: Trace RPS events

2020-04-24 Thread Chris Wilson
Add tracek to the RPS events (interrupts, worker, enabling, threshold selection, frequency setting), so that if we have to debug reticent HW we have some traces to start from. Signed-off-by: Chris Wilson Reviewed-by: Andi Shyti --- drivers/gpu/drm/i915/gt/intel_rps.c | 48 ++

Re: [Intel-gfx] [PATCH 4/4] drm/i915: Use indirect ctx bb to mend CMD_BUF_CCTL

2020-04-24 Thread Chris Wilson
Quoting Mika Kuoppala (2020-04-24 17:01:50) > Use indirect ctx bb to load cmd buffer control value > from context image to avoid corruption. > > v2: add to lrc layout (Chris) > v3: end to a cacheline (Chris) > v4: add to lrc fixed (Chris) > > Testcase: igt/i915_selftest/gt_lrc > Signed-off-by: Mi

Re: [Intel-gfx] [PATCH 3/4] drm/i915: Add live selftests for indirect ctx batchbuffers

2020-04-24 Thread Chris Wilson
Quoting Mika Kuoppala (2020-04-24 17:01:49) > Indirect ctx batchbuffers are a hw feature of which > batch can be run, by hardware, during context restoration stage. > Driver can setup a batchbuffer and also an offset into the > context image. When context image is marshalled from > memory to regist

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/gem: Lazily acquire the device wakeref for freeing objects

2020-04-24 Thread Patchwork
== Series Details == Series: drm/i915/gem: Lazily acquire the device wakeref for freeing objects URL : https://patchwork.freedesktop.org/series/76440/ State : success == Summary == CI Bug Log - changes from CI_DRM_8360 -> Patchwork_17453 Su

[Intel-gfx] ✗ Fi.CI.BUILD: failure for series starting with drm/i915: Add engine scratch register to live_lrc_fixed (rev2)

2020-04-24 Thread Patchwork
== Series Details == Series: series starting with drm/i915: Add engine scratch register to live_lrc_fixed (rev2) URL : https://patchwork.freedesktop.org/series/76441/ State : failure == Summary == Applying: drm/i915: Add engine scratch register to live_lrc_fixed Applying: drm/i915: Add per ct

Re: [Intel-gfx] [PATCH 2/4] drm/i915: Add per ctx batchbuffer wa for timestamp

2020-04-24 Thread Chris Wilson
Quoting Mika Kuoppala (2020-04-24 17:01:48) > Restoration of a previous timestamp can collide > with updating the timestamp, causing a value corruption. > > Combat this issue by using indirect ctx bb to > modify the context image during restoring process. > > We can preload value into scratch reg

[Intel-gfx] [PATCH] drm/i915: Add engine scratch register to live_lrc_fixed

2020-04-24 Thread Chris Wilson
From: Mika Kuoppala General purpose registers are per engine and in a fixed location. Add to live_lrc_fixed. Signed-off-by: Mika Kuoppala Reviewed-by: Chris Wilson Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/gt/intel_lrc.c| 12 drivers/gpu/drm/i915/gt/selftest_lrc.c

[Intel-gfx] [PATCH 2/4] drm/i915: Add per ctx batchbuffer wa for timestamp

2020-04-24 Thread Mika Kuoppala
Restoration of a previous timestamp can collide with updating the timestamp, causing a value corruption. Combat this issue by using indirect ctx bb to modify the context image during restoring process. We can preload value into scratch register. From which we then do the actual write with LRR. LR

[Intel-gfx] [PATCH 3/4] drm/i915: Add live selftests for indirect ctx batchbuffers

2020-04-24 Thread Mika Kuoppala
Indirect ctx batchbuffers are a hw feature of which batch can be run, by hardware, during context restoration stage. Driver can setup a batchbuffer and also an offset into the context image. When context image is marshalled from memory to registers, and when the offset from the start of context reg

[Intel-gfx] [PATCH 4/4] drm/i915: Use indirect ctx bb to mend CMD_BUF_CCTL

2020-04-24 Thread Mika Kuoppala
Use indirect ctx bb to load cmd buffer control value from context image to avoid corruption. v2: add to lrc layout (Chris) v3: end to a cacheline (Chris) v4: add to lrc fixed (Chris) Testcase: igt/i915_selftest/gt_lrc Signed-off-by: Mika Kuoppala --- drivers/gpu/drm/i915/gt/intel_lrc.c| 109

[Intel-gfx] [PATCH 1/4] drm/i915: Add engine scratch register to live_lrc_fixed

2020-04-24 Thread Mika Kuoppala
General purpose registers are per engine and in a fixed location. Add to live_lrc_fixed. Signed-off-by: Mika Kuoppala --- drivers/gpu/drm/i915/gt/intel_lrc_reg.h | 1 + drivers/gpu/drm/i915/gt/selftest_lrc.c | 5 + 2 files changed, 6 insertions(+) diff --git a/drivers/gpu/drm/i915/gt/intel

Re: [Intel-gfx] [PATCH] drm/i915/gem: Lazily acquire the device wakeref for freeing objects

2020-04-24 Thread Janusz Krzysztofik
Hi Chris, On Fri, 2020-04-24 at 16:24 +0100, Chris Wilson wrote: > We only need the device wakeref on freeing the objects if we have to > unbind the object from the global GTT, or otherwise update device > information. If the objects are clean, we never need the wakeref, so > avoid taking until re

[Intel-gfx] [PATCH] drm/i915/gem: Lazily acquire the device wakeref for freeing objects

2020-04-24 Thread Chris Wilson
We only need the device wakeref on freeing the objects if we have to unbind the object from the global GTT, or otherwise update device information. If the objects are clean, we never need the wakeref, so avoid taking until required. For this to be effective in preventing us from waking the device

Re: [Intel-gfx] [PATCH 27/59] drm/qxl: Don't use drm_device->dev_private

2020-04-24 Thread Sam Ravnborg
On Wed, Apr 15, 2020 at 09:40:02AM +0200, Daniel Vetter wrote: > Upcasting using a container_of macro is more typesafe, faster and > easier for the compiler to optimize. > > Acked-by: Gerd Hoffmann > Signed-off-by: Daniel Vetter > Cc: Dave Airlie > Cc: Gerd Hoffmann > Cc: virtualizat...@lists.

Re: [Intel-gfx] [PATCH 26/59] drm/qxl: Use devm_drm_dev_alloc

2020-04-24 Thread Sam Ravnborg
Hi Daniel On Wed, Apr 15, 2020 at 09:40:01AM +0200, Daniel Vetter wrote: > Also need to remove the drm_dev_put from the remove hook. > > Acked-by: Gerd Hoffmann > Signed-off-by: Daniel Vetter > Cc: Dave Airlie > Cc: Gerd Hoffmann > Cc: virtualizat...@lists.linux-foundation.org > Cc: spice-de.

Re: [Intel-gfx] [PATCH 11/59] drm/udl: Use devm_drm_dev_alloc

2020-04-24 Thread Sam Ravnborg
Hi Daniel. On Wed, Apr 15, 2020 at 09:39:46AM +0200, Daniel Vetter wrote: > Also init the fbdev emulation before we register the device, that way > we can rely on the auto-cleanup and simplify the probe error code even > more. > > v2: Rebase on top of Thomas' patches to remove the return value fr

Re: [Intel-gfx] [PATCH 1/3] drm/i915/gt: Prefer soft-rc6 over RPS DOWN_TIMEOUT

2020-04-24 Thread Andi Shyti
Hi Chris, > > On Wed, Apr 22, 2020 at 01:17:01AM +0100, Chris Wilson wrote: > > > The RPS DOWN_TIMEOUT interrupt is signaled after a period of rc6, and > > > upon receipt of that interrupt we reprogram the GPU clocks down to the > > > next idle notch [to help convserve power during rc6]. However,

[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/5] drm: report dp downstream port type as a subconnector property

2020-04-24 Thread Patchwork
== Series Details == Series: series starting with [1/5] drm: report dp downstream port type as a subconnector property URL : https://patchwork.freedesktop.org/series/76430/ State : success == Summary == CI Bug Log - changes from CI_DRM_8358_full -> Patchwork_17452_full ===

Re: [Intel-gfx] [PATCH 1/3] drm/i915/gt: Prefer soft-rc6 over RPS DOWN_TIMEOUT

2020-04-24 Thread Chris Wilson
Quoting Andi Shyti (2020-04-24 13:50:40) > Hi Chris, > > On Wed, Apr 22, 2020 at 01:17:01AM +0100, Chris Wilson wrote: > > The RPS DOWN_TIMEOUT interrupt is signaled after a period of rc6, and > > upon receipt of that interrupt we reprogram the GPU clocks down to the > > next idle notch [to help c

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/5] drm: report dp downstream port type as a subconnector property

2020-04-24 Thread Patchwork
== Series Details == Series: series starting with [1/5] drm: report dp downstream port type as a subconnector property URL : https://patchwork.freedesktop.org/series/76430/ State : success == Summary == CI Bug Log - changes from CI_DRM_8358 -> Patchwork_17452 =

Re: [Intel-gfx] [PATCH 2/3] drm/i915/gt: Trace RPS events

2020-04-24 Thread Andi Shyti
Hi Chris, On Wed, Apr 22, 2020 at 01:17:02AM +0100, Chris Wilson wrote: > Add tracek to the RPS events (interrupts, worker, enabling, threshold > selection, frequency setting), so that if we have to debug reticent HW > we have some traces to start from. > > Signed-off-by: Chris Wilson Reviewed-

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [1/5] drm: report dp downstream port type as a subconnector property

2020-04-24 Thread Patchwork
== Series Details == Series: series starting with [1/5] drm: report dp downstream port type as a subconnector property URL : https://patchwork.freedesktop.org/series/76430/ State : warning == Summary == $ dim sparse origin/drm-tip Sparse version: v0.6.0 Commit: drm: report dp downstream port

Re: [Intel-gfx] [PATCH 1/3] drm/i915/gt: Prefer soft-rc6 over RPS DOWN_TIMEOUT

2020-04-24 Thread Andi Shyti
Hi Chris, On Wed, Apr 22, 2020 at 01:17:01AM +0100, Chris Wilson wrote: > The RPS DOWN_TIMEOUT interrupt is signaled after a period of rc6, and > upon receipt of that interrupt we reprogram the GPU clocks down to the > next idle notch [to help convserve power during rc6]. However, on > execlists,

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/5] drm: report dp downstream port type as a subconnector property

2020-04-24 Thread Patchwork
== Series Details == Series: series starting with [1/5] drm: report dp downstream port type as a subconnector property URL : https://patchwork.freedesktop.org/series/76430/ State : warning == Summary == $ dim checkpatch origin/drm-tip 3b34502050b6 drm: report dp downstream port type as a subc

[Intel-gfx] [PATCH 5/5] drm/amdgpu: utilize subconnector property for DP through DisplayManager

2020-04-24 Thread Jeevan B
From: Oleg Vasilev Since DP-specific information is stored in driver's structures, every driver needs to implement subconnector property by itself. Display Core already has the subconnector information, we only need to expose it through DRM property. v2:rebase v3: renamed a function call Cc: A

[Intel-gfx] [PATCH 4/5] drm/amdgpu: utilize subconnector property for DP through atombios

2020-04-24 Thread Jeevan B
From: Oleg Vasilev Since DP-specific information is stored in driver's structures, every driver needs to implement subconnector property by itself. v2: rebase v3: renamed a function call Cc: Alex Deucher Cc: Christian König Cc: David (ChunMing) Zhou Cc: amd-...@lists.freedesktop.org Signed-

[Intel-gfx] [PATCH 3/5] drm/nouveau: utilize subconnector property for DP

2020-04-24 Thread Jeevan B
From: Oleg Vasilev Since DP-specific information is stored in driver's structures, every driver needs to implement subconnector property by itself. v2: rebase Cc: Ben Skeggs Cc: nouv...@lists.freedesktop.org Signed-off-by: Jeevan B Signed-off-by: Oleg Vasilev Reviewed-by: Emil Velikov ---

[Intel-gfx] [PATCH 1/5] drm: report dp downstream port type as a subconnector property

2020-04-24 Thread Jeevan B
From: Oleg Vasilev Currently, downstream port type is only reported in debugfs. This information should be considered important since it reflects the actual physical connector type. Some userspace (e.g. window compositors) may want to show this info to a user. The 'subconnector' property is alre

[Intel-gfx] [PATCH 2/5] drm/i915: utilize subconnector property for DP

2020-04-24 Thread Jeevan B
From: Oleg Vasilev Since DP-specific information is stored in driver's structures, every driver needs to implement subconnector property by itself. v2: updates to match previous commit changes v3: rebase v4: renamed a function call Cc: Ville Syrjälä Cc: intel-gfx@lists.freedesktop.org Signed

Re: [Intel-gfx] [PATCH i-g-t] perf: Verify rc6 works first

2020-04-24 Thread Lionel Landwerlin
Makes sense : Reviewed-by: Lionel Landwerlin Thanks, -Lionel On 24/04/2020 13:19, Chris Wilson wrote: We want to verify that OA disables rc6 (so that its metrics are not interrupted by the device sleeping), and once OA is finished, the device is allowed to sleep again. If rc6 is broken, the

Re: [Intel-gfx] [PATCH] drm/i915: Only close vma we open

2020-04-24 Thread Andi Shyti
On Fri, Apr 24, 2020 at 11:22:13AM +0100, Chris Wilson wrote: > Quoting Andi Shyti (2020-04-24 11:16:17) > > Hi Chris, > > > > On Wed, Apr 22, 2020 at 08:05:58PM +0100, Chris Wilson wrote: > > > The history of i915_vma_close() is confusing, as is its use. As the > > > lifetime of the i915_vma is c

Re: [Intel-gfx] [PATCH] drm/i915: Only close vma we open

2020-04-24 Thread Andi Shyti
Hi Chris, On Wed, Apr 22, 2020 at 08:05:58PM +0100, Chris Wilson wrote: > The history of i915_vma_close() is confusing, as is its use. As the > lifetime of the i915_vma is currently bounded by the object it is > attached to, we needed a means of identify when a vma was no longer in > use by usersp

Re: [Intel-gfx] [PATCH] drm/i915: Only close vma we open

2020-04-24 Thread Chris Wilson
Quoting Andi Shyti (2020-04-24 11:16:17) > Hi Chris, > > On Wed, Apr 22, 2020 at 08:05:58PM +0100, Chris Wilson wrote: > > The history of i915_vma_close() is confusing, as is its use. As the > > lifetime of the i915_vma is currently bounded by the object it is > > attached to, we needed a means of

[Intel-gfx] [PATCH i-g-t] perf: Verify rc6 works first

2020-04-24 Thread Chris Wilson
We want to verify that OA disables rc6 (so that its metrics are not interrupted by the device sleeping), and once OA is finished, the device is allowed to sleep again. If rc6 is broken, the test fails since rc6 never recovers -- but that is expected as rc6 is broken. Skip the test rather than fail

[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [CI,1/2] drm/i915/selftests: Verify context isolation

2020-04-24 Thread Patchwork
== Series Details == Series: series starting with [CI,1/2] drm/i915/selftests: Verify context isolation URL : https://patchwork.freedesktop.org/series/76422/ State : failure == Summary == CI Bug Log - changes from CI_DRM_8357 -> Patchwork_17451

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [CI,1/2] drm/i915/selftests: Verify context isolation

2020-04-24 Thread Patchwork
== Series Details == Series: series starting with [CI,1/2] drm/i915/selftests: Verify context isolation URL : https://patchwork.freedesktop.org/series/76422/ State : warning == Summary == $ dim checkpatch origin/drm-tip 4f4d2e0da2e5 drm/i915/selftests: Verify context isolation -:345: WARNING:

[Intel-gfx] [CI 1/2] drm/i915/selftests: Verify context isolation

2020-04-24 Thread Chris Wilson
No unprivileged context should ever be allowed to modify logical state that is visible to another; there should be no backchannels available or control leakage for malicious actors. This test tries to write to a set of random registers using non-privileged instructions (ala userspace). It should o

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