Re: [Intel-gfx] [PATCH v5 0/4] Fix Win8 backlight issue

On Friday, October 11, 2013 09:27:42 PM Aaron Lu wrote: > v5: > 1 Introduce video.use_native_backlight module parameter and set its > value to false by default as suggested by Rafael. For Win8 systems > which have broken ACPI video backlight control, the parameter can be > set to 1 in kernel

Re: [Intel-gfx] [RFC] Runtime display PM for VLV/BYT

On Tue, Oct 15, 2013 at 8:15 PM, Imre Deak wrote: > Related to this: I made intel_encoder_get_hw_state() only check if the > power well is on and return false if it's not to indicate that the > encoder is off. I also thought of doing the same as you and take a ref > instead, not sure what's the ri

Re: [Intel-gfx] [PATCH 0/2] drm/i915: fix hdmi audio pixel clock config

Not a surprising outcome since it essentially means feature parity with the Windows driver (48kHz working, 44.1kHz not working). I still suspect it's a bug with the Pioneer receiver. On Tue, Oct 15, 2013 at 10:02:54PM +0200, Jasper Smet wrote: >Good news! Audio works now in 1080p@50/60 but only i

[Intel-gfx] More on the i835GM problems on Fujitsu/Siemens

Hi Daniel, hi folks, a bit more details on the intel-drm problem on the ancient 835GM based laptop. It seems that the problem of a blank screen can be avoided by modifying the xorg.conf a bit. Currently, my xorg.conf contains a screen section as follows: Section "Screen" Identifier "S

Re: [Intel-gfx] [PATCH 4/5] drm/i915: take power well refs when needed

2013/10/15 Jesse Barnes : > On Tue, 15 Oct 2013 17:47:20 -0300 > Paulo Zanoni wrote: > >> 2013/10/15 Jesse Barnes : >> > On Tue, 15 Oct 2013 16:54:00 -0300 >> > Paulo Zanoni wrote: >> > >> >> 2013/10/14 Jesse Barnes : >> >> > When accessing the display regs for hw state readout or cross check, we

Re: [Intel-gfx] [PATCH 4/5] drm/i915: take power well refs when needed

On Tue, 15 Oct 2013 17:47:20 -0300 Paulo Zanoni wrote: > 2013/10/15 Jesse Barnes : > > On Tue, 15 Oct 2013 16:54:00 -0300 > > Paulo Zanoni wrote: > > > >> 2013/10/14 Jesse Barnes : > >> > When accessing the display regs for hw state readout or cross check, we > >> > need to make sure the power w

[Intel-gfx] [PATCH] testcases: Slice Shutdown testscases.

1. sysfs half/full switch. 2. on full execbuf without I915_EXEC_USE_PREDICATE 3. on full execbuf with I915_EXEC_USE_PREDICATE 4. on half execbuf without I915_EXEC_USE_PREDICATE 5. on half execbuf with I915_EXEC_USE_PREDICATE v2: include more tests and s/GT_FULL/USE_PREDICATE Signed-off-by: Rodrig

[Intel-gfx] [PATCH 3/4] drm/i915: HSW GT3 Slices: exec flag to warn kernel that userspace is using predication

If Userspace isn't using MI_PREDICATE all slices must be enabled for backward compatibility. If I915_EXEC_USE_PREDICATE isn't set and defaul is set to half, kernel will force all slices on. v2: fix the inverted logic for backwards compatibility USE_PREDICATE unset force gt_full when defaul i

[Intel-gfx] [PATCH] i915_drm: add exec flag to warn kernel that userspace is using predication

If Userspace isn't using MI_PREDICATE all slices must be enabled for backward compatibility. If I915_EXEC_USE_PREDICATE isn't set and defaul is set to half, kernel will force all slices on. v2: include more tests and s/GT_FULL/USE_PREDICATE on code and on commit message. Signed-off-by: Rodr

Re: [Intel-gfx] [PATCH 4/5] drm/i915: take power well refs when needed

2013/10/15 Jesse Barnes : > On Tue, 15 Oct 2013 16:54:00 -0300 > Paulo Zanoni wrote: > >> 2013/10/14 Jesse Barnes : >> > When accessing the display regs for hw state readout or cross check, we >> > need to make sure the power well is enabled so we can read valid >> > register state. >> >> On the c

Re: [Intel-gfx] [PATCH 5/5] drm/i915/vlv: support save/restore of display state around power well toggle

On Tue, 15 Oct 2013 17:09:19 -0300 Paulo Zanoni wrote: > 2013/10/14 Jesse Barnes : > > If we disable the power well at runtime, we need to save enough display > > state so we can restore it when the power well comes back again. Add > > support for that on VLV by reusing some of the _freeze and _

Re: [Intel-gfx] [PATCH 4/5] drm/i915: take power well refs when needed

On Tue, 15 Oct 2013 16:54:00 -0300 Paulo Zanoni wrote: > 2013/10/14 Jesse Barnes : > > When accessing the display regs for hw state readout or cross check, we > > need to make sure the power well is enabled so we can read valid > > register state. > > On the current code (HSW) we already check f

Re: [Intel-gfx] [PATCH 5/5] drm/i915/vlv: support save/restore of display state around power well toggle

2013/10/14 Jesse Barnes : > If we disable the power well at runtime, we need to save enough display > state so we can restore it when the power well comes back again. Add > support for that on VLV by reusing some of the _freeze and _thaw code. > > Note we need to drop the power well lock in this p

Re: [Intel-gfx] [PATCH 0/2] drm/i915: fix hdmi audio pixel clock config

Good news! Audio works now in 1080p@50/60 but only in 48000khz which fixes most of my problems :-) What (still) does not work in 50/60hz is 41000khz audio (still works in lower modes) so the patch is not 100% :-) I noticed this because menu sounds in XBMC are 41000 khz and they wouldn't play wher

Re: [Intel-gfx] [PATCH 4/5] drm/i915: take power well refs when needed

2013/10/14 Jesse Barnes : > When accessing the display regs for hw state readout or cross check, we > need to make sure the power well is enabled so we can read valid > register state. On the current code (HSW) we already check for the power wells in the HW state readout code: if the power well is

[Intel-gfx] [PATCH 8/8] debugfs_pipe_crc: Let's check CRCs!

Let's add a new test that sets a mode, wait for a few vblanks (3) and then make sure we read 3 identical CRCs. Some subtests check for various parsing errors. In the process, improve the debugfs helpers to deal with CRCs. Signed-off-by: Damien Lespiau --- lib/igt_debugfs.c| 199 +++

[Intel-gfx] [PATCH 6/8] lib: Make igt_debugfs_open() take the mode as argument

Signed-off-by: Damien Lespiau --- lib/igt_debugfs.c | 4 ++-- lib/igt_debugfs.h | 2 +- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/lib/igt_debugfs.c b/lib/igt_debugfs.c index f194439..7e625e1 100644 --- a/lib/igt_debugfs.c +++ b/lib/igt_debugfs.c @@ -66,12 +66,12 @@ find_minor

[Intel-gfx] [PATCH 2/8] lib: Add igt_debugfs_fopen()

Signed-off-by: Damien Lespiau --- lib/igt_debugfs.c | 9 + lib/igt_debugfs.h | 4 2 files changed, 13 insertions(+) diff --git a/lib/igt_debugfs.c b/lib/igt_debugfs.c index 33c4fc1..f194439 100644 --- a/lib/igt_debugfs.c +++ b/lib/igt_debugfs.c @@ -73,3 +73,12 @@ int igt_debugfs_ope

[Intel-gfx] [PATCH 7/8] lib: Add igt_wait_for_vblank() helper

Signed-off-by: Damien Lespiau --- lib/Makefile.am | 1 + lib/{igt_display.h => igt_display.c} | 38 lib/igt_display.h| 2 ++ 3 files changed, 15 insertions(+), 26 deletions(-) copy lib/{igt_display.h => igt_display.c

[Intel-gfx] [PATCH 4/8] lib: Add kmstest_paint_color()

Signed-off-by: Damien Lespiau --- lib/drmtest.c | 8 lib/drmtest.h | 2 ++ 2 files changed, 10 insertions(+) diff --git a/lib/drmtest.c b/lib/drmtest.c index 2660af7..435a745 100644 --- a/lib/drmtest.c +++ b/lib/drmtest.c @@ -1347,6 +1347,14 @@ static int create_bo_for_fb(int fd, int wi

[Intel-gfx] [PATCH 5/8] lib: Add a igt_display.h with a few enums and defines from the kernel

Signed-off-by: Damien Lespiau --- lib/Makefile.am | 1 + lib/igt_display.h | 55 +++ 2 files changed, 56 insertions(+) create mode 100644 lib/igt_display.h diff --git a/lib/Makefile.am b/lib/Makefile.am index 5710802..06d406f 100644 --- a/l

[Intel-gfx] [PATCH 3/8] lib: Add a igt_assert_cmpint()

Signed-off-by: Damien Lespiau --- lib/drmtest.h | 14 ++ 1 file changed, 14 insertions(+) diff --git a/lib/drmtest.h b/lib/drmtest.h index ff2827d..f45780b 100644 --- a/lib/drmtest.h +++ b/lib/drmtest.h @@ -193,6 +193,20 @@ void igt_exit(void) __attribute__((noreturn));

[Intel-gfx] [PATCH 1/8] lib: Add a small helper to open debugfs files

Signed-off-by: Damien Lespiau --- lib/Makefile.am | 2 ++ lib/igt_debugfs.c | 75 +++ lib/igt_debugfs.h | 36 ++ 3 files changed, 113 insertions(+) create mode 100644 lib/igt_debugfs.c create mode 100644 lib/igt_debu

[Intel-gfx] pipe CRCs, intel-gpu-tools

And now the igt part, that adds a basic test using CRCs. -- Damien lib/Makefile.am | 4 + lib/drmtest.c| 8 ++ lib/drmtest.h| 16 +++ lib/igt_debugfs.c| 283 lib/igt_debugfs.h| 77 +++ lib/ig

Re: [Intel-gfx] [RFC] Runtime display PM for VLV/BYT

On Tue, 2013-10-15 at 09:23 -0700, Jesse Barnes wrote: > On Tue, 15 Oct 2013 15:16:11 +0300 > Imre Deak wrote: > > > On Tue, 2013-10-15 at 11:06 +0300, Ville Syrjälä wrote: > > > On Mon, Oct 14, 2013 at 04:07:44PM -0700, Jesse Barnes wrote: > > > > This set adds bits needed for runtime power supp

Re: [Intel-gfx] [PATCH] drm/i915: Use pipe_name() instead of the pipe number

On Tue, Oct 15, 2013 at 02:45:43PM +0100, Damien Lespiau wrote: > Yet another direct usage of the pipe number instead of pipe_name(). > We've been tracking them lately but managed to miss this one. > > Signed-off-by: Damien Lespiau Reviewed-by: Ville Syrjälä I actually see two more in intel_ds

[Intel-gfx] [PATCH 15/16] drm/i915: Only one open() allowed on pipe CRC result files

It doesn't really make sense to have two processes dequeueing the CRC values at the same time. Forbid that usage. Signed-off-by: Damien Lespiau --- drivers/gpu/drm/i915/i915_debugfs.c | 16 drivers/gpu/drm/i915/i915_drv.h | 1 + 2 files changed, 17 insertions(+) diff --git

Re: [Intel-gfx] [PATCH v2] drm: add support for additional stereo 3D modes

On Tue, Oct 15, 2013 at 06:25:27PM +0100, Thomas Wood wrote: > Parse the 3D_Structure_ALL and 3D_MASK fields of the HDMI Vendor > Specific Data Block to expose more stereo 3D modes. > Daniel likes to have the v2,v3,etc. changes listed here in the commit msg. > Signed-off-by: Thomas Wood > --- >

[Intel-gfx] [PATCH 16/16] drm/i915: Enable pipe CRCs

It's time to declare them ready. Unleash the beast. Signed-off-by: Damien Lespiau --- drivers/gpu/drm/i915/i915_debugfs.c | 3 --- 1 file changed, 3 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c index 826ebce..d1674b6 100644 --- a/drivers/g

[Intel-gfx] [PATCH 14/16] drm/i915: Implement blocking read for pipe CRC files

seq_file is not quite the right interface for these ones. We have a circular buffer with a new entry per vblank on one side and a process wanting to dequeue the CRC with a read(). It's quite racy to wait for vblank in user land and then try to read a pipe_crc file, sometimes the CRC interrupt hasn

[Intel-gfx] [PATCH 13/16] drm/i915: Move drm_add_fake_info_node() higher in the file

Following commit needs drm_add_fake_info_node() higher in the file to avoid having a forward declaration. Move this helper near the top of the file. This also makes the next commit diff a bit easier to review. Signed-off-by: Damien Lespiau --- drivers/gpu/drm/i915/i915_debugfs.c | 52 ++

[Intel-gfx] [PATCH 12/16] drm/i915: Add log messages when CRCs collection is started/stopped

Signed-off-by: Damien Lespiau --- drivers/gpu/drm/i915/i915_debugfs.c | 6 ++ 1 file changed, 6 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c index 471c258..dee85d7 100644 --- a/drivers/gpu/drm/i915/i915_debugfs.c +++ b/drivers/gpu/drm/

[Intel-gfx] [PATCH 10/16] drm/i915: Rename i915_pipe_crc_ctl to i915_display_crc_ctl

In the same spirit than: drm/i915: Generalize the CRC command format for future work Let's move from writing 'A plane1' to 'pipe A plane1' to i915_pipe_crc_ctl. This will allow us to extend the interface to transcoders or DDIs in the future. Let's rename the CRC control file to b

[Intel-gfx] [PATCH 11/16] drm/i915: Warn if we receive an interrupt after freeing the buffer

This shouldn't happen as the buffer is freed after disable pipe CRCs, but better be safe than sorry. Signed-off-by: Damien Lespiau --- drivers/gpu/drm/i915/i915_irq.c | 5 + 1 file changed, 5 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c index

[Intel-gfx] [PATCH 08/16] drm/i915: Dynamically allocate the CRC circular buffer

So we don't eat that memory when not needed. Signed-off-by: Damien Lespiau --- drivers/gpu/drm/i915/i915_debugfs.c | 12 drivers/gpu/drm/i915/i915_drv.h | 2 +- 2 files changed, 13 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm

[Intel-gfx] [PATCH 06/16] drm/i915: Enforce going back to none before changing CRC source

This way we can have some init/fini code on those transitions. Signed-off-by: Damien Lespiau --- drivers/gpu/drm/i915/i915_debugfs.c | 4 1 file changed, 4 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c index 8c750d5..787c50d 100644 --

[Intel-gfx] [PATCH 09/16] drm/i915: Generalize the CRC command format for future work

Let's move from writing 'A plane1' to 'pipe A plane1' to i915_pipe_crc_ctl. This will allow us to extend the interface to transcoders or DDIs in the future. Signed-off-by: Damien Lespiau --- drivers/gpu/drm/i915/i915_debugfs.c | 56 - 1 file changed, 43 insert

[Intel-gfx] [PATCH 07/16] drm/i915: Empty the circular buffer when asked for a new source

So we don't read out stale CRCs from a previous run left in the buffer. Signed-off-by: Damien Lespiau --- drivers/gpu/drm/i915/i915_debugfs.c | 6 ++ 1 file changed, 6 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c index 787c50d..ec9151

[Intel-gfx] [PATCH 05/16] drm/i915: Make switching to the same CRC source a no-op

Signed-off-by: Damien Lespiau --- drivers/gpu/drm/i915/i915_debugfs.c | 6 +- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c index 58c6fd4..8c750d5 100644 --- a/drivers/gpu/drm/i915/i915_debugfs.c +++ b/d

[Intel-gfx] [PATCH 03/16] drm/i915: Keep the CRC values into a circular buffer

There are a few good properties to a circular buffer, for instance it has a number of entries (before we were always dumping the full buffer). Signed-off-by: Damien Lespiau --- drivers/gpu/drm/i915/i915_debugfs.c | 20 drivers/gpu/drm/i915/i915_drv.h | 4 ++-- drivers/g

[Intel-gfx] [PATCH 04/16] drm/i915: Sample the frame counter instead of a timestamp for CRCs

Signed-off-by: Damien Lespiau --- drivers/gpu/drm/i915/i915_debugfs.c | 4 ++-- drivers/gpu/drm/i915/i915_drv.h | 2 +- drivers/gpu/drm/i915/i915_irq.c | 8 ++-- 3 files changed, 5 insertions(+), 9 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/

[Intel-gfx] [PATCH 02/16] drm/i915: Add a control file for pipe CRCs

Note the "return -ENODEV;" in pipe_crc_set_source(). The ctl file is disabled until the end of the series to be able to do incremental improvements. Signed-off-by: Damien Lespiau --- drivers/gpu/drm/i915/i915_debugfs.c | 217 +++- drivers/gpu/drm/i915/i915_drv.h

[Intel-gfx] [PATCH 01/16] drm/i915: Expose latest 200 CRC value for pipe through debugfs

From: Shuang He There are several points in the display pipeline where CRCs can be computed on the bits flowing there. For instance, it's usually possible to compute the CRCs of the primary plane, the sprite plane or the CRCs of the bits after the panel fitter (collectively called pipe CRCs). v2

[Intel-gfx] Pipe CRCs v1

This series exposes the pipe CRCs on ivybridge through debugfs. It's based on the initial work from Shuang He, with some improvements to have a nice user space API. There are several points in the display pipeline where CRCs can be computed on the bits flowing there. For instance, it's usually pos

Re: [Intel-gfx] [PATCH 16/16] drm/i915: Rename ilk_check_wm to ilk_validate_wm_level

On Tue, Oct 15, 2013 at 02:01:39PM -0300, Paulo Zanoni wrote: > 2013/10/15 Daniel Vetter : > > On Fri, Oct 11, 2013 at 02:08:07PM -0300, Paulo Zanoni wrote: > >> 2013/10/9 : > >> > From: Ville Syrjälä > >> > > >> > Makes the behaviour of the function more clear. > >> > > >> > Signed-off-by: Ville

[Intel-gfx] [PATCH v2] drm: add support for additional stereo 3D modes

Parse the 3D_Structure_ALL and 3D_MASK fields of the HDMI Vendor Specific Data Block to expose more stereo 3D modes. Signed-off-by: Thomas Wood --- drivers/gpu/drm/drm_edid.c | 105 + 1 file changed, 96 insertions(+), 9 deletions(-) diff --git a/drive

[Intel-gfx] [PATCH] drm: add support for additional stereo 3D modes

On 11 October 2013 12:12, Ville Syrjälä wrote: > On Thu, Oct 10, 2013 at 02:19:15PM +0100, Thomas Wood wrote: >> Parse the 3D_Structure_ALL and 3D_MASK fields of the HDMI Vendor >> Specific Data Block to expose more stereo 3D modes. >> >> Signed-off-by: Thomas Wood >> --- >> drivers/gpu/drm/drm_

Re: [Intel-gfx] [PATCH 3/3] drm/i915: HSW GT3 Slices: Userspace can dynamically forcibly enable all slices

please ignore this one and other two (libdrm and igt) with exec flag... will do a v2 and resend soon.. On Tue, Oct 15, 2013 at 1:14 PM, Eric Anholt wrote: > Rodrigo Vivi writes: > >> Rendering buffers that need full GT power can request full power through >> this I915_EXEC_GT_FULL flag. If the d

[Intel-gfx] [PATCH] drm/i915: Replace has_bsd/blt/vebox with a mask

From: Ben Widawsky I've sent this patch several times for various reasons. It essentially cleans up a lot of code where we need to do something per ring, and want to query whether or not the ring exists on that hardware. It has various uses coming up, but for now it shouldn't be too offensive.

Re: [Intel-gfx] [PATCH 16/16] drm/i915: Rename ilk_check_wm to ilk_validate_wm_level

2013/10/15 Daniel Vetter : > On Fri, Oct 11, 2013 at 02:08:07PM -0300, Paulo Zanoni wrote: >> 2013/10/9 : >> > From: Ville Syrjälä >> > >> > Makes the behaviour of the function more clear. >> > >> > Signed-off-by: Ville Syrjälä >> >> Thanks :) >> >> Reviewed-by: Paulo Zanoni > > With the except

Re: [Intel-gfx] [PATCH 09/16] drm/i915: Store current watermark state in dev_priv->wm

2013/10/15 Daniel Vetter : > On Fri, Oct 11, 2013 at 11:21:04AM -0300, Paulo Zanoni wrote: >> 2013/10/9 : > > [snip] > >> > + previous.enable_fbc_wm = !(I915_READ(DISP_ARB_CTL) & >> > DISP_FBC_WM_DIS); >> > + >> > + if (memcmp(results, &previous, sizeof(*results)) == 0) >> >> This may

Re: [Intel-gfx] [PATCH 3/3] drm/i915: HSW GT3 Slices: Userspace can dynamically forcibly enable all slices

Rodrigo Vivi writes: > Rendering buffers that need full GT power can request full power through > this I915_EXEC_GT_FULL flag. If the default is the power saving with half > slices off it executes LRIs to immediately enable all slices. How is userspace supposed to decide that the GPU needs to be

Re: [Intel-gfx] [RFC] Runtime display PM for VLV/BYT

On Tue, 15 Oct 2013 15:16:11 +0300 Imre Deak wrote: > On Tue, 2013-10-15 at 11:06 +0300, Ville Syrjälä wrote: > > On Mon, Oct 14, 2013 at 04:07:44PM -0700, Jesse Barnes wrote: > > > This set adds bits needed for runtime power support, currently only > > > lightly tested on VLV/BYT: > > > 1) sus

Re: [Intel-gfx] [PATCH] drm/i915: Replace has_bsd/blt/vebox with a mask

On Tue, Oct 15, 2013 at 08:03:25AM -0700, Ben Widawsky wrote: > On Tue, Oct 15, 2013 at 09:50:39AM +0100, Chris Wilson wrote: > > On Mon, Oct 14, 2013 at 08:46:22PM -0700, Ben Widawsky wrote: > > > -cleanup_vebox_ring: > > > - intel_cleanup_ring_buffer(&dev_priv->ring[VECS]); > > > -cleanup_blt_rin

Re: [Intel-gfx] [PATCH] drm/i915: Replace has_bsd/blt/vebox with a mask

On Tue, Oct 15, 2013 at 09:50:39AM +0100, Chris Wilson wrote: > On Mon, Oct 14, 2013 at 08:46:22PM -0700, Ben Widawsky wrote: > > -cleanup_vebox_ring: > > - intel_cleanup_ring_buffer(&dev_priv->ring[VECS]); > > -cleanup_blt_ring: > > - intel_cleanup_ring_buffer(&dev_priv->ring[BCS]); > > -clean

[Intel-gfx] [PATCH 3/3] drm/i915: HSW GT3 Slices: Userspace can dynamically forcibly enable all slices

Rendering buffers that need full GT power can request full power through this I915_EXEC_GT_FULL flag. If the default is the power saving with half slices off it executes LRIs to immediately enable all slices. CC: Eric Anholt CC: Kenneth Graunke Signed-off-by: Rodrigo Vivi --- drivers/gpu/drm/i

[Intel-gfx] [PATCH 2/3] drm/i915: Slice Shutdown: Allow setting slice config (full x half) through sysfs

This patch introduces a sysfs interface to easily allow dynamically switch slice config default behaviour between full and half slices. Signed-off-by: Rodrigo Vivi --- drivers/gpu/drm/i915/i915_drv.h | 1 + drivers/gpu/drm/i915/i915_sysfs.c | 54 drivers/g

[Intel-gfx] [PATCH] testcases: Slice Shutdown sysfs switch and gt force full exec buffer flag.

Signed-off-by: Rodrigo Vivi --- tests/Makefile.am | 1 + tests/gt_slice_config.c | 227 2 files changed, 228 insertions(+) create mode 100644 tests/gt_slice_config.c diff --git a/tests/Makefile.am b/tests/Makefile.am index 0290ae0..cf105e

[Intel-gfx] [PATCH] i915_drm: add exec flag for request forcing Intel GT full.

Rendering buffers that need full GT power can request full power through this I915_EXEC_GT_FULL flag. If the default is the power saving with half slices off it executes LRIs to immediately enable all slices. Signed-off-by: Rodrigo Vivi --- include/drm/i915_drm.h | 3 +++ 1 file changed, 3 inser

[Intel-gfx] [PATCH 1/3] drm/i915: Allow GT Slices Shutdown on Boot.

Slices shutdown is a power savings feature present on Haswell GT3 whereby parts of HW i.e. slice is shut off on boot or dynamically to save power. This patch only introduces a way to disable half of Haswell GT3 slices on boot. Signed-off-by: Rodrigo Vivi --- drivers/gpu/drm/i915/i915_drv.c |

[Intel-gfx] [PATCH] drm/i915: Use pipe_name() instead of the pipe number

Yet another direct usage of the pipe number instead of pipe_name(). We've been tracking them lately but managed to miss this one. Signed-off-by: Damien Lespiau --- drivers/gpu/drm/i915/intel_display.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/in

Re: [Intel-gfx] [RFC] Runtime display PM for VLV/BYT

On Tue, 2013-10-15 at 11:06 +0300, Ville Syrjälä wrote: > On Mon, Oct 14, 2013 at 04:07:44PM -0700, Jesse Barnes wrote: > > This set adds bits needed for runtime power support, currently only > > lightly tested on VLV/BYT: > > 1) suspend/resume callbacks for different platforms > > 2) save/rest

Re: [Intel-gfx] [PATCH 14/16] drm/i915: Add watermark tracepoints

On Tue, Oct 15, 2013 at 01:11:49PM +0300, Ville Syrjälä wrote: > On Tue, Oct 15, 2013 at 10:43:31AM +0200, Daniel Vetter wrote: > > On Fri, Oct 11, 2013 at 04:40:24PM -0300, Paulo Zanoni wrote: > > > 2013/10/9 : > > > > From: Ville Syrjälä > > > > > > > > We may want to know what kind of watermar

Re: [Intel-gfx] [PATCH 14/16] drm/i915: Add watermark tracepoints

On Tue, Oct 15, 2013 at 10:43:31AM +0200, Daniel Vetter wrote: > On Fri, Oct 11, 2013 at 04:40:24PM -0300, Paulo Zanoni wrote: > > 2013/10/9 : > > > From: Ville Syrjälä > > > > > > We may want to know what kind of watermarks got computed and programmed > > > into the hardware. Using tracepoints i

Re: [Intel-gfx] [RFC] Runtime display PM for VLV/BYT

On Mon, Oct 14, 2013 at 04:07:44PM -0700, Jesse Barnes wrote: > 5) more testing - I think the load time ref is still busted here and > on HSW I've chatted quite a bit yesterday with Paulo about how we can test runtime pm better, since he wanted to get started with testing D3 while vpg is co

Re: [Intel-gfx] [PATCH 16/16] drm/i915: Rename ilk_check_wm to ilk_validate_wm_level

On Fri, Oct 11, 2013 at 02:08:07PM -0300, Paulo Zanoni wrote: > 2013/10/9 : > > From: Ville Syrjälä > > > > Makes the behaviour of the function more clear. > > > > Signed-off-by: Ville Syrjälä > > Thanks :) > > Reviewed-by: Paulo Zanoni With the exception of the tracepoint patch I've merged

Re: [Intel-gfx] [PATCH 0/2] drm/i915: fix hdmi audio pixel clock config

Thanks for this, Will apply the patches and test ASAP! On Mon, Oct 14, 2013 at 6:02 PM, Jani Nikula wrote: > This is a completely untested and possibly naïve attempt at fixing [1] > and [2]. Based on top of drm-intel-nightly branch of [3]. > > David, Jasper, please give it a try. > > Thanks, > J

Re: [Intel-gfx] [PATCH] drm/i915: Replace has_bsd/blt/vebox with a mask

On Mon, Oct 14, 2013 at 08:46:22PM -0700, Ben Widawsky wrote: > -cleanup_vebox_ring: > - intel_cleanup_ring_buffer(&dev_priv->ring[VECS]); > -cleanup_blt_ring: > - intel_cleanup_ring_buffer(&dev_priv->ring[BCS]); > -cleanup_bsd_ring: > - intel_cleanup_ring_buffer(&dev_priv->ring[VCS]);

Re: [Intel-gfx] [PATCH 14/16] drm/i915: Add watermark tracepoints

On Fri, Oct 11, 2013 at 04:40:24PM -0300, Paulo Zanoni wrote: > 2013/10/9 : > > From: Ville Syrjälä > > > > We may want to know what kind of watermarks got computed and programmed > > into the hardware. Using tracepoints is much leaner than debug prints. > > > > Also add trace call for the waterm

Re: [Intel-gfx] Patch for crashing intel server

On Tue, Oct 15, 2013 at 03:46:08AM +0200, Bas Wijnen wrote: > On Sun, Oct 13, 2013 at 10:43:49AM +0100, Chris Wilson wrote: > > > > > My X server was crashing when playing video, and I wrote a patch to > > > > > fix > > > > > it. Please find the background and the patch at > > > > > http://bugs.d

Re: [Intel-gfx] [PATCH 09/16] drm/i915: Store current watermark state in dev_priv->wm

On Fri, Oct 11, 2013 at 11:21:04AM -0300, Paulo Zanoni wrote: > 2013/10/9 : [snip] > > + previous.enable_fbc_wm = !(I915_READ(DISP_ARB_CTL) & > > DISP_FBC_WM_DIS); > > + > > + if (memcmp(results, &previous, sizeof(*results)) == 0) > > This may cause problems since we're also compar

Re: [Intel-gfx] [RFC] Runtime display PM for VLV/BYT

On Mon, Oct 14, 2013 at 04:07:44PM -0700, Jesse Barnes wrote: > This set adds bits needed for runtime power support, currently only > lightly tested on VLV/BYT: > 1) suspend/resume callbacks for different platforms > 2) save/restore of display state across a power well toggle > 3) get/put of

Re: [Intel-gfx] [PATCH] drm/i915/dp: constify link_status

On Tue, Oct 15, 2013 at 09:36:08AM +0300, Jani Nikula wrote: > Follow-up to > commit 0aec288130713cf7bcf97c929ac5fab6a8e00e44 > Author: Jani Nikula > Date: Fri Sep 27 19:01:01 2013 +0300 > > drm/dp: constify DP DPCD helpers > > Requested-by: Ville Syrjälä > Signed-off-by: Jani Nikula Qu

Re: [Intel-gfx] [PATCH] drm/i915/dp: constify link_status

On Tue, Oct 15, 2013 at 09:36:08AM +0300, Jani Nikula wrote: > Follow-up to > commit 0aec288130713cf7bcf97c929ac5fab6a8e00e44 > Author: Jani Nikula > Date: Fri Sep 27 19:01:01 2013 +0300 > > drm/dp: constify DP DPCD helpers > > Requested-by: Ville Syrjälä > Signed-off-by: Jani Nikula Re