Signed-off-by: Rodrigo Vivi <rodrigo.v...@gmail.com>
---
tests/Makefile.am | 1 +
tests/gt_slice_config.c | 227 ++++++++++++++++++++++++++++++++++++++++++++++++
2 files changed, 228 insertions(+)
create mode 100644 tests/gt_slice_config.c
diff --git a/tests/Makefile.am b/tests/Makefile.am
index 0290ae0..cf105e4 100644
--- a/tests/Makefile.am
+++ b/tests/Makefile.am
@@ -50,6 +50,7 @@ TESTS_progs_M = \
gem_tiled_blits \
gem_tiled_partial_pwrite_pread \
gem_write_read_ring_switch \
+ gt_slice_config \
kms_flip \
kms_render \
kms_setmode \
diff --git a/tests/gt_slice_config.c b/tests/gt_slice_config.c
new file mode 100644
index 0000000..635535e
--- /dev/null
+++ b/tests/gt_slice_config.c
@@ -0,0 +1,227 @@
+/*
+ * Copyright © 2013 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ *
+ * Authors:
+ * Rodrigo Vivi <rodrigo.v...@intel.com>
+ *
+ */
+
+/*
+ * Testcase: Test GT slice shutdown feature
+ *
+ * Test both:
+ * 1. sysfs slice config half/full switching
+ * 2. exec buffer flag requesting gt full.
+ */
+
+#define _GNU_SOURCE
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+#include <unistd.h>
+#include "drmtest.h"
+
+static void exec(int fd, uint32_t handle)
+{
+ struct drm_i915_gem_execbuffer2 execbuf;
+ struct drm_i915_gem_exec_object2 gem_exec[1];
+ uint32_t b[2] = {MI_BATCH_BUFFER_END};
+ int loops = 2000000;
+ int ret = 0;
+
+ gem_write(fd, handle, 0, b, sizeof(b));
+
+ gem_exec[0].handle = handle;
+ gem_exec[0].relocation_count = 0;
+ gem_exec[0].relocs_ptr = 0;
+ gem_exec[0].alignment = 0;
+ gem_exec[0].offset = 0;
+ gem_exec[0].flags = 0;
+ gem_exec[0].rsvd1 = 0;
+ gem_exec[0].rsvd2 = 0;
+
+ execbuf.buffers_ptr = (uintptr_t)gem_exec;
+ execbuf.buffer_count = 1;
+ execbuf.batch_start_offset = 0;
+ execbuf.batch_len = 8;
+ execbuf.cliprects_ptr = 0;
+ execbuf.num_cliprects = 0;
+ execbuf.DR1 = 0;
+ execbuf.DR4 = 0;
+ execbuf.flags = I915_EXEC_RENDER | I915_EXEC_GT_FULL;
+ i915_execbuffer2_set_context_id(execbuf, 0);
+ execbuf.rsvd2 = 0;
+
+ while (loops-- && ret == 0) {
+ ret = drmIoctl(fd,
+ DRM_IOCTL_I915_GEM_EXECBUFFER2,
+ &execbuf);
+ }
+ gem_sync(fd, handle);
+}
+
+static bool is_full(const int device)
+{
+ char *path;
+ FILE *file;
+ int ret;
+ char str[5];
+
+ ret = asprintf(&path, "/sys/class/drm/card%d/power/gt_slice_config",
+ device);
+ igt_assert(ret != -1);
+
+ file = fopen(path, "r");
+ igt_require(file);
+
+ ret = fscanf(file, "%s", str);
+ igt_assert(ret != 0);
+
+ fclose(file);
+ return strcmp(str, "half");
+}
+
+static int set_status(const int device, bool full)
+{
+ char *path;
+ FILE *file;
+ int ret;
+ char str[5];
+ int attempts = 10;
+
+ ret = asprintf(&path, "/sys/class/drm/card%d/power/gt_slice_config",
+ device);
+ igt_assert(ret != -1);
+
+ file = fopen(path, "r");
+ igt_require(file);
+
+ ret = fscanf(file, "%s", str);
+ igt_assert(ret != 0);
+
+ fclose(file);
+
+ if (full == strcmp(str, "half"))
+ return 0;
+
+ while (attempts-- && ret != 0) {
+ file = fopen(path, "w");
+ igt_require(file);
+ ret = fprintf(file, "%s\n", full ? "full": "half");
+ igt_assert(ret != -1);
+ ret = fclose(file);
+ sleep(1);
+ }
+ return ret;
+}
+
+int main(int argc, char **argv)
+{
+ char *path;
+ FILE *file;
+ unsigned int rc6_enabled;
+ int ret;
+ uint32_t handle;
+ const int device = drm_get_card();
+ const int fd = drm_open_any();
+ const int devid = intel_get_drm_devid(fd);
+ bool initial = is_full(device);
+
+ igt_skip_on_simulation();
+
+ igt_subtest_init(argc, argv);
+
+ igt_fixture {
+ /* On Haswell Slices on/off switch depends on RC6 exit */
+ ret = asprintf(&path, "/sys/class/drm/card%d/power/rc6_enable",
+ device);
+ igt_assert(ret != -1);
+
+ file = fopen(path, "r");
+ igt_require(file);
+
+ fscanf(file, "%u", &rc6_enabled);
+ fclose(file);
+ }
+
+ igt_subtest("sysfs") {
+ igt_require(IS_HASWELL(devid));
+ igt_require(rc6_enabled);
+
+ /* Switching states */
+ ret = set_status(device, !initial);
+ if (ret < 0)
+ igt_fail(ret);
+
+ /* Check if state has really changed */
+ if (initial == is_full(device)) {
+ fprintf(stderr,
+ "gt_slice_config status hasn't changed\n");
+ igt_fail(-1);
+ }
+ igt_success();
+ }
+
+ igt_subtest("execbuf") {
+ igt_require(IS_HASWELL(devid));
+ igt_require(rc6_enabled);
+
+ /* Disable half slices to test the forcefull via execbuf flag */
+ ret = set_status(device, false);
+ if (ret < 0)
+ igt_fail(ret);
+
+ igt_fork(child, 1) {
+ /* Start Render with I915_EXEC_GT_FULL*/
+ handle = gem_create(fd, 4096);
+ exec(fd, handle);
+ gem_close(fd, handle);
+ }
+
+ /* Check if forcing full is working */
+ sleep(1);
+ if (!is_full(device)) {
+ fprintf(stderr, "All slices should be enabled\n");
+ set_status(device, initial);
+ igt_fail(-1);
+ }
+
+ /* Wait for idleness */
+ igt_waitchildren();
+ sleep(3);
+
+ /* Check if it is back to half */
+ if (is_full(device)) {
+ fprintf(stderr, "Only half slices should be enabled\n");
+ set_status(device, initial);
+ igt_fail(-1);
+ }
+ set_status(device, initial);
+ igt_success();
+ }
+
+ igt_fixture {
+ close(fd);
+ }
+
+ igt_exit();
+}
--
1.7.11.7
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