[gem5-users] Latency_input ARM FS

2012-08-24 Thread Ali chaker
Hi, I'm running bbench in gem5 with this configuration: Dcache latency: 2.5 ns L2 latency: 15.8 ns Mem Latency: 100 ns and I've the following statistics: *system.l2.overall_avg_mshr_miss_latency::cpu.data 116713.648032* *system.l2.overall_avg_miss_latency::cpu.data 136045.358298* * *

[gem5-users] Running Android on gem5

2012-08-24 Thread Wahid
Hello, Please forgive me if I am TOTALLY new to the concept of architecture simulation. At this stage I am trying to get the picture by building and playing with the pre-compiled images. What i want: I saw in the latest  presentation in the tutorial part og gem5 wiki, the developers have set up

Re: [gem5-users] Running Android on gem5

2012-08-24 Thread Anthony Gutierrez
You can install APKs directly to a disk image by placing the .apk file in the /system/app directory. This has worked for me in the past. However, installing them doesn't guarantee that gem5 is able to run them. Angry Birds is a proprietary piece of software and the apk is only available for Androi

Re: [gem5-users] Question about instruction-based exit events.

2012-08-24 Thread Korey Sewell
Tony, check the nop count. That might be the difference that you are seeing. -Korey On Thu, Aug 23, 2012 at 1:24 PM, Anthony Gutierrez wrote: > Hello, > > It seems that the number of committed instructions don't always match up > with an instruction-based exit event, e.g., when using -I. The CPU

Re: [gem5-users] Question about instruction-based exit events.

2012-08-24 Thread Anthony Gutierrez
This is the part of the code where the committedInsts get's incremented, so it should match up with that and has nothing to do with the ops. -Tony On Fri, Aug 24, 2012 at 10:16 AM, Korey Sewell wrote: > Tony, > check the nop count. That might be the difference that you are seeing. > > -Korey >

Re: [gem5-users] Question about instruction-based exit events.

2012-08-24 Thread Korey Sewell
I'm saying that the nops may not get counted in committedInsts. Other users have reported issues when comparing the committed instruction count between CPU models and typically this is the problem. If you look in commit_impl.hh, around line 109, you'll see that instDone() will not get called if th

Re: [gem5-users] Question about instruction-based exit events.

2012-08-24 Thread Korey Sewell
typo: *around line 1009 On Fri, Aug 24, 2012 at 9:20 AM, Korey Sewell wrote: > I'm saying that the nops may not get counted in committedInsts. Other > users have reported issues when comparing the committed instruction > count between CPU models and typically this is the problem. > > If you look

Re: [gem5-users] Question about instruction-based exit events.

2012-08-24 Thread Anthony Gutierrez
I know nops don't get counted and I'm taking that into account. The -I option exits based on thread[tid]->numInst, this is incremented in the same way as committedInst, i.e., neither count nops. I can't see why if I exit on thread[tid]->numInst == 1000, the stats file shows something different. Th

Re: [gem5-users] Question about instruction-based exit events.

2012-08-24 Thread Korey Sewell
Also, counting of faulting instructions (do we double-count) can also get funny so you may want to double check that. What you can do is place an assert that compares the two differing numbers so that you find the exact spot where the inst counts start to diverge. On Fri, Aug 24, 2012 at 9:47 AM

Re: [gem5-users] 答复: ruby request latency and L1 miss rate

2012-08-24 Thread Nilay Vaish
On Thu, 23 Aug 2012, Xi Chen wrote: Hi Nilay, Yes, I've taken a look at the ruby.stats file. I'm a little confused about some naming issues, like: Request_type_LD, request_type_ST and request_type_ATOMIC, what is the difference of them? These names seem self explanatory. LD stands for load, S

Re: [gem5-users] segmentation fault when creating checkpoints for X86_FS+ruby

2012-08-24 Thread Cookie
Hi Nilay, Thank you for your reply. I did debug it with gdb and it reported the assertion "assert(isDeadlockEventScheduled() == false)" in mem/ruby/system/RubyPort.cc was failed. I've no idea how to fix it but just commented this statement and compiled and ran again. It reported segmentation fault

Re: [gem5-users] Trouble booting O3CPU on X86 FS

2012-08-24 Thread Mahshid Sedghi
Thanks Hao for the reply. So, are you booting the kernel with the o3cpu as well? There were a comment by one of the developers saying that people usually boot the system with an inorder cpu, take a checkpoint and then run their simulation using the o3cpu. Thanks, Mahshid On Tue, Aug 21, 2012 at 8

Re: [gem5-users] Segmentation fault running MOESI_CMP_token protocol with more than 128 cores in X86 SE

2012-08-24 Thread Nilay Vaish
On Fri, 24 Aug 2012, gem5 gem5 wrote: Hi , I run GEM5 with MOESI_CMP_token protocol for any cores below 128, it works well. However, when I run it with more than 128 cores, I get segmentation fault: command line: build/X86_SE/gem5.opt configs/example/ruby_random_test.py --num-cpus=130 --num-di

Re: [gem5-users] Segmentation fault running MOESI_CMP_token protocol with more than 128 cores in X86 SE

2012-08-24 Thread gem5 gem5
Hi Nilay, I got the callback information as follows. It seems to me that there is some address in Directory Entry got accessed but not allocated. But I dont know whyCan you please help me interpret this? thanks! Best, Jinzhu command line:build/X86_SE/gem5.debug configs/example/ruby_random_t

[gem5-users] adding a stat at the end of the simulation

2012-08-24 Thread Min Kyu Jeong
Hi, I am running a gem5 with some external simulator glued to it. I would like to have a single stats.txt file that also has stats from the external simulator. At first, I tried to pull the stats from the external simulator, and new Stat::Scalar()ed for each one of them, hoping that they register

Re: [gem5-users] adding a stat at the end of the simulation

2012-08-24 Thread Ali Saidi
You probably want a Stats::Value and set the functor() to a function that returns the stat. That functor will be called when the stats are dumped. Ali On 24.08.2012 19:29, Min Kyu Jeong wrote: > Hi, > > I am running a gem5 with some external simulator glued to it. I would like to have a

[gem5-users] How do I run multiprogram workloads on M5?

2012-08-24 Thread Nyunyi Tshibangu
I saw the following answer in FAQ: "In SE mode, simply create a system with multiple CPUs and assign a different workload object to each CPU's workload parameter. If you're using the O3 model, you can also assign a vector of workload objects to one CPU, in which case the CPU will run all of the wor