Hi Nagy/Ramana,
Please help us to review the attached patch and do let me know your comments .
No regress in the gcc.target suite for arm target.
Thank you
~Umesh
On Tue, Jul 17, 2018 at 4:01 PM, Umesh Kalappa wrote:
> Will do, thanks.
> Thanks
>
> On Tue, Jul 17, 2018, 3:
Reminder !!!
~Umesh
On Wed, Jul 18, 2018 at 6:01 PM, Umesh Kalappa wrote:
> Hi Nagy/Ramana,
>
> Please help us to review the attached patch and do let me know your comments .
>
> No regress in the gcc.target suite for arm target.
>
> Thank you
> ~Umesh
>
> O
Thank you all for your comments .
Wilco,
We tried some of the normalisation numbers and the fix works and please
could you help us with the input ,where if you see that fix breaks down.
Thank you again
~Umesh
On Fri, Jul 20, 2018, 7:07 PM Wilco Dijkstra wrote:
> Hi Umesh,
>
> Looking at your p
Dijkstra wrote:
> Umesh Kalappa wrote:
>
>> We tried some of the normalisation numbers and the fix works and please
>> could you help us with the input ,where if you see that fix breaks down.
>
> Well try any set of inputs which require normalisation. You'll find the
> R.
>
> On 23/07/18 08:46, Umesh Kalappa wrote:
>> Thank you Wilco for the inputs and we agree that the fix break down
>> for the case.
>>
>> Meanwhile ,attached patch will take care the inputs and we are testing
>> the patch vigorously ,would you r
Umesh Kalappa
+
+ PR libgcc/86512
+ * config/arm/ieee754-df.S :Don't normalise the denormal result.
+ * config/arm/ieee754-sf.S:Likewise.
+
+
+++ gcc/testsuite/ChangeLog (working copy)
@@ -1,3 +1,8 @@
+2018-07-18 Umesh Kalappa
+
+ PR libgcc/86512
+ * gcc.targe
Hi,
Any more suggestions or comments on the patch ?
Thank you
~Umesh
On Tue, Jul 24, 2018, 2:08 PM Umesh Kalappa
wrote:
> Thank you All for the suggestions and we tried runing the GCC
> testsuite and found that no regression with the fix and also ran the
> our regressions
Hi All,
Please find the attached patch for the subjected issue .
Do please let me know your thoughts and comments on the same .
Thank you
~Umesh
pr84762.patch
Description: Binary data
Thank you Jakub for the information.
Will make a note of it.
Umesh
On Tue, Dec 11, 2018, 17:58 Jakub Jelinek On Tue, Dec 11, 2018 at 05:30:48PM +0530, Umesh Kalappa wrote:
> > Hi All,
> >
> > Please find the attached patch for the subjected issue .
> >
> > Do pl
Thank you Segher, will work on your suggestions.
Umesh
On Tue, Dec 11, 2018, 19:23 Segher Boessenkool Hi Umesh,
>
> On Tue, Dec 11, 2018 at 05:30:48PM +0530, Umesh Kalappa wrote:
> > Please find the attached patch for the subjected issue .
> >
> > Do please let m
Hi All,
the following patch fix the subjected issue
Index: gcc/cp/parser.c
===
--- gcc/cp/parser.c (revision 266026)
+++ gcc/cp/parser.c (working copy)
@@ -24615,6 +24615,8 @@
{
tree expr;
cp_lexer_consume_
t know for any regressions .
Meanwhile ,Please let us know your thoughts on the patch.
Thank you
~Umesh
On Wed, Nov 14, 2018 at 2:55 AM Jason Merrill wrote:
>
> On Tue, Nov 13, 2018 at 10:40 AM Marek Polacek wrote:
> > On Tue, Nov 13, 2018 at 11:49:55AM +0530, Umesh Kalap
>>We are runing the make check-gcc(x86_64) and will let know for any
>>regressions .
No regress found .
~Umesh
On Wed, Nov 14, 2018 at 5:18 PM Umesh Kalappa wrote:
>
> Thank you Jason and Marek for the suggestions .
>
> Attached patch(pr86512.patch) along the Changel
My bad Marek and thank you for pointing that out.
Please find the attached correct one (pr52869.patch) .
~Umesh
pr52869.patch
Description: Binary data
>
> On Wed, Nov 14, 2018 at 09:55:39PM +0530, Umesh Kalappa wrote:
> > My bad Marek and thank you for pointing that out.
> >
> > Please find the attached correct one (pr52869.patch) .
>
> Index: gcc/cp/ChangeLog
> ===
Hi All,
The attached patch (pr85667.patch) fixes the subjected issue .
we tested on x86_64(linux and windows both) and no regress found .
ok to commit ?
Thank you
~Umesh
pr85667.patch
Description: Binary data
Edited the subjected for the proper PR no.
~Umesh
On Thu, Nov 15, 2018 at 2:32 PM Umesh Kalappa wrote:
>
> Hi All,
>
> The attached patch (pr85667.patch) fixes the subjected issue .
> we tested on x86_64(linux and windows both) and no regress found .
>
> ok to commit ?
>
> Thank you
> ~Umesh
Thank you Marek,Appreciate your valuable feedback on the patch .
Attached the latest ,please do let us know your thoughts.
~Umesh
On Thu, Nov 15, 2018 at 9:26 PM Marek Polacek wrote:
>
> On Thu, Nov 15, 2018 at 02:26:24PM +0530, Umesh Kalappa wrote:
> > Thank you Marek fo
Thank you Richard,
Made the required changes ,ok to commit ?
Thank you
~Umesh
On Thu, Nov 15, 2018 at 4:02 PM Richard Biener
wrote:
>
> On Thu, Nov 15, 2018 at 10:02 AM Umesh Kalappa
> wrote:
> >
> > Hi All,
> >
> > The attached patch (pr85667.patch) fixes th
My bad ,
attached the same now .
~Umesh
On Fri, Nov 16, 2018 at 2:38 PM Richard Biener
wrote:
>
> On Fri, Nov 16, 2018 at 9:07 AM Umesh Kalappa
> wrote:
> >
> > Thank you Richard,
> >
> > Made the required changes ,ok to commit ?
>
> Can you attach th
; On Fri, Nov 16, 2018 at 4:57 PM Jakub Jelinek wrote:
>>
>> On Fri, Nov 16, 2018 at 04:21:25PM +0530, Umesh Kalappa wrote:
>> > My bad ,
>> > attached the same now .
>>
>> +2018-11-15 Lokesh Janghel
>>
>> Two spaces before < instead of
Thank you for the inputs and please find the attachment for the update patch.
Do please let us know your comments on the same
~Umesh
On Tue, Nov 20, 2018 at 3:03 PM Jakub Jelinek wrote:
>
> On Mon, Nov 19, 2018 at 04:08:29PM +0530, Lokesh Janghel wrote:
> diff --git a/gcc/ChangeLog b/gcc/ChangeL
Hi Jakub and All,
We don't have the commit access ,can someone please commit for us ?
~Umesh
On Wed, Nov 21, 2018, 18:37 Jakub Jelinek On Wed, Nov 21, 2018 at 06:06:41PM +0530, Umesh Kalappa wrote:
> > Thank you for the inputs and please find the attachment for the update
> p
you
~Umesh
On Fri, Nov 23, 2018 at 3:56 PM Umesh Kalappa wrote:
>
> Hi Richard,
>
> for the subjected issue , we found few suggestions to handle the issue like
>
> 1. be more conservative(target specific) and defining the peephole in
> the md file to handle the patterns like a
>>Before getting started with reviewing the patch , the first question
is whether you have a copyright assignment on file or does your
employer have one on record with the FSF ?
Ramana, We asked for copyright assignment form ,with details asked by
copyright-cl...@fsf.org(craig)
@ ass...@gnu.org.
Thank you @Kito Cheng for early suggestions ,we will break down the patch like
suggested and address the below comments .
~U
-Original Message-
From: Kito Cheng
Sent: 11 April 2025 12:37
To: Umesh Kalappa
Cc: gcc-patches@gcc.gnu.org; kito.ch...@sifive.com; Jesse Huang
; pal
This is the first patch from the two-patch series, where configured gcc for
P8700 micro architecture in the first patch and
Tested with dejagnu riscv.exp tests for --mtune=mips-p8700.
P8700 is a high-performance processor from MIPS by extending RISCV. The
following changes enable P8700 proces
s more closely. If you have questions
>> about how the compiler uses them to make decisions, just ask
Sure ,and lets us tune the same and reach out here for future questions .
~U
-Original Message-
From: Jeff Law
Sent: 18 April 2025 22:42
To: Umesh Kalappa ; gcc-patches@gcc.gnu.
/riscv/mips-insn.md create mode 100644
gcc/config/riscv/mips-p8700.md create mode 100644
gcc/testsuite/gcc.target/riscv/mipscondmov.c
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 1326c67563a..d2642390b2a 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,24 @@
+2025-04-09 Umesh Kalappa
/* int_mul */
+ {COSTS_N_INSNS (8), COSTS_N_INSNS (8)}, /* int_div */
+ 4,/* issue_rate */
+ 8,/* branch_cost */
+ 4, /* memory_cost */
+ 8,/* fmv_cost */
+ true, /* slow_unaligned_access */
+ false,/* vector_unaligned_access *
Hi @Jeff Law and @pal...@dabbelt.com ,
Please do needful by reviewing the below changes and helps us to upstream the
same .
Thank you
~U
-Original Message-
From: Umesh Kalappa
Sent: 29 April 2025 16:16
To: Umesh Kalappa ; Jeff Law ;
gcc-patches@gcc.gnu.org
Cc: kito.ch...@sifive.com
Hi All ,
We have couple of patch series that enables the P8700 tune for RISCV core to
upstream for GCC mainline.
It will be good to hear from you guys on the patch feedback
Thank you in advance
~U
-Original Message-
From: Umesh Kalappa
Sent: 03 May 2025 11:27
To: Jeff Law ; gcc
---
gcc/config/riscv/mips-p8700.md | 139 +++
gcc/config/riscv/riscv-cores.def | 5 ++
gcc/config/riscv/riscv-opts.h| 3 +-
gcc/config/riscv/riscv.cc| 22 +
gcc/config/riscv/riscv.md| 3 +-
5 files changed, 170 insertions(+), 2 deletions
Sure @Palmer Dabbelt ,sent in a different thread email with updated patch.
Thank you
~U
-Original Message-
From: Palmer Dabbelt
Sent: 08 May 2025 23:38
To: Umesh Kalappa
Cc: jeffreya...@gmail.com; gcc-patches@gcc.gnu.org; kito.ch...@sifive.com;
jesse.hu...@sifive.com; Andrew
>> I've pushed this to the trunk as well.
Thank you Jeff ,
~U
On Tue, May 20, 2025 at 11:29 PM Jeff Law wrote:
>
>
> On 5/19/25 1:03 AM, Umesh Kalappa wrote:
> > ---
> > gcc/config/riscv/mips-p8700.md | 28
> > 1 file change
Tue, May 20, 2025 at 11:26 PM Jeff Law wrote:
>
>
> On 5/19/25 1:02 AM, Umesh Kalappa wrote:
> > ---
> > gcc/config/riscv/mips-p8700.md | 139 +++
> > gcc/config/riscv/riscv-cores.def | 5 ++
> > gcc/config/riscv/riscv-opts.
>>Every type listed in that attribute must have a mapping to a function unit in
>>your scheduler model
Thank you Jeff and added the dummies reservation for the leftout attributes and
tested with dejagnu riscv.exp.
Thank you again for reference
~U
---
gcc/config/riscv/mips-p8700.md | 28
1 file changed, 28 insertions(+)
diff --git a/gcc/config/riscv/mips-p8700.md b/gcc/config/riscv/mips-p8700.md
index 11d0b1ca793..ae0ea8dc896 100644
--- a/gcc/config/riscv/mips-p8700.md
+++ b/gcc/config/riscv/mips-p8700.md
@@ -3
---
gcc/config/riscv/mips-p8700.md | 139 +++
gcc/config/riscv/riscv-cores.def | 5 ++
gcc/config/riscv/riscv-opts.h| 3 +-
gcc/config/riscv/riscv.cc| 22 +
gcc/config/riscv/riscv.md| 3 +-
5 files changed, 170 insertions(+), 2 deletions
The P8700 is a high-performance processor from MIPS by extending RISCV with
the MIPS custom instruction and the following changes are added to enable the
conditional move support from mips.
No regression found for "runtest --tool gcc
--target_board='riscv-sim/-mabi=lp64d/-mcmodel=medlow/-mtune=m
The P8700 is a high-performance processor from MIPS by extending RISCV with
the MIPS custom instruction and the following changes are added to enable the
conditional move support from mips
No regressions are found for "runtest --tool gcc
--target_board='riscv-sim/-mabi=lp64d/-mcmodel=medlow/-mtu
Hi all,
Sorry for the noise ,looks like patch was truncated and will be sending a
new email with proper patch for the same.
Thank you and again my apologies for the noise.
~U
On Tue, May 27, 2025 at 3:41 PM Umesh Kalappa
wrote:
> The P8700 is a high-performance processor from MIPS
Hi @Jeff Law , @pal...@dabbelt.com
and all ,
Please can you pass your comments on the below changes ,thank you
~U
On Tue, May 27, 2025 at 4:36 PM Umesh Kalappa
wrote:
> The P8700 is a high-performance processor from MIPS by extending RISCV with
> the MIPS custom instruction a
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