elieve I asked for that back in
> one of the reviews even?
Yes, that is what I would like to do in this PATCH, as the following up of some
comments from Robin in previous.
Pan
-Original Message-----
From: Robin Dapp
Sent: Monday, October 2, 2023 4:26 PM
To: Jeff Law ; Li, Pan2 ;
gcc-p
Committed, thanks Jeff and Robin.
Pan
-Original Message-
From: Jeff Law
Sent: Wednesday, October 4, 2023 11:40 PM
To: Robin Dapp ; Juzhe-Zhong ;
gcc-patches@gcc.gnu.org
Cc: kito.ch...@gmail.com; kito.ch...@sifive.com
Subject: Re: [PATCH] RISC-V: Remove @ of vec_series
On 10/4/23 09:
Committed, thanks Kito.
Pan
From: Kito Cheng
Sent: Friday, October 6, 2023 11:09 AM
To: Li, Pan2
Cc: GCC Patches ; 钟居哲 ; Wang,
Yanzhang
Subject: Re: [PATCH v1] RISC-V: Update comments for FP rounding related autovec
LGTM
mailto:pan2...@intel.com>> 於 2023年10月6日 週五 10:39 寫道：
From:
Thanks Jeff, committed with a better Changelog as your suggestion.
Pan
-Original Message-
From: Jeff Law
Sent: Saturday, October 7, 2023 12:53 PM
To: Li, Pan2 ; gcc-patches@gcc.gnu.org
Cc: juzhe.zh...@rivai.ai; Wang, Yanzhang ;
kito.ch...@gmail.com
Subject: Re: [PATCH v1] RISC-V
Committed, thanks Jeff.
Pan
-Original Message-
From: Jeff Law
Sent: Saturday, October 7, 2023 10:48 PM
To: Juzhe-Zhong ; gcc-patches@gcc.gnu.org
Cc: kito.ch...@gmail.com; kito.ch...@sifive.com; rdapp@gmail.com
Subject: Re: [PATCH] RISC-V: Enable more tests of "vect" for RVV
On 10
Committed, thanks Jeff.
Pan
-Original Message-
From: Jeff Law
Sent: Saturday, October 7, 2023 10:44 PM
To: Juzhe-Zhong ; gcc-patches@gcc.gnu.org
Cc: rguent...@suse.de
Subject: Re: [PATCH] TEST: Fix XPASS of TSVC testsuites for RVV
On 10/7/23 03:23, Juzhe-Zhong wrote:
> Fix these foll
Committed, thanks Jeff.
Pan
-Original Message-
From: Jeff Law
Sent: Sunday, October 8, 2023 12:13 AM
To: Wang, Yanzhang ; gcc-patches@gcc.gnu.org
Cc: juzhe.zh...@rivai.ai; kito.ch...@sifive.com; Li, Pan2
Subject: Re: [PATCH] RISC-V: add static-pie support
On 10/7/23 05:32
Sure thing, will send V2 for this change.
Pan
From: juzhe.zh...@rivai.ai
Sent: Monday, October 9, 2023 5:04 PM
To: Li, Pan2 ; gcc-patches
Cc: Li, Pan2 ; Wang, Yanzhang ;
kito.cheng
Subject: Re: [PATCH v1] RISC-V: Refine bswap16 auto vectorization code gen
Remove these functions:
+static
Committed, thanks Richard.
Pan
-Original Message-
From: Richard Biener
Sent: Monday, October 9, 2023 9:07 PM
To: Juzhe-Zhong
Cc: gcc-patches@gcc.gnu.org; jeffreya...@gmail.com
Subject: Re: [PATCH] RISC-V Regression test: Fix FAIL of pr45752.c for RVV
On Mon, 9 Oct 2023, Juzhe-Zhong wr
Committed, thanks Juzhe.
Pan
From: juzhe.zh...@rivai.ai
Sent: Monday, October 9, 2023 9:11 PM
To: Li, Pan2 ; gcc-patches
Cc: Li, Pan2 ; Wang, Yanzhang ;
kito.cheng
Subject: Re: [PATCH v2] RISC-V: Refine bswap16 auto vectorization code gen
LGTM now.
Thanks
Committed, thanks Robin.
Pan
-Original Message-
From: Robin Dapp
Sent: Monday, October 9, 2023 9:54 PM
To: Juzhe-Zhong ; gcc-patches@gcc.gnu.org
Cc: rdapp@gmail.com; kito.ch...@gmail.com; kito.ch...@sifive.com;
jeffreya...@gmail.com
Subject: Re: [PATCH V2] RISC-V: Support movmisali
Committed, thanks Jeff.
Pan
-Original Message-
From: Jeff Law
Sent: Monday, October 9, 2023 9:49 PM
To: Juzhe-Zhong ; gcc-patches@gcc.gnu.org
Cc: rguent...@suse.de
Subject: Re: [PATCH] RISC-V Regression test: Adapt SLP tests like ARM SVE
On 10/9/23 07:37, Juzhe-Zhong wrote:
> Like AR
Committed, thanks Jeff.
Pan
-Original Message-
From: Jeff Law
Sent: Monday, October 9, 2023 9:52 PM
To: Juzhe-Zhong ; gcc-patches@gcc.gnu.org
Cc: rguent...@suse.de
Subject: Re: [PATCH] RISC-V Regression test: Fix FAIL of slp-reduc-4.c for RVV
On 10/9/23 07:41, Juzhe-Zhong wrote:
> RV
Committed, thanks Jeff.
Pan
-Original Message-
From: Jeff Law
Sent: Monday, October 9, 2023 9:53 PM
To: Juzhe-Zhong ; gcc-patches@gcc.gnu.org
Cc: rguent...@suse.de
Subject: Re: [PATCH] RISC-V Regression test: Fix FAIL of slp-12a.c
On 10/9/23 07:35, Juzhe-Zhong wrote:
> This case is v
Committed, thanks Jeff.
Pan
-Original Message-
From: Jeff Law
Sent: Monday, October 9, 2023 9:53 PM
To: Juzhe-Zhong ; gcc-patches@gcc.gnu.org
Cc: rguent...@suse.de
Subject: Re: [PATCH] RISC-V Regression tests: Fix FAIL of pr97832* for RVV
On 10/9/23 07:15, Juzhe-Zhong wrote:
> These
Committed, thanks Jeff.
Pan
-Original Message-
From: Jeff Law
Sent: Monday, October 9, 2023 10:28 PM
To: juzhe.zhong
Cc: gcc-patches@gcc.gnu.org; rguent...@suse.de
Subject: Re: [PATCH] RISC-V Regression test: Fix slp-perm-4.c FAIL for RVV
On 10/9/23 08:21, juzhe.zhong wrote:
> Do yo
Committed, thanks Kito.
Pan
-Original Message-
From: Kito Cheng
Sent: Tuesday, October 10, 2023 11:20 AM
To: Juzhe-Zhong
Cc: gcc-patches@gcc.gnu.org; kito.ch...@gmail.com; jeffreya...@gmail.com;
rdapp@gmail.com
Subject: Re: [PATCH] RISC-V: Add available vector size for RVV
LGTM
Committed, thanks Jeff.
Pan
-Original Message-
From: Jeff Law
Sent: Tuesday, October 10, 2023 9:24 PM
To: Juzhe-Zhong ; gcc-patches@gcc.gnu.org
Cc: rguent...@suse.de
Subject: Re: [PATCH] RISC-V Regression: Fix FAIL of pr65947-8.c for RVV
On 10/10/23 06:55, Juzhe-Zhong wrote:
> This t
Committed, thanks Jeff.
Pan
-Original Message-
From: Jeff Law
Sent: Tuesday, October 10, 2023 9:47 PM
To: Juzhe-Zhong ; gcc-patches@gcc.gnu.org
Cc: rguent...@suse.de; rdapp@gmail.com
Subject: Re: [PATCH] RISC-V Regression: Make match patterns more accurate
On 10/9/23 20:47, Juzhe
Committed, thanks Jeff.
Pan
-Original Message-
From: Jeff Law
Sent: Tuesday, October 10, 2023 9:49 PM
To: Juzhe-Zhong ; gcc-patches@gcc.gnu.org
Cc: rguent...@suse.de
Subject: Re: [PATCH] RISC-V Regression: Fix FAIL of predcom-2.c
On 10/9/23 20:58, Juzhe-Zhong wrote:
> Like GCN, add -
Committed, thanks Jeff.
Pan
-Original Message-
From: Jeff Law
Sent: Tuesday, October 10, 2023 11:29 PM
To: Juzhe-Zhong ; gcc-patches@gcc.gnu.org
Cc: rguent...@suse.de
Subject: Re: [PATCH] RISC-V Regression: Fix FAIL of vect-multitypes-16.c for RVV
On 10/10/23 08:49, Juzhe-Zhong wrote
Committed, thanks Jeff.
Pan
-Original Message-
From: Jeff Law
Sent: Tuesday, October 10, 2023 11:26 PM
To: Juzhe-Zhong ; gcc-patches@gcc.gnu.org
Cc: rguent...@suse.de
Subject: Re: [PATCH] RISC-V Regression: Make pattern match more accurate of
vect-live-2.c
On 10/10/23 08:57, Juzhe-Z
Committed, thanks Robin.
Pan
-Original Message-
From: Robin Dapp
Sent: Wednesday, October 11, 2023 5:56 PM
To: Juzhe-Zhong ; gcc-patches@gcc.gnu.org
Cc: rdapp@gmail.com; kito.ch...@gmail.com; kito.ch...@sifive.com;
jeffreya...@gmail.com
Subject: Re: [PATCH V3] RISC-V: Fix incorrect
Committed, thanks Juzhe.
Pan
From: juzhe.zh...@rivai.ai
Sent: Thursday, October 12, 2023 10:02 AM
To: Li, Pan2 ; gcc-patches
Cc: Li, Pan2 ; Wang, Yanzhang ;
kito.cheng
Subject: Re: [PATCH v1] RISC-V: Support FP irintf auto vectorization
LGTM。 Thanks
Committed, thanks Juzhe.
Pan
From: juzhe.zh...@rivai.ai
Sent: Thursday, October 12, 2023 11:34 AM
To: Li, Pan2 ; gcc-patches
Cc: Li, Pan2 ; Wang, Yanzhang ;
kito.cheng
Subject: Re: [PATCH v1] RISC-V: Support FP llrint auto vectorization
LGTM
juzhe.zh
Pan
-Original Message-
From: Kito Cheng
Sent: Thursday, October 12, 2023 1:05 PM
To: Li, Pan2
Cc: juzhe.zh...@rivai.ai; gcc-patches ; Wang, Yanzhang
Subject: Re: [PATCH v1] RISC-V: Support FP llrint auto vectorization
Did I miss something? the title says support but it seems only testcase??
On
Sure thing, thanks a lot and will follow the guidance.
Pan
From: Kito Cheng
Sent: Thursday, October 12, 2023 10:42 PM
To: Li, Pan2
Cc: 钟居哲 ; gcc-patches ; Wang,
Yanzhang
Subject: Re: [PATCH v1] RISC-V: Support FP llrint auto vectorization
I would prefer first approach since it no changes
Committed, thanks Juzhe.
Pan
From: juzhe.zh...@rivai.ai
Sent: Friday, October 13, 2023 10:26 AM
To: Li, Pan2 ; gcc-patches
Cc: Li, Pan2 ; Wang, Yanzhang ;
kito.cheng
Subject: Re: [PATCH v1] RISC-V: Leverage stdint-gcc.h for RVV test cases
LGTM。
juzhe.zh
Committed, thanks Juzhe.
Pan
From: juzhe.zhong
Sent: Friday, October 13, 2023 1:39 PM
To: Li, Pan2
Cc: gcc-patches@gcc.gnu.org; Li, Pan2 ; Wang, Yanzhang
; kito.ch...@gmail.com
Subject: Re: [PATCH v1] RISC-V: Add test for FP iroundf auto vectorization
lgtm
Replied Message
From
pan2
Committed, thanks Juzhe.
Pan
From: juzhe.zh...@rivai.ai
Sent: Friday, October 13, 2023 2:19 PM
To: Li, Pan2 ; gcc-patches
Cc: Li, Pan2 ; Wang, Yanzhang ;
kito.cheng
Subject: Re: [PATCH v1] RISC-V: Add test for FP llround auto vectorization
OK
juzhe.zh
Committed, thanks Juzhe.
Pan
From: juzhe.zh...@rivai.ai
Sent: Friday, October 13, 2023 3:33 PM
To: Li, Pan2 ; gcc-patches
Cc: Li, Pan2 ; Wang, Yanzhang ;
kito.cheng
Subject: Re: [PATCH v1] RISC-V: Add test for FP llceil auto vectorization
OK
juzhe.zh
Committed, thanks Juzhe.
Pan
From: juzhe.zh...@rivai.ai
Sent: Friday, October 13, 2023 4:08 PM
To: Li, Pan2 ; gcc-patches
Cc: Li, Pan2 ; Wang, Yanzhang ;
kito.cheng
Subject: Re: [PATCH v1] RISC-V: Add test for FP iceil auto vectorization
Ok
juzhe.zh
Committed, thanks Juzhe.
Pan
From: juzhe.zh...@rivai.ai
Sent: Friday, October 13, 2023 4:42 PM
To: Li, Pan2 ; gcc-patches
Cc: Li, Pan2 ; Wang, Yanzhang ;
kito.cheng
Subject: Re: [PATCH v1] RISC-V: Add test for FP ifloor auto vectorization
OK
juzhe.zh
Committed, thanks Juzhe.
Pan
From: juzhe.zh...@rivai.ai
Sent: Friday, October 13, 2023 6:31 PM
To: Li, Pan2 ; gcc-patches
Cc: Li, Pan2 ; Wang, Yanzhang ;
kito.cheng
Subject: Re: [PATCH v1] RISC-V: Add test for FP llfloor auto vectorization
OK
juzhe.zh
Committed, thanks Richard.
Pan
-Original Message-
From: Richard Biener
Sent: Friday, October 13, 2023 8:00 PM
To: Juzhe-Zhong
Cc: gcc-patches@gcc.gnu.org; jeffreya...@gmail.com
Subject: Re: [PATCH] RISC-V Regression: Fix FAIL of bb-slp-68.c for RVV
On Fri, 13 Oct 2023, Juzhe-Zhong wro
Thanks Richard, let's wait for a while incase there are comments from others
due to not familiar with these parts.
Pan
-Original Message-
From: Richard Biener
Sent: Wednesday, October 18, 2023 2:34 PM
To: Li, Pan2
Cc: gcc-patches@gcc.gnu.org; juzhe.zh...@rivai.ai; Wang, Yan
-assembler-times \\tclz\\tz[0-9]+\\.d,
p[0-7]/m, z[0-9]+\\.d\\n 2
... and 7 more entries
Pan
-Original Message-
From: Richard Biener
Sent: Wednesday, October 18, 2023 2:34 PM
To: Li, Pan2
Cc: gcc-patches@gcc.gnu.org; juzhe.zh...@rivai.ai; Wang, Yanzhang
; kito.ch...@gmail.com; Liu
Committed, thanks Juzhe.
Pan
Yes, it is required by the second cvt. The unmasked elements keep the original
values.
Pan
From: juzhe.zh...@rivai.ai
Sent: Monday, October 23, 2023 9:35 AM
To: Li, Pan2 ; gcc-patches
Cc: Li, Pan2 ; Wang, Yanzhang ;
kito.cheng
Subject: Re: [PATCH v1] RISC-V: Bugfix for merging undefined tmp
Committed, thanks Juzhe.
Pan
From: juzhe.zh...@rivai.ai
Sent: Monday, October 23, 2023 9:44 AM
To: Li, Pan2 ; gcc-patches
Cc: Wang, Yanzhang ; kito.cheng
Subject: Re: RE: [PATCH v1] RISC-V: Bugfix for merging undefined tmp register
in math
OK。 LGTM
Committed, thanks Jeff.
Pan
-Original Message-
From: Jeff Law
Sent: Monday, October 23, 2023 10:24 AM
To: Juzhe-Zhong ; gcc-patches@gcc.gnu.org
Cc: kito.ch...@gmail.com; kito.ch...@sifive.com; rdapp@gmail.com
Subject: Re: [PATCH] RISC-V: Fix AVL_TYPE attribute of tuple mode mov
O
Committed, thanks Juzhe.
Pan
From: juzhe.zh...@rivai.ai
Sent: Monday, October 23, 2023 3:56 PM
To: Li, Pan2 ; gcc-patches
Cc: Li, Pan2 ; Wang, Yanzhang ;
kito.cheng
Subject: Re: [PATCH v1] RISC-V: Bugfix for merging undef tmp register for trunc
LGTM
Committed, thanks Juzhe.
Pan
From: juzhe.zh...@rivai.ai
Sent: Monday, October 23, 2023 5:57 PM
To: Li, Pan2 ; gcc-patches
Cc: Li, Pan2 ; Wang, Yanzhang ;
kito.cheng
Subject: Re: [PATCH v1] RISC-V: Remove unnecessary asm check for vec cvt
LGTM。
juzhe.zh
Committed, thanks Kito.
Pan
From: Kito Cheng
Sent: Monday, October 23, 2023 5:50 PM
To: Juzhe-Zhong
Cc: GCC Patches ; Kito Cheng ;
Jeff Law ; Robin Dapp
Subject: Re: [PATCH V2] RISC-V: Fix ICE for the fusion case from vsetvl to
scalar move[PR111927]
LGTM
Juzhe-Zhong mailto:juzhe.zh...@riva
Just apply v2 version for RV32 with spike riscv-sim for confirmation.
This patch only increased 2 popcount run failures as well as 2 dump failures,
and the mask_gather_load_run-11.c is PASS within spike.
Pan
-Original Message-
From: juzhe.zh...@rivai.ai
Sent: Thursday, October 26, 202
DI 104).
The restriction removing make the vector rtl enter expand_fn_using_insn and of
course hit the INTEGER_P assertion.
Pan
-Original Message-
From: Richard Biener
Sent: Thursday, October 26, 2023 4:38 PM
To: Li, Pan2
Cc: gcc-patches@gcc.gnu.org; juzhe.zh...@rivai.ai; Wang, Ya
change may make the llrintf
(SF => DI) not working on standard name.
Let me have a try and keep you posted.
Pan
-Original Message-
From: Richard Biener
Sent: Thursday, October 26, 2023 10:00 PM
To: Li, Pan2
Cc: gcc-patches@gcc.gnu.org; juzhe.zh...@rivai.ai; Wang, Yanzhang
andard name lrintmn2 (m, n mode) is allowed here, while rintm2
(only m mode) isn't.
Pan
-Original Message-
From: Richard Sandiford
Sent: Friday, October 27, 2023 1:47 AM
To: Richard Biener
Cc: Li, Pan2 ; gcc-patches@gcc.gnu.org;
juzhe.zh...@rivai.ai; Wang, Yanzhang ;
kito.ch...@gmail.c
Committed, thanks Jeff.
Pan
-Original Message-
From: Jeff Law
Sent: Saturday, October 28, 2023 11:00 PM
To: Li, Pan2 ; gcc-patches@gcc.gnu.org
Cc: juzhe.zh...@rivai.ai; Wang, Yanzhang ;
kito.ch...@gmail.com
Subject: Re: [PATCH v1] RISC-V: Fix one range-loop-construct warning of
Should be fixed by the below PATCH, feel free to ping me if any issues.
https://gcc.gnu.org/pipermail/gcc-patches/2023-October/634616.html
Pan
-Original Message-
From: Andreas Schwab
Sent: Saturday, October 28, 2023 4:16 PM
To: 钟居哲
Cc: patrick ; gcc-patches ;
kito.cheng ; rdapp.gcc
Committed, thanks Robin.
Pan
-Original Message-
From: Robin Dapp
Sent: Monday, October 30, 2023 3:42 PM
To: Juzhe-Zhong ; gcc-patches@gcc.gnu.org
Cc: rdapp@gmail.com; kito.ch...@sifive.com; kito.ch...@gmail.com;
jeffreya...@gmail.com
Subject: Re: [PATCH] RISC-V: Fix bugs of handlin
Thanks xuli for enabling this feature, we can update the CI of
rvv-intrinsic-doc for overloaded API(s) after committed.
Pan
-Original Message-
From: Li Xu
Sent: Tuesday, October 31, 2023 7:37 PM
To: juzhe.zh...@rivai.ai
Cc: gcc-patches ; kito.cheng ;
palmer
Subject: Re: Re: [PATCH v6
Passed the x86 bootstrap and regression tests.
Pan
-Original Message-
From: Juzhe-Zhong
Sent: Tuesday, October 31, 2023 5:59 PM
To: gcc-patches@gcc.gnu.org
Cc: rguent...@suse.de; jeffreya...@gmail.com; richard.sandif...@arm.com;
rdapp@gmail.com; Juzhe-Zhong
Subject: [PATCH V2] OPT
Passed the x86 bootstrap and regression tests.
Pan
-Original Message-
From: Juzhe-Zhong
Sent: Tuesday, October 31, 2023 6:08 PM
To: gcc-patches@gcc.gnu.org
Cc: richard.sandif...@arm.com; rguent...@suse.de; jeffreya...@gmail.com;
Juzhe-Zhong
Subject: [PATCH] VECT: Support mask_len_stri
> can you instead amend vectorizable_internal_function to contain the check,
> returning IFN_LAST if it doesn't hold?
Sure, will send v4 for this.
Pan
-Original Message-
From: Richard Biener
Sent: Tuesday, October 31, 2023 8:58 PM
To: Li, Pan2
Cc: gcc-patches@gcc.gnu.or
The below test are passed for this patch.
* The x86 bootstrap and regression test.
* The aarch64 regression test.
* The risc-v regression tests.
* Ensure the lrintf standard name in RVV.
Pan
-Original Message-
From: Li, Pan2
Sent: Tuesday, October 31, 2023 11:10 PM
To: gcc-patches
Committed, thanks Jeff.
Pan
-Original Message-
From: Jeff Law
Sent: Thursday, November 2, 2023 3:02 AM
To: Juzhe-Zhong ; gcc-patches@gcc.gnu.org
Cc: kito.ch...@gmail.com; kito.ch...@sifive.com; rdapp@gmail.com
Subject: Re: [PATCH] RISC-V: Allow dest operand and accumulator operand o
Committed, thanks Richard.
Pan
-Original Message-
From: Richard Biener
Sent: Thursday, November 2, 2023 12:43 AM
To: Li, Pan2
Cc: gcc-patches@gcc.gnu.org; juzhe.zh...@rivai.ai; Wang, Yanzhang
; kito.ch...@gmail.com; Liu, Hongtao
Subject: Re: [PATCH v4] VECT: Refine the type size
Committed, thanks Robin.
Pan
-Original Message-
From: Robin Dapp
Sent: Thursday, November 2, 2023 7:34 PM
To: Juzhe-Zhong ; gcc-patches@gcc.gnu.org
Cc: rdapp@gmail.com; kito.ch...@gmail.com; kito.ch...@sifive.com;
jeffreya...@gmail.com
Subject: Re: [PATCH] RISC-V: Fix bug of AVL pr
Committed, thanks Juzhe.
Pan
From: juzhe.zhong
Sent: Thursday, November 2, 2023 8:04 PM
To: Li, Pan2
Cc: gcc-patches@gcc.gnu.org; Li, Pan2 ; Wang, Yanzhang
; kito.ch...@gmail.com
Subject: Re: [PATCH v1] RISC-V: Refactor prefix [I/L/LL] rounding API autovec
iterator
lgtm
Replied Message
e
> order for example.
This should be one problem here, I may need more consideration here regarding
different backends.
Pan
-Original Message-
From: Richard Biener
Sent: Thursday, November 2, 2023 4:20 PM
To: Li, Pan2
Cc: gcc-patches@gcc.gnu.org; juzhe.zh...@rivai.ai; Wang, Yanz
Thanks Patrick.
It caused by the underlying codegen is not implemented but expand modes opened.
Revert it first to unblock others and will fix it ASAP.
Pan
From: Patrick O'Neill
Sent: Friday, November 3, 2023 6:57 AM
To: Li, Pan2 ; juzhe.zhong
Cc: gcc-patches@gcc.gnu.org; Wang, Yan
Committed as passed the regression test of aarch64, thanks Richard.
Pan
-Original Message-
From: Richard Biener
Sent: Friday, November 3, 2023 3:36 PM
To: Juzhe-Zhong
Cc: gcc-patches@gcc.gnu.org; richard.sandif...@arm.com
Subject: Re: [tree-optimization/111721 V2] VECT: Support SLP for
Committed, thanks Juzhe.
Pan
From: 钟居哲
Sent: Saturday, November 4, 2023 9:43 AM
To: Li, Pan2 ; gcc-patches
Cc: Li, Pan2 ; Wang, Yanzhang ;
kito.cheng
Subject: Re: [PATCH v1] RISC-V: Remove HF modes of FP to INT rounding autovec
LGTM.
juzhe.zh...@rivai.ai
Committed, thanks Juzhe.
Pan
From: juzhe.zhong
Sent: Sunday, November 5, 2023 5:40 PM
To: Li, Pan2
Cc: gcc-patches@gcc.gnu.org; Li, Pan2 ; Wang, Yanzhang
; kito.ch...@gmail.com
Subject: Re: [PATCH v1] RISC-V: Support FP rint to i/l/ll diff size autovec
lgtm
Replied Message
From
Sure thing.
Pan
-Original Message-
From: Vineet Gupta
Sent: Saturday, March 2, 2024 3:00 AM
To: Li, Pan2 ; Kito Cheng ; 钟居哲
Cc: gcc-patches ; Wang, Yanzhang
; rdapp.gcc ; Jeff Law
Subject: Re: [PATCH v3] RISC-V: Introduce gcc option mrvv-vector-bits for RVV
Hi Pan,
On 2/28/24 17
Robin Dapp
Sent: Thursday, February 29, 2024 9:29 PM
To: Li, Pan2 ; Jeff Law ;
gcc-patches@gcc.gnu.org
Cc: rdapp@gmail.com; juzhe.zh...@rivai.ai; kito.ch...@gmail.com;
richard.guent...@gmail.com; Wang, Yanzhang ; Liu,
Hongtao
Subject: Re: [PATCH v2] DSE: Bugfix ICE after allow vector ty
OPTAB_VL(subv_optab, "subv$I$a3", MINUS, "sub", '3', gen_intv_fp_libfunc)
OPTAB_VX(subv_optab, "sub$F$a3")
-OPTAB_NL(sssub_optab, "sssub$Q$a3", SS_MINUS, "sssub", '3',
gen_signed_fixed_libfunc)
-OPTAB_NL(ussub_optab, "uss
cceptable fix, aka find some
where to filter-out the invalid
modes before goes to gen_low_part.
Pan
-Original Message-
From: Jeff Law
Sent: Monday, March 4, 2024 6:47 AM
To: Robin Dapp ; Li, Pan2 ;
gcc-patches@gcc.gnu.org
Cc: juzhe.zh...@rivai.ai; kito.ch...@gmail.com; rich
t nested cond like below? I am debugging into
gimple_simplify_COND_EXPR for why not hit the pattern...
+(simplify
+ (cond
+(lt @0 integer_zerop)
+(plus:c @0 @1)
+(cond (lt @1 integer_zerop) @1 @0))
+ (IFN_SAT_ADD @0 @1))
Pan
-Original Message-
From: Richard Biener
Sent: Monday,
Committed, thanks Juzhe.
Pan
From: juzhe.zh...@rivai.ai
Sent: Tuesday, March 5, 2024 5:15 PM
To: Li, Pan2 ; gcc-patches
Cc: kito.cheng ; Wang, Yanzhang
; Li, Pan2
Subject: Re: [PATCH v1] RISC-V: Cleanup unused code in riscv_v_adjust_bytesize
[NFC]
LGTM. Thanks for clean up
1 ? INT32_MAX : a / b;
}
sint32_t sat_abs (sint32_t a)
{
return a >= 0 ? a : (a == INT32_MIN ? INT32_MAX : -a);
}
Pan
-Original Message-
From: Richard Biener
Sent: Tuesday, March 5, 2024 4:41 PM
To: Li, Pan2
Cc: Tamar Christina ; gcc-patches@gcc.gnu.org;
juzhe.zh...@rivai.ai;
Thanks a lot for coaching, really save my day. I will have a try for
usadd/ssadd includes both the scalar and vector (ISEL/widen_mult) modes in v3.
Pan
-Original Message-
From: Richard Biener
Sent: Thursday, March 7, 2024 4:41 PM
To: Li, Pan2
Cc: Tamar Christina ; gcc-patches
allow assertion
during transform, to
see if there is any regressions and send the v2.
> It possibly was before Robins costing reorg?
Sorry, not very sure which commit from robin.
Pan
-Original Message-
From: Richard Biener
Sent: Friday, March 8, 2024 10:03 PM
To: Li, Pan2
Cc: gc
Committed, thanks Richard.
Pan
-Original Message-
From: Richard Biener
Sent: Sunday, March 10, 2024 2:53 PM
To: Li, Pan2
Cc: gcc-patches@gcc.gnu.org; juzhe.zh...@rivai.ai; kito.ch...@gmail.com; Wang,
Yanzhang ; rdapp@gmail.com; jeffreya...@gmail.com
Subject: Re: [PATCH v2] VECT
essage-
From: Richard Biener
Sent: Monday, March 11, 2024 1:05 AM
To: Li, Pan2
Cc: gcc-patches@gcc.gnu.org; juzhe.zh...@rivai.ai; kito.ch...@gmail.com; Wang,
Yanzhang ; rdapp@gmail.com; jeffreya...@gmail.com
Subject: Re: [PATCH v2] VECT: Fix ICE for vectorizable LD/ST when both len and
sto
here.
Pan
-Original Message-
From: Vineet Gupta
Sent: Thursday, March 7, 2024 3:19 AM
To: Li, Pan2 ; gcc-patches@gcc.gnu.org
Cc: juzhe.zh...@rivai.ai; kito.ch...@gmail.com; Wang, Yanzhang
; rdapp@gmail.com; pal...@rivosinc.com
Subject: Re: [PATCH v2] RISC-V: Introduce gc
Hi Jeff,
Is there any suggestion(s) for how to fix this ICE in the reasonable approach?
Thanks a lot.
Pan
-Original Message-
From: Li, Pan2
Sent: Tuesday, March 5, 2024 2:23 PM
To: Jeff Law ; Robin Dapp ;
gcc-patches@gcc.gnu.org
Cc: juzhe.zh...@rivai.ai; kito.ch...@gmail.com
Committed, thanks Kito.
Pan
-Original Message-
From: Kito Cheng
Sent: Tuesday, March 12, 2024 3:11 PM
To: Li, Pan2
Cc: gcc-patches@gcc.gnu.org; juzhe.zh...@rivai.ai; Wang, Yanzhang
Subject: Re: [PATCH v1] RISC-V: Fix some code style issue(s) in riscv-c.cc [NFC]
LGTM :)
On Tue, Mar
already.
Hi Kito
Could you please help to correct me the behavior of the riscv_rvv_vector_bits
attribute?
Sort of details and I suspect there is something missing, or different behavior
compared with clang side.
Pan
-Original Message-
From: Stefan O'Rear
Sent: Tuesday, March 1
Thanks Kito, will commit it after the ICE fix.
Pan
-Original Message-
From: Kito Cheng
Sent: Thursday, March 21, 2024 8:33 PM
To: Li, Pan2
Cc: gcc-patches@gcc.gnu.org; juzhe.zh...@rivai.ai; Wang, Yanzhang
Subject: Re: [PATCH v1] RISC-V: Bugfix function target attribute pollution
Thanks Kito, will send v2 for this change.
Pan
-Original Message-
From: Kito Cheng
Sent: Thursday, March 21, 2024 8:39 PM
To: Li, Pan2
Cc: gcc-patches@gcc.gnu.org; juzhe.zh...@rivai.ai; Wang, Yanzhang
Subject: Re: [PATCH v1] RISC-V: Bugfix ICE for __attribute__((target("ar
are of it for
risk control consideration.
Pan
-Original Message-
From: Kito Cheng
Sent: Thursday, March 21, 2024 9:25 PM
To: Li, Pan2
Cc: gcc-patches@gcc.gnu.org; juzhe.zh...@rivai.ai; Wang, Yanzhang
; rdapp@gmail.com; vine...@rivosinc.com;
pal...@rivosinc.com
Subject: Re: [PATCH v3
Sorry for disturbing, kindly ping for this ICE.
Pan
-Original Message-
From: Li, Pan2
Sent: Tuesday, March 12, 2024 10:09 AM
To: Jeff Law ; Robin Dapp ;
gcc-patches@gcc.gnu.org
Cc: juzhe.zh...@rivai.ai; kito.ch...@gmail.com; richard.guent...@gmail.com;
Wang, Yanzhang ; Liu, Hongtao
Committed, thanks Kito.
Pan
-Original Message-
From: Kito Cheng
Sent: Friday, March 22, 2024 10:24 AM
To: Li, Pan2
Cc: gcc-patches@gcc.gnu.org; juzhe.zh...@rivai.ai; Wang, Yanzhang
Subject: Re: [PATCH v2] RISC-V: Bugfix ICE for __attribute__((target("arch=+v"))
LGTM, tha
Committed, thanks Kito.
Pan
-Original Message-
From: Kito Cheng
Sent: Friday, March 22, 2024 6:06 PM
To: Li, Pan2
Cc: gcc-patches@gcc.gnu.org; juzhe.zh...@rivai.ai; Wang, Yanzhang
; rdapp@gmail.com; vine...@rivosinc.com;
pal...@rivosinc.com
Subject: Re: [PATCH v4] RISC-V
#x27;s invalid in validate_subreg if read_mode size is < reg natural. */
+&& known_ge (GET_MODE_SIZE (read_mode), REGMODE_NATURAL_SIZE (read_mode)))
read_reg = gen_lowpart (read_mode, copy_rtx (store_info->rhs));
else
read_reg = extract_low_bits (read_mode, store_mode,
Committed, thanks kito.
Pan
-Original Message-
From: Kito Cheng
Sent: Monday, March 25, 2024 8:04 PM
To: Li, Pan2
Cc: gcc-patches@gcc.gnu.org; juzhe.zh...@rivai.ai; Wang, Yanzhang
Subject: Re: [PATCH v1] RISC-V: Allow RVV intrinsic when function
target("arch=+v")
LG
Thanks kito, looks missed this part in test, let me check it out.
Pan
-Original Message-
From: Kito Cheng
Sent: Thursday, March 28, 2024 2:44 PM
To: Li, Pan2
Cc: gcc-patches@gcc.gnu.org; juzhe.zh...@rivai.ai; Wang, Yanzhang
Subject: Re: [PATCH v1] RISC-V: Allow RVV intrinsic for
about it and update in v2.
Pan
-Original Message-
From: Li, Pan2
Sent: Thursday, March 28, 2024 3:32 PM
To: Kito Cheng
Cc: gcc-patches@gcc.gnu.org; juzhe.zh...@rivai.ai; Wang, Yanzhang
Subject: RE: [PATCH v1] RISC-V: Allow RVV intrinsic for more function target
Thanks kito, looks missed
Committed, thanks Kito.
Pan
-Original Message-
From: Kito Cheng
Sent: Sunday, March 31, 2024 9:05 AM
To: Li, Pan2
Cc: gcc-patches@gcc.gnu.org; juzhe.zh...@rivai.ai; Wang, Yanzhang
Subject: Re: [PATCH] RISC-V: Fix misspelled term builtin in error message
lgtm
On Sat, Mar 30, 2024
Committed, thanks Kito.
Pan
-Original Message-
From: Kito Cheng
Sent: Sunday, March 31, 2024 8:54 AM
To: Li, Pan2
Cc: gcc-patches@gcc.gnu.org; juzhe.zh...@rivai.ai; Wang, Yanzhang
Subject: Re: [PATCH] RISC-V: Fix one unused varable in riscv_subset_list::parse
LGTM
On Sat, Mar 30
Kindly ping for this ice.
Pan
-Original Message-
From: Li, Pan2
Sent: Saturday, March 23, 2024 1:45 PM
To: Jeff Law ; Robin Dapp ;
gcc-patches@gcc.gnu.org
Cc: juzhe.zh...@rivai.ai; kito.ch...@gmail.com; richard.guent...@gmail.com;
Wang, Yanzhang ; Liu, Hongtao
Subject: RE: [PATCH v2
Committed, thanks Juzhe and Kito.
Pan
-Original Message-
From: Kito Cheng
Sent: Thursday, April 11, 2024 10:50 AM
To: juzhe.zh...@rivai.ai
Cc: Li, Pan2 ; gcc-patches
Subject: Re: [PATCH v1] RISC-V: Bugfix ICE for the vector return arg in mode
switch
I was thinking we may guarded
: Thursday, April 11, 2024 7:52 PM
To: Li, Pan2 ; Kito Cheng ;
juzhe.zh...@rivai.ai
Cc: gcc-patches
Subject: Re: [PATCH v1] RISC-V: Bugfix ICE for the vector return arg in mode
switch
On 4/11/24 05:03, Li, Pan2 wrote:
> Committed, thanks Juzhe and Kito.
>
> Pan
Hi Pan,
this commi
Committed, thanks Jeff.
Pan
-Original Message-
From: Jeff Law
Sent: Thursday, February 1, 2024 9:39 PM
To: Li, Pan2 ; gcc-patches@gcc.gnu.org
Cc: juzhe.zh...@rivai.ai; Wang, Yanzhang ;
kito.ch...@gmail.com
Subject: Re: [PATCH v1] RISC-V: Cleanup the comments for the psabi
On 1/30
Sorry, it seems the log was eliminated by my cleanup script(s). Let me know
rerun one newlib for commit id 23cd2961bd2ff63583f46e3499a07bd54491d45c.
Pan
-Original Message-
From: Edwin Lu
Sent: Friday, February 2, 2024 1:43 AM
To: Li, Pan2 ; juzhe.zh...@rivai.ai; gcc-patches
Cc
Hi Edwin,
Just rerun the newlib and there is no ICE but still 160 dump failures as below.
Pan
-Original Message-
From: Li, Pan2
Sent: Friday, February 2, 2024 11:57 AM
To: Edwin Lu ; juzhe.zh...@rivai.ai; gcc-patches
Cc: Robin Dapp ; kito.cheng ;
jeffreyalaw ; palmer ; vineetg
returned by a[0-1].
Pan
-Original Message-
From: Edwin Lu
Sent: Saturday, February 3, 2024 8:29 AM
To: Li, Pan2 ; juzhe.zh...@rivai.ai; gcc-patches
Cc: Robin Dapp ; kito.cheng ;
jeffreyalaw ; palmer ; vineetg
; Patrick O'Neill
Subject: Re: [COMMITTED V3 1/4] RISC-V: Add non-ve
Not yet. It is long time since last round run, will make sure there is no
surprises from that.
Pan
From: juzhe.zh...@rivai.ai
Sent: Tuesday, February 6, 2024 4:11 PM
To: Li, Pan2 ; gcc-patches
Cc: Li, Pan2 ; Wang, Yanzhang ;
kito.cheng
Subject: Re: [PATCH v1] RISC-V: Bugfix for RVV
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