Thanks Jeff for comments.
> As Richi noted using validate_subreg here isn't great. Does it work to
> factor out this code from extract_low_bits
>
>> if (!int_mode_for_mode (src_mode).exists (&src_int_mode)
>> || !int_mode_for_mode (mode).exists (&int_mode))
>> return NULL_RTX;
>>
>> if (!targetm.modes_tieable_p (src_int_mode, src_mode))
>> return NULL_RTX;
>> if (!targetm.modes_tieable_p (int_mode, mode))
>> return NULL_RTX;
> And use that in the condition (and in extract_low_bits rather than
> duplicating the code)?
It can solve the ICE but will forbid all vector modes goes gen_lowpart.
Actually only the vector mode size is less than reg nature size will trigger
the ICE.
Thus, how about just add one more condition before goes to gen_lowpart as below?
Feel free to correct me if any misunderstandings. 😉!
diff --git a/gcc/dse.cc b/gcc/dse.cc
index edc7a1dfecf..258d2ccc299 100644
--- a/gcc/dse.cc
+++ b/gcc/dse.cc
@@ -1946,7 +1946,9 @@ get_stored_val (store_info *store_info, machine_mode
read_mode,
copy_rtx (store_info->const_rhs));
else if (VECTOR_MODE_P (read_mode) && VECTOR_MODE_P (store_mode)
&& known_le (GET_MODE_BITSIZE (read_mode), GET_MODE_BITSIZE (store_mode))
- && targetm.modes_tieable_p (read_mode, store_mode))
+ && targetm.modes_tieable_p (read_mode, store_mode)
+ /* It's invalid in validate_subreg if read_mode size is < reg natural. */
+ && known_ge (GET_MODE_SIZE (read_mode), REGMODE_NATURAL_SIZE (read_mode)))
read_reg = gen_lowpart (read_mode, copy_rtx (store_info->rhs));
else
read_reg = extract_low_bits (read_mode, store_mode,
Pan
-----Original Message-----
From: Jeff Law <[email protected]>
Sent: Saturday, March 23, 2024 2:54 AM
To: Li, Pan2 <[email protected]>; Robin Dapp <[email protected]>;
[email protected]
Cc: [email protected]; [email protected]; [email protected];
Wang, Yanzhang <[email protected]>; Liu, Hongtao <[email protected]>
Subject: Re: [PATCH v2] DSE: Bugfix ICE after allow vector type in
get_stored_val
On 3/4/24 11:22 PM, Li, Pan2 wrote:
> Thanks Jeff for comments.
>
>> But in the case of a vector modes, we can usually reinterpret the
>> underlying bits in whatever mode we want and do any of the usual
>> operations on those bits.
>
> Yes, I think that is why we can allow vector mode in get_stored_val if my
> understanding is correct.
> And then the different modes will return by gen_low_part. Unfortunately,
> there are some modes
> (less than a vector bit size like V2SF, V2QI for vlen=128) are considered
> as invalid by validate_subreg,
> and return NULL_RTX result in the final ICE.
That doesn't make a lot of sense to me. Even for vlen=128 I would have
expected that we can still use a subreg to access low bits. After all
we might have had a V16QI vector and done a reduction of some sort
storing the result in the first element and we have to be able to
extract that result and move it around.
I'm not real keen on a target workaround. While extremely safe, I
wouldn't be surprised if other ports could trigger the ICE and we'd end
up patching up multiple targets for what is, IMHO, a more generic issue.
As Richi noted using validate_subreg here isn't great. Does it work to
factor out this code from extract_low_bits:
> if (!int_mode_for_mode (src_mode).exists (&src_int_mode)
> || !int_mode_for_mode (mode).exists (&int_mode))
> return NULL_RTX;
>
> if (!targetm.modes_tieable_p (src_int_mode, src_mode))
> return NULL_RTX;
> if (!targetm.modes_tieable_p (int_mode, mode))
> return NULL_RTX;
And use that in the condition (and in extract_low_bits rather than
duplicating the code)?
jeff
ps. No need to apologize for the pings. This completely fell off my radar.
