RE: [r14-5578 Regression] FAIL: gfortran.dg/gomp/pr27573.f90 -O (test for excess errors) on Linux/x86_64

> -Original Message- > From: Sebastian Huber > Sent: Monday, November 27, 2023 3:58 PM > To: haochen.jiang ; gcc- > regress...@gcc.gnu.org; gcc-patches@gcc.gnu.org; Jiang, Haochen > > Subject: Re: [r14-5578 Regression] FAIL: gfortran.dg/gomp/pr27573.f90 -O (test > for excess errors) on Li

Re: [r14-5666 Regression] FAIL: gcc.dg/tree-prof/time-profiler-3.c scan-ipa-dump-times profile "Read tp_first_run: 2" 1 on Linux/x86_64

On 26.11.23 12:18, haochen.jiang wrote: On Linux/x86_64, 41aacdea55c5d795a7aa195357d966645845d00e is the first bad commit commit 41aacdea55c5d795a7aa195357d966645845d00e Author: Sebastian Huber Date: Mon Nov 20 15:26:38 2023 +0100 gcov: Fix integer types in gen_counter_update() caused

Re: [PATCH] RISC-V: Remove incorrect function gate gather_scatter_valid_offset_mode_p

On 11/25/23 09:24, Juzhe-Zhong wrote: > Come back to review the codes of gather/scatter, notice > gather_scatter_valid_offset_mode_p looks odd. > gather_scatter_valid_offset_mode_p is supposed to block vluxei64/vsuxei64 in > RV32 system. > However, it failed to do that since it is passing data_mo

Re: [PATCH] testsuite, x86: Handle a broken assembler.

Hi, I’d like to ping that patch from Iain Sandoe. It would clear up a number of failures in the darwin testsuite. Thanks, FX > --- 8< --- > > Earlier assembler support for complex fp16 on x86_64 Darin is broken. This > adds an additional test to the existing target-supports that fails for th

Re: [PATCH] rs6000: Canonicalize copysign (x, -1) back to -abs (x) in the backend [PR112606]

On Mon, Nov 27, 2023 at 07:55:52AM +, Tamar Christina wrote: > > For POPCOUNT I've introduced recently a way to provide custom expand_* > > function and decide there what optimizations to use, even when it otherwise > > is an integral unary optab ifn. > > > > Oh that sounds interesting, do yo

RE: [PATCH] rs6000: Canonicalize copysign (x, -1) back to -abs (x) in the backend [PR112606]

> -Original Message- > From: Jakub Jelinek > Sent: Monday, November 27, 2023 8:13 AM > To: Tamar Christina > Cc: Xi Ruoyao ; Segher Boessenkool > ; David Edelsohn ; gcc- > patc...@gcc.gnu.org; Andrew Pinski > Subject: Re: [PATCH] rs6000: Canonicalize copysign (x, -1) back to -abs (x) in

[PATCH] Add C intrinsics for scalar crypto extension

This patch add C intrinsics for scalar crypto extension. Because of riscv-c-api (https://github.com/riscv-non-isa/riscv-c-api-doc/pull/44/files) includes zbkb/zbkc/zbkx's intrinsics in bit manipulation extension, this patch only support zkn*/zks*'s intrinsics. gcc/ChangeLog: * config.g

Re: [PATCH] testsuite, x86: Handle a broken assembler.

On Mon, Nov 27, 2023 at 9:11 AM FX Coudert wrote: > > Hi, > > I’d like to ping that patch from Iain Sandoe. It would clear up a number of > failures in the darwin testsuite. OK. > Thanks, > FX > > > > > --- 8< --- > > > > Earlier assembler support for complex fp16 on x86_64 Darin is broken. Thi

Re: [PATCH] s390: Fix builtins floating-point convert to/from fixed

Ping. On Tue, Nov 14, 2023 at 04:19:59PM +0100, Stefan Schulze Frielinghaus wrote: > Remove flags for non-existing operands 2 and 3. > > Bootstrapped on s390. Ok for mainline? > > gcc/ChangeLog: > > * config/s390/s390-builtins.def > (s390_vcefb,s390_vcdgb,s390_vcelfb,s390_vcdlgb,s3

Re: [PATCH] s390: Fix constraint for insn *cmphi_ccu

Ping. On Wed, Oct 25, 2023 at 11:27:33AM +0200, Stefan Schulze Frielinghaus wrote: > Currently for an unsigned 16-bit comparison between memory and an > immediate where the high bit is set, a clc is emitted. This is because > the constant is created for mode HI and therefore sign extended. This

Re: [PATCH] s390: Streamline NNPA builtins with their LLVM counterparts

Ping. On Thu, Nov 16, 2023 at 01:07:30PM +0100, Stefan Schulze Frielinghaus wrote: > For the opaque NNP-data type prefer unsigned over signed integer types. > > gcc/ChangeLog: > > * config/s390/s390-builtin-types.def: Add/remove types. > * config/s390/s390-builtins.def > (s390_

Re: [PATCH] s390: Fix builtins floating-point convert to/from fixed

Ok, thanks! Andreas On 11/27/23 10:11, Stefan Schulze Frielinghaus wrote: > Ping. > > On Tue, Nov 14, 2023 at 04:19:59PM +0100, Stefan Schulze Frielinghaus wrote: >> Remove flags for non-existing operands 2 and 3. >> >> Bootstrapped on s390. Ok for mainline? >> >> gcc/ChangeLog: >> >> * co

Re: [PATCH] s390: Fix constraint for insn *cmphi_ccu

Ok, thanks! Andreas On 11/27/23 10:12, Stefan Schulze Frielinghaus wrote: > Ping. > > On Wed, Oct 25, 2023 at 11:27:33AM +0200, Stefan Schulze Frielinghaus wrote: >> Currently for an unsigned 16-bit comparison between memory and an >> immediate where the high bit is set, a clc is emitted. This

Re: [PATCH] s390: Streamline NNPA builtins with their LLVM counterparts

Ok, thanks! Andreas On 11/27/23 10:12, Stefan Schulze Frielinghaus wrote: > Ping. > > On Thu, Nov 16, 2023 at 01:07:30PM +0100, Stefan Schulze Frielinghaus wrote: >> For the opaque NNP-data type prefer unsigned over signed integer types. >> >> gcc/ChangeLog: >> >> * config/s390/s390-builtin

[PATCH] tree-optimization/112706 - missed simplification of condition

We lack a match.pd pattern recognizing ptr + o ==/!= ptr + o'. The following extends handling we have for integral types to pointers. Bootstrapped and tested on x86_64-unknown-linux-gnu, pushed. PR tree-optimization/112706 * match.pd (ptr + o ==/!=/- ptr + o'): New patterns.

[PATCH] s390: Fixup builtins vec_rli and verll

Commit 248df13b966f46649e16dc3c8c92b263790ef503 restricted the rotate count to immediates. Although the documentation of vec_rli (Vector Element Rotate Left Immediate) can be read as if it where restricted to immediates, this is not the case. Thus, revert this commit. In order to finally allow r

Re: [PATCH] PR tree-optimization/111922 - Ensure wi_fold arguments match precisions.

On Fri, Nov 24, 2023 at 5:53 PM Andrew MacLeod wrote: > > This problem here is that IPA is calling something like operator_minus > with 2 operands, one with precision 32 (int) and one with precision 64 > (pointer). There are various ways this can happen as mentioned in the PR. > > Regardless of wh

Re: [PATCH v2 3/7] aarch64: Add eh_return compile tests

The 11/26/2023 14:37, Richard Sandiford wrote: > Szabolcs Nagy writes: > > +++ b/gcc/testsuite/gcc.target/aarch64/eh_return-3.c > > @@ -0,0 +1,30 @@ > > +/* { dg-do compile } */ > > +/* { dg-options "-O2 -mbranch-protection=pac-ret+leaf" } */ > > Probably best to add -fno-schedule-insns -fno-sche

Re: [PATCH] s390: Fixup builtins vec_rli and verll

On 11/27/23 10:53, Stefan Schulze Frielinghaus wrote: > Commit 248df13b966f46649e16dc3c8c92b263790ef503 restricted the rotate > count to immediates. Although the documentation of vec_rli (Vector > Element Rotate Left Immediate) can be read as if it where restricted to > immediates, this is not the

Re: [wwwdocs][patch][OpenACC] gcc-14/changes.html: OpenACC - mention support for first 2.7 features

On 26.11.23 09:48, Gerald Pfeifer wrote: On Fri, 24 Nov 2023, Tobias Burnus wrote: Comments before I commit it? + https://gcc.gnu.org/wiki/OpenACC +OpenACC 2.7: The self clause was added to be used on + compute constructs and the default clause for data + constructs. + + Whe

Re: [patch] OpenMP: Add -Wopenmp and use it

Hi! On Fri, 24 Nov 2023 at 15:08, Jakub Jelinek wrote: > > On Fri, Nov 24, 2023 at 02:51:28PM +0100, Tobias Burnus wrote: > > Following the general trend to add a "[-W...]" to the warning messages > > for both better grouping of the warnings and - more importantly - for > > providing > > a means

Re: [patch] OpenMP: Add -Wopenmp and use it

On Mon, Nov 27, 2023 at 11:20:20AM +0100, Christophe Lyon wrote: > On Fri, 24 Nov 2023 at 15:08, Jakub Jelinek wrote: > > > Comments or remarks before I commit it? > > > > LGTM, thanks for working on it. > > > > Jakub > > > > I think the lack of final '.' in: > gcc/c-family/c.opt > + Warn

Re: [patch] OpenMP: Add -Wopenmp and use it

Hi, On 27.11.23 11:20, Christophe Lyon wrote: I think the lack of final '.' in: Indeed - but you are lagging a bit behind: https://gcc.gnu.org/pipermail/gcc-patches/2023-November/638128.html [committed] c-family/c.opt (-Wopenmp): Add missing tailing '.' Fri Nov 24 18:56:21 GMT 2023 Commit

Re: [PATCH v5] c-family: Implement __has_feature and __has_extension [PR60512]

On 23/11/2023 12:41, Marek Polacek wrote: > On Mon, Nov 20, 2023 at 05:29:58PM -0500, Jason Merrill wrote: > > On 11/17/23 09:50, Alex Coplan wrote: > > > Hi, > > > > > > This is a v5 patch to address Marek's feedback here: > > > https://gcc.gnu.org/pipermail/gcc-patches/2023-November/635157.html

Re: [PATCH] c++: fix noexcept checking for trivial operations [PR96090]

Ping for https://gcc.gnu.org/pipermail/gcc-patches/2023-October/634626.html. I've been made aware since constructing this patch of CWG2820, which has a proposed resolution that would change the result of the testcase 'noexcept(yesthrow_t())' (and similarly for the library builtin), but as it hasn'

Re: [PATCH] c++: End lifetime of objects in constexpr after destructor call [PR71093]

Ping for https://gcc.gnu.org/pipermail/gcc-patches/2023-November/635071.html. On Fri, Nov 03, 2023 at 12:34:06PM +1100, Nathaniel Shead wrote: > Oh, this also fixes PR102284 and its other linked PRs (apart from > fields); I forgot to note that in the commit. > > On Fri, Nov 03, 2023 at 12:18:29PM

Re: [RFA] New pass for sign/zero extension elimination

I tried this patch for AMD GCN. We have a similar problem with excess extends, but also for vector modes. Each lane has a minimum 32 bits and GCC's normal assumption is that vector registers have precisely the number of bits they need, so the amdgcn backend patterns have explicit sign/zero exte

[PATCH] vect: Avoid duplicate_and_interleave for uniform vectors [PR112661]

can_duplicate_and_interleave_p checks whether we know a way of building a particular VLA SLP invariant. g:60034ecf25597bd515f skipped that test for booleans, to support MASK_LEN_GATHER_LOAD calls with a dummy all-ones mask. But there's nothing fundamentally different about VLA masks vs VLA data v

[PATCH] Treat "p" in asms as addressing VOIDmode

check_asm_operands was inconsistent about how it handled "p" after RA compared to before RA. Before RA it tested the address with a void (unknown) memory mode: case CT_ADDRESS: /* Every address operand can be reloaded to fit. */ result = result || address_

Re: [PATCH] vect: Avoid duplicate_and_interleave for uniform vectors [PR112661]

On Mon, 27 Nov 2023, Richard Sandiford wrote: > can_duplicate_and_interleave_p checks whether we know a way of > building a particular VLA SLP invariant. g:60034ecf25597bd515f > skipped that test for booleans, to support MASK_LEN_GATHER_LOAD > calls with a dummy all-ones mask. But there's nothin

[PATCH] s390: Add missing builtin type

One builtin type slipped through the cracks of the last commits. Bootstrapped on s390. Ok for mainline? gcc/ChangeLog: * config/s390/s390-builtin-types.def (BT_FN_UV8HI_UV8HI_UINT): Add missing builtin type. --- gcc/config/s390/s390-builtin-types.def | 1 + 1 file changed, 1 in

Re: [PATCH][RFC] middle-end/110237 - wrong MEM_ATTRs for partial loads/stores

> The easiest way to avoid running into the alias analysis problem is > to scrap the MEM_EXPR when we expand the internal functions for > partial loads/stores. That avoids the disambiguation we run into > which is realizing that we store to an object of less size as > the size of the mode we appea

Re: [PATCH] s390: Add missing builtin type

On 11/27/23 13:38, Stefan Schulze Frielinghaus wrote: > One builtin type slipped through the cracks of the last commits. > > Bootstrapped on s390. Ok for mainline? > > gcc/ChangeLog: > > * config/s390/s390-builtin-types.def (BT_FN_UV8HI_UV8HI_UINT): > Add missing builtin type. Ok

RE: [PATCH 21/21]Arm: Add MVE cbranch implementation

Hi Tamar, > -Original Message- > From: Tamar Christina > Sent: Monday, November 6, 2023 7:43 AM > To: gcc-patches@gcc.gnu.org > Cc: nd ; Ramana Radhakrishnan > ; Richard Earnshaw > ; ni...@redhat.com; Kyrylo Tkachov > > Subject: [PATCH 21/21]Arm: Add MVE cbranch implementation > > Hi Al

Re: [PING][PATCH 2/2] arm: Add support for MVE Tail-Predicated Low Overhead Loops

Hi Stam, Just some comments. +/* Recursively scan through the DF chain backwards within the basic block and + determine if any of the USEs of the original insn (or the USEs of the insns s/Recursively scan/Scan/ as you no longer recurse, thanks for that by the way :) + where thy were DEF-e

RE: [PATCH 20/21]Arm: Add Advanced SIMD cbranch implementation

Hi Tamar, > -Original Message- > From: Tamar Christina > Sent: Monday, November 6, 2023 7:43 AM > To: gcc-patches@gcc.gnu.org > Cc: nd ; Ramana Radhakrishnan > ; Richard Earnshaw > ; ni...@redhat.com; Kyrylo Tkachov > > Subject: [PATCH 20/21]Arm: Add Advanced SIMD cbranch implementation

[PATCH] libsanitizer: Check assembler support for symbol assignment [PR112563]

The recent libsanitizer import broke the build on Solaris/SPARC with the native as: /usr/ccs/bin/as: ".libs/sanitizer_errno.s", line 4247: error: symbol "__sanitizer_internal_memset" is used but not defined /usr/ccs/bin/as: ".libs/sanitizer_errno.s", line 4247: error: symbol "__sanitizer_interna

Re: [PATCH] libsanitizer: Check assembler support for symbol assignment [PR112563]

On Mon, Nov 27, 2023 at 01:56:46PM +0100, Rainer Orth wrote: > The recent libsanitizer import broke the build on Solaris/SPARC with the > native as: > > /usr/ccs/bin/as: ".libs/sanitizer_errno.s", line 4247: error: symbol > "__sanitizer_internal_memset" is used but not defined > /usr/ccs/bin/as:

[V4] [C PATCH 1/4] c23: tag compatibility rules for struct and unions

Note that there is an additional change in parser_xref_tag to address the issue regarding completeness in redefinition which affects also structs / unions. The test c23-tag-6.c was changed accordingly. c23: tag compatibility rules for struct and unions Implement redeclaration and compatibilit

[V4] [PATCH 2/4] c23: tag compatibility rules for enums

(only tests were changed) c23: tag compatibility rules for enums Allow redefinition of enum types and enumerators. Diagnose nested redefinitions including redefinitions in the enum specifier for enum types with fixed underlying type. gcc/c: * c-tree.h (c_parser_enum_specifier): Add p

[V4] [PATCH 4/4] c23: construct composite type for tagged types

(this patch was still not updated and needs more work, so only included now for completeness) c23: construct composite type for tagged types Support for constructing composite type for structs and unions in C23. gcc/c: * c-typeck.cc (composite_type_internal): Adapted from com

[V4] [PATCH 3/4] c23: aliasing of compatible tagged types

(this mostly got an extended description and more comments, also tests were reorganized) c23: aliasing of compatible tagged types Tell the backend which types are equivalent by setting TYPE_CANONICAL to one struct in the set of equivalent structs. Structs are considered equivalent by ignorin

Re: [PATCH] libsanitizer: Check assembler support for symbol assignment [PR112563]

Hi Jakub, >> 2023-11-23 Rainer Orth >> >> libsanitizer: >> PR libsanitizer/112563 >> * configure.ac (libsanitizer_cv_as_sym_assign): Check for >> assembler symbol assignment support. >> * configure, config.h.in: Regenerate. >> * sanitizer_common/sanitizer_redefine

[PATCH] RISC-V: Fix VSETVL PASS regression

This patch is regression fix patch, not an optimization patch. Since trunk GCC generates redundant vsetvl than GCC-13. This is the case: bb 2: def a2 (vsetvl a2, zero) bb 3: use a2 bb 4: use a2 (vle) before this patch: bb 2: vsetvl a2 zero bb 3: vsetvl zero, zero > should be eliminate

Re: [PATCH] libsanitizer: Check assembler support for symbol assignment [PR112563]

On Mon, Nov 27, 2023 at 02:20:25PM +0100, Rainer Orth wrote: > Hi Jakub, > > >> 2023-11-23 Rainer Orth > >> > >>libsanitizer: > >>PR libsanitizer/112563 > >>* configure.ac (libsanitizer_cv_as_sym_assign): Check for > >>assembler symbol assignment support. > >>* configure, c

Re: [PATCH] libsanitizer: Check assembler support for symbol assignment [PR112563]

Hi Jakub, >> But will they accept a patch to check a macro never set anywhere in and >> irrelevant to LLVM? That's why I kept all in one patch, to be GCC-local. > > I meant the patch would be gcc local. > But, for later we need only the changes to the imported files be in one > commit, not others

[committed] amdgcn: Disallow TImode vector permute

This fixes an ICE that affects some testsuite compiles that use vector extensions, but probably not much real code (certainly not for offloading). Andrewamdgcn: Disallow TImode vector permute We don't support it and it doesn't happen without vector extensions, so just remove the unhandled case.

[PATCH] tree-optimization/112653 - PTA and return

The following separates the escape solution for return stmts not only during points-to solving but also for later querying. This requires adjusting the points-to-global tests to include escapes through returns. Technically the patch replaces the existing post-processing which computes the transit

bpf: Throw error when external libcalls are generated.

User-agent: mu4e 1.4.15; emacs 28.1 Author: Cupertino Miranda Hi everyone, The attached patch is a temporary solution for the lack of proper linker and external library linking of the eBPF platform. Any calls created by the compiler, that would usually be defined within libgcc, will endup being

[pushed] aarch64: Move and generalise vect_all_same

The fix for PR106329 needs a way of testing for a ptrue of a particular element size. We already had such a function for svlast, so this patch moves it to common code and generalises it to work with all kinds of vectors. Tested on aarch64-linux-gnu & pushed. Richard gcc/ * config/aarch

[pushed] aarch64: Remove redundant zeroing/merging in SVE intrinsics [PR106326]

Many predicated SVE intrinsics provide three forms of predication: zeroing, merging, and any/dont-care. All three are equivalent when the predicate is all-true, so this patch drops the zeroing and merging in that case. Tested on aarch64-linux-gnu & pushed. Richard gcc/ PR target/106326

hurd: Add multilib paths for gnu-x86_64

Hi! On 2023-10-28T21:19:59+0200, Samuel Thibault wrote: > We need the multilib paths in gcc to find e.g. glibc crt files on > Debian. ACK. > This is essentially based on t-linux64 version. Yes, but isn't the overall setup diverged from GNU/Linux? Currently, x86_64 GNU/Hurd first gets 'i386/t-

Re: bpf: Throw error when external libcalls are generated.

Hi Cuper. OK. Thanks for the patch. > Hi everyone, > > The attached patch is a temporary solution for the lack of proper linker > and external library linking of the eBPF platform. > Any calls created by the compiler, that would usually be defined within > libgcc, will endup being undefined in b

hurd: Ad default-pie and static-pie support

Hi! On 2023-10-28T21:20:39+0200, Samuel Thibault wrote: > This fixes the Hurd spec in the default-pie case, and adds static-pie > support. I understand that your change does work for you as-is, so I've now pushed that to master branch in commit c768917402d4cba69a92c737e56e177f5b8ab0df "hurd: Ad

Re: [PATCH 1/3] [GCC] arm: vst1_types_x2 ACLE intrinsics

On 06/10/2023 12:55, ezra.sito...@arm.com wrote: From: Ezra Sitorus This patch is part of a series of patches implementing the _xN variants of the vst1 intrinsic for arm32. We avoid the terms arm32 and arm64 in the gnu toolchain because of the potential for conflict with wild-card regexp

Re: [PATCH 1/3] [GCC] arm: vst1_types_x2 ACLE intrinsics

On 27/11/2023 14:56, Richard Earnshaw wrote: On 06/10/2023 12:55, ezra.sito...@arm.com wrote: From: Ezra Sitorus This patch is part of a series of patches implementing the _xN variants of the vst1 intrinsic for arm32. We avoid the terms arm32 and arm64 in the gnu toolchain because of t

Re: [PATCH 2/3] [GCC] arm: vst1_types_x3 ACLE intrinsics

On 06/10/2023 12:55, ezra.sito...@arm.com wrote: From: Ezra Sitorus This patch is part of a series of patches implementing the _xN variants of the vst1 intrinsic for arm32. This patch adds the _x3 variants of the vst1 intrinsic. OK, but see comments on the first patch about naming and fo

Re: [PATCH 3/3] [GCC] arm: vst1_types_x4 ACLE intrinsics

On 06/10/2023 12:56, ezra.sito...@arm.com wrote: From: Ezra Sitorus This patch is part of a series of patches implementing the _xN variants of the vst1 intrinsic for arm32. This patch adds the _x4 variants of the vst1 intrinsic. OK, but please see comment on first patch about naming and f

Re: [PATCH v5] gcc: Introduce -fhardened

On Sun, Nov 26, 2023 at 11:59:04AM +0100, FX Coudert wrote: > Hi Marek, > > The new test at gcc.target/i386/cf_check-6.c fails on darwin with: > Excess errors: > cc1: warning: '-fhardened' not supported for this target > > Other tests are only run on Linux, so I added this to > gcc.t

Re: [PATCH 1/3] [GCC] arm: vst1q_types_x2 ACLE intrinsics

On 10/10/2023 15:04, ezra.sito...@arm.com wrote: From: Ezra Sitorus This patch is part of a series of patches implementing the _xN variants of the vst1q intrinsic for AArch32. This patch adds the _x2 variants of the vst1q intrinsic. Tests use xN so that the latter variants (_x3, _x4) could

Re: [PATCH 2/3] [GCC] arm: vst1q_types_x3 ACLE intrinsics

On 10/10/2023 15:04, ezra.sito...@arm.com wrote: From: Ezra Sitorus This patch is part of a series of patches implementing the _xN variants of the vst1q intrinsic for AArch32. This patch adds the _x3 variants of the vst1q intrinsic. OK, but format lines to <= 70 columns please. R. ACLE

Re: [PATCH 3/3] [GCC] arm: vst1q_types_x4 ACLE intrinsics

On 10/10/2023 15:04, ezra.sito...@arm.com wrote: From: Ezra Sitorus This patch is part of a series of patches implementing the _xN variants of the vst1q intrinsic for AArch32. This patch adds the _x4 variants of the vst1q intrinsic. OK, but see earlier comments about formatting. R. AC

Re: [PATCH 0/3] [GCC] arm: vld1_types_xN ACLE intrinsics

On 19/10/2023 14:41, ezra.sito...@arm.com wrote: Add xN variants of vld1_types intrinsic for AArch32. These patches are all OK, but please fix the commit message formatting as with earlier series. R.

Re: [PATCH 0/3] [GCC] arm: vld1q_types_xN ACLE intrinsics

On 06/10/2023 10:49, ezra.sito...@arm.com wrote: Add xN variants of vld1q_types intrinsic. These patches are all OK, but please fix commit message formatting in line with the comments on the earlier series. R.

Re: [patch] OpenMP: Add -Wopenmp and use it

On Mon, 27 Nov 2023 at 11:33, Tobias Burnus wrote: > > Hi, > > On 27.11.23 11:20, Christophe Lyon wrote: > > > I think the lack of final '.' in: > > Indeed - but you are lagging a bit behind: > > https://gcc.gnu.org/pipermail/gcc-patches/2023-November/638128.html > > [committed] c-family/c.opt (-W

Re: PR111754

On Fri, 24 Nov 2023 at 03:13, Richard Sandiford wrote: > > Prathamesh Kulkarni writes: > > On Thu, 26 Oct 2023 at 09:43, Prathamesh Kulkarni > > wrote: > >> > >> On Thu, 26 Oct 2023 at 04:09, Richard Sandiford > >> wrote: > >> > > >> > Prathamesh Kulkarni writes: > >> > > On Wed, 25 Oct 2023 a

Re: [PATCH] aarch64: Improve cost of `a ? {-,}1 : b`

Andrew Pinski writes: > While looking into PR 112454, I found the cost for > `(if_then_else (cmp) (const_int 1) (reg))` was being recorded as 8 > (or `COSTS_N_INSNS (2)`) but it should have been 4 (or `COSTS_N_INSNS (1)`). > This improves the cost by not adding the cost of `(const_int 1)` to > the

Re: Ping: [PATCH] Fix PR112419

On 11/23/23 10:05, Hans-Peter Nilsson wrote: From: Hans-Peter Nilsson Date: Thu, 16 Nov 2023 05:24:06 +0100 From: Martin Uecker Date: Tue, 07 Nov 2023 06:56:25 +0100 Am Montag, dem 06.11.2023 um 21:01 -0700 schrieb Jeff Law: On 11/6/23 20:58, Hans-Peter Nilsson wrote: This patch caus

Re: [PATCH] aarch64: Improve cost of `a ? {-,}1 : b`

Richard Sandiford writes: > Andrew Pinski writes: >> While looking into PR 112454, I found the cost for >> `(if_then_else (cmp) (const_int 1) (reg))` was being recorded as 8 >> (or `COSTS_N_INSNS (2)`) but it should have been 4 (or `COSTS_N_INSNS (1)`). >> This improves the cost by not adding the

Re: [PATCH][RFC] middle-end/110237 - wrong MEM_ATTRs for partial loads/stores

On 11/27/23 05:39, Robin Dapp wrote: The easiest way to avoid running into the alias analysis problem is to scrap the MEM_EXPR when we expand the internal functions for partial loads/stores. That avoids the disambiguation we run into which is realizing that we store to an object of less size

Re: GCC/Rust libgrust-v2/to-submit branch

Hi! On 2023-11-21T16:20:22+0100, Arthur Cohen wrote: > A newer version of the library has been force-pushed to the branch > `libgrust-v2/to-submit`. > On 11/20/23 15:55, Thomas Schwinge wrote: >> Arthur and Pierre-Emmanuel have prepared a GCC/Rust libgrust-v2/to-submit >> branch:

Re: Ping: [PATCH] Fix PR112419

Am Montag, dem 27.11.2023 um 08:36 -0700 schrieb Jeff Law: > > On 11/23/23 10:05, Hans-Peter Nilsson wrote: > > > From: Hans-Peter Nilsson > > > Date: Thu, 16 Nov 2023 05:24:06 +0100 > > > > > > > From: Martin Uecker > > > > Date: Tue, 07 Nov 2023 06:56:25 +0100 > > > > > > > Am Montag, dem 06

Re: [PATCH v2 3/7] aarch64: Add eh_return compile tests

The 11/26/2023 14:37, Richard Sandiford wrote: > Szabolcs Nagy writes: > > +++ b/gcc/testsuite/gcc.target/aarch64/eh_return-3.c > > @@ -0,0 +1,30 @@ > > +/* { dg-do compile } */ > > +/* { dg-options "-O2 -mbranch-protection=pac-ret+leaf" } */ > > Probably best to add -fno-schedule-insns -fno-sche

Re: [PATCH] c++: Implement P2582R1, CTAD from inherited constructors

On Fri, 24 Nov 2023, Patrick Palka wrote: > On Wed, 22 Nov 2023, Patrick Palka wrote: > > > Bootstrapped and regtested on x86_64-pc-linux-gnu, does this look OK for > > trunk? > > > > -- >8 -- > > > > This patch implements C++23 class template argument deduction from > > inherited constructors,

Re: Ping: [PATCH] Fix PR112419

Am Montag, dem 27.11.2023 um 16:54 +0100 schrieb Martin Uecker: > Am Montag, dem 27.11.2023 um 08:36 -0700 schrieb Jeff Law: > > > > On 11/23/23 10:05, Hans-Peter Nilsson wrote: > > > > From: Hans-Peter Nilsson > > > > Date: Thu, 16 Nov 2023 05:24:06 +0100 > > > > > > > > > From: Martin Uecker

RE: [PATCH] aarch64: Improve cost of `a ? {-,}1 : b`

> -Original Message- > From: Richard Sandiford > Sent: Monday, November 27, 2023 7:35 AM > To: Andrew Pinski (QUIC) > Cc: gcc-patches@gcc.gnu.org > Subject: Re: [PATCH] aarch64: Improve cost of `a ? {-,}1 : b` > > Andrew Pinski writes: > > While looking into PR 112454, I found the cost

Re: [RFA] New pass for sign/zero extension elimination

On 11/26/23 09:42, rep.dot@gmail.com wrote: On 22 November 2023 23:23:41 CET, Jeff Law wrote: On 11/20/23 11:56, Dimitar Dimitrov wrote: On Sun, Nov 19, 2023 at 05:47:56PM -0700, Jeff Law wrote: ... + enum rtx_code xcode = GET_CODE (x); + if (xcode == SET) + { +

Re: [RFA] New pass for sign/zero extension elimination

On 11/27/23 04:30, Andrew Stubbs wrote: I tried this patch for AMD GCN. We have a similar problem with excess extends, but also for vector modes. Each lane has a minimum 32 bits and GCC's normal assumption is that vector registers have precisely the number of bits they need, so the amdgcn ba

Re: [RFC] vect: disable multiple calls of poly simdclones

On 06/11/2023 07:52, Richard Biener wrote: On Fri, 3 Nov 2023, Andre Vieira (lists) wrote: Hi, The current codegen code to support VF's that are multiples of a simdclone simdlen rely on BIT_FIELD_REF to create multiple input vectors. This does not work for non-constant simdclones, so we sh

Re: PR111754

Prathamesh Kulkarni writes: > PR111754: Rework encoding of result for VEC_PERM_EXPR with constant input > vectors. > > gcc/ChangeLog: > PR middle-end/111754 > * fold-const.cc (fold_vec_perm_cst): Set result's encoding to sel's > encoding, and set res_nelts_per_pattern to 2 if se

Re: [PATCH V2 3/3] OpenMP: Use enumerators for names of trait-sets and traits

Hi Sandra, {BTW: 1/3 needs to be eventually rebased as it no longer applies cleanly; I have not checked 2/3 or 3/3 yet.] 1/3+2/3 look good to me, unless Jakub has some comments, I think they can go it. Regarding 3/3, some first comments. I still want to read it a bit more careful and play with

[PATCH v2] Fixed problem with BTF defining smaller enums.

Hi everyone, David: Thanks for the v1 review. This version adds the following; - test case, - improves condition logic, - fixes mask typo. Looking forward to your review. v1 at: https://gcc.gnu.org/pipermail/gcc-patches/2023-November/636391.html Cheers, Cupertino commit 3f89d352a4ee908820

[PATCH v2] Fortran: fix reallocation on assignment of polymorphic variables [PR110415]

This is the second version of the patch - previous discussion at: https://gcc.gnu.org/pipermail/gcc-patches/2023-November/636671.html This patch adds the testcase from PR110415 and fixes the bug. The problem is that in a couple of places in trans_class_assignment in trans-expr.cc, we need to get

Re: [RFA] New pass for sign/zero extension elimination

On 11/20/23 11:26, Richard Sandiford wrote: >> + >> + mask = GET_MODE_MASK (GET_MODE (SUBREG_REG (x))) << bit; >> + if (!mask) >> + mask = -0x1ULL; > > Not sure I follow this. What does the -0x1ULL constant indicate? > Also, isn't it the mask of the outer register that i

Re: [RFA] New pass for sign/zero extension elimination

On 11/20/23 11:26, Richard Sandiford wrote: >> + /* ?!? What is the point of this adjustment to DST_MASK? */ >> + if (code == PLUS || code == MINUS >> + || code == MULT || code == ASHIFT) >> + dst_mask >> + = dst_mask ? ((2ULL << floor_log2 (dst_mask)) - 1) : 0; > > Yeah, sympathise w

[committed] arm: libgcc: tweak warning from __sync_synchronize

My previous patch to add an implementation of __sync_syncrhonize with a warning trips a testsuite failure in fortran (and possibly other languages as well) as the framework expects no blank lines in the output, but this warning was generating one. So remove the newline from the end of the message

[PATCH] tree-sra: Avoid returns of references to SRA candidates

Hi, The enhancement to address PR 109849 contained an importsnt thinko, and that any reference that is passed to a function and does not escape, must also not happen to be aliased by the return value of the function. This has quickly transpired as bugs PR 112711 and PR 112721. Just as IPA-modref

Re: [PATCH V2 3/3] OpenMP: Use enumerators for names of trait-sets and traits

On 27.11.23 18:19, Tobias Burnus wrote: + { "unified_address", + (1 << OMP_TRAIT_SET_IMPLEMENTATION), + OMP_TRAIT_PROPERTY_NONE, true, + NULL + }, I don't understand this code. This looks as if "requires" and "unified_address" are on the same level but in my understanding they h

Re: [PATCH] tree-sra: Avoid returns of references to SRA candidates

On Mon, Nov 27, 2023 at 10:16 AM Martin Jambor wrote: > > Hi, > > The enhancement to address PR 109849 contained an importsnt thinko, > and that any reference that is passed to a function and does not > escape, must also not happen to be aliased by the return value of the > function. This has qui

Re: [RFA] New pass for sign/zero extension elimination

You are applying PATTERN to an INSN_LIST. diff --git a/gcc/ext-dce.cc b/gcc/ext-dce.cc index 52032b50951..4523654538c 100644 --- a/gcc/ext-dce.cc +++ b/gcc/ext-dce.cc @@ -122,10 +122,9 @@ safe_for_live_propagation (rtx_code code) optimziation phase during use handling will be. */ static voi

Re: [PATCH v6 0/21]middle-end: Support early break/return auto-vectorization

Catching up on backlog, so this might already be resolved, but: Richard Biener writes: > On Tue, 7 Nov 2023, Tamar Christina wrote: > >> > -Original Message- >> > From: Richard Biener >> > Sent: Tuesday, November 7, 2023 9:43 AM >> > To: Tamar Christina >> > Cc: gcc-patches@gcc.gnu.org;

Re: [r14-5666 Regression] FAIL: gcc.dg/tree-prof/time-profiler-3.c scan-ipa-dump-times profile "Read tp_first_run: 2" 1 on Linux/x86_64

On Mon, Nov 27, 2023 at 12:00 AM Sebastian Huber wrote: > > On 26.11.23 12:18, haochen.jiang wrote: > > On Linux/x86_64, > > > > 41aacdea55c5d795a7aa195357d966645845d00e is the first bad commit > > commit 41aacdea55c5d795a7aa195357d966645845d00e > > Author: Sebastian Huber > > Date: Mon Nov 20 1

Re: [PATCH v2] Fixed problem with BTF defining smaller enums.

Hi Cupertino, On 11/27/23 09:21, Cupertino Miranda wrote: > Hi everyone, > > David: Thanks for the v1 review. > > This version adds the following; > - test case, > - improves condition logic, > - fixes mask typo. > > Looking forward to your review. v2 LGTM, please apply. Thanks! > > v1 at

Re: hurd: Add multilib paths for gnu-x86_64

Hello, Thomas Schwinge, le lun. 27 nov. 2023 15:48:33 +0100, a ecrit: > On 2023-10-28T21:19:59+0200, Samuel Thibault wrote: > > This is essentially based on t-linux64 version. > > Yes, but isn't the overall setup diverged from GNU/Linux? Not sure what you mean exactly? I just meant that the con

Re: hurd: Ad default-pie and static-pie support

Thomas Schwinge, le lun. 27 nov. 2023 15:52:02 +0100, a ecrit: > On 2023-10-28T21:20:39+0200, Samuel Thibault wrote: > > This fixes the Hurd spec in the default-pie case, and adds static-pie > > support. > > I understand that your change does work for you as-is, so I've now pushed > that to maste

[PATCH] Fortran: deferred-length character optional dummy arguments [PR93762,PR100651]

Dear all, the attached patch fixes the passing of deferred-length character to optional dummy arguments: the character length shall be passed by reference, not by value. Original analysis of the issue by Steve in PR93762, independently done by FX in PR100651. The patch fixes both PRs. Regtested

Re: [RFA] New pass for sign/zero extension elimination

Joern Rennecke writes: > On 11/20/23 11:26, Richard Sandiford wrote: >>> + /* ?!? What is the point of this adjustment to DST_MASK? */ >>> + if (code == PLUS || code == MINUS >>> + || code == MULT || code == ASHIFT) >>> + dst_mask >>> + = dst_mask ? ((2ULL << floor_log2 (dst_mask)) -

Re: [RFA] New pass for sign/zero extension elimination

[Sorry for the slow response] Jeff Law writes: > On 11/20/23 11:26, Richard Sandiford wrote: >> >>scalar_int_mode outer_mode; >>if (!is_a (GET_MODE (x), &outer_mode) >>|| GET_MODE_BITSIZE (outer_mode) > 64) >> continue; > Wouldn't we also want to verify that

Re: [RFA] New pass for sign/zero extension elimination

On 11/27/23 13:03, Richard Sandiford wrote: Joern Rennecke writes: On 11/20/23 11:26, Richard Sandiford wrote: + /* ?!? What is the point of this adjustment to DST_MASK? */ + if (code == PLUS || code == MINUS + || code == MULT || code == ASHIFT) + dst_mask + = dst_mask ? ((2U

Re: [PATCH v3 00/11] : More warnings as errors by default

Florian Weimer writes: > * Jeff Law: > >> On 11/20/23 02:55, Florian Weimer wrote: >>> This revision addresses Marek's comment about handing >>> -Wdeclaration-missing-parameter-type properly in conjunction with >>> -fpermissive. A new test (permerror-fpermissive-nowarning.c) >>> demonstrates t

  1   2   >