Re: [PATCH 1/3] expr: Allow same precision modes conversion between {ibm_extended, ieee_quad}_format [PR112993]

2024-07-08 Thread Kewen.Lin
Hi Richard, on 2024/7/8 19:14, Richard Sandiford wrote: > "Kewen.Lin" writes:[snip...] >>> >>> This part looks good to me FWIW, but what's the correct behaviour of: >>> >>> if (GET_MODE_PRECISION (from_mode) == GET_MODE_PRECISION (to_mode)) >>> { >>> if (REAL_MODE_FORMAT (to_mode)

RE: [PATCH v1] RISC-V: Bugfix vfmv insn honor zvfhmin for FP16 SEW [PR115763]

2024-07-08 Thread Li, Pan2
Backported to gcc 14 already. Pan From: Li, Pan2 Sent: Wednesday, July 3, 2024 10:41 PM To: Kito Cheng ; juzhe.zh...@rivai.ai Cc: gcc-patches@gcc.gnu.org; jeffreya...@gmail.com; rdapp@gmail.com Subject: RE: [PATCH v1] RISC-V: Bugfix vfmv insn honor zvfhmin for FP16 SEW [PR115763] Committed,

Re: Re: [PATCH] [RISC-V] fix zcmp popretz [PR113715]

2024-07-08 Thread Fei Gao
On 2024-07-09 01:49  Jeff Law wrote: > > > >On 7/8/24 2:39 AM, Fei Gao wrote: >> Root cause: >> https://gcc.gnu.org/git/?p=gcc.git;a=commit;h=b27d323a368033f0b37e93c57a57a35fd9997864 >> Commit above tries in targetm.gen_epilogue () to detect if >> there's li a0,0 insn at the end of insn chain, if

[PATCH v3] Vect: Optimize truncation for .SAT_SUB operands

2024-07-08 Thread pan2 . li
From: Pan Li To get better vectorized code of .SAT_SUB, we would like to avoid the truncated operation for the assignment. For example, as below. unsigned int _1; unsigned int _2; unsigned short int _4; _9 = (unsigned short int).SAT_SUB (_1, _2); If we make sure that the _1 is in the range of

Re: [PATCH 1/2] RISC-V: Add support for B standard extension

2024-07-08 Thread Kito Cheng
Forgot to say: either v2 or another patch are fine to me :) On Tue, Jul 9, 2024 at 11:13 AM Kito Cheng wrote: > > Hi Edwin: > > Could you add B into riscv_combine_info as well? extension should list > there if that extension is just an alias of those extensions, so that > GCC will add b into arch

Re: [PATCH 1/2] RISC-V: Add support for B standard extension

2024-07-08 Thread Kito Cheng
Hi Edwin: Could you add B into riscv_combine_info as well? extension should list there if that extension is just an alias of those extensions, so that GCC will add b into arch string when zba, zbb, zbs, that's necessary during arch string canonicalize, which could be used during multilib match :)

Re: [PATCH 2/2] [RISC-V] c implies zca, and conditionally zcf & zcd

2024-07-08 Thread Kito Cheng
LGTM, thanks :) On Tue, Jul 9, 2024 at 10:47 AM Fei Gao wrote: > According to Zc-1.0.4-3.pdf from > > https://github.com/riscvarchive/riscv-code-size-reduction/releases/tag/v1.0.4-3 > The rule is that: > 1. C always implies Zca > 2. C+F implies Zcf (RV32 only) > 3. C+D implies Zcd > > gcc/Change

[PATCH 2/2] [RISC-V] c implies zca, and conditionally zcf & zcd

2024-07-08 Thread Fei Gao
According to Zc-1.0.4-3.pdf from https://github.com/riscvarchive/riscv-code-size-reduction/releases/tag/v1.0.4-3 The rule is that: 1. C always implies Zca 2. C+F implies Zcf (RV32 only) 3. C+D implies Zcd gcc/ChangeLog: * common/config/riscv/riscv-common.cc: c implies zca, and con

Re: [PATCH] [RISC-V] fix zcmp popretz [PR113715]

2024-07-08 Thread Jeff Law
On 7/8/24 7:33 PM, Fei Gao wrote: On 2024-07-09 01:49  Jeff Law wrote: Has the ESWIN team ever considered doing a bootstrap test of the zcmp* extensions?  ie, turn them all on by default, then build GCC natively on an rv32 system (or qemu emulated rv32 system)? I've found that kind of test

Re: Re: [PATCH] [RISC-V] fix zcmp popretz [PR113715]

2024-07-08 Thread Fei Gao
On 2024-07-09 01:49  Jeff Law wrote: >Has the ESWIN team ever considered doing a bootstrap test of the zcmp* >extensions?  ie, turn them all on by default, then build GCC natively on >an rv32 system (or qemu emulated rv32 system)? > >I've found that kind of test amazingly helpful through the year

RE: [PATCH v2] RISC-V: Implement the .SAT_TRUNC for scalar

2024-07-08 Thread Li, Pan2
> What this means is is that you'll have to do the widening operations in > the RISC-V expander. Essentially for an argument smaller than word_mode > you'd want to widen to word_mode while retaining the right semantics. Got it, I think it is the most different part between the scalar and vector

RE: [PATCH v1 1/2] RISC-V: Add testcases for unsigned vector .SAT_ADD IMM form 1

2024-07-08 Thread Li, Pan2
Thanks Jeff. > Do we really need stdio.h? If not, let's avoid this hunk. No, should be debug code, will remove it and commit the series. Pan -Original Message- From: Jeff Law Sent: Tuesday, July 9, 2024 1:34 AM To: Li, Pan2 ; gcc-patches@gcc.gnu.org Cc: juzhe.zh...@rivai.ai; kito.ch..

[PATCH] c++: prev declared hidden tmpl friend inst [PR112288]

2024-07-08 Thread Patrick Palka
Bootstrapped and regtested on x86_64-pc-linux-gnu, does this look OK for trunk/14? -- >8 -- When instantiating a previously declared hidden template friend declared at class template scope such as slot_allocated in the first testcase below, tsubst_friend_function needs to go through all existing

[pushed] c-format.cc: add ctors to format_check_results and format_check_context

2024-07-08 Thread David Malcolm
This is a minor cleanup I spotted whilst working on another patch. No functional change intended. Successfully bootstrapped & regrtested on x86_64-pc-linux-gnu. Pushed to trunk as r15-1900-g113b5ce0610207. gcc/c-family/ChangeLog: * c-format.cc (format_check_results::format_check_results):

Re: [PATCH][wwwdocs] changes.html changes for AArch64 for GCC 14.1

2024-07-08 Thread Gerald Pfeifer
On Mon, 8 Jul 2024, Kyrylo Tkachov wrote: >> How about the following simplification around generic-armv8-a and >> generic-armv8-a? I believe this version is easier to consume. > Yeah, that does look smoother. > Ok. Thanks! Pushed, thanks. Gerald

Re: [PATCH 3/5] RISC-V: Support vmfxx.vf for autovec comparison of vec and imm

2024-07-08 Thread Jeff Law
On 3/1/24 12:48 AM, 钟居哲 wrote: Hi, han. I understand you are trying to support optimize vector- splat_vector into vector-scalar in "expand" stage, that is, vv -> vx or vv -> vf. It's a known issue that we know for a long time. This patch is trying to transform vv->vf when the splat vector

Re: [PATCHv2 2/2] libiberty/buildargv: handle input consisting of only white space

2024-07-08 Thread Jeff Law
On 6/11/24 4:39 AM, Andrew Burgess wrote: Jeff, Thanks for looking these patches over. For testing, using current(ish) gcc HEAD, on x86-64 GNU/Linux, I: ../src/configure --prefix=$(cd .. && pwd)/install make make check I did this with / without my patch and then: find . -nam

Re: [PATCH v2] RISC-V: use fclass insns to implement isfinite and isnormal builtins

2024-07-08 Thread Jeff Law
On 6/30/24 6:47 PM, Vineet Gupta wrote: Changes since v1: - Removed UNSPEC_{INFINITE,ISNORMAL} - Don't hardcode SI in patterns, try to keep X to avoid potential sign extension pitfalls. Implementation wise requires skipping :MODE specifier in match_operand which is flagged as m

Re: [PATCH v2] RISC-V: Implement the .SAT_TRUNC for scalar

2024-07-08 Thread Jeff Law
On 7/3/24 8:07 PM, Li, Pan2 wrote: But if you look at what the hardware can actually support, it doesn't have HImode or QImode operations other than load/store and for rv64 there are no SImode logicals. That's what WORD_REGISTER_OPERATIONS is designed to support. Regardless of what happens

[committed] i386: Promote {QI, HI}mode x86_movcc_0_m1_neg to SImode

2024-07-08 Thread Uros Bizjak
Promote HImode x86_movcc_0_m1_neg insn to SImode to avoid redundant prefixes. Also promote QImode insn when TARGET_PROMOTE_QImode is set. This is similar to promotable_binary_operator splitter, where we promote the result to SImode. Also correct insn condition for splitters to SImode of NEG and NO

Re: [PATCH] RISC-V: Add basic support for the Zacas extension

2024-07-08 Thread Jeff Law
On 7/8/24 1:25 PM, Patrick O'Neill wrote: https://gcc.gnu.org/onlinedocs/gccint/Machine-Independent-Predicates.html | Function: const_int_operand |     This predicate allows any CONST_INT expression that fits in mode. It is an appropriate choice for an immediate operand that does not allow

Re: [PATCH] c++, coroutines, contracts: Handle coroutine and void functions [PR110871,PR110872,PR115434].

2024-07-08 Thread Jason Merrill
On 7/8/24 3:37 PM, Iain Sandoe wrote: Hello Jason, before re-working, I think I need some guidance. On 8 Jul 2024, at 20:19, Jason Merrill wrote: On 6/17/24 8:15 AM, Iain Sandoe wrote: This patch came out of a discussion on Mattermost about how to deal with contracts/coroutines integration.

Re: [PATCH] c++, coroutines, contracts: Handle coroutine and void functions [PR110871,PR110872,PR115434].

2024-07-08 Thread Iain Sandoe
Hello Jason, before re-working, I think I need some guidance. > On 8 Jul 2024, at 20:19, Jason Merrill wrote: > > On 6/17/24 8:15 AM, Iain Sandoe wrote: >> This patch came out of a discussion on Mattermost about how to deal >> with contracts/coroutines integration. Actually, it would also allo

[PATCH] libstdc++: ranges::find needs explicit conversion to size_t [PR115799]

2024-07-08 Thread Jonathan Wakely
This fixes another problem with my recent changes to use memchr in std::find. Tested x86_64-linux. -- >8 -- For an integer-class type we need to use an explicit conversion to size_t. libstdc++-v3/ChangeLog: PR libstdc++/115799 * include/bits/ranges_util.h (__find_fn): Make conv

[committed] libstdc++: Fix _Atomic(T) macro in [PR115807]

2024-07-08 Thread Jonathan Wakely
Tested x86_64-linux. Pushed to trunk. This should be backported too. -- >8 -- The definition of the _Atomic(T) macro needs to refer to ::std::atomic, not some other std::atomic relative to the current namespace. libstdc++-v3/ChangeLog: PR libstdc++/115807 * include/c_compatibili

Re: [PATCH] RISC-V: Add basic support for the Zacas extension

2024-07-08 Thread Patrick O'Neill
On 7/6/24 07:20, Jeff Law wrote: On 7/3/24 3:16 PM, Patrick O'Neill wrote: Regarding the amocas.q follow-up patch: I'm having trouble with matching any TImode compare-and-swap patterns. Here's the RTL I'm trying: (define_mode_iterator SUPERGPR [SI DI TI]) (define_insn "zacas_atomic_cas_v

Re: [PATCH] c++, coroutines, contracts: Handle coroutine and void functions [PR110871,PR110872,PR115434].

2024-07-08 Thread Jason Merrill
On 6/17/24 8:15 AM, Iain Sandoe wrote: This patch came out of a discussion on Mattermost about how to deal with contracts/coroutines integration. Actually, it would also allow some semantic checking to be deferred until the same spot - at which time there are no dependent types, which can simpli

Re: [RFC/PATCH] libgcc: sh: Use soft-fp for non-hosted SH3/SH4

2024-07-08 Thread Sébastien Michelland
Hi again! It shouldn't be needed to build GDB separately or to specify the -m32 flags. Not sure why you have to do that. It was in the document you sent, especially some warning about sh-elf-run not working on 64-bit hosts. Guess that's solved by now. I've just tried the following configur

Re: [PATCH 3/3] c++: Add locations to using_p OVERLOADs

2024-07-08 Thread Jason Merrill
On 7/6/24 10:13 PM, Nathaniel Shead wrote: Bootstrapped and regtested on x86_64-pc-linux-gnu, OK for trunk? I have also been working on a patch that uses the locations of using-decls in 'diagnose_name_conflict' and 'duplicate_decls' calls, but that will need a fair bit more work that I'll probab

Re: [PATCH 2/3] c++/modules: Handle redefinitions of using-decls

2024-07-08 Thread Jason Merrill
On 7/6/24 10:07 PM, Nathaniel Shead wrote: Bootstrapped and regtested on x86_64-pc-linux-gnu, OK for trunk? -- >8 -- This fixes an ICE exposed by supporting exported non-function using-decls. Sometimes when preparing to define a class, xref_tag will find a using-decl belonging to a different n

Re: [PATCH 5/5] Document return value in write_cv_integer

2024-07-08 Thread Jeff Law
On 6/29/24 4:06 PM, Mark Harmstone wrote: gcc/ * dwarf2codeview.cc (write_lf_modifier): Expand upon comment. OK jeff

Re: [PATCH 4/5] Make sure CodeView symbols are aligned

2024-07-08 Thread Jeff Law
On 6/29/24 4:06 PM, Mark Harmstone wrote: CodeView symbols have to be multiples of four bytes; add an alignment directive to write_data_symbol to ensure this. Note that these can be zeroes, so we can rely on GAS to do this for us; it's only types that need f3, f2, f1 values. gcc/

Re: [PATCH 3/5] Avoid magic numbers when writing CodeView padding

2024-07-08 Thread Jeff Law
On 6/29/24 4:06 PM, Mark Harmstone wrote: Adds names for the padding magic numbers to enum cv_leaf_type. gcc/ * dwarf2codeview.cc (enum cv_leaf_type): Add padding constants. (write_cv_padding): Use names for padding constants. OK jeff

Re: [PATCH 2/5] Add CodeView enum cv_sym_type

2024-07-08 Thread Jeff Law
On 6/29/24 4:06 PM, Mark Harmstone wrote: Make everything more gdb-friendly by using an enum for symbol constants rather than #defines. gcc/ * dwarf2codeview.cc (S_LDATA32, S_GDATA32, S_COMPILE3): Undefine. (enum cv_sym_type): Define. (struct codevi

Re: [PATCH 1/5] Add CodeView enum cv_leaf_type

2024-07-08 Thread Jeff Law
On 6/29/24 4:06 PM, Mark Harmstone wrote: Make everything more gdb-friendly by using an enum for type constants rather than #defines. gcc/ * dwarf2codeview.cc (enum cv_leaf_type): Define. (struct codeview_subtype): Use enum cv_leaf_type. (struct cod

Re: [PATCH] [RISC-V] fix zcmp popretz [PR113715]

2024-07-08 Thread Jeff Law
On 7/8/24 2:39 AM, Fei Gao wrote: Root cause: https://gcc.gnu.org/git/?p=gcc.git;a=commit;h=b27d323a368033f0b37e93c57a57a35fd9997864 Commit above tries in targetm.gen_epilogue () to detect if there's li a0,0 insn at the end of insn chain, if so, cm.popret is replaced by cm.popretz and li a0,0

[Committed] Remove trailing whitespace from invoke.texi

2024-07-08 Thread Patrick O'Neill
On 7/6/24 06:50, Jeff Law wrote: On 7/2/24 7:28 PM, Patrick O'Neill wrote: gcc/ChangeLog: * doc/invoke.texi: Remove trailing whitespace. OK jeff Committed. Patrick

Re: [PATCH v1 1/2] RISC-V: Add testcases for unsigned vector .SAT_ADD IMM form 1

2024-07-08 Thread Jeff Law
On 7/8/24 8:15 AM, pan2...@intel.com wrote: From: Pan Li gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/autovec/binop/vec_sat_arith.h: Add help test macro. * gcc.target/riscv/rvv/autovec/binop/vec_sat_data.h: New test. * gcc.target/riscv/rvv/autovec/binop/ve

Re: [PATCH 1/2] RISC-V: Add support for B standard extension

2024-07-08 Thread Jeff Law
On 7/8/24 11:20 AM, Edwin Lu wrote: This patch adds support for recognizing the B standard extension to be the collection of Zba, Zbb, Zbs extensions for consistency and conciseness across toolchains * https://github.com/riscv/riscv-b/tags gcc/ChangeLog: * common/config/riscv/riscv-

[PATCH 2/2] RISC-V: Update testsuite to use b

2024-07-08 Thread Edwin Lu
Update all instances of zba_zbb_zbs in the testsuite to use b instead. gcc/testsuite/ChangeLog: * g++.target/riscv/redundant-bitmap-1.C: Use gcb instead of zba_zbb_zbs * g++.target/riscv/redundant-bitmap-2.C: Ditto * g++.target/riscv/redundant-bitmap-3.C: Ditto

[PATCH 1/2] RISC-V: Add support for B standard extension

2024-07-08 Thread Edwin Lu
This patch adds support for recognizing the B standard extension to be the collection of Zba, Zbb, Zbs extensions for consistency and conciseness across toolchains * https://github.com/riscv/riscv-b/tags gcc/ChangeLog: * common/config/riscv/riscv-common.cc: Add imply rules for B

[PATCH 0/2] Add support for B extention

2024-07-08 Thread Edwin Lu
Support for recognizing B as the collection of zba, zbb, zbs extensions https://github.com/riscv/riscv-b/tags Edwin Lu (2): RISC-V: Add support for B standard extension RISC-V: Update testsuite to use b gcc/testsuite/ChangeLog: gcc/common/config/riscv/riscv-common.cc | 6

[PATCH v9 10/10] Mark expand musttail error messages for translation

2024-07-08 Thread Andi Kleen
The musttail error messages are reported to the user, so must be translated. gcc/ChangeLog: PR83324 * calls.cc (initialize_argument_information): Mark messages for translation. (can_implement_as_sibling_call_p): Dito. (expand_call): Dito. --- gcc/calls.cc

[PATCH v9 05/10] C: Implement musttail attribute for returns

2024-07-08 Thread Andi Kleen
Implement a C23 clang compatible musttail attribute similar to the earlier C++ implementation in the C parser. PR83324 gcc/c/ChangeLog: * c-parser.cc (struct attr_state): Define with musttail_p. (c_parser_statement_after_labels): Handle [[musttail]] (c_parser_std_

[PATCH v9 08/10] Add tests for C/C++ musttail attributes

2024-07-08 Thread Andi Kleen
Some adopted from the existing C musttail plugin tests. gcc/testsuite/ChangeLog: * c-c++-common/musttail1.c: New test. * c-c++-common/musttail2.c: New test. * c-c++-common/musttail3.c: New test. * c-c++-common/musttail4.c: New test. * c-c++-common/musttail7

[PATCH v9 09/10] Add documentation for musttail attribute

2024-07-08 Thread Andi Kleen
gcc/ChangeLog: PR83324 * doc/extend.texi: Document [[musttail]] --- gcc/doc/extend.texi | 25 +++-- 1 file changed, 23 insertions(+), 2 deletions(-) diff --git a/gcc/doc/extend.texi b/gcc/doc/extend.texi index b2e41a581dd1..f83e643da19c 100644 --- a/gcc/doc/ex

[PATCH v9 07/10] Give better error messages for musttail

2024-07-08 Thread Andi Kleen
When musttail is set, make tree-tailcall give error messages when it cannot handle a call. This avoids vague "other reasons" error messages later at expand time when it sees a musttail function not marked tail call. In various cases this requires delaying the error until the call is discovered. A

[PATCH v9 01/10] Improve must tail in RTL backend

2024-07-08 Thread Andi Kleen
- Give error messages for all causes of non sibling call generation - When giving error messages clear the musttail flag to avoid ICEs - Error out when tree-tailcall failed to mark a must-tail call sibcall. In this case it doesn't know the true reason and only gives a vague message. PR8332

[PATCH v9 06/10] Enable musttail tail conversion even when not optimizing

2024-07-08 Thread Andi Kleen
Enable the tailcall optimization for non optimizing builds, but in this case only checks calls that have the musttail attribute set. This makes musttail work without optimization. This is done with a new late musttail pass that is only active when not optimizing. The new pass relies on tree-cfg to

[PATCH v9 04/10] C++: Support clang compatible [[musttail]] (PR83324)

2024-07-08 Thread Andi Kleen
This patch implements a clang compatible [[musttail]] attribute for returns. musttail is useful as an alternative to computed goto for interpreters. With computed goto the interpreter function usually ends up very big which causes problems with register allocation and other per function optimizati

[PATCH v9 03/10] Add a musttail generic attribute to the c-attribs table

2024-07-08 Thread Andi Kleen
The actual handling is directly in the parser since the generic mechanism doesn't support statement attributes, but this gives basic error checking/detection on the attribute. gcc/c-family/ChangeLog: PR83324 * c-attribs.cc (handle_musttail_attribute): Add. * c-common.h (ha

New musttail patchkit

2024-07-08 Thread Andi Kleen
This version addresses all the review feedback (Thanks everyone!) It is getting close to the finish line. The only missing reviews now are for the C frontend part (patch 5). Joseph and Marek, I would appreciate if you could take a look. - Addressed Richie's feedback with various improvements and

[PATCH v9 02/10] Fix pro_and_epilogue for sibcalls at -O0 (PR115255)

2024-07-08 Thread Andi Kleen
Some of the cfg fixups in pro_and_epilogue for sibcalls were dependent on "optimize". Make them check cfun->tail_call_marked instead to handle the -O0 musttail case. This fixes the musttail test cases on arm targets. gcc/ChangeLog: PR target/115255 * function.cc (thread_prologue_

RE - Your Solution for right prospect - gcc.gnu.org

2024-07-08 Thread Brenda Williams
Hi there, Checking in to see if you received my previous email. Could we move forward with sharing sample leads? Best, Brenda ___ Fr

Re: [PATCH v3] Target-independent store forwarding avoidance.

2024-07-08 Thread Jeff Law
On 7/8/24 6:58 AM, Manolis Tsamis wrote: This is still hard to tell. In some cases I have observed either improvement or regressions in benchmarks, which are highly susceptible to costing and the specific store-forwarding penalties of the CPU. I have seen cases where the store-forwarding ins

Re: [PATCH 1/3] c++: Introduce USING_DECLs for non-function usings [PR114683]

2024-07-08 Thread Jason Merrill
On 7/6/24 10:06 PM, Nathaniel Shead wrote: Bootstrapped and regtested on x86_64-pc-linux-gnu, OK for trunk? -- >8 -- With modules, a non-function using-declaration is not completely interchangable with the declaration that it refers to; in particular, such a using-declaration may be exported wi

Re: [PATCH 2/2] [RISC-V] c implies zca, and conditionally zcf & zcd

2024-07-08 Thread Jeff Law
On 7/7/24 11:29 PM, Fei Gao wrote: On 2024-07-06 22:15  Jeff Law wrote: On 7/5/24 3:56 AM, Fei Gao wrote: According to Zc-1.0.4-3.pdf from https://github.com/riscvarchive/riscv-code-size-reduction/releases/tag/v1.0.4-3 The rule is that: 1. C always implies Zca 2. C+F implies Zcf (RV32 on

[PATCH 2/2] arm: [MVE intrinsics] Improve vdupq_n implementation

2024-07-08 Thread Christophe Lyon
This patch makes the non-predicated vdupq_n MVE intrinsics use vec_duplicate rather than an unspec. This enables the compiler to generate better code sequences (for instance using vmov when possible). The patch renames the existing mve_vdup pattern into @mve_vdupq_n, and removes the now useless @

[PATCH 1/2] arm: [MVE intrinsics] fix vdup iterator

2024-07-08 Thread Christophe Lyon
This patch fixes a bug where the mode iterator for mve_vdup should be MVE_VLD_ST instead of MVE_vecs: V2DI and V2DF (thus vdup.64) are not supported by MVE. 2024-07-02 Jolen Li Christophe Lyon gcc/ * config/arm/mve.md (mve_vdup): Fix mode iterator. --- gcc/config

Re: [PATCH v8 07/12] Enable musttail tail conversion even when not optimizing

2024-07-08 Thread Andi Kleen
On Mon, Jul 08, 2024 at 05:27:53PM +0200, Richard Biener wrote: > > > > Am 08.07.2024 um 17:22 schrieb Andi Kleen : > > > > On Mon, Jul 08, 2024 at 08:53:27AM +0200, Richard Biener wrote: > >> Ah, I see. So this pass is responsible for both -O0 and > >> -fno-optimized-sibling-calls. > >> But I

Re: [PATCH v3] Target-independent store forwarding avoidance.

2024-07-08 Thread Andi Kleen
> I have added a target hook for this in v4 of this patch. The hook > receives all the information about the stores, the load, the estimated > sequence cost and whether we expect to eliminate the load. With this > information the target should be able to make an informed decision. > > What you men

Re: [PATCH v8 08/12] Give better error messages for musttail

2024-07-08 Thread Andi Kleen
On Mon, Jul 08, 2024 at 09:06:21AM +0200, Richard Biener wrote: > On Sat, Jul 6, 2024 at 8:45 PM Andi Kleen wrote: > > > > > >if (!single_succ_p (bb)) > > > > -return; > > > > +{ > > > > + int num_eh, num_other; > > > > + bb_get_succ_edge_count (bb, num_eh, num_other); > > >

Re: [PATCH v8 07/12] Enable musttail tail conversion even when not optimizing

2024-07-08 Thread Richard Biener
> Am 08.07.2024 um 17:22 schrieb Andi Kleen : > > On Mon, Jul 08, 2024 at 08:53:27AM +0200, Richard Biener wrote: >> Ah, I see. So this pass is responsible for both -O0 and >> -fno-optimized-sibling-calls. >> But I'm quite sure the other pass doesn't run with -O0 >> -foptimize-sibling-calls,

Re: [PATCH v8 09/12] Delay caller error reporting for musttail

2024-07-08 Thread Andi Kleen
> > Overall the logic in this pass is rather convoluted and > > could deserve some cleanups and separation of concerns. > > e.g. it would be better to separate tail calls and tail > > recursion. But I'm not trying to rewrite the pass here. > > Understood. For a v9, can you squash the tree-tailcal

Re: [PATCH v8 07/12] Enable musttail tail conversion even when not optimizing

2024-07-08 Thread Andi Kleen
On Mon, Jul 08, 2024 at 08:53:27AM +0200, Richard Biener wrote: > Ah, I see. So this pass is responsible for both -O0 and > -fno-optimized-sibling-calls. > But I'm quite sure the other pass doesn't run with -O0 > -foptimize-sibling-calls, does it? It does run: ./cc1 -O0 -fdump-passes -foptimize-

Re: [PATCH] c++/modules: Keep entity mapping info across duplicate_decls [PR99241]

2024-07-08 Thread Patrick Palka
On Mon, 8 Jul 2024, Nathaniel Shead wrote: > Bootstrapped and regtested on x86_64-pc-linux-gnu, OK for trunk/14? > > -- >8 -- > > When duplicate_decls finds a match with an existing imported > declaration, it clears DECL_LANG_SPECIFIC of the olddecl and replaces it > with the contents of newdecl

Re: [PATCH] gimple ssa: Teach switch conversion to optimize powers of 2 switches

2024-07-08 Thread Filip Kastl
Hi, I'm replying to Richard and keeping Andrew in cc since your suggestions overlap. On Tue 2024-06-11 14:48:06, Richard Biener wrote: > On Thu, 30 May 2024, Filip Kastl wrote: > > +/* { dg-do compile } */ > > +/* { dg-options "-O2 -fdump-tree-switchconv -march=znver3" } */ > > I think it's bet

Re: [PATCH] c++, contracts: Fix ICE in create_tmp_var [PR113968]

2024-07-08 Thread Jason Merrill
On 7/8/24 7:47 AM, Nina Dinka Ranns wrote: HI Jason, On Fri, 5 Jul 2024 at 17:31, Jason Merrill wrote: On 7/5/24 10:25 AM, Nina Dinka Ranns wrote: Certain places in contract parsing currently do not check for errors. This results in contracts with embedded errors which eventually confuse gim

Re: [PATCH] Fix gimplification of ordering comparisons of arrays of bytes

2024-07-08 Thread Richard Biener
> Am 08.07.2024 um 16:39 schrieb Eric Botcazou : > >  >> >> IIRC at least some array of vector also have vector mode, I'm not sure >> type_for_mode is an INTEGER_TYPE in that case nor am I sure the max 128 >> bytes size holds here. > > Yes, array types may have vector modes. > >> There's al

Re: [PATCH] Fix gimplification of ordering comparisons of arrays of bytes

2024-07-08 Thread Eric Botcazou
> IIRC at least some array of vector also have vector mode, I'm not sure > type_for_mode is an INTEGER_TYPE in that case nor am I sure the max 128 > bytes size holds here. Yes, array types may have vector modes. > There's also array_mode_supported_p which can indicate larger modes are OK. Yes, b

RE: [PATCH v2] Vect: Distribute truncation into .SAT_SUB operands

2024-07-08 Thread Li, Pan2
Thanks Richard for comments. > Sorry if this has been asked before, but: why not use SAT_TRUNC > instead of MIN_EXPR+truncate? Oops, the .SAT_TRUNC is not ready when draft this patch. Yes, we can leverage SAT_TRUNC now as .SAT_TRUNC committed, will update in v3. > I was suggesting to only rely

[PATCH v1 1/2] RISC-V: Add testcases for unsigned vector .SAT_ADD IMM form 1

2024-07-08 Thread pan2 . li
From: Pan Li After the middle-end supported the vector mode of .SAT_ADD, add more testcases to ensure the correctness of RISC-V backend for form 1. Aka: Form 1: #define DEF_VEC_SAT_U_ADD_IMM_FMT_1(T, IMM) \ T __attribute__((noinline))

[PATCH v1 2/2] RISC-V: Add testcases for unsigned vector .SAT_ADD IMM form 2

2024-07-08 Thread pan2 . li
From: Pan Li After the middle-end supported the vector mode of .SAT_ADD, add more testcases to ensure the correctness of RISC-V backend for form 2. Aka: Form 2: #define DEF_VEC_SAT_U_ADD_IMM_FMT_2(T, IMM) \ T __attribute__((noinline))

Re: [RFC/PATCH] libgcc: sh: Use soft-fp for non-hosted SH3/SH4

2024-07-08 Thread Jeff Law
On 7/8/24 5:52 AM, Oleg Endo wrote: From what I know it started during the earlier cygwin days in the 90s, originally contracted by Hitachi to complement their own in-house C compiler and also to allow sh-linux to happen at some point. It was entertained by Renesas for a while through furt

[PATCH 2/2] RISC-V: Support group-size of three in SLP load permutation lowering

2024-07-08 Thread Richard Biener
The following adds support for group-size three in SLP load permutation lowering to match the non-SLP capabilities. This is done by using the non-interleaving fallback code which then creates at VF == 4 from { { a0, b0, c0 }, { a1, b1, c1 }, { a2, b2, c2 }, { a3, b3, c3 } } the intermediate vector

[PATCH 1/2] lower SLP load permutation to interleaving

2024-07-08 Thread Richard Biener
The following emulates classical interleaving for SLP load permutes that we are unlikely handling natively. This is to handle cases where interleaving (or load/store-lanes) is the optimal choice for vectorizing even when we are doing that within SLP. An example would be void foo (int * __restric

Re: [PATCH v3] Target-independent store forwarding avoidance.

2024-07-08 Thread Manolis Tsamis
On Thu, Jun 13, 2024 at 7:18 PM Andi Kleen wrote: > > Manolis Tsamis writes: > > > > Assembly like this can appear with bitfields or type punning / unions. > > On stress-ng when running the cpu-union microbenchmark the following > > speedups > > have been observed. > > > > Neoverse-N1: +2

[PATCH v4] Target-independent store forwarding avoidance.

2024-07-08 Thread Manolis Tsamis
This pass detects cases of expensive store forwarding and tries to avoid them by reordering the stores and using suitable bit insertion sequences. For example it can transform this: strbw2, [x1, 1] ldr x0, [x1] # Expensive store forwarding to larger load. To: ldr

One-stop Sourcing Your Brand's Apparel & Accessories

2024-07-08 Thread Amy Cai
Hello friend, Hope this email finds you well! This is *Amy* from WellSucceed Embroidery, a company with 21years experience in branding apparel & accessories. Our products cover every corner in life. From soft to hard and small to big, such as plush toys, backpacks, knit sweaters, underwear, be

[PATCH] c++/modules: Propagate BINDING_VECTOR_*_DUPS_P on realloc [PR99242]

2024-07-08 Thread Nathaniel Shead
Bootstrapped and regtested (so far just modules.exp) on x86_64-pc-linux-gnu, OK for trunk/14 if full regtest succeeds? -- >8 -- When importing modules, when a binding vector for a name runs out of slots it gets reallocated with a larger size, and existing bindings are copied across. However, the

Re: [RFC/PATCH] libgcc: sh: Use soft-fp for non-hosted SH3/SH4

2024-07-08 Thread Oleg Endo
Hi, > > > > The default sh-elf configuration has no multi-libs for SH3 and SH4 > > > > variants > > > > without FPU (from what I can see). So it won't use soft-fp so much > > > > during > > > > sim testing. So please change to soft-fp for sh*, not just SH3/SH4. > > > > Got it, done that loc

Re: [PATCH] c++, contracts: Fix ICE in create_tmp_var [PR113968]

2024-07-08 Thread Nina Dinka Ranns
HI Jason, On Fri, 5 Jul 2024 at 17:31, Jason Merrill wrote: > > On 7/5/24 10:25 AM, Nina Dinka Ranns wrote: > > Certain places in contract parsing currently do not check for errors. > > This results in contracts > > with embedded errors which eventually confuse gimplify. Checks for > > errors add

Re: [PATCH v2] Vect: Distribute truncation into .SAT_SUB operands

2024-07-08 Thread Richard Biener
On Fri, Jul 5, 2024 at 4:20 PM wrote: > > From: Pan Li > > To get better vectorized code of .SAT_SUB, we would like to avoid the > truncated operation for the assignment. For example, as below. > > unsigned int _1; > unsigned int _2; > _9 = (unsigned short int).SAT_SUB (_1, _2); > > If we make

Re: [PATCH v2] Vect: Distribute truncation into .SAT_SUB operands

2024-07-08 Thread Richard Sandiford
pan2...@intel.com writes: > From: Pan Li > > To get better vectorized code of .SAT_SUB, we would like to avoid the > truncated operation for the assignment. For example, as below. > > unsigned int _1; > unsigned int _2; > _9 = (unsigned short int).SAT_SUB (_1, _2); > > If we make sure that the _

[PATCH][v2] load and store-lanes with SLP

2024-07-08 Thread Richard Biener
The following is a prototype for how to represent load/store-lanes within SLP. I've for now settled with having a single load node with multiple permute nodes, one for each loaded lane and a single store node plus a single permute node feeding it. For for (int i = 0; i < 1024; ++i) {

Re: [RFC] Proposal to support Packed Boolean Vector masks.

2024-07-08 Thread Richard Biener
On Mon, Jul 8, 2024 at 11:27 AM Tejas Belagod wrote: > > Hi, > > Sorry to have dropped the ball on > https://gcc.gnu.org/pipermail/gcc-patches/2023-July/625535.html, but > here I've tried to pick it up again and write up a strawman proposal for > elevating __attribute__((vector_mask)) to the FE fr

Re: [PATCH 1/3] expr: Allow same precision modes conversion between {ibm_extended, ieee_quad}_format [PR112993]

2024-07-08 Thread Richard Sandiford
"Kewen.Lin" writes: > Hi Richard, > > Thanks for the review comments! > > on 2024/7/4 23:58, Richard Sandiford wrote: >> "Kewen.Lin" writes: >>> Hi, >>> >>> With some historical reasons, rs6000 defines KFmode, TFmode >>> and IFmode to have different mode precision, but it causes >>> some issues a

Re: [PING^2] [PATCH 00/11] AArch64/OpenMP: Test SVE ACLE types with various OpenMP constructs.

2024-07-08 Thread Tejas Belagod
Ping^2 on the series please. Thanks, Tejas. On 5/27/24 10:36 AM, Tejas Belagod wrote: Note: This patch series is based on Richard's initial patch https://gcc.gnu.org/pipermail/gcc-patches/2022-November/606741.html and Jakub's suggestion https://gcc.gnu.org/pipermail/gcc-patches/2023-Febru

[RFC] Proposal to support Packed Boolean Vector masks.

2024-07-08 Thread Tejas Belagod
Hi, Sorry to have dropped the ball on https://gcc.gnu.org/pipermail/gcc-patches/2023-July/625535.html, but here I've tried to pick it up again and write up a strawman proposal for elevating __attribute__((vector_mask)) to the FE from GIMPLE. Thanks, Tejas. Motivation -- The idea o

Re: [RFC PATCH] ARM: thumb1: fix bad code emitted when HI_REGS involved

2024-07-08 Thread Siarhei Volkau
ping чт, 20 июн. 2024 г. в 12:09, Siarhei Volkau : > > This patch deals with consequences but not the root cause though. > > There are 5 cases which are subjects to rewrite: > case #1: > mov ip, r1 > add r2, ip > # ip is dead here > can be rewritten as: > adds r2, r1 > > case #2: > add i

[PATCH] [RISC-V] fix zcmp popretz [PR113715]

2024-07-08 Thread Fei Gao
Root cause: https://gcc.gnu.org/git/?p=gcc.git;a=commit;h=b27d323a368033f0b37e93c57a57a35fd9997864 Commit above tries in targetm.gen_epilogue () to detect if there's li a0,0 insn at the end of insn chain, if so, cm.popret is replaced by cm.popretz and li a0,0 insn is deleted. Insertion of the gene

Re: [PATCH v3] RISC-V: Implement .SAT_TRUNC for vector unsigned int

2024-07-08 Thread juzhe.zh...@rivai.ai
LGTM juzhe.zh...@rivai.ai From: pan2.li Date: 2024-07-08 14:57 To: gcc-patches CC: juzhe.zhong; kito.cheng; jeffreyalaw; rdapp.gcc; Pan Li Subject: [PATCH v3] RISC-V: Implement .SAT_TRUNC for vector unsigned int From: Pan Li This patch would like to implement the .SAT_TRUNC for the RISC-V b

Re: [PATCH] Fix gimplification of ordering comparisons of arrays of bytes

2024-07-08 Thread Richard Biener
On Mon, Jul 8, 2024 at 9:11 AM Eric Botcazou wrote: > > Hi, > > the Ada compiler now defers to the gimplifier for ordering comparisons of > arrays of bytes (Ada parlance for <, >, <= and >=) because the gimplifier in > turn defers to memcmp for them, which implements the required semantics. > > Ho

Re: [PATCH][wwwdocs] changes.html changes for AArch64 for GCC 14.1

2024-07-08 Thread Kyrylo Tkachov
Hi Gerald, > On 7 Jul 2024, at 19:26, Gerald Pfeifer wrote: > > External email: Use caution opening links or attachments > > > On Tue, 2 Apr 2024, Kyrylo Tkachov wrote: >> Here's a writeup of the AArch64 changes to highlight in GCC 14.1. If >> there's something you'd like to highlight feel fre

[PATCH] Fix gimplification of ordering comparisons of arrays of bytes

2024-07-08 Thread Eric Botcazou
Hi, the Ada compiler now defers to the gimplifier for ordering comparisons of arrays of bytes (Ada parlance for <, >, <= and >=) because the gimplifier in turn defers to memcmp for them, which implements the required semantics. However the gimplifier has a special processing for aggregate types

Re: [PATCH v8 08/12] Give better error messages for musttail

2024-07-08 Thread Richard Biener
On Sat, Jul 6, 2024 at 8:45 PM Andi Kleen wrote: > > > >if (!single_succ_p (bb)) > > > -return; > > > +{ > > > + int num_eh, num_other; > > > + bb_get_succ_edge_count (bb, num_eh, num_other); > > > + /* Allow EH edges so that we can give a better > > > +error mes