Hi, Jeff. I really hope the current "refine tune RA constraint" patches can be
merged into GCC-13.
These patches are just making RA constraint to be consistent with RVV ISA after
I double checked RVV ISA.
These RA constraints changing is very safe.
This is the last stuff that I want to make it in
From: Ju-Zhe Zhong
Fix bugs of ternary intrinsic pattern:
interger:
vnmsac.vv vd, vs1, vs2, vm# vd[i] = -(vs1[i] * vs2[i]) + vd[i] (minus op3
(mult op1 op2))
vnmsac.vx vd, rs1, vs2, vm# vd[i] = -(x[rs1] * vs2[i]) + vd[i] (minus op3
(mult op1 op2))
floating-point:
# FP multiply-accu
From: Ju-Zhe Zhong
Fix bugs of ternary intrinsic pattern:
interger:
vnmsac.vv vd, vs1, vs2, vm# vd[i] = -(vs1[i] * vs2[i]) + vd[i] (minus op3
(mult op1 op2))
vnmsac.vx vd, rs1, vs2, vm# vd[i] = -(x[rs1] * vs2[i]) + vd[i] (minus op3
(mult op1 op2))
floating-point:
# FP multiply-accu
On 2/24/23 11:35, Qing Zhao via Gcc-patches wrote:
gcc/c-family/ChangeLog:
* c.opt: New option -Wgnu-variable-sized-type-not-at-end.
gcc/c/ChangeLog:
* c-decl.cc (finish_struct): Issue warnings for new option.
gcc/ChangeLog:
* doc/extend.texi: Document GCC extension
Yes, I have write access. However, I am new to commit patch to GCC trunk.
I didn't figure out how to commit patch to GCC trunk.
And I am afraid of producing a potential risk to GCC trunk during stage 4 in
GCC 13.
So I am gonna learn to commit codes when GCC 14 is open.
And currently, I let Kito c
On 3/12/23 16:54, Jeff Law wrote:
Windows code is effectively always PIC, since the PE loader can
relocate it anywhere if the preferred address is already occupied.
Patch still OK?
Yes, still OK. Just make the trivial ChangeLog adjustments.
Done, pushed to master branch, thanks.
Tested on x86_64-pc-linux-gnu, pushed to trunk as obvious.
-- >8 --
PR libstdc++/109111
libstdc++-v3/ChangeLog:
* include/std/ranges (repeat_view): Remove redundant parentheses
in requires-clause.
(repeat_view::_Iterator): Correct the requires-clause.
---
libstd
Since according to RVV ISA, "The destination vector register can overlap the
source operands, including the mask register."
That means we can have vredsum.vs v0,v8,v9,v0.t. This patch is to refine the
constraint to allow this happen that the current RA constraint doesn't allow.
Since you can see
Here we're failing to detect a signed overflow with -O because match.pd,
since r8-1516, transforms
c = (a + 1) - (int) (short int) b;
into
c = (int) ((unsigned int) a + 4294946117);
wrongly eliding the overflow. This kind of problems is usually
avoided by using TYPE_OVERFLOW_SANITIZED in t
Tested x86_64-pc-linux-gnu, applying to trunk.
-- 8< --
Generally we expect TPARMS_PRIMARY_TEMPLATE to be set, but sometimes it
isn't for partial instantiations. This ought to be improved, but it's
trivial to work around it in this case.
PR c++/108468
gcc/cp/ChangeLog:
* pt.cc
Kito Cheng writes:
> committed to trunk, thanks :)
>
> On Tue, Mar 14, 2023 at 9:44 PM Kito Cheng wrote:
>>
>> RISC-V part is ok, and I assume you didn't have write access so I'm
>> gonna push that since the system.h change also got approved :)
Thanks a bunch! :)
>>
>> On Tue, Mar 14, 2023 at
While working on autovectorizing for the RISCV port I encountered an issue
where can_duplicate_and_interleave_p assumes that GET_MODE_NUNITS is a
evenly divisible by two. The RISC-V target has vector modes (e.g. VNx1DImode),
where GET_MODE_NUNITS is equal to one.
Tested on RISCV and x86_64-linux-g
Kito Cheng writes:
> RISC-V part is ok, and I assume you didn't have write access so I'm
> gonna push that since the system.h change also got approved :)
>
> On Tue, Mar 14, 2023 at 5:07 PM Richard Biener via Gcc-patches
> wrote:
>>
>> On Tue, Mar 14, 2023 at 1:24 AM Sam James via Gcc-patches
>
On 3/14/23 12:41, Patrick Palka wrote:
When redeclaring a member of a constrained class template, we need to
repeat the class's constraints, but it turns out we don't verify
anywhere that the repeated constraints match the class's constraints.
A safe place to do so seems to be in push_template_de
Hi Jeff,
I revived profile_merger tool in http://github.com/google/autofdo and re-worked
the patch to merge profiles for compiling the libraries.
Please take a look at the attached patch.
Thanks,
Eugene
-Original Message-
From: Jeff Law
Sent: Tuesday, November 22, 2022 10:16 PM
To:
Hi,
This patch fixes linker error as described in PR d/109108.
Previously lambdas were connected to the module they were defined in.
Now they are emitted into every referencing compilation unit, and are
given one-only linkage.
Bootstrapped and regression tested on x86_64-linux-gnu/-m32/-mx32,
co
Dear all,
the attached patch, which is based on a draft by Tobias, fixes
an old rejects-valid issue with rank checking for CLASS arrays
by using the proper array spec of CLASS variables.
The testcase covers only non-coarray cases, as playing with
coarray variants hit pre-exisiting issues in gfort
Tested x86_64-pc-linux-gnu, applying to trunk.
-- 8< --
I removed this folding in GCC 12 because it was interfering with an
experiment of richi's, but that never went in and the change causes
regressions, so let's put it back.
This reverts commit r12-5638-ga3e75c1491cd2d.
PR c++/107310
On 3/13/23 08:17, juzhe.zh...@rivai.ai wrote:
From: Ju-Zhe Zhong
This patch fix bug: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=109092.
gcc/ChangeLog:
* config/riscv/riscv.md: Fix subreg bug.
LGTM. Do you have write access now? If so, go ahead and commit this patch.
Do you h
On 3/13/23 02:28, juzhe.zh...@rivai.ai wrote:
From: Ju-Zhe Zhong
For DEST EEW < SOURCE EEW, we can partial overlap register
according to RVV ISA.
gcc/ChangeLog:
* config/riscv/vector.md: Fix RA constraint.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/base/narrow_cons
On 3/13/23 03:05, juzhe.zh...@rivai.ai wrote:
From: Ju-Zhe Zhong
According to RVV ISA:
14. Vector Reduction Operations
"The destination vector register can overlap the source operands, including the mask
register."
gcc/ChangeLog:
* config/riscv/vector.md: Refine RA constraint.
On 3/13/23 02:19, juzhe.zh...@rivai.ai wrote:
From: Ju-Zhe Zhong
Co-authored-by: kito-cheng
Co-authored-by: kito-cheng
Consider this case:
void f19 (void *base,void *base2,void *out,size_t vl, int n)
{
vuint64m8_t bindex = __riscv_vle64_v_u64m8 (base + 100, vl);
for (int i = 0;
On 3/10/23 05:40, Jin Ma via Gcc-patches wrote:
This patch adds the 'Zfa' extension for riscv, which is based on:
https://github.com/riscv/riscv-isa-manual/commit/d74d99e22d5f68832f70982d867614e2149a3bd7
latest 'Zfa' change on the master branch of the RISC-V ISA Manual as
of this writing.
On 3/9/23 20:02, juzhe.zh...@rivai.ai wrote:
From: Ju-Zhe Zhong
According to RVV ISA, for narrow instructions:
The destination EEW is smaller than the source EEW and the overlap is
in the lowest-numbered part of the source register group.
(e.g., when LMUL=1, vnsrl.wi v0, v0, 3 is legal, but
On 2/23/23 21:04, Kito Cheng wrote:
Hi Jeff:
What I'd been planning to do internally at Ventana was to update our
codebase to gcc-13 once it's released. Then I'd backport RVV autovec
work from the gcc-14 dev tree into that Ventana branch.
Instead, but along the same lines, we could have a
Perform V2SI vector permutation in the same way as existing V2SF for
TARGET_MMX_WITH_SSE targets. The testcase:
typedef unsigned int v2si __attribute__((vector_size(8)));
v2si foo(v2si x, v2si y) { return (v2si){y[0], x[1]}; }
is currently compiled to (-O2):
foo:
movdqa %xmm0, %xmm2
mov
On 3/14/23 10:04, Hans-Peter Nilsson via Gcc-patches wrote:
Thank you for the review! Updated version below with your
suggestions.
This looks fine to me, from a writing perspective at least.
When spot-checking the pdf I noticed a strange
split of the page after the next after the section I
Here when instantiating a constrained template friend naming an already
declared class template, we erroneously pass the existing template's
constraints instead of the friend declaration's constraints to
redeclare_class_template, which causes the constraint comparison check
therein to always be vac
When redeclaring a member of a constrained class template, we need to
repeat the class's constraints, but it turns out we don't verify
anywhere that the repeated constraints match the class's constraints.
A safe place to do so seems to be in push_template_decl, nearby a
similar consistency check fo
On Tue, Mar 14, 2023 at 5:09 PM Jakub Jelinek wrote:
>
> Hi!
>
> In my PR107627 change I've missed one important case, which causes
> miscompilation of f4 and f6 in the following tests.
>
> Combine matches there *concatsidi3_3 define_insn_and_split (as with all
> other f* functions in those tests)
Hi!
In my PR107627 change I've missed one important case, which causes
miscompilation of f4 and f6 in the following tests.
Combine matches there *concatsidi3_3 define_insn_and_split (as with all
other f* functions in those tests), and RA ends up with:
(insn 11 10 17 2 (set (reg:DI 0 ax [89])
> Date: Mon, 13 Mar 2023 22:31:21 -0600
> From: Sandra Loosemore
> On 3/13/23 19:25, Hans-Peter Nilsson via Gcc-patches wrote:
> > Jan, did I get this right? This was from your
> > r0-36413-g6b24c25948265c / svn r44249, now on its 22nd year!
> >
> > I spot-checked the pdf for readability. Also
On 3/14/23 11:42, Jakub Jelinek wrote:
Hi!
On Mon, Mar 13, 2023 at 04:15:12PM -0400, Jason Merrill wrote:
The r13-6577 change to use tree_code_type_tmpl in earlier C++ dialects broke
gdbhooks, which expects tree_code_type to always be available. I considered
trying to make gdbhooks more robust
Hi!
On Mon, Mar 13, 2023 at 04:15:12PM -0400, Jason Merrill wrote:
> The r13-6577 change to use tree_code_type_tmpl in earlier C++ dialects broke
> gdbhooks, which expects tree_code_type to always be available. I considered
> trying to make gdbhooks more robust, but it seemed simpler to define
>
On 3/8/23 11:54, Jason Merrill wrote:
On 3/8/23 11:15, Jason Merrill wrote:
On 3/8/23 10:53, Jan Hubicka wrote:
Tested x86_64-pc-linux-gnu. Does this look good, or do we want to
factor the
flag clearing into a symtab_node counterpart to cgraph_node::reset?
-- 8< --
In 107897, by the time we
On 3/13/23 20:37, Kito Cheng via Gcc-patches wrote:
IIRC the canonical form of (plus (op) (mult (op) (op))) is (plus
(mult (op) (op) (op)), so using the first form might not friendly for
the combine pass.
You're correct. The other form shouldn't be used at all and should not
appear in the M
On 3/14/23 07:45, Kito Cheng via Gcc-patches wrote:
It's not the RISC-V part, so this requires a global maintainer there I think?
It does. I hadn't had a chance to dig into the history of the pthread.h
include to understand why it was originally included which would be the
first step in det
On 3/14/23 03:58, Jakub Jelinek wrote:
Hi!
As reported in the PR, for __has_unique_object_representations we
were treating unnamed bitfields as named ones, which is wrong, they
are actually padding.
THe following patch fixes that. Ok for trunk (and what about release
branches later?)?
OK.
On 3/14/23 03:54, Jakub Jelinek wrote:
Hi!
On Fri, Mar 10, 2023 at 01:49:38PM -0500, Jason Merrill via Gcc-patches wrote:
gcc/testsuite/ChangeLog:
* g++.dg/cpp2a/concepts-lambda3.C: Run at lower std levels,
but expect errors.
I'm seeing
+UNRESOLVED: g++.dg/cpp2a/concepts-lamb
It's not the RISC-V part, so this requires a global maintainer there I think?
On Tue, Mar 14, 2023 at 8:28 AM juzhe.zh...@rivai.ai
wrote:
>
> Thank you for fixing this. I am not familiar with this.
> This generator code (genrvv-type-indexer.cc) is written by @kito.
>
> Kito ? Can you take a look
RISC-V part is ok, and I assume you didn't have write access so I'm
gonna push that since the system.h change also got approved :)
On Tue, Mar 14, 2023 at 5:07 PM Richard Biener via Gcc-patches
wrote:
>
> On Tue, Mar 14, 2023 at 1:24 AM Sam James via Gcc-patches
> wrote:
> >
> > This fixes error
committed to trunk, thanks :)
On Tue, Mar 14, 2023 at 9:44 PM Kito Cheng wrote:
>
> RISC-V part is ok, and I assume you didn't have write access so I'm
> gonna push that since the system.h change also got approved :)
>
> On Tue, Mar 14, 2023 at 5:07 PM Richard Biener via Gcc-patches
> wrote:
> >
> On Mar 14, 2023, at 5:04 AM, Richard Biener wrote:
>
> On Mon, 13 Mar 2023, Qing Zhao wrote:
>
>> Hi, Richard,
>>
>> Do you have more comments on my responds to your previous questions?
>
> No, generally we're not good at naming the shared bits, so keeping the
> old name is fine here.
Okay
Am Di., 14. März 2023 um 12:02 Uhr schrieb Jonathan Wakely :
>
> On Tue, 14 Mar 2023 at 10:51, Daniel Krügler wrote:
>>
>> Apologies for the late response:
>>
>
> I only just committed the change, so it's not delayed :-)
>
>
>>
>> What about changing the test to check for __cpp_inline_variables or
On Tue, 14 Mar 2023 at 10:51, Daniel Krügler wrote:
> Apologies for the late response:
>
>
I only just committed the change, so it's not delayed :-)
> What about changing the test to check for __cpp_inline_variables or
> combining it with __cpp_variable_templates instead?
>
>
We could do that,
Am Di., 14. März 2023 um 11:32 Uhr schrieb Jonathan Wakely via
Libstdc++ :
>
> Tested x86_64-linux. Pushed to trunk.
>
> -- >8 --
>
> Although variable templates are valid in C++14, inline ones aren't.
> These are only used in C++17 (or later) code, so they don't need to be
> defined for C++14.
>
>
Tested x86_64-linux. Pushed to trunk.
-- >8 --
libstdc++-v3/ChangeLog:
* src/Makefile.am: Add comment about linker script fragments.
* src/Makefile.in: Regenerate.
---
libstdc++-v3/src/Makefile.am | 1 +
libstdc++-v3/src/Makefile.in | 1 +
2 files changed, 2 insertions(+)
diff
Tested x86_64-linux. Pushed to trunk.
-- >8 --
Although variable templates are valid in C++14, inline ones aren't.
These are only used in C++17 (or later) code, so they don't need to be
defined for C++14.
libstdc++-v3/ChangeLog:
* include/bits/chrono.h (__is_duration_v, __is_time_point_
The PR has an example where we currently just read off the end of a heap
buffer. We can check the preconditions and assert instead.
Tested x86_64-linux. Pushed to trunk.
-- >8 --
Add assertions to diagnose incorrect uses of valarray masks.
The assignment operators of std::mask_array do not have
Hi All,
I previously made the test generic, but there's no list
of targets that support integer MLA, and so it's not
really feasible for me to make this generic.
As such I've moved it to be AArch64 only.
committed under the obvious rule.
Thanks,
Tamar
gcc/testsuite/ChangeLog:
PR tests
On Tue, Mar 14, 2023 at 10:12:58AM +, Richard Biener via Gcc-patches wrote:
> In PR109087 it was noticed that we rely on DSE to remove .DEFERRED_INIT
> when it is the only remaining use of a variable. Since DSE is imperfect
> and even if it were not would be limited by the amount of statements
In PR109087 it was noticed that we rely on DSE to remove .DEFERRED_INIT
when it is the only remaining use of a variable. Since DSE is imperfect
and even if it were not would be limited by the amount of statements to
walk the following enhances the unused var removal pass to handle
.DEFERRED_INIT l
On Tue, Mar 14, 2023 at 4:52 PM Hu, Lin1 via Gcc-patches
wrote:
>
> It has regtested on x86_64-pc-linux-gnu. OK for trunk?
I think uros has approved your patch.
>
> Thanks.
> Lin
>
> -Original Message-
> From: Uros Bizjak
> Sent: Tuesday, March 14, 2023 3:05 PM
> To: Hu, Lin1
> Cc: gcc-p
On Tue, Mar 14, 2023 at 1:24 AM Sam James via Gcc-patches
wrote:
>
> This fixes errors like:
> ```
> In file included from /usr/include/pthread.h:30,
> from
> /usr/lib/gcc/riscv64-gentoo-linux-musl/12/include/g++-v12/riscv64-gentoo-linux-musl/bits/gthr-default.h:35,
>
On Mon, 13 Mar 2023, Qing Zhao wrote:
> Hi, Richard,
>
> Do you have more comments on my responds to your previous questions?
No, generally we're not good at naming the shared bits, so keeping the
old name is fine here.
Btw, I do not feel competent enough to approve the patch, instead that's
on
It has regtested on x86_64-pc-linux-gnu. OK for trunk?
Thanks.
Lin
-Original Message-
From: Uros Bizjak
Sent: Tuesday, March 14, 2023 3:05 PM
To: Hu, Lin1
Cc: gcc-patches@gcc.gnu.org; Liu, Hongtao
Subject: Re: [PATCH] i386:Add missing OPTION_MASK_ISA_AVX512VL in
i386-builtin.def for
As discussed in the PR log, profile_count::to_cgraph_frequency was originally
intended to work across function boundary and has some extra logic and sanity
check for that. It is used only within single function and with current
API it can not really work well globally, so this patch synchronizes i
On Tue, 14 Mar 2023, Jakub Jelinek wrote:
> Hi!
>
> As mentioned in the PR, range_of_expr returns false if the type
> of the expression isn't suitable for corresponding range type,
> but doesn't if the range is undefined for other reasons. Still,
> lower/upper_bound is defined only for ranges wh
Hi!
As mentioned in the PR, range_of_expr returns false if the type
of the expression isn't suitable for corresponding range type,
but doesn't if the range is undefined for other reasons. Still,
lower/upper_bound is defined only for ranges which actually have
at least one pair of subranges, VR_UN
Hi!
As reported in the PR, for __has_unique_object_representations we
were treating unnamed bitfields as named ones, which is wrong, they
are actually padding.
THe following patch fixes that. Ok for trunk (and what about release
branches later?)?
2023-03-14 Jakub Jelinek
PR c++/1090
Hi!
On Fri, Mar 10, 2023 at 01:49:38PM -0500, Jason Merrill via Gcc-patches wrote:
> gcc/testsuite/ChangeLog:
>
> * g++.dg/cpp2a/concepts-lambda3.C: Run at lower std levels,
> but expect errors.
I'm seeing
+UNRESOLVED: g++.dg/cpp2a/concepts-lambda3.C -std=c++11 compilation failed to
On Thu, Mar 09, 2023 at 07:36:21PM +, Tamar Christina via Gcc-patches wrote:
> PR target/108583
> * gcc.dg/mla_1.c: New test.
The testcase FAILs on all targets but AArch64 (maybe ARM is fine too).
While f1/g1 are compilable on all targets and f3/g3 with -Wno-psabi in
dg-options, f2
This is a reduced testcase for an issue I ran into when trying to
improve PTA compile-time further, there wasn't any C family runfail
in the testsuite for this.
Pushed.
* g++.dg/torture/20230313.C: New testcase.
---
gcc/testsuite/g++.dg/torture/20230313.C | 109
On Tue, Mar 14, 2023 at 7:27 AM Hu, Lin1 wrote:
>
> The implementation of these builtins requires support for both AVX512VL and
> VAES. However, the builtins didn't request AVX512VL. As a result, compiling
> pr109117-1.c with the options -mvaes -mno-avx512vl caused an ICE.
>
> This patch aims to f
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