Re: [PATCH] RISC-V: Fine tune gather load RA constraint

[Jeff Law via Gcc-patches]

On 3/13/23 02:28, juzhe.zh...@rivai.ai wrote:

From: Ju-Zhe Zhong <juzhe.zh...@rivai.ai>

For DEST EEW < SOURCE EEW, we can partial overlap register
according to RVV ISA.

gcc/ChangeLog:

         * config/riscv/vector.md: Fix RA constraint.

gcc/testsuite/ChangeLog:

         * gcc.target/riscv/rvv/base/narrow_constraint-12.c: New test.

Similarly.  I think this can wait for gcc-14.

jeff