This Go frontend patch by Cherry Mui makes the escape analysis pass
stricter about builtin functions In the places where we handle
builtin functions, list all supported ones, and fail if an unexpected
one is seen. So if a new builtin function is added in the future we
can detect it, instead of sil
Hi,
The existing vec_unpacku_{hi,lo} supports emulated unsigned
unpacking for short and char but misses the support for int.
This patch adds the support for vec_unpacku_{hi,lo}_v4si.
Meanwhile, the current implementation uses vector permutation
way, which requires one extra customized constant ve
-mcore in the BPF backend enables code generation for the CO-RE usecase. LTO is
disabled for CO-RE compilations.
gcc/ChangeLog:
* config/bpf/bpf.c (bpf_option_override): For BPF backend, disable LTO
support when compiling for CO-RE.
* config/bpf/bpf.opt: Add new command li
DWARF generation is split between early and late phases when LTO is in effect.
This poses challenges for CTF/BTF generation especially if late debug info
generation is desirable, as turns out to be the case for BPF CO-RE.
In case of BPF CO-RE, the BPF backend adds information about CO-RE relocatio
This patch adds a new target hook to detect if the CTF container can allow the
emission of CTF/BTF debug info at DWARF debug info early finish time. Some
backends, e.g., BPF when generating code for CO-RE usecase, may need to emit
the CTF/BTF debug info sections around the time when late DWARF debu
[Changes from V1]
- [1/3] bpf: Add new -mcore option for BPF CO-RE
Moved the testcase from gcc.dg/debug/btf/ to gcc.target/bpf/. Adjusted the
testcase a bit.
- targhooks: New target hook for CTF/BTF debug info emission
(Same as V1)
- dwarf2out: Emit BTF in dwarf2out_finish for BPF CO-RE useca
On Thu, Jul 29, 2021 at 08:30:49AM -0500, Bill Schmidt wrote:
> * config.gcc (target_gtfiles): Add ./rs6000-builtins.h.
> * config/rs6000/t-rs6000 (EXTRA_GTYPE_DEPS): Set.
> --- a/gcc/config/rs6000/t-rs6000
> +++ b/gcc/config/rs6000/t-rs6000
> @@ -22,6 +22,7 @@ TM_H += $(srcdir)/config
Hi!
On Thu, Jul 29, 2021 at 08:30:48AM -0500, Bill Schmidt wrote:
> * config/rs6000/rs6000-gen-builtins.c (main): Close init_file
> last.
That easily fits on one line?
> +rs6000-gen-builtins: rs6000-gen-builtins.o rbtree.o
> + $(LINKER_FOR_BUILD) $(BUILD_LINKERFLAGS) $(BUILD_LDFL
Successfully bootstrapped & regrtested on x86_64-pc-linux-gnu.
Pushed to trunk as r12-2749-gded2c2c068f6f2825474758cb03a05070a5837e8.
gcc/ChangeLog:
PR analyzer/101570
* Makefile.in (ANALYZER_OBJS): Add analyzer/region-model-asm.o.
gcc/analyzer/ChangeLog:
PR analyzer/10157
On Mon, Jul 12, 2021 at 5:13 AM H.J. Lu wrote:
>
> On Sun, Jul 11, 2021 at 11:13 PM Richard Biener
> wrote:
> >
> > On Fri, Jul 9, 2021 at 4:50 PM H.J. Lu wrote:
> > >
> > > -fdirect-extern-access is the default. With -fno-direct-extern-access:
> > >
> > > 1. Always use GOT to access undefined
Hi!
On Wed, Aug 04, 2021 at 04:16:45PM -0500, Pat Haugen wrote:
> On 8/4/21 9:23 AM, Bill Schmidt wrote:
> >> + /* GPR stores can be ascending or descending offsets, FPR/VSR stores
> > VSR? I don't see how that applies here.
Almost all scalar FP insns have a VR alternative, but unfortunatel
On 8/4/21 9:23 AM, Bill Schmidt wrote:
> Hi Pat,
>
> Good stuff! Comments below.
>
> On 8/2/21 3:19 PM, Pat Haugen via Gcc-patches wrote:
>> diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c
>> index 279f00cc648..1460a0d7c5c 100644
>> --- a/gcc/config/rs6000/rs6000.c
>> +++ b/
Dear all,
here's the second part that should fix this regression for good.
The patch also adjusts the warning message to make it easier to
understand, using the suggestion by Tobias (see PR).
Since F2018 in principle makes RECURSIVE the default, which might
conflict with the purpose of the testca
I was trying last week to run my not-yet-committed TS29113 testsuite on
a powerpc64le-linux-gnu target and ran into some problems with the kind
constants c_float128 and c_float128_complex from the ISO_C_BINDING
module; per the gfortran manual they are supposed to represent the kind
of the gcc e
On Wed, Aug 4, 2021 at 11:46 AM Uros Bizjak wrote:
>
> On Wed, Aug 4, 2021 at 3:34 PM H.J. Lu wrote:
> >
> > On Tue, Aug 3, 2021 at 6:56 AM H.J. Lu wrote:
> > >
> > > 1. Update x86 STORE_MAX_PIECES to use OImode and XImode only if inter-unit
> > > move is enabled since x86 uses vec_duplicate, wh
On Wed, Aug 4, 2021 at 3:32 PM Jonathan Wakely
wrote:
> On Wed, 4 Aug 2021 at 18:19, Maged Michael wrote:
> >
> > Sorry. I totally missed the rest of your message and the patch. My fuzzy
> eyesight, which usually guesses correctly 90% of the time, mistook
> "Secondly" on a line by itself for "Sin
On Wed, 4 Aug 2021 at 18:19, Maged Michael wrote:
>
> Sorry. I totally missed the rest of your message and the patch. My fuzzy
> eyesight, which usually guesses correctly 90% of the time, mistook "Secondly"
> on a line by itself for "Sincerely" :-)
:-)
> The noinlining was based on looking at g
On Wed, Aug 4, 2021 at 3:34 PM H.J. Lu wrote:
>
> On Tue, Aug 3, 2021 at 6:56 AM H.J. Lu wrote:
> >
> > 1. Update x86 STORE_MAX_PIECES to use OImode and XImode only if inter-unit
> > move is enabled since x86 uses vec_duplicate, which is enabled only when
> > inter-unit move is enabled, to implem
On Wed, Aug 4, 2021 at 3:20 PM H.J. Lu wrote:
>
> To avoid stack realignment, call ix86_gen_scratch_sse_rtx to get a
> scratch SSE register to copy data with with SSE register from one
> memory location to another.
>
> gcc/
>
> PR target/101772
> * config/i386/i386-expand.c (ix86_e
Le 04/08/2021 à 09:05, Thomas Koenig a écrit :
So far, we have refrained from adding too much explicit C++-isms into
the code, and if we do, my participation at least will have to be
reduced sharply (I don't speak much C++, and I don't intend to learn).
So, is this a path we want to go down?
I
The helper is for `--print-prog-name` and similar things. Since all
executable finding goes through it, we can move the default overrides
into that path too. This also ensures that if some is looking for a
*non*-program that called `as`, `ld`, etc., weird things don't happen.
---
gcc/gcc.c | 59 ++
On 8/4/21 4:33 PM, Eric Botcazou wrote:
>> The location of these ignored Ada decls looks completely sane to me.
>> However, it was an unintentional side effect of the patch to allow
>> minimal debugging of ignored decls. This means we can now step into
>> those functions or set line breakpoints th
This commit introduces support for BPF Compile Once - Run
Everywhere (CO-RE) in GCC.
gcc/ChangeLog:
* config/bpf/bpf.c: Adjust includes.
(bpf_handle_preserve_access_index_attribute): New function.
(bpf_attribute_table): Use it here.
(bpf_builtins): Add BPF_BUILTIN_
This commit adds several tests for the new BPF CO-RE functionality to
the BPF target testsuite.
gcc/testsuite/ChangeLog:
* gcc.target/bpf/core-attr-1.c: New test.
* gcc.target/bpf/core-attr-2.c: Likewise.
* gcc.target/bpf/core-attr-3.c: Likewise.
* gcc.target/bpf/c
Document the new command line options (-mcore and -mno-core), the new
BPF target builtin (__builtin_preserve_access_index), and the new BPF
target attribute (preserve_access_index) introduced with BPF CO-RE.
gcc/ChangeLog:
* doc/extend.texi (BPF Type Attributes) New node.
Document
Expose the function ctf_dtd_lookup, so that it can be used by the BPF
CO-RE machinery. The function is no longer static, and an extern
prototype is added in ctfc.h.
gcc/ChangeLog:
* ctfc.c (ctf_dtd_lookup): Function is no longer static.
* ctfc.h: Analogous change.
---
gcc/ctfc.c
[ These patches depend on the series "Allow means for late BTF generation
for BPF CO-RE" by Indu Bhagat, here:
https://gcc.gnu.org/pipermail/gcc-patches/2021-July/576446.html ]
Hello,
This patch series adds support for the BPF Compile Once - Run Everywhere
(BPF CO-RE) mechanism in GCC.
A BPF
Expose the function get_btf_id, so that it may be used by the BPF
backend. This enables the BPF CO-RE machinery in the BPF backend to
lookup BTF type IDs, in order to create CO-RE relocation records.
A prototype is added in ctfc.h
gcc/ChangeLog:
* btfout.c (get_btf_id): Function is no lo
Add a new function, ctf_lookup_tree_type, to return the CTF type ID
associated with a type via its is TREE node. The function is exposed via
a prototype in ctfc.h.
gcc/ChangeLog:
* ctfc.c (ctf_lookup_tree_type): New function.
* ctfc.h: Likewise.
---
gcc/ctfc.c | 16 ++
Expose the function lookup_type_die in dwarf2out, so that it can be used
by CTF/BTF when adding BPF CO-RE information. The function is now
non-static, and an extern prototype is added in dwarf2out.h.
gcc/ChangeLog:
* dwarf2out.c (lookup_type_die): Function is no longer static.
* d
On Wed, Aug 4, 2021 at 1:19 PM Maged Michael
wrote:
> Sorry. I totally missed the rest of your message and the patch. My fuzzy
> eyesight, which usually guesses correctly 90% of the time, mistook
> "Secondly" on a line by itself for "Sincerely" :-)
>
> On Wed, Aug 4, 2021 at 11:32 AM Jonathan Wak
Sorry. I totally missed the rest of your message and the patch. My fuzzy
eyesight, which usually guesses correctly 90% of the time, mistook
"Secondly" on a line by itself for "Sincerely" :-)
On Wed, Aug 4, 2021 at 11:32 AM Jonathan Wakely
wrote:
> On Tue, 3 Aug 2021 at 21:59, Jonathan Wakely wro
On Wed, Aug 04, 2021 at 09:23:13AM -0500, Bill Schmidt wrote:
> On 8/2/21 3:19 PM, Pat Haugen via Gcc-patches wrote:
(I reviewed this elsewhere instead of on the list... Not good, since
the patch was on the list already. Sorry.)
> >@@ -18885,6 +18980,10 @@ rs6000_sched_reorder (FILE *dump
> >A
Tested on aarch64-linux-gnu and pushed.
Richard
gcc/
* config/aarch64/aarch64.c: Fix a typo.
---
gcc/config/aarch64/aarch64.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c
index f80de2ca897..81c002ba0b0 10
Hi,
V2 of this patch uses the same approach as that just implemented
for the multiply high-half cost patch.
Regression tested and bootstrapped on aarch64-none-linux-gnu - no
issues.
Ok for master?
Thanks,
Jonathan
---
gcc/ChangeLog:
2021-07-28 Jonathan Wright
* config/aarch64/aa
On Wed, 4 Aug 2021 at 16:47, Maged Michael wrote:
>
> Thanks, Jonathan!
>
> On Wed, Aug 4, 2021 at 11:32 AM Jonathan Wakely wrote:
>>
>> On Tue, 3 Aug 2021 at 21:59, Jonathan Wakely wrote:
>> >
>> > On Mon, 2 Aug 2021 at 14:29, Maged Michael wrote:
>> > >
>> > > This is the right patch. The previ
On 8/3/21 1:17 AM, Jakub Jelinek wrote:
Hi!
The following testcase ICEs, because nelts is NOP_EXPR around INTEGER_CST
- it is a VLA whose extent folds into a constant - and get_parm_array_spec
has specific INTEGER_CST handling and otherwise strips nops from nelts
and stores it into a TREE_LIST t
Thanks, Jonathan!
On Wed, Aug 4, 2021 at 11:32 AM Jonathan Wakely
wrote:
> On Tue, 3 Aug 2021 at 21:59, Jonathan Wakely wrote:
> >
> > On Mon, 2 Aug 2021 at 14:29, Maged Michael wrote:
> > >
> > > This is the right patch. The previous one is missing noexcept. Sorry.
> > >
> > >
> > > On Mon, Aug
Jonathan Wright writes:
> Hi,
>
> Changes suggested here and those discussed off-list have been
> implemented in V2 of the patch.
>
> Regression tested and bootstrapped on aarch64-none-linux-gnu - no
> issues.
>
> Ok for master?
>
> Thanks,
> Jonathan
>
> ---
>
> gcc/ChangeLog:
>
> 2021-07-19 Jon
On Tue, 3 Aug 2021 at 21:59, Jonathan Wakely wrote:
>
> On Mon, 2 Aug 2021 at 14:29, Maged Michael wrote:
> >
> > This is the right patch. The previous one is missing noexcept. Sorry.
> >
> >
> > On Mon, Aug 2, 2021 at 9:23 AM Maged Michael
> > wrote:
> >>
> >> Please find attached an updated pat
We miss a place where I/O write error can occur.
Pushed to master as obvious.
Martin
gcc/ChangeLog:
PR gcov-profile/101773
* gcov-io.c (gcov_close): Check return code of a fclose.
---
gcc/gcov-io.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/gcc/gcov
Hi,
Changes suggested here and those discussed off-list have been
implemented in V2 of the patch.
Regression tested and bootstrapped on aarch64-none-linux-gnu - no
issues.
Ok for master?
Thanks,
Jonathan
---
gcc/ChangeLog:
2021-07-19 Jonathan Wright
* config/aarch64/aarch64.c (aa
This patch fixes a bug in which testcases using thread_limit larger than
the number of physical threads would crash with a memory fault. This was
exacerbated in testcases with a lot of register pressure because the
autoscaling reduces the number of physical threads to compensate for the
increas
> The location of these ignored Ada decls looks completely sane to me.
> However, it was an unintentional side effect of the patch to allow
> minimal debugging of ignored decls. This means we can now step into
> those functions or set line breakpoints there, while previously that
> was not possibl
Hi Pat,
Good stuff! Comments below.
On 8/2/21 3:19 PM, Pat Haugen via Gcc-patches wrote:
Enable store fusion on Power10.
Use the SCHED_REORDER hook to implement Power10 specific ready list reordering.
As of now, pairing stores for store fusion is the only function being
performed.
Bootstrap/
Hi!
On 2021-03-02T04:20:11-0800, Julian Brown wrote:
> This patch implements worker-partitioning support in the middle end,
> by rewriting gimple. [...]
Yay!
> This version of the patch [...]
> avoids moving SESE-region finding code out
> of the NVPTX backend
So that's 'struct bb_sese' and f
On Tue, Aug 3, 2021 at 6:56 AM H.J. Lu wrote:
>
> 1. Update x86 STORE_MAX_PIECES to use OImode and XImode only if inter-unit
> move is enabled since x86 uses vec_duplicate, which is enabled only when
> inter-unit move is enabled, to implement store_by_pieces.
> 2. Update op_by_pieces_d::op_by_piec
To avoid stack realignment, call ix86_gen_scratch_sse_rtx to get a
scratch SSE register to copy data with with SSE register from one
memory location to another.
gcc/
PR target/101772
* config/i386/i386-expand.c (ix86_expand_vector_move): Call
ix86_gen_scratch_sse_rtx to ge
Hi!
On 2021-03-02T04:20:11-0800, Julian Brown wrote:
> This patch implements worker-partitioning support in the middle end,
> by rewriting gimple. [...]
Yay!
Given:
> --- /dev/null
> +++ b/gcc/oacc-neuter-bcast.c
> +/* A map from SSA names or var decls to record fields. */
> +
> +typedef ha
On Wed, Aug 4, 2021 at 12:27 AM Richard Sandiford
wrote:
>
> "H.J. Lu via Gcc-patches" writes:
> > @@ -1122,8 +1122,8 @@ class op_by_pieces_d
> > and its associated FROM_CFN_DATA can be used to replace loads with
> > constant values. LEN describes the length of the operation. */
> >
> >
On Wed, Aug 04, 2021 at 02:40:27PM +0200, Thomas Schwinge wrote:
> Small fix-up for r243673 (Git commit 629b3d75c8c5a244d891a9c292bca6912d4b0dd9)
> "Split omp-low into multiple files".
>
> gcc/
> * Makefile.in (GTFILES): Remove '$(srcdir)/omp-offload.c'.
Ok, thanks.
> ---
> gcc/Makef
On Wed, Aug 4, 2021 at 8:39 PM liuhongt wrote:
>
> Hi:
> Together with the previous 3 patches, all cond_op expanders of vector
> modes are supported (if they have a corresponding avx512 mask instruction).
Oh, after double check, I realize there're still shift instructions
left, will support in a
Hi!
On 2016-12-09T14:08:21+0100, Martin Jambor wrote:
> this is the promised attempt at splitting omp-low.c [...]
> --- a/gcc/Makefile.in
> +++ b/gcc/Makefile.in
> @@ -2479,8 +2483,10 @@ GTFILES = $(CPP_ID_DATA_H) $(srcdir)/input.h
> $(srcdir)/coretypes.h \
>$(srcdir)/tree-scalar-evolution
gcc/ChangeLog:
* config/i386/sse.md (cond_): New expander.
gcc/testsuite/ChangeLog:
* gcc.target/i386/cond_op_maxmin_double-1.c: New test.
* gcc.target/i386/cond_op_maxmin_double-2.c: New test.
* gcc.target/i386/cond_op_maxmin_float-1.c: New test.
* gcc.ta
gcc/ChangeLog:
* config/i386/sse.md (cond_): New expander.
gcc/testsuite/ChangeLog:
* gcc.target/i386/cond_op_anylogic_d-1.c: New test.
* gcc.target/i386/cond_op_anylogic_d-2.c: New test.
* gcc.target/i386/cond_op_anylogic_q-1.c: New test.
* gcc.target/i38
gcc/ChangeLog:
* config/i386/sse.md (cond_): New expander.
gcc/testsuite/ChangeLog:
* gcc.target/i386/cond_op_maxmin_b-1.c: New test.
* gcc.target/i386/cond_op_maxmin_b-2.c: New test.
* gcc.target/i386/cond_op_maxmin_d-1.c: New test.
* gcc.target/i386/cond
Hi:
Together with the previous 3 patches, all cond_op expanders of vector
modes are supported (if they have a corresponding avx512 mask instruction).
Bootstrapped and regtested on x86_64-linux-gnu{-m32,}.
liuhongt (3):
[i386] Support cond_{smax,smin,umax,umin} for vector integer modes
Richard Sandiford via Gcc-patches writes:
> Richard Biener writes:
>> On Tue, Aug 3, 2021 at 2:10 PM Richard Sandiford via Gcc-patches
>> wrote:
>>>
>>> The issue-based vector costs currently assume that a multiply-add
>>> sequence can be implemented using a single instruction. This is
>>> gene
Richard Biener writes:
> On Tue, Aug 3, 2021 at 2:10 PM Richard Sandiford via Gcc-patches
> wrote:
>>
>> The issue-based vector costs currently assume that a multiply-add
>> sequence can be implemented using a single instruction. This is
>> generally true for scalars (which have a 4-operand inst
On Wed, 4 Aug 2021, Richard Sandiford wrote:
> Richard Biener writes:
> > This adds a gather vectorization capability to the vectorizer
> > without target support by decomposing the offset vector, doing
> > sclar loads and then building a vector from the result. This
> > is aimed mainly at cases
On Wed, Aug 4, 2021 at 12:47 PM Kewen.Lin wrote:
>
> on 2021/8/4 下午6:01, Richard Biener wrote:
> > On Wed, Aug 4, 2021 at 4:36 AM Kewen.Lin wrote:
> >>
> >> on 2021/8/3 下午8:08, Richard Biener wrote:
> >>> On Fri, Jul 30, 2021 at 7:20 AM Kewen.Lin wrote:
>
> on 2021/7/29 下午4:01, Richard
On 04/08/21 12:56 +0100, Jonathan Wakely wrote:
... and container adaptors.
This adds the [[nodiscard]] attribute to functions with no side-effects
for the sequence containers and their iterators, and the debug versions
of those containers, and the container adaptors,
I don't plan to add any m
... and container adaptors.
This adds the [[nodiscard]] attribute to functions with no side-effects
for the sequence containers and their iterators, and the debug versions
of those containers, and the container adaptors,
Tested powerpc64le-linux, committed to trunk.
commit 0d04fe49239d9178785
This adds [[nodiscard]] throughout , as proposed by P2377R0
(with some minor corrections).
The attribute is added for all modes from C++11 up, using
[[__nodiscard__]] or _GLIBCXX_NODISCARD where C++17 [[nodiscard]] can't
be used directly.
commit 240b01b0215f9e46ecf04267c8a3faeb19d4fe3c
Author: J
On Tue, Aug 3, 2021 at 3:52 PM Richard Sandiford via Gcc-patches
wrote:
>
> This patch uses a more accurate scalar iteration estimate when
> comparing the epilogue of a constant-iteration loop with a candidate
> replacement epilogue.
>
> In the testcase, the patch prevents a 1-to-3-element SVE epi
On Tue, Aug 3, 2021 at 2:10 PM Richard Sandiford via Gcc-patches
wrote:
>
> The issue-based vector costs currently assume that a multiply-add
> sequence can be implemented using a single instruction. This is
> generally true for scalars (which have a 4-operand instruction)
> and SVE (which allows
Richard Biener writes:
> This adds a gather vectorization capability to the vectorizer
> without target support by decomposing the offset vector, doing
> sclar loads and then building a vector from the result. This
> is aimed mainly at cases where vectorizing the rest of the loop
> offsets the co
On Tue, Aug 3, 2021 at 2:09 PM Richard Sandiford via Gcc-patches
wrote:
>
> When the vectoriser scalarises a strided store, it counts one
> scalar_store for each element plus one vec_to_scalar extraction
> for each element. However, extracting element 0 is free on AArch64,
> so it should have zer
On Mon, Aug 2, 2021 at 3:41 PM Richard Biener wrote:
>
> This teaches forwprop to rewrite more vector loads that are only
> used in BIT_FIELD_REFs as scalar loads. This provides the
> remaining uplift to SPEC CPU 2017 510.parest_r on Zen 2 which
> has CPU gathers disabled.
>
> In particular vecto
On Wed, Aug 4, 2021 at 4:39 AM Hongtao Liu wrote:
>
> On Mon, Aug 2, 2021 at 2:31 PM liuhongt wrote:
> >
> > gcc/ChangeLog:
> >
> > * config/i386/i386-modes.def (FLOAT_MODE): Define ieee HFmode.
> > * config/i386/i386.c (enum x86_64_reg_class): Add
> > X86_64_SSEHF_CLASS.
on 2021/8/4 下午6:01, Richard Biener wrote:
> On Wed, Aug 4, 2021 at 4:36 AM Kewen.Lin wrote:
>>
>> on 2021/8/3 下午8:08, Richard Biener wrote:
>>> On Fri, Jul 30, 2021 at 7:20 AM Kewen.Lin wrote:
on 2021/7/29 下午4:01, Richard Biener wrote:
> On Fri, Jul 23, 2021 at 10:41 AM Kewen.Lin w
The following avoids vectorizing MIN/MAX reductions on bools which,
when ending up as vector(2) would need to be
adjusted because of the sign change. The fix instead avoids any
reduction vectorization where the result isn't compatible
to the original scalar type since we don't compensate for that
Hi,
Recent refactoring of the arm_neon.h header enabled better code
generation for intrinsics that manipulate vector structures. New
tests were also added to verify the benefit of these changes. It now
transpires that the code generation improvements are observed only on
little-endian systems. Thi
Hi!
As I've said earlier and added xfails in gen-attrs-76.C test,
https://eel.is/c++draft/namespace.udir#nt:using-directive
has attribute-specifier-seq[opt] at the start, not at the end before ;
as gcc is expecting.
IMHO we should continue parsing at the end the GNU attributes
because using namesp
On Wed, Aug 4, 2021 at 4:36 AM Kewen.Lin wrote:
>
> on 2021/8/3 下午8:08, Richard Biener wrote:
> > On Fri, Jul 30, 2021 at 7:20 AM Kewen.Lin wrote:
> >>
> >> on 2021/7/29 下午4:01, Richard Biener wrote:
> >>> On Fri, Jul 23, 2021 at 10:41 AM Kewen.Lin wrote:
>
> on 2021/7/22 下午8:56, Richa
Hi!
When parsing default arguments, we need to temporarily clear
parser->omp_declare_simd
and parser->oacc_routine, otherwise it can clash with further declarations
inside of e.g. lambdas inside of those default arguments.
Bootstrapped/regtested on x86_64-linux and i686-linux, committed to trunk
On Mon, Aug 2, 2021 at 8:44 AM liuhongt wrote:
>
> From: "Guo, Xuepeng"
>
> gcc/ChangeLog:
>
> * common/config/i386/cpuinfo.h (get_available_features):
> Detect FEATURE_AVX512FP16.
> * common/config/i386/i386-common.c
> (OPTION_MASK_ISA_AVX512FP16_SET,
> OP
Hi!
After seeing the config/t-slibgcc-fuchsia issue, I ran a dumb and slow
for f in `find . -type f`; do sz=`ls -l $f | awk '{print $5}'`; sz=`expr $sz /
2`; [ $sz = 0 ] && continue; if [ $sz -gt 16 ]; then dd if=$f of=/tmp/1 bs=1
count=16 2>/dev/null; dd if=$f of=/tmp/2 bs=1 skip=$sz count=16 2
Hi!
On 2015-01-08T16:41:50+0100, I wrote:
> Committed to trunk in r219346:
(Git commit 45f46750a3513790573791c0eec6b600b42f2042.)
> Make sure that OMP builtins are available in offloading compilers.
> --- gcc/builtins.def
> +++ gcc/builtins.def
> @@ -148,11 +148,14 @@ along with GCC; see th
Hi!
The file has two identical halves, seems like twice applied patch.
Committed to trunk as obvious.
2021-08-04 Jakub Jelinek
* config/t-slibgcc-fuchsia: Undo doubly applied patch.
--- libgcc/config/t-slibgcc-fuchsia.jj 2021-01-04 10:25:53.777064609 +0100
+++ libgcc/config/t-slibg
On Wed, Aug 4, 2021 at 5:33 AM liuhongt wrote:
>
> Hi:
> The define_peephole2 which is added by r12-2640-gf7bf03cf69ccb7dc
> should only work on general registers, considering that x86 also
> supports mov instructions between gpr, sse reg, mask reg, limiting the
> peephole2 predicate to general_
ping?
On Thu, 15 Jul 2021 at 15:07, Christophe LYON via Gcc-patches
wrote:
>
> This is a followup to Srinath's recent patch: the newly added test is
> failing e.g. on arm-linux-gnueabihf without R/M profile multilibs.
>
> It is also failing on arm-eabi with R/M profile multilibs if the
> executio
Jonathan Wright via Gcc-patches writes:
> Hi,
>
> The Neon multiply/multiply-accumulate/multiply-subtract instructions
> can select the top or bottom half of the operand registers. This
> selection does not change the cost of the underlying instruction and
> this should be reflected by the RTL cos
On 8/3/21 10:29 AM, Martin Liška wrote:
Hey.
I've just noticed that your recent change caused:
/home/marxin/BIG/buildbot/buildworker/marxinbox-gcc-clang/build/gcc/gimple-range-path.h:44:8:
warning: 'dump' overrides a member function but is not marked 'override'
[-Winconsistent-missing-overrid
On Jul 13 2021, Sandra Loosemore wrote:
> diff --git a/gcc/testsuite/gfortran.dg/ISO_Fortran_binding_1.c
> b/gcc/testsuite/gfortran.dg/ISO_Fortran_binding_1.c
> index a571459..9da5d85 100644
> --- a/gcc/testsuite/gfortran.dg/ISO_Fortran_binding_1.c
> +++ b/gcc/testsuite/gfortran.dg/ISO_Fortran_bi
On 8/4/21 10:54 AM, Aldy Hernandez wrote:
On 8/4/21 9:49 AM, Martin Liška wrote:
Hi.
Pushing as obvious.
Martin
gcc/ChangeLog:
* doc/invoke.texi: Document threader-mode param.
---
gcc/doc/invoke.texi | 3 +++
1 file changed, 3 insertions(+)
diff --git a/gcc/doc/invoke.texi b/gcc/doc
On 8/4/21 9:49 AM, Martin Liška wrote:
Hi.
Pushing as obvious.
Martin
gcc/ChangeLog:
* doc/invoke.texi: Document threader-mode param.
---
gcc/doc/invoke.texi | 3 +++
1 file changed, 3 insertions(+)
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index 65bb9981f02..4efc8b757ec
Jonathan Wright via Gcc-patches writes:
> Hi,
>
> V2 of the patch addresses the initial review comments, factors out
> common code (as we discussed off-list) and adds a set of unit tests
> to verify the code generation benefit.
>
> Regression tested and bootstrapped on aarch64-none-linux-gnu - no
This makes tail recursion optimization produce a loop structure
manually rather than relying on loop fixup. That also allows the
loop to be marked as finite (it would eventually blow the stack
if it were not).
Bootstrapped and tested on x86_64-unknown-linux-gnu, pushed.
2021-08-04 Richard Biene
On Tue, Aug 3, 2021 at 5:40 PM Richard Earnshaw <
richard.earns...@foss.arm.com> wrote:
>
>
> On 03/08/2021 16:04, Christophe Lyon via Gcc-patches wrote:
> > On Mon, Aug 2, 2021 at 4:57 PM Richard Earnshaw
> wrote:
> >
> >> This patch series addresses an issue that has come to light due to a
> >>
Hi.
Pushing as obvious.
Martin
gcc/ChangeLog:
* doc/invoke.texi: Document threader-mode param.
---
gcc/doc/invoke.texi | 3 +++
1 file changed, 3 insertions(+)
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index 65bb9981f02..4efc8b757ec 100644
--- a/gcc/doc/invoke.texi
+++ b
"H.J. Lu via Gcc-patches" writes:
> @@ -1122,8 +1122,8 @@ class op_by_pieces_d
> and its associated FROM_CFN_DATA can be used to replace loads with
> constant values. LEN describes the length of the operation. */
>
> -op_by_pieces_d::op_by_pieces_d (rtx to, bool to_load,
> -
Hi Mikael,
Introduce a new abstract class gfc_dummy_arg that provides a common
interface to both dummy arguments of user-defined procedures (which
have type gfc_formal_arglist) and dummy arguments of intrinsic procedures
(which have type gfc_intrinsic_arg).
good to see you again!
So far, we
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