gcc/ChangeLog:
* config/i386/sse.md (cond_<code><mode>): New expander.
gcc/testsuite/ChangeLog:
* gcc.target/i386/cond_op_anylogic_d-1.c: New test.
* gcc.target/i386/cond_op_anylogic_d-2.c: New test.
* gcc.target/i386/cond_op_anylogic_q-1.c: New test.
* gcc.target/i386/cond_op_anylogic_q-2.c: New test.
---
gcc/config/i386/sse.md | 18 +++++
.../gcc.target/i386/cond_op_anylogic_d-1.c | 38 +++++++++
.../gcc.target/i386/cond_op_anylogic_d-2.c | 78 +++++++++++++++++++
.../gcc.target/i386/cond_op_anylogic_q-1.c | 10 +++
.../gcc.target/i386/cond_op_anylogic_q-2.c | 5 ++
5 files changed, 149 insertions(+)
create mode 100644 gcc/testsuite/gcc.target/i386/cond_op_anylogic_d-1.c
create mode 100644 gcc/testsuite/gcc.target/i386/cond_op_anylogic_d-2.c
create mode 100644 gcc/testsuite/gcc.target/i386/cond_op_anylogic_q-1.c
create mode 100644 gcc/testsuite/gcc.target/i386/cond_op_anylogic_q-2.c
diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md
index 51733a3849d..a46a2373547 100644
--- a/gcc/config/i386/sse.md
+++ b/gcc/config/i386/sse.md
@@ -14063,6 +14063,24 @@ (define_expand "<code><mode>3"
DONE;
})
+(define_expand "cond_<code><mode>"
+ [(set (match_operand:VI48_AVX512VL 0 "register_operand")
+ (vec_merge:VI48_AVX512VL
+ (any_logic:VI48_AVX512VL
+ (match_operand:VI48_AVX512VL 2 "vector_operand")
+ (match_operand:VI48_AVX512VL 3 "vector_operand"))
+ (match_operand:VI48_AVX512VL 4 "nonimm_or_0_operand")
+ (match_operand:<avx512fmaskmode> 1 "register_operand")))]
+ "TARGET_AVX512F"
+{
+ emit_insn (gen_<code><mode>3_mask (operands[0],
+ operands[2],
+ operands[3],
+ operands[4],
+ operands[1]));
+ DONE;
+})
+
(define_insn "<mask_codefor><code><mode>3<mask_name>"
[(set (match_operand:VI48_AVX_AVX512F 0 "register_operand" "=x,x,v")
(any_logic:VI48_AVX_AVX512F
diff --git a/gcc/testsuite/gcc.target/i386/cond_op_anylogic_d-1.c
b/gcc/testsuite/gcc.target/i386/cond_op_anylogic_d-1.c
new file mode 100644
index 00000000000..8951f4a3a27
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/cond_op_anylogic_d-1.c
@@ -0,0 +1,38 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -march=skylake-avx512 -fdump-tree-optimized" } */
+/* { dg-final { scan-tree-dump ".COND_AND" "optimized" } } */
+/* { dg-final { scan-tree-dump ".COND_XOR" "optimized" } } */
+/* { dg-final { scan-tree-dump ".COND_IOR" "optimized" } } */
+/* { dg-final { scan-assembler-times "vpxord" 1 } } */
+/* { dg-final { scan-assembler-times "vpord" 1 } } */
+/* { dg-final { scan-assembler-times "vpandd" 1 } } */
+
+typedef int int32;
+typedef unsigned int uint32;
+typedef long long int64;
+typedef unsigned long long uint64;
+
+#ifndef NUM
+#define NUM 800
+#endif
+#ifndef TYPE
+#define TYPE int
+#endif
+
+TYPE a[NUM], b[NUM], c[NUM], d[NUM], e[NUM], j[NUM];
+
+#define BIN(OPNAME, OP) \
+ void \
+ __attribute__ ((noipa,optimize ("O3"))) \
+ foo_##OPNAME () \
+ { \
+ for (int i = 0; i != NUM; i++) \
+ if (b[i] < c[i]) \
+ a[i] = d[i] OP e[i]; \
+ else \
+ a[i] = d[i] - e[i]; \
+ }
+
+BIN (and, &);
+BIN (ior, |);
+BIN (xor, ^);
diff --git a/gcc/testsuite/gcc.target/i386/cond_op_anylogic_d-2.c
b/gcc/testsuite/gcc.target/i386/cond_op_anylogic_d-2.c
new file mode 100644
index 00000000000..23ca4120cf2
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/cond_op_anylogic_d-2.c
@@ -0,0 +1,78 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512vl -mprefer-vector-width=256" } */
+/* { dg-require-effective-target avx512vl } */
+
+#define AVX512VL
+#ifndef CHECK
+#define CHECK "avx512f-helper.h"
+#endif
+
+#include CHECK
+
+#include "cond_op_anylogic_d-1.c"
+#define BINO2(OPNAME, OP) \
+ void \
+ __attribute__ ((noipa,optimize ("O2"))) \
+ foo_o2_##OPNAME () \
+ { \
+ for (int i = 0; i != NUM; i++) \
+ if (b[i] < c[i]) \
+ j[i] = d[i] OP e[i]; \
+ else \
+ j[i] = d[i] - e[i]; \
+ }
+
+BINO2 (and, &);
+BINO2 (ior, |);
+BINO2 (xor, ^);
+
+static void
+test_256 (void)
+{
+ int sign = -1;
+ for (int i = 0; i != NUM; i++)
+ {
+ a[i] = 0;
+ d[i] = i * 2;
+ e[i] = i * i * 3 - i * 9 + 153;
+ b[i] = i * 83;
+ c[i] = b[i] + sign;
+ sign *= -1;
+ j[i] = 1;
+ }
+ foo_and ();
+ foo_o2_and ();
+ for (int i = 0; i != NUM; i++)
+ {
+ if (a[i] != j[i])
+ abort ();
+ a[i] = 0;
+ b[i] = 1;
+ }
+
+ foo_xor ();
+ foo_o2_xor ();
+ for (int i = 0; i != NUM; i++)
+ {
+ if (a[i] != j[i])
+ abort ();
+ a[i] = 0;
+ j[i] = 1;
+ }
+
+ foo_ior ();
+ foo_o2_ior ();
+ for (int i = 0; i != NUM; i++)
+ {
+ if (a[i] != j[i])
+ abort ();
+ a[i] = 0;
+ j[i] = 1;
+ }
+}
+
+static void
+test_128 ()
+{
+
+}
diff --git a/gcc/testsuite/gcc.target/i386/cond_op_anylogic_q-1.c
b/gcc/testsuite/gcc.target/i386/cond_op_anylogic_q-1.c
new file mode 100644
index 00000000000..cb4770113ad
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/cond_op_anylogic_q-1.c
@@ -0,0 +1,10 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -march=skylake-avx512 -DTYPE=int64 -fdump-tree-optimized"
} */
+/* { dg-final { scan-tree-dump ".COND_AND" "optimized" } } */
+/* { dg-final { scan-tree-dump ".COND_XOR" "optimized" } } */
+/* { dg-final { scan-tree-dump ".COND_IOR" "optimized" } } */
+/* { dg-final { scan-assembler-times "vpxorq" 1 } } */
+/* { dg-final { scan-assembler-times "vporq" 1 } } */
+/* { dg-final { scan-assembler-times "vpandq" 1 } } */
+
+#include "cond_op_anylogic_d-1.c"
diff --git a/gcc/testsuite/gcc.target/i386/cond_op_anylogic_q-2.c
b/gcc/testsuite/gcc.target/i386/cond_op_anylogic_q-2.c
new file mode 100644
index 00000000000..709babf271e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/cond_op_anylogic_q-2.c
@@ -0,0 +1,5 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512vl -mprefer-vector-width=256 -DTYPE=int64" } */
+/* { dg-require-effective-target avx512vl } */
+
+#include "cond_op_anylogic_d-2.c"
--
2.18.1
