Re: [098/nnn] poly_int: load_register_parameters

2017-11-27 Thread Jeff Law
On 10/23/2017 11:40 AM, Richard Sandiford wrote: > This patch makes load_register_parameters cope with polynomial sizes. > The requirement here is that any register parameters with non-constant > sizes must either have a specific mode (e.g. a variable-length vector > mode) or must be represented wi

Re: [104/nnn] poly_int: GET_MODE_PRECISION

2017-11-27 Thread Jeff Law
On 10/23/2017 11:42 AM, Richard Sandiford wrote: > This patch changes GET_MODE_PRECISION from an unsigned short > to a poly_uint16. > > > 2017-10-23 Richard Sandiford > Alan Hayward > David Sherwood > > gcc/ > * machmode.h (mode_precision): Change from unsigned s

Re: [Ping][PATCH v3] Fix Incorrect ASan global variables alignment on arm (PR sanitizer/81697)

2017-11-27 Thread Maxim Ostapenko
(CC'ing Jakub and Ramana) Hi, I would like to ping the following patch: https://gcc.gnu.org/ml/gcc-patches/2017-10/msg02288.html Fix Incorrect ASan global variables alignment on arm (PR sanitizer/81697) -Maxim gcc/ChangeLog: 2017-11-28 Maxim Ostapenko PR sanitizer/81697 * asan.c (asan_pr

Re: [PATCH] Fix X +- C1 CMP C2 match.pd folding with -fwrapv (PR tree-optimization/80788)

2017-11-27 Thread Richard Biener
On November 27, 2017 11:36:23 PM GMT+01:00, Jakub Jelinek wrote: >Hi! > >This transformation turns it into a false or true if TREE_OVERFLOW >and TYPE_OVERFLOW_UNDEFINED, but if TREE_OVERFLOW is set, but not >TYPE_OVERFLOW_UNDEFINED, we leak the overflow bit into the IL, which >then >confuses the

Re: [PATCH, Makefile.in] refine selftest recipes to restore mingw bootstrap

2017-11-27 Thread Jeff Law
On 11/27/2017 03:16 PM, David Malcolm wrote: > On Mon, 2017-11-27 at 09:40 +0100, Olivier Hainque wrote: >> (typo in David's email address in the previous message, >> resending. sorry for the duplicates) >> >> Hi Jeff, >> >> (Thanks for your feedback) >> >>> On Nov 27, 2017, at 04:55 , Jeff Law wr

Re: [PATCH] Fix ms-sysv.exp testsuite FAILs (PR c/83117)

2017-11-27 Thread Jeff Law
On 11/27/2017 03:34 PM, Jakub Jelinek wrote: > Hi! > > As mentioned in the PR, my C FE rvalue folding patch allows folding > const variable initializers into the uses of those variables in rvalue > contexts more than before, and so we get warnings about UB in the test, > because an unprototyped fu

Re: [PATCH] Remove unused SWITCH_LABELS

2017-11-27 Thread Jeff Law
On 11/27/2017 03:41 PM, Jakub Jelinek wrote: > Hi! > > Before tuples SWITCH_LABELS used to hold the vectors of case labels > during optimization, then it was used during expansion - GIMPLE_SWITCH > has been converted back to SWITCH_EXPR and SWITCH_LABELS used to hold > the vector. Later on we've

[PATCH] rs6000: Improve comparison rtx_cost (PR81288)

2017-11-27 Thread Segher Boessenkool
The current rs6000 rtx_cost for comparisons against 0 is very high if TARGET_ISEL && !TARGET_MFCRF, much higher than for reg-reg comparisons, much higher than a load of 0 and such a reg-reg-comparison. This leads to infinite recursion in CSE (see PR81288). This patch removes the too-high cost, al

Re: [PATCH] Fix hot/cold partitioning with -gstabs{,+} (PR debug/81307)

2017-11-27 Thread Jim Wilson
On 11/27/2017 01:54 PM, Jim Wilson wrote: On 11/27/2017 12:21 AM, Richard Biener wrote: Let's formally deprecate any non-DWARF debugging format support in GCC 8 changes.html?   We have two OS targets that only support stabs, though in both cases the cpus do support dwarf and hence they could

[PATCH, gcc-7] Fix riscv linux kernel boot failure.

2017-11-27 Thread Jim Wilson
This patch is necessary in order to successfully boot a linux kernel on the UCB spike simulator. Riscv loads sign-extend by default, but this wasn't explicitly mentioned in the pic load patterns, resulting in some bad code generation. Fixed by adding an explicit sign_extend operation to the curre

[PATCH] rs6000: Improve scc isel

2017-11-27 Thread Segher Boessenkool
If we have a negative condition we can use a literal 0 in the isel, instead of having to load it into a register. If the condition is from a comparison with an immediate we can change e.g. LT to LE and adjust the immediate, saving a li instruction. Bootstrapped and tested on powerpc64-linux {-m32

Re: [PATCH] PR libgcc/83112, Fix warnings on libgcc float128-ifunc.c

2017-11-27 Thread Michael Meissner
On Mon, Nov 27, 2017 at 03:40:58PM -0700, Martin Sebor wrote: > On 11/27/2017 12:21 PM, Michael Meissner wrote: > >The new -Wattribute-alias option now issues warnings for old-style ifunc > >declarations that coerce the pointer to the function to void *. The > >float128-ifunc.c module in libgcc/co

[PR 82808] Use result types for arithmetic jump functions

2017-11-27 Thread Martin Jambor
Hi, sorry for getting so late to this. However... On Tue, Nov 14 2017, Richard Biener wrote: > On Tue, Nov 14, 2017 at 10:31 AM, Prathamesh Kulkarni > wrote: >> On 3 November 2017 at 15:38, Richard Biener >> wrote: >>> On Fri, Nov 3, 2017 at 6:15 AM, Prathamesh Kulkarni >>> wrote: Hi Ma

Re: [PATCH 05/10] [ARC] Add trap instruction.

2017-11-27 Thread Andrew Burgess
* Claudiu Zissulescu [2017-11-27 12:09:54 +0100]: > From: Claudiu Zissulescu > > 2017-11-07 Claudiu Zissulescu > > * config/arc/arc.md (trap): New pattern. Looks good. Thanks, Andrew > --- > gcc/config/arc/arc.md | 7 +++ > 1 file changed, 7 insertions(+) > > diff --git a/gc

Re: [PATCH 04/10] [ARC] Add ARCv2 core3 tune option.

2017-11-27 Thread Andrew Burgess
* Claudiu Zissulescu [2017-11-27 12:09:53 +0100]: > From: claziss > > ARCv2 Core3 cpus are comming with dbnz support. Add this feature on > the tune option. > > gcc/ > 2017-09-14 Claudiu Zissulescu > > * config/arc/arc-arch.h (arc_tune_attr): Add ARC_TUNE_CORE_3. > * config/ar

Re: [PATCH 03/10] [ARC] Don't allow the last ZOL insn to be in a delay slot.

2017-11-27 Thread Andrew Burgess
* Claudiu Zissulescu [2017-11-27 12:09:52 +0100]: > From: Claudiu Zissulescu > > The ARC ZOL implementation doesn't allow the last instruction to be a > control instruction or part of a delay slot. Thus, we add a note to > the last ZOL instruction which will prevent it to finish into a delay

Re: [patch] jump threading multiple paths that start from the same BB

2017-11-27 Thread Jeff Law
On 11/07/2017 10:33 AM, Aldy Hernandez wrote: > [One more time, but without rejected HTML mail, because apparently this > is my first post to gcc-patches *ever* ;-)]. > > Howdy! > > While poking around in the backwards threader I noticed that we bail if > we have already seen a starting BB. > >

Re: [PATCH 02/10] [ARC][ZOL] Update uses for hw-loop labels.

2017-11-27 Thread Andrew Burgess
* Claudiu Zissulescu [2017-11-27 12:09:51 +0100]: > From: claziss > > Make sure we mark the hw-loop labels as beeing used. > > gcc/ > 2017-09-19 Claudiu Zissulescu > > * config/arc/arc.c (hwloop_optimize): Update hw-loop's end/start > labels number of usages. > > gcc/testsuit

Re: [PATCH 01/10] [ARC][LRA] Use TARGET_CANNOT_SUBSTITUTE_MEM_EQUIV.

2017-11-27 Thread Andrew Burgess
* Claudiu Zissulescu [2017-11-27 12:09:50 +0100]: > From: Claudiu Zissulescu > > Sometimes the memory equivalent is not valid due to a large offset. > For example replacing the ap register with its fp/sp-equivalent during > LRA step. To solve this we introduced TARGET_CANNOT_SUBSTITUTE_MEM_EQU

Re: [PATCH] Fix ms-sysv.exp testsuite FAILs (PR c/83117)

2017-11-27 Thread Daniel Santos
On 11/27/2017 04:34 PM, Jakub Jelinek wrote: > Hi! > > As mentioned in the PR, my C FE rvalue folding patch allows folding > const variable initializers into the uses of those variables in rvalue > contexts more than before, and so we get warnings about UB in the test, > because an unprototyped fun

Re: [PATCH] PR libgcc/83112, Fix warnings on libgcc float128-ifunc.c

2017-11-27 Thread Martin Sebor
On 11/27/2017 12:21 PM, Michael Meissner wrote: The new -Wattribute-alias option now issues warnings for old-style ifunc declarations that coerce the pointer to the function to void *. The float128-ifunc.c module in libgcc/config/rs6000 now gets a lot of warnings of the form: ../float128-ifunc.

[PATCH] Remove unused SWITCH_LABELS

2017-11-27 Thread Jakub Jelinek
Hi! Before tuples SWITCH_LABELS used to hold the vectors of case labels during optimization, then it was used during expansion - GIMPLE_SWITCH has been converted back to SWITCH_EXPR and SWITCH_LABELS used to hold the vector. Later on we've switched to expand_case right from GIMPLE_SWITCH, and sin

[PATCH], PR libgcc/83112, Add ifunc support for _mulkc3 and _divkc3

2017-11-27 Thread Michael Meissner
Unlike the other _Float128 emulation support in the PowerPC libgcc, the support for _Complex _Float128 multiply and divide doesn't resolve into a single instruction on the power9 system. But these two functions do benefit if they are compiled for ISA 3.0 _Float128 hardware instructions, by elimina

[PATCH] Fix X +- C1 CMP C2 match.pd folding with -fwrapv (PR tree-optimization/80788)

2017-11-27 Thread Jakub Jelinek
Hi! This transformation turns it into a false or true if TREE_OVERFLOW and TYPE_OVERFLOW_UNDEFINED, but if TREE_OVERFLOW is set, but not TYPE_OVERFLOW_UNDEFINED, we leak the overflow bit into the IL, which then confuses the VRP pass. Fixed thusly, bootstrapped/regtested on x86_64-linux and i686-l

[PATCH] Fix ms-sysv.exp testsuite FAILs (PR c/83117)

2017-11-27 Thread Jakub Jelinek
Hi! As mentioned in the PR, my C FE rvalue folding patch allows folding const variable initializers into the uses of those variables in rvalue contexts more than before, and so we get warnings about UB in the test, because an unprototyped function is cast to a function type with ellipsis in it. I

[PATCH, gcc-7] Fix RISCV ICE on linux kernel build.

2017-11-27 Thread Jim Wilson
This fixes an ICE that occurs during a linux kernel build with gcc-7-branch by backporting a patch from mainline. The problem occurs when using -fpic, as we have patterns with a clobber for loading/storing from/to an address using a symbol. During optimization, it is possible for optimizations to

Re: [PATCH, Makefile.in] refine selftest recipes to restore mingw bootstrap

2017-11-27 Thread David Malcolm
On Mon, 2017-11-27 at 09:40 +0100, Olivier Hainque wrote: > (typo in David's email address in the previous message, > resending. sorry for the duplicates) > > Hi Jeff, > > (Thanks for your feedback) > > > On Nov 27, 2017, at 04:55 , Jeff Law wrote: > > > > > * Makefile.in (SELFTEST_FLAGS): U

Re: [PATCH] handle invalid array index in warn_placement_new_too_small (PR 83058)

2017-11-27 Thread Jason Merrill
On 11/27/2017 02:24 PM, Martin Sebor wrote: Bug 83058 - [6/7/8 Regression] ICE on C++ code with negative array index: in warn_placement_new_too_small, at cp/init.c:2666, reports an ICE for an invalid placement new expression with a negative array index. The ICE was caused by calling tree_to_uhwi

Re: [PATCH] Fix hot/cold partitioning with -gstabs{,+} (PR debug/81307)

2017-11-27 Thread Jim Wilson
On 11/27/2017 12:21 AM, Richard Biener wrote: Let's formally deprecate any non-DWARF debugging format support in GCC 8 changes.html? I think we need to be careful about that. I've been looking at the stabs support after I finished removing the sdb/coff debug info support. We have 3 cpu targ

Re: [PATCH] Fix hot/cold partitioning with -gstabs{,+} (PR debug/81307)

2017-11-27 Thread Jakub Jelinek
On Mon, Nov 27, 2017 at 01:36:12PM -0800, Jim Wilson wrote: > On 11/24/2017 01:53 PM, Jakub Jelinek wrote: > > Could anybody from the debugger folks test it a little bit (say gdb > > testsuite if it has any -O2 -gstabs/-O2 -gstabs+ tests)? > > The gdb testsuite just uses "-g" by default. It doesn

Re: [C++ PATCH] Fix structured binding initializer checking (PR c++/81888)

2017-11-27 Thread Jason Merrill
On Thu, Nov 23, 2017 at 3:35 PM, Jakub Jelinek wrote: > Hi! > > My PR81258 fix actually rejects even valid cases. > The standard says that: > "The initializer shall be of the form “= assignment-expression”, of the form > “{ assignment-expression }”, or of the form “( assignment-expression )” > Now

Re: [PATCH] Fix hot/cold partitioning with -gstabs{,+} (PR debug/81307)

2017-11-27 Thread Jim Wilson
On 11/24/2017 01:53 PM, Jakub Jelinek wrote: Could anybody from the debugger folks test it a little bit (say gdb testsuite if it has any -O2 -gstabs/-O2 -gstabs+ tests)? The gdb testsuite just uses "-g" by default. It doesn't have any tests with optimization by default, though this can be don

C++ PATCH to primary_template_instantiation_p

2017-11-27 Thread Jason Merrill
All the uses of primary_template_instantiation_p actually want to query whether the entity in question is a specialization of the template, not whether it's an instantiation or explicit specialization. Tested x86_64-pc-linux-gnu, applying to trunk. commit ca0a29985403027c3438e5c3c45af35ca1da6bb2 A

Re: [PATCH] PR 53796 Improve INQUIRE(RECL=...) handling

2017-11-27 Thread Thomas Koenig
Hi Janne, PING Looks good for trunk. Thanks! Since this is a change in user-visible behavior, will you also document this in gcc-8/changes.html ? If you prefer me to do this (haven't installed CVS or something :-) just drop me a line. Regards Thomas

Re: [PATCH] Missing noexcept in string_view::find_first_of declaration

2017-11-27 Thread Jonathan Wakely
On 24/11/17 17:32 +, Jonathan Wakely wrote: On 24/11/17 18:09 +0100, Stephan Bergmann wrote: cf. definition in libstdc++-v3/include/bits/string_view.tcc that does have the noexcept (like all the other overloads defined inline in libstdc++-v3/include/std/string_view do). I thought Jason alr

[PATCH] PR libgcc/83112, Fix warnings on libgcc float128-ifunc.c

2017-11-27 Thread Michael Meissner
The new -Wattribute-alias option now issues warnings for old-style ifunc declarations that coerce the pointer to the function to void *. The float128-ifunc.c module in libgcc/config/rs6000 now gets a lot of warnings of the form: ../float128-ifunc.c:109:1: warning: ‘ifunc’ resolver for ‘__negkf2’

[PATCH] handle invalid array index in warn_placement_new_too_small (PR 83058)

2017-11-27 Thread Martin Sebor
Bug 83058 - [6/7/8 Regression] ICE on C++ code with negative array index: in warn_placement_new_too_small, at cp/init.c:2666, reports an ICE for an invalid placement new expression with a negative array index. The ICE was caused by calling tree_to_uhwi (nelts) without first checking to make sure

Re: [PATCH] ARM testsuite: force hardfp for addr-modes-float.c

2017-11-27 Thread Charles Baylis
On 27 November 2017 at 17:47, Kyrill Tkachov wrote: > Hi Charles, > > On 27/11/17 17:03, Charles Baylis wrote: >> >> Some of the new tests in addr-modes-float.c, which were introduced for >> the rework of addressing modes costs [1] fail when GCC is configured >> to default to a softfp calling con

Re: [RFA][PATCH] Stack clash protection 07/08 -- V4 (aarch64 bits)

2017-11-27 Thread James Greenhalgh
On Wed, Nov 22, 2017 at 06:28:24PM +, Jeff Law wrote: > On 11/21/2017 04:57 AM, James Greenhalgh wrote: > > I've finally built up enough courage to start getting my head around this... > Can't blame you for avoiding :-) This stuff isn't my idea of fun either. Right, here's where I'm up to... I

Re: [PATCH] [MSP430] [PR78554] Prevent SUBREG from referencing a SYMBOL_REF

2017-11-27 Thread Jeff Law
On 08/24/2017 07:18 AM, Jozef Lawrynowicz wrote: > As reported in PR78554, attempting to store an __int20 address in memory > causes an ICE due to an invalid insn. This only occurs at optimisation > levels higher than -O0 because these optimisation levels pass > -ftree-ter, which causes the compile

Re: [RFA][PATCH] Stack clash protection 07/08 -- V4 (aarch64 bits)

2017-11-27 Thread Jeff Law
On 11/27/2017 10:33 AM, Wilco Dijkstra wrote: > Szabolcs Nagy wrote: >> On 28/10/17 05:08, Jeff Law wrote: >> >>> My hope would be that we simply don't ever use the params.  They were >>> done as much for *you* to experiment with as anything.  I'd happy just >>> delete them as there's essentially n

Re: [RFA][PATCH] Stack clash protection 07/08 -- V4 (aarch64 bits)

2017-11-27 Thread Jeff Law
On 11/27/2017 08:48 AM, Szabolcs Nagy wrote: > On 28/10/17 05:08, Jeff Law wrote: >> On 10/13/2017 02:26 PM, Wilco Dijkstra wrote: >>> For larger frames the first oddity is that there are now 2 separate params >>> controlling how probes are generated: >>> >>> stack-clash-protection-guard-size (defa

Re: [patch] remove cilk-plus

2017-11-27 Thread Jeff Law
On 11/23/2017 02:45 AM, Koval, Julia wrote: > Sorry, I think in this version of this patch they are fixed. > >> -Original Message- >> From: Joseph Myers [mailto:jos...@codesourcery.com] >> Sent: Wednesday, November 22, 2017 6:23 PM >> To: Koval, Julia >> Cc: Jeff Law ; Jakub Jelinek ; GCC

Re: [PATCH] ARM testsuite: force hardfp for addr-modes-float.c

2017-11-27 Thread Kyrill Tkachov
Hi Charles, On 27/11/17 17:03, Charles Baylis wrote: Some of the new tests in addr-modes-float.c, which were introduced for the rework of addressing modes costs [1] fail when GCC is configured to default to a softfp calling convention. Fix this by annotating the test functions with __attribute__

Re: [RFA][PATCH] Stack clash protection 07/08 -- V4 (aarch64 bits)

2017-11-27 Thread Wilco Dijkstra
Szabolcs Nagy wrote: >On 28/10/17 05:08, Jeff Law wrote: > >> My hope would be that we simply don't ever use the params.  They were >> done as much for *you* to experiment with as anything.  I'd happy just >> delete them as there's essentially no guard rails to ensure their values >> are sane. > >

Re: [PATCH 1/7]: SVE: Add CLOBBER_HIGH expression

2017-11-27 Thread Jeff Law
On 11/23/2017 04:11 AM, Alan Hayward wrote: > >> On 22 Nov 2017, at 17:33, Jeff Law wrote: >> >> On 11/22/2017 04:31 AM, Alan Hayward wrote: >>> On 21 Nov 2017, at 03:13, Jeff Law wrote: > >> >> You might also look at TARGET_HARD_REGNO_CALL_PART_CLOBBERED. I'd >> totally fo

Re: [patch] implement generic debug() for vectors and hash sets

2017-11-27 Thread Jeff Law
On 11/27/2017 08:03 AM, Aldy Hernandez wrote: > > > On 11/23/2017 02:12 PM, Gerald Pfeifer wrote: >> On Tue, 21 Nov 2017, Gerald Pfeifer wrote: >>> /scratch/tmp/gerald/GCC-HEAD/gcc/print-rtl.c:982:1: error: explicit >>> instantiation cannot have a storage class >>> DEFINE_DEBUG_VEC (rtx_def *) >>

Re: [PATCH] Fix PR80776

2017-11-27 Thread Jeff Law
On 11/27/2017 06:39 AM, Richard Biener wrote: > > The following avoids -Wformat-overflow false positives by teaching > EVRP the trick about __builtin_unreachable () "other" edges and > attaching range info to SSA names. EVRP does a better job in keeping > ranges for every SSA name from conditiona

[PATCH] ARM testsuite: force hardfp for addr-modes-float.c

2017-11-27 Thread Charles Baylis
Some of the new tests in addr-modes-float.c, which were introduced for the rework of addressing modes costs [1] fail when GCC is configured to default to a softfp calling convention. Fix this by annotating the test functions with __attribute__((pcs("aapcs-vfp"))). Thanks to Christophe for pointing

Re: [RFC][PATCH] Extend DCE to remove unnecessary new/delete-pairs

2017-11-27 Thread Jeff Law
On 11/27/2017 02:22 AM, Dominik Inführ wrote: > Thanks for all the reviews! I’ve revised the patch, the operator_delete_flag > is now stored in tree_decl_with_vis (there already seem to be some > FUNCTION_DECL-flags in there). I’ve also added the option -fallocation-dce to > disable this optimiz

Re: [PATCH] Fix typo in unordered_map deduction guide, missing "typename ="

2017-11-27 Thread Jonathan Wakely
On 24/11/17 18:03 +0100, Stephan Bergmann wrote: Otherwise, at least recent Clang trunk with -std=gnu++17 complains In file included from lib/gcc/x86_64-pc-linux-gnu/8.0.0/../../../../include/c++/8.0.0/functional:60: In file included from lib/gcc/x86_64-pc-linux-gnu/8.0.0/../../../../include/

Re: [RFA][PATCH] Use SCEV conditionally within vr-values and evrp range analysis - V2

2017-11-27 Thread Jeff Law
On 11/23/2017 05:49 AM, Richard Biener wrote: > On Thu, Nov 23, 2017 at 1:16 AM, Jeff Law wrote: >> >> Clients of the evrp range analysis may not have initialized the SCEV >> infrastructure, and in fact my not want to (DOM for example). >> >> Yet inside both vr-values.c and gimple-ssa-evrp-analyze

Re: [PATCH], PR middle_end/82333, Make long double/_Float128 constants not hash to the same value on the PowerPC

2017-11-27 Thread Joseph Myers
On Thu, 9 Nov 2017, Michael Meissner wrote: > [gcc] > 2017-11-09 Michael Meissner > > PR middle_end/82333 > * varasm.c (compare_constant): Take the mode of the constants into > account when comparing floating point constants. > > [gcc/testsuite] > 2017-11-09 Michael Meissne

Re: [PATCH v2 4/4] [SPARC] Errata workaround for GRLIB-TN-0013

2017-11-27 Thread Daniel Cederman
+(and (eq_attr "fix_lost_divsqrt" "true") + (eq_attr "type" "fpdivs,fpsqrts,fpdivd,fpsqrtd")) + (const_string "false") These lines should also be added to the in_integer_branch_annul_delay attribute. /Daniel C

Re: [RFA][PATCH] Stack clash protection 07/08 -- V4 (aarch64 bits)

2017-11-27 Thread Szabolcs Nagy
On 28/10/17 05:08, Jeff Law wrote: > On 10/13/2017 02:26 PM, Wilco Dijkstra wrote: >> For larger frames the first oddity is that there are now 2 separate params >> controlling how probes are generated: >> >> stack-clash-protection-guard-size (default 12, but set to 16 on AArch64) >> stack-clash-pro

Re: [RFTesting] New POINTER_DIFF_EXPR

2017-11-27 Thread Jakub Jelinek
On Mon, Nov 27, 2017 at 10:41:42AM -0500, David Malcolm wrote: > On Sun, 2017-11-26 at 01:11 +0100, Gerald Pfeifer wrote: > > On Mon, 20 Nov 2017, Marc Glisse wrote: > > > new version, regtested on powerpc64le-unknown-linux-gnu. The front- > > > end > > > parts are up for review. > > > > > > 2017

Re: [RFTesting] New POINTER_DIFF_EXPR

2017-11-27 Thread David Malcolm
On Sun, 2017-11-26 at 01:11 +0100, Gerald Pfeifer wrote: > On Mon, 20 Nov 2017, Marc Glisse wrote: > > new version, regtested on powerpc64le-unknown-linux-gnu. The front- > > end > > parts are up for review. > > > > 2017-10-28 Marc Glisse > > > > gcc/c/ > > * c-fold.c (c_fully_fold_intern

[PATCH][AArch64] Fix ICE due to store_pair_lanes

2017-11-27 Thread Wilco Dijkstra
The recently added store_pair_lanes causes ICEs in output_operand. This is due to aarch64_classify_address treating it like a 128-bit STR rather than a STP. The valid immediate offsets don't fully overlap, causing it to return false. Eg. offset 264 is a valid 8-byte STP offset but not a valid 16-b

[PATCH][2/2] gimple-fold.c part for PR83141

2017-11-27 Thread Richard Biener
The following is the truly minimal fix for the middle-end issue with SRA and memcpy folding interaction. I've tried more variants that "make sense" but as they all end up folding slightly more memcpy calls than before we run into optimization testcase regressions in places that look for __builtin

Re: [PATCH] PR 53796 Improve INQUIRE(RECL=...) handling

2017-11-27 Thread Janne Blomqvist
PING On Mon, Nov 20, 2017 at 10:06 PM, Janne Blomqvist wrote: > The current F2018 draft (N2137) specifies behavior of the RECL= > specifier in the INQUIRE statement, where it previously was left as > undefined. Namely: > > - If the unit is not connected, RECL= should be given the value -1. > - If

Re: [patch] implement generic debug() for vectors and hash sets

2017-11-27 Thread Aldy Hernandez
On 11/23/2017 02:12 PM, Gerald Pfeifer wrote: On Tue, 21 Nov 2017, Gerald Pfeifer wrote: /scratch/tmp/gerald/GCC-HEAD/gcc/print-rtl.c:982:1: error: explicit instantiation cannot have a storage class DEFINE_DEBUG_VEC (rtx_def *) ^ /scratch/tmp/gerald/GCC-HEAD/gcc/vec.h:456:24: note: expanded f

[PATCH][1/2] gimple-fold.c part of PR83141

2017-11-27 Thread Richard Biener
This is removing dead code from the times this was folding on GENERIC and refactors things a tiny bit. Bootstrapped and tested on x86_64-unknown-linux-gnu, applied. Richard. 2017-11-27 Richard Biener * gimple-fold.c (gimple_fold_builtin_memory_op): Remove dead code, refactor

Re: [PATCH][GCC][DOCS][AArch64][ARM] Documentation updates adding -A extensions.

2017-11-27 Thread James Greenhalgh
On Wed, Nov 15, 2017 at 11:51:15AM +, Tamar Christina wrote: > Hi All, > > This patch updates the documentation for AArch64 and ARM correcting the use > of the > architecture namings by adding the -A suffix in appropriate places. > > Build done on aarch64-none-elf and arm-none-eabi and no is

[PATCH] Fix PR80776

2017-11-27 Thread Richard Biener
The following avoids -Wformat-overflow false positives by teaching EVRP the trick about __builtin_unreachable () "other" edges and attaching range info to SSA names. EVRP does a better job in keeping ranges for every SSA name from conditional info (VRP "optimizes" its costly ASSERT_EXPR insertion

Re: [C++ PATCH] Avoid -Wreturn-type warnings if a switch has default label, no breaks inside of it, but is followed by a break (PR sanitizer/81275)

2017-11-27 Thread Jakub Jelinek
On Mon, Nov 27, 2017 at 07:49:41AM -0500, Nathan Sidwell wrote: > On 11/25/2017 07:22 PM, Jakub Jelinek wrote: > > On Sat, Nov 25, 2017 at 10:01:22AM +0100, Jakub Jelinek wrote: > > > Actually, thinking about it some more, maybe it would be more efficient > > > to gather this information during con

Re: [C++ PATCH] Avoid -Wreturn-type warnings if a switch has default label, no breaks inside of it, but is followed by a break (PR sanitizer/81275)

2017-11-27 Thread Nathan Sidwell
On 11/25/2017 07:22 PM, Jakub Jelinek wrote: On Sat, Nov 25, 2017 at 10:01:22AM +0100, Jakub Jelinek wrote: Actually, thinking about it some more, maybe it would be more efficient to gather this information during construction of the SWITCH_STMT in some new flag on the tree, so cxx_block_may_fal

Re: [PATCH] Fix UB in hash-map.h

2017-11-27 Thread Richard Biener
On Sun, Nov 26, 2017 at 10:05 AM, Markus Trippelsdorf wrote: > bootstrap-ubsan shows: > gcc/hash-map.h:277:19: runtime error: member access within null pointer of > type 'struct hash_map' > > Fix the issue by returning early. > bootstrap-ubsan on X86_64 and ppc64le. Tested on ppc64le. > > OK fo

Re: [PING 2][PATCH] enhance -Wrestrict to handle string built-ins (PR 78918)

2017-11-27 Thread Richard Biener
On Thu, Nov 16, 2017 at 10:29 PM, Martin Sebor wrote: > Ping. > > I've fixed the outstanding false positive exposed by the Linux > kernel. The kernel builds with four instances of the warning, > all of them valid (perfect overlap in memcpy). > > I also built Glibc. It shows one instance of the w

Re: [C++ PATCH] Avoid -Wreturn-type warnings if a switch has default label, no breaks inside of it, but is followed by a break (PR sanitizer/81275)

2017-11-27 Thread Nathan Sidwell
On 11/25/2017 04:01 AM, Jakub Jelinek wrote: /* Set if the body of a switch stmt contains a default: case label and does not contain any break; stmts, thus if SWITCH_STMT_BODY is not empty and doesn't fallthru, then the whole switch stmt can't. */ #define SWITCH_STMT_CANT_FALLTHRU_P

Re: [C++ PATCH] Avoid -Wreturn-type warnings if a switch has default label, no breaks inside of it, but is followed by a break (PR sanitizer/81275)

2017-11-27 Thread Nathan Sidwell
On 11/24/2017 04:59 PM, Jakub Jelinek wrote: Hi! The testcase below has a useless break; that causes a bogus -Wreturn-type warning. The C++ FE already has code to avoid adding a BREAK_STMT after a return or similar sequence that is known not to return. The following patch extends block_may_fall

Re: [C++ PATCH] Optimize void COND_EXPRs during cp_fold (PR c++/81675)

2017-11-27 Thread Nathan Sidwell
On 11/24/2017 04:35 PM, Jakub Jelinek wrote: Hi! The comment says that trying to fold VOID_TYPE_P COND_EXPRs is not worth bothering, but as the following testcase shows, that is not the case. fold_ternary can optimize COND_EXPRs where the condition is constant and the unused branch doesn't have

[PATCH] Clear stale entries from int_hash_table

2017-11-27 Thread Richard Biener
When ggc_free()ing TYPE_MIN/MAX_VALUE in type_hash_canon we have to make sure to not leave stale entries in int_hash_table. The following fixes that and also makes two related changes - freeing a built INTEGER_CST with a existing entry and properly hashing and finding redundancies of integer type

Re: [PATCH][ARM] Fix wrong code by arm_final_prescan with fp16 move instructions

2017-11-27 Thread Kyrill Tkachov
Hi Sudi, On 24/11/17 14:57, Sudi Das wrote: Hi For the following test case: __fp16 test_select (__fp16 a, __fp16 b, __fp16 c) { return (a < b) ? b : c; } when compiled with -mfpu=fp-armv8 -march=armv8.2-a+fp16 -marm -mfloat-abi=hard trunk generates wrong code: test_select: @ args

Re: [patch] Add support for #pragma GCC unroll v2

2017-11-27 Thread Eric Botcazou
> The middle-end, testsuite and boilerplate changes in the FEs are ok. Thanks. But it turns out that the Ada compiler needs a way to convey a pragma unroll without explicit unrolling factor, because otherwise the RTL unroller will happily try to unroll some loops USHRT_MAX times... Tested on x

[PATCH 01/10] [ARC][LRA] Use TARGET_CANNOT_SUBSTITUTE_MEM_EQUIV.

2017-11-27 Thread Claudiu Zissulescu
From: Claudiu Zissulescu Sometimes the memory equivalent is not valid due to a large offset. For example replacing the ap register with its fp/sp-equivalent during LRA step. To solve this we introduced TARGET_CANNOT_SUBSTITUTE_MEM_EQUIV. gcc/ 2017-08-08 Claudiu Zissulescu * config/ar

[PATCH 07/10] [ARC][FIX] Consider command line ffixed- option.

2017-11-27 Thread Claudiu Zissulescu
From: claziss Track which regs are set fixed/call saved/call used from commnad line. Do not try to override their properties if user says otherwise. gcc/ 2017-06-08 Claudiu Zissulescu * config/arc/arc.c (overrideregs): New variable. (arc_override_options): Track fixed/call sa

[PATCH 06/10] [ARC] Update legitimate constant hook.

2017-11-27 Thread Claudiu Zissulescu
From: Claudiu Zissulescu Make sure we check the constants in all cases. gcc/ 2017-10-14 Claudiu Zissulescu * config/arc/arc.c (arc_legitimate_constant_p): Always check all constants. testsuite/ 2017-10-14 Claudiu Zissulescu * gcc.target/arc/tls-1.c: New test. ---

[PATCH 08/10] [ARC] Enable unaligned access.

2017-11-27 Thread Claudiu Zissulescu
From: Claudiu Zissulescu Use munaligned-access to control if we can have unaligned accesses. For ARC HS family unaligned access is always on. 2017-10-19 Claudiu Zissulescu * config/arc/arc-c.def (__ARC_UNALIGNED__): New define. * config/arc/arc.h (STRICT_ALIGNMENT): Control

[PATCH 00/10][ARC] Critical fixes

2017-11-27 Thread Claudiu Zissulescu
From: claziss Hi, This bunch of patches contain a number of critical patches to ARC backend: - For ZOL: we have two patches which are avoiding the last ZOL instruction to be placed into a delay slot, and update the number of uses for the ZOL labels. Also, we enable the DBNZ instruction onl

[PATCH 10/10] [ARC] Revamp trampoline implementation.

2017-11-27 Thread Claudiu Zissulescu
From: Claudiu Zissulescu The new implementation attempts to clean up the existing trampoline implementation for ARC making it to work for linux type of systems. gcc/ 2017-11-10 Claudiu Zissulescu * config/arc/arc.c (TARGET_TRAMPOLINE_ADJUST_ADDRESS): Delete. (emit_store_direc

[PATCH 09/10] [ARC] Update (u)maddsidi patterns.

2017-11-27 Thread Claudiu Zissulescu
From: claziss The accumulator registers are freely used by the compiler. However, there are a number of instructions which are having an intrinsic use of these registers. Update patterns to inform the compiler which ones. gcc/ 2017-09-19 Claudiu Zissulescu * config/arc/arc.md (maddsi

[PATCH 05/10] [ARC] Add trap instruction.

2017-11-27 Thread Claudiu Zissulescu
From: Claudiu Zissulescu 2017-11-07 Claudiu Zissulescu * config/arc/arc.md (trap): New pattern. --- gcc/config/arc/arc.md | 7 +++ 1 file changed, 7 insertions(+) diff --git a/gcc/config/arc/arc.md b/gcc/config/arc/arc.md index b8fa44e..42c6a23 100644 --- a/gcc/config/arc/arc.md

[PATCH 02/10] [ARC][ZOL] Update uses for hw-loop labels.

2017-11-27 Thread Claudiu Zissulescu
From: claziss Make sure we mark the hw-loop labels as beeing used. gcc/ 2017-09-19 Claudiu Zissulescu * config/arc/arc.c (hwloop_optimize): Update hw-loop's end/start labels number of usages. gcc/testsuite 2017-09-19 Claudiu Zissulescu * gcc.target/arc/loop-2.cpp

[PATCH 04/10] [ARC] Add ARCv2 core3 tune option.

2017-11-27 Thread Claudiu Zissulescu
From: claziss ARCv2 Core3 cpus are comming with dbnz support. Add this feature on the tune option. gcc/ 2017-09-14 Claudiu Zissulescu * config/arc/arc-arch.h (arc_tune_attr): Add ARC_TUNE_CORE_3. * config/arc/arc.c (arc_sched_issue_rate): Use ARC_TUNE_... . (arc_init)

[PATCH 03/10] [ARC] Don't allow the last ZOL insn to be in a delay slot.

2017-11-27 Thread Claudiu Zissulescu
From: Claudiu Zissulescu The ARC ZOL implementation doesn't allow the last instruction to be a control instruction or part of a delay slot. Thus, we add a note to the last ZOL instruction which will prevent it to finish into a delay slot. 2017-10-20 Claudiu Zissulescu * config/arc/a

RE: [PATCH][GCC][ARM] Dot Product NEON intrinsics [Patch (3/8)]

2017-11-27 Thread Tamar Christina
Hi Christoph, > -Original Message- > From: Christophe Lyon [mailto:christophe.l...@linaro.org] > Sent: Sunday, November 26, 2017 20:01 > To: Tamar Christina > Cc: Kyrill Tkachov ; gcc-patches@gcc.gnu.org; > nd ; Ramana Radhakrishnan > ; Richard Earnshaw > ; ni...@redhat.com > Subject: Re:

Re: [PATCH][GCC][ARM] Dot Product NEON intrinsics [Patch (3/8)]

2017-11-27 Thread Kyrill Tkachov
Hi Christophe, On 26/11/17 20:01, Christophe Lyon wrote: On 26 November 2017 at 13:56, Christophe Lyon wrote: On 24 November 2017 at 20:38, Christophe Lyon wrote: On 24 November 2017 at 19:05, Tamar Christina wrote: Hi Christophe, After your commit, I have these reports: http://people.li

Re: [C++ PATCH] Fix -fsanitize={null,alignment} of references (PR c++/79572)

2017-11-27 Thread Jakub Jelinek
On Fri, Nov 24, 2017 at 03:26:11PM +0100, Jakub Jelinek wrote: > On Fri, Nov 24, 2017 at 05:16:27PM +0300, Maxim Kuvyrkov wrote: > > Using __builtin_printf causes this test to fail sporadically when > > cross-testing. Stdout and stderr output can get mixed in > > cross-testing, so dejagnu might se

[PATCH 2/2] [SPARC] Recognize the load when accessing the GOT

2017-11-27 Thread Daniel Cederman
Needed for the UT699 errata workaround to function correctly when compiling with -fPIC. gcc/ChangeLog: 2017-11-27 Daniel Cederman * config/sparc/sparc.c (sparc_do_work_around_errata): Treat the movsi_pic_gotdata_op instruction as a load for the UT699 errata workaround.

Re: [RFC][PATCH] Extend DCE to remove unnecessary new/delete-pairs

2017-11-27 Thread Jakub Jelinek
On Mon, Nov 27, 2017 at 10:22:52AM +0100, Dominik Inführ wrote: > @@ -4195,8 +4198,10 @@ cxx_init_decl_processing (void) > deltype = cp_build_type_attribute_variant (void_ftype_ptr_size, > extvisattr); > deltype = build_exception_variant

[PATCH 0/2] [SPARC] Fixes for UT699 errata workaround

2017-11-27 Thread Daniel Cederman
Hello, This patch series adds two fixes for the UT699 errata workaround. Daniel Cederman (2): [SPARC] Prevent -mfix-ut699 from generating b2bst errata sequences [SPARC] Recognize the load when accessing the GOT gcc/config/sparc/sparc.c | 8 +++- gcc/config/sparc/sparc.md | 8

[PATCH 1/2] [SPARC] Prevent -mfix-ut699 from generating b2bst errata sequences

2017-11-27 Thread Daniel Cederman
The sequence st fdivd / fsqrtd std was generated in some cases with -mfix-ut699 when there was a st before the div/sqrt. This sequence could trigger the b2bst errata. Now the following safe sequence is generated instead: st nop fdivd / fsqrtd std gcc/ChangeLog: 2017-11-27 Martin A

[PATCH v2 2/4] [SPARC] Errata workaround for GRLIB-TN-0011

2017-11-27 Thread Daniel Cederman
This patch provides a workaround for the errata described in GRLIB-TN-0011. If the workaround is enabled it will: * Insert .align 16 before atomic instructions (swap, ldstub, casa). It is applicable to GR712RC. gcc/ChangeLog: 2017-11-17 Daniel Cederman * config/sparc/sync.md (swaps

[PATCH v2 0/4] [SPARC] Workarounds for UT699, UT700, and GR712RC errata

2017-11-27 Thread Daniel Cederman
Hello Eric, Thank you for your comments! I have updated the patches and will commit them if you are OK with the changes. Daniel Cederman (4): [SPARC] Errata workaround for GRLIB-TN-0012 [SPARC] Errata workaround for GRLIB-TN-0011 [SPARC] Errata workaround for GRLIB-TN-0010 [SPARC] Errata

[PATCH v2 1/4] [SPARC] Errata workaround for GRLIB-TN-0012

2017-11-27 Thread Daniel Cederman
This patch provides a workaround for the errata described in GRLIB-TN-0012. If the workaround is enabled it will: * Prevent any floating-point operation from being placed in the delay slot of an annulled integer branch. * Place a NOP at the branch target of an integer branch if it is a float

[PATCH v2 4/4] [SPARC] Errata workaround for GRLIB-TN-0013

2017-11-27 Thread Daniel Cederman
This patch provides a workaround for the errata described in GRLIB-TN-0013. If the workaround is enabled it will: * Prevent div and sqrt instructions in the delay slot. * Insert NOPs to prevent the sequence (div/sqrt) -> (two or three floating point operations or loads) -> (div/sqrt). * Not i

[PATCH v2 3/4] [SPARC] Errata workaround for GRLIB-TN-0010

2017-11-27 Thread Daniel Cederman
This patch provides a workaround for the errata described in GRLIB-TN-0010. If the workaround is enabled it will: * Insert a NOP between load instruction and atomic instruction (swap, ldstub, casa). * Insert a NOP at branch target if load in delay slot and atomic instruction at branch target

Re: [RFC][PATCH] Extend DCE to remove unnecessary new/delete-pairs

2017-11-27 Thread Dominik Inführ
Thanks for all the reviews! I’ve revised the patch, the operator_delete_flag is now stored in tree_decl_with_vis (there already seem to be some FUNCTION_DECL-flags in there). I’ve also added the option -fallocation-dce to disable this optimization. It bootstraps and no regressions on aarch64 and

Re: [PATCH] Fix hot/cold partitioning with -gstabs{,+} (PR debug/81307)

2017-11-27 Thread Jakub Jelinek
On Mon, Nov 27, 2017 at 09:21:36AM +0100, Richard Biener wrote: > > No objection if you want to go ahead with your patch, you've already > > done the work, but fixing bugs in stabs support, e. > > Would have been such a nice excuse to drop STABS support ;) :) > Anyway, the patch looks sensib

Re: [PATCH, Makefile.in] refine selftest recipes to restore mingw bootstrap

2017-11-27 Thread Olivier Hainque
(typo in David's email address in the previous message, resending. sorry for the duplicates) Hi Jeff, (Thanks for your feedback) > On Nov 27, 2017, at 04:55 , Jeff Law wrote: > >> * Makefile.in (SELFTEST_FLAGS): Use nul instead of /dev/null >> on mingw build hosts. > Would it make mo

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