On 08/24/2017 07:18 AM, Jozef Lawrynowicz wrote: > As reported in PR78554, attempting to store an __int20 address in memory > causes an ICE due to an invalid insn. This only occurs at optimisation > levels higher than -O0 because these optimisation levels pass > -ftree-ter, which causes the compiler to try and do the store in > one instruction. > The issue in the insn is that a SUBREG references a SYMBOL_REF. > > I guess the compiler gets into this situation because it assumes that > it can execute a move instruction where both src and dst are in memory, > but this isn't possible with __int20. > > The attached patch prevents a instance of SUBREG being created where the > subword is a SYMBOL_REF. > > If the patch is acceptable, I would appreciate if someone could commit > it for me, as I do not have write access. The compiler is asked to put a the address of test_val into a memory location.
When in large mode the address of test_val is larger than a word. ie, it is PSI mode and the word size is HImode. So naturally the generic parts of the compiler try to split that up into word sized chunks. That's probably not a good idea for partial modes, regardless of the underlying object (ie, a SYMBOL_REF, MEM, REG, CONST, whatever). I really wonder if the fix here is to special case partial integer modes in store_bit_field_1 to use the movpxx rather than trying to break them down into word sized hunks. I am pretty sure that special casing SYMBOL_REFs like this patch does isn't right. jeff
