the original structure (D.2215) is still allocated, and
not used afterward. The following RTL-level optimization cannot
eliminate it.
Cheers,
Bingfeng Mei
Broadcom UK
Original C code:
/* { dg-do compile } */
/* { dg-do run } */
#include
typedef struct
{
int a;
float b;
}str_t
Message-
From: Olga Golovanevsky [mailto:[EMAIL PROTECTED]
Sent: 01 May 2008 13:19
To: Bingfeng Mei
Cc: gcc@gcc.gnu.org; Kenneth Zadeck
Subject: Re: Redundant malloc in structure optimization?
(testsuite/gcc.dg/struct/wo_prof_global_var.c)
[EMAIL PROTECTED] wrote on 28/04/2008 12:36:44:
>
access uninitialized memory chunk (D.2215), or access two split
substructures, then make the first allocated memory useless.
-Original Message-
From: Kenneth Zadeck [mailto:[EMAIL PROTECTED]
Sent: 01 May 2008 15:09
To: Bingfeng Mei
Cc: Olga Golovanevsky; gcc@gcc.gnu.org
Subject: Re
infrastructure to implement similar
#pragma? I can see it will be quite useful for many targets.
Cheers,
Bingfeng Mei
Broadcom UK
Alex, Thanks for your suggestion. What target hook do you use for the
backend function?
-Original Message-
From: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED] On Behalf Of
Alex Turjan
Sent: 29 May 2008 14:45
To: gcc@gcc.gnu.org
Subject: RE: Implement #pragma unroll?
Dear Bingfeng,
Some tim
-Original Message-
From: Alex Turjan [mailto:[EMAIL PROTECTED]
Sent: 30 May 2008 08:55
To: Bingfeng Mei; gcc@gcc.gnu.org
Subject: RE: Implement #pragma unroll?
Bingfeng,
to define the pragma you use something like this:
#define REGISTER
ns of them? Any suggestion is greatly appreciated.
Cheers,
Bingfeng Mei
Broadcom UK
I don't know why GCC defines inhibit_libc during configuration. Now I
use --with-headers according to another mail's suggestion, this problem
is solved. Thanks.
Bingfeng
-Original Message-
From: Jan Hubicka [mailto:[EMAIL PROTECTED]
Sent: 16 June 2008 02:54
To: Bingfeng M
peration that should precede instructions and read-only data. Normally
"\t.text"
is right.
So I guess either internal manual or crtstuff.c is wrong. Or I am making
some stupid mistake here. Could someone have a look at this? Thanks in
advance.
Cheers,
Bingfeng Mei
Broadcom UK
I realized I probably need to write CRT_CALL_STATIC_FUNCTION myself.
That should solve the issue.
-Original Message-
From: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED] On Behalf Of
Bingfeng Mei
Sent: 16 June 2008 14:01
To: gcc@gcc.gnu.org
Subject: Is this a GCC bug?
Hello,
I encountered
( 8) -> 9
...
Cheers,
Bingfeng Mei
really difficult to detect. It would be nice to at
least give a warning. Should I report it as a bug?
Cheers,
Bingfeng Mei
Broadcom UK
tst.c
#include
unsigned long long core_id;
unsigned long bar(unsigned long extchan, unsigned long* intchan)
{
*intchan = extchan + 6;
return extchan-5
Sorry, I made a mistake. My local copy of mainline version (still 4.3.0
20080213) doesn't gave warning. I just updated my mainline GCC and it
does give warning now.
-Original Message-
From: Andrew Haley [mailto:[EMAIL PROTECTED]
Sent: 30 June 2008 13:45
To: Bingfeng Mei
Cc
me unrolling
functions at tree-level, but there is no independent tree-level loop
unrolling pass except "cunroll", which is complete unrolling. What
prevents such a tree-level unrolling pass? Or is there any suggestion to
improve existing RTL level unrolling? Thanks in advance.
Cheers
) has signed company-wide FSF copyright assignment.
Cheers,
Bingfeng
-Original Message-
From: Richard Guenther [mailto:[EMAIL PROTECTED]
Sent: 02 July 2008 12:59
To: Bingfeng Mei
Cc: gcc@gcc.gnu.org
Subject: Re: Inefficient loop unrolling.
On Wed, Jul 2, 2008 at 1:13 PM, Bingfeng Mei
that loop unrolling should belong to RTL level? Is it
fundamental?
Cheers,
Bingfeng
-Original Message-
From: Steven Bosscher [mailto:[EMAIL PROTECTED]
Sent: 02 July 2008 17:01
To: Bingfeng Mei
Cc: gcc@gcc.gnu.org
Subject: Re: Inefficient loop unrolling.
On Wed, Jul 2, 2008 at 1:13 PM
Message-
From: Paolo Bonzini [mailto:[EMAIL PROTECTED] On Behalf Of Paolo
Bonzini
Sent: 10 July 2008 13:34
To: Bingfeng Mei
Cc: Steven Bosscher; gcc@gcc.gnu.org
Subject: Re: Inefficient loop unrolling.
Bingfeng Mei wrote:
> Steven,
> I just created a bug report. You should receive a CCed ma
orm anymore. And later RTL level
optimizations cannot convert it back. Since it doesn't pass the
doloop_condition_get test, modulo scheduling pass doesn't work too. Do
I miss something here? Any hint is greatly appreciated.
Cheers,
Bingfeng Mei
L PROTECTED]
> Sent: 16 July 2008 16:05
> To: gcc@gcc.gnu.org
> Cc: Ian Lance Taylor; Bingfeng Mei
> Subject: Re: Question about doloop_end pattern
>
> I can confirm that the doloop optimization is applied for
> ARC600 / ARC700
> in a compiler based on gcc 4.4.0 20080606 (exp
Thanks. I was looking at bfin. MT's implementation looks similar but
simpler.
> -Original Message-
> From: Ramana Radhakrishnan [mailto:[EMAIL PROTECTED]
> Sent: 16 July 2008 19:17
> To: Bingfeng Mei
> Cc: gcc@gcc.gnu.org
> Subject: Re: Question about dol
aMS",@progbits,1
.LC0:
.string "Hello"
.sectionbar,"ax",@progbits
.p2align 4,,15
.globl bar
.type bar, @function
bar:
.LFB3:
movl$.LC0, %edi
jmp puts
.LFE3:
Thanks.
Bingfeng Mei
heers,
Bingfeng
> -Original Message-
> From: Dave Korn [mailto:[EMAIL PROTECTED]
> Sent: 23 July 2008 16:05
> To: Bingfeng Mei; gcc@gcc.gnu.org
> Subject: RE: Is cross-section inlining valid behaviour?
>
> Bingfeng Mei wrote on 23 July 2008 15:46:
>
>
> > The foo fu
similar issue. Is
this a potential bug for GCC or is there any way to overcome it just by
changing my porting?
I did a search on the mailing list, and found the following thread
reported a very similar issue. Unfortunately, it didn't have follow-up
about solution.
http://gcc.gnu.org/ml/gcc/2008-03/msg00932.html
Cheers,
Bingfeng Mei
Broadcom UK
We are portinng GCC 4.2.1 to a 2-issue VLIW processor. There are some
special instructions which can only be issued on the second slot (slot
1). I tried to specify using following DFA constructs.
;; Define this instruction can only be issued on slot 1
(define_insn_reservation "psr_y" 1
(eq_at
ement such machine-dependent tree-level
optimization (like hooks in RTL level). I believe there are other
processors that have the similar problem. What is common solution?
Thanks,
Bingfeng Mei
Broadcom UK
>= 0 && INTVAL(x) <= 255) {
*total = 1;
return true;
}
*total = 4;
return true;
Bingfeng Mei
-Original Message-
From: Ian Lance Taylor [mailto:[EMAIL PROTECTED]
Sent: 16 October 2007 15:32
To: Bingfeng Mei
Cc: gcc@gcc.gnu.org
S
TL level, it is difficult to reverse the optimization. In our 3.4.6
-based porting, the GCC actually generates the latter code. How to
avoid CSE under such situation? Any suggestion is greatly appreciated.
Cheers,
Bingfeng Mei
Broadcom UK
adhakrishnan [mailto:[EMAIL PROTECTED]
Sent: 02 November 2007 12:39
To: Bingfeng Mei
Cc: gcc@gcc.gnu.org
Subject: Re: Tree-SSA and POST_INC address mode inompatible in GCC4?
Hi Bingfeng,
On 11/2/07, Bingfeng Mei <[EMAIL PROTECTED]> wrote:
> Hello,
>
> I look at the following the code to
ion to overcome this problem?
Any suggestion is greatly appreciated.
Bingfeng Mei
Broadcom UK
Yes, that is the better way to generate code than using POST_INC since
it eliminates unnecessary dependency. Which version used to do this?
Where should it be done? I am thinking one of those copy propagation
passes. Am I right?
Cheers,
Bingfeng
-Original Message-
From: [EMAIL PROTECTED]
in advance.
Bingfeng Mei
Broadcom UK
ncies between insn1 and insn2. */
sched_analyze(&tmp_deps, insn1, insn2);
/* Remove dependencies from con. */
finish_deps_global ();
free_deps (&tmp_deps);
Is there any better way for dependency analysis?
Cheers,
Bingfeng Mei
Broadcom UK
-Original Message-
From: M
quot;r")
(match_operand:V8HI 2 "nonmemory_operand" "ri")))]
""
"andl %0, %1, %2"
(define_expand "andv16qi3"
[(set (match_operand:V16QI 0 "register_operand" "=r")
(and:SI (match_operand:V16QI 1 "register_operand" "r")
(match_operand:V16QI 2 "nonmemory_operand" "ri")))]
""
"andl %0, %1, %2"
...
Thanks,
Bingfeng Mei
Broadcom UK
Dave,
Is is only for 4.3+? Define_mode_iterator is not recognized in 4.2.1 I
am working on. And I didn't find anything in GCC4.2.1 internal manual
either.
Cheer.
Bingfeng
-Original Message-
From: Dave Korn [mailto:[EMAIL PROTECTED]
Sent: 22 November 2007 15:00
To: Bingfeng Mei
An
example of such data type is to represent value in a MAC register. Is
there are convenient way to do that? Thanks in advance,
Cheers,
Bingfeng Mei
Broadcom UK
is used to
represennt 40-bit MAC similarly.
I also tries to define a new INT_MODE by:
INT_MODE(PDI, 8).
The error message is the same.
Any hint? Thanks in advance.
Cheers,
Bingfeng Mei
Broadcom UK
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