On 12/10/09 18:33, daniel tian wrote:
Hi,
I have a problem about RTL sequence.
If I wanna generate the RTL in sequence, and don't let gcc to schedule
them.
Then you need to generate them as a single insn which outputs multiple
instructions.
Jeff
Joern Rennecke writes:
> If you need more rigid scheduling, you can use CC0.
No, please don't. I accept that CC0 is necessary today for a few
processors, but I really don't think we should encourage any new uses
of it.
Ian
Quoting daniel tian :
Hi,
I have a problem about RTL sequence.
If I wanna generate the RTL in sequence, and don't let gcc to
schedule them.
Like the following(all the variable is rtx):
emit_insn(reg0, operands[0]);
emit_insn(reg1, reg0);
emit_insn(operands[0], reg
> > There is a structure sequence_stack, I don't what it does.
>
> start_sequence and end_sequence are used to group insns into a
> specific location when you are generating insns. I quote the comment
> in emit-rtl.c:
And sequence_stack exists so you can arbitrarily nest insn sequences.
daniel tian writes:
> By the way, I don't underand the start_sequence and end_sequence.
> What does those function mean.
> I checked the source code in emit-rtl.c.
> I still can't figure out what they do.
> There is a structure sequence_stack, I don't what it does.
start_sequence and end_
Ian:
By the way, I don't underand the start_sequence and end_sequence.
What does those function mean.
I checked the source code in emit-rtl.c.
I still can't figure out what they do.
There is a structure sequence_stack, I don't what it does.
Thanks.
>> Does there any solution in RTL level?
>> Because I already solve the problem in ASM output level, exactly the
>> same solution as you suggest in this email.
>> I may need do some optimization later. So RTL level will be great!
>
> As far as I know there is no way to do this at the RTL level. I
I think you should do the operation with the functions in emit-rtl.c.
Like the functions:add_insn_after, add_insn_before, df_insn_delete.
You could try those things.
2009/12/11 Jianzhang Peng :
> I'm tring this function, but it have some problems. It seems not link
> the new insn in the double-l
daniel tian writes:
> 2009/12/11 Ian Lance Taylor :
>> daniel tian writes:
>>
>>> I have a problem about RTL sequence.
>>> If I wanna generate the RTL in sequence, and don't let gcc to schedule
>>> them.
>>> Like the following(all the variable is rtx):
>>>
>>> emit_insn(reg0, o
I'm tring this function, but it have some problems. It seems not link
the new insn in the double-list.
void merge(rtx insn1,rtx insn2)
{
rtx par, pre,sur, insn;
par = gen_rtx_PARALLEL (SFmode, rtvec_alloc (2));
XVECEXP (par, 0, 0) = PATTERN(insn1);
XVECEXP (par, 0
2009/12/11 Ian Lance Taylor :
> daniel tian writes:
>
>> I have a problem about RTL sequence.
>> If I wanna generate the RTL in sequence, and don't let gcc to schedule
>> them.
>> Like the following(all the variable is rtx):
>>
>> emit_insn(reg0, operands[0]);
>> emit_insn(re
daniel tian writes:
> I have a problem about RTL sequence.
> If I wanna generate the RTL in sequence, and don't let gcc to schedule
> them.
> Like the following(all the variable is rtx):
>
> emit_insn(reg0, operands[0]);
> emit_insn(reg1, reg0);
> emit_insn(operands[0],
Hi,
I have a problem about RTL sequence.
If I wanna generate the RTL in sequence, and don't let gcc to schedule them.
Like the following(all the variable is rtx):
emit_insn(reg0, operands[0]);
emit_insn(reg1, reg0);
emit_insn(operands[0], reg1);
But gcc will will re
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