I'm tring this function, but it have some problems. It seems not link
the new insn in the double-list.
void merge(rtx insn1,rtx insn2)
{
rtx par, pre,sur, insn;
par = gen_rtx_PARALLEL (SFmode, rtvec_alloc (2));
XVECEXP (par, 0, 0) = PATTERN(insn1);
XVECEXP (par, 0, 1) = PATTERN(insn2);
insn = make_insn_raw (par);
sur = NEXT_INSN(insn1);
PREV_INSN(insn) = insn1;
NEXT_INSN(insn) = sur;
delete_insn(insn1);
delete_insn(insn2);
}
2009/12/11 daniel tian <daniel.xnt...@gmail.com>:
> 2009/12/11 Ian Lance Taylor <i...@google.com>:
>> daniel tian <daniel.xnt...@gmail.com> writes:
>>
>>> I have a problem about RTL sequence.
>>> If I wanna generate the RTL in sequence, and don't let gcc to schedule
>>> them.
>>> Like the following(all the variable is rtx):
>>>
>>> emit_insn(reg0, operands[0]);
>>> emit_insn(reg1, reg0);
>>> emit_insn(operands[0], reg1);
>>>
>>> But gcc will will reorder the three rtl in optimization.
>>> I just wanna the those rtl in one block as a unit, don't let the
>>> gcc disrupt the sequence.
>>> How can I do it?
>>
>> Write a single define_insn which emits the instructions you want to
>> treat as a unit.
>>
>
> Does there any solution in RTL level?
> Because I already solve the problem in ASM output level, exactly the
> same solution as you suggest in this email.
> I may need do some optimization later. So RTL level will be great!
>
> Thanks for your advice.
> Best Regards.
>
> daniel.tian
>
--
Jianzhang Peng
