Re: [fpc-devel] Error building xtensa rtl

2020-04-19 Thread Michael Ring via fpc-devel
doesn't it make sense to also include subarchs in xtensa-freertos? diff --git a/utils/fpcm/fpcmake.ini b/utils/fpcm/fpcmake.ini index 16396ca921..9151c09021 100644 --- a/utils/fpcm/fpcmake.ini +++ b/utils/fpcm/fpcmake.ini @@ -295,6 +295,13 @@ endif  override FPCOPT+=-Cp$(SUBARCH)  endif +ifeq ($

Re: [fpc-devel] Error building xtensa rtl

2020-04-19 Thread Florian Klämpfl
Am 01.04.20 um 18:58 schrieb Christo Crause via fpc-devel: I directly edited the makefile to demonstrate the principle. In addition to a change to makefile.fpc an update to fpcmake.ini is also required, see attached fpcmake.patch I committed the SUBARCH changes. __

Re: [fpc-devel] Error building xtensa rtl

2020-04-01 Thread Christo Crause via fpc-devel
On Wed, Apr 1, 2020 at 6:58 PM Christo Crause wrote: > Good idea, the alternative instructions are part of the core ISA so it > should always be supported. > So the updated cgcpu patch attached... diff --git a/compiler/xtensa/cgcpu.pas b/compiler/xtensa/cgcpu.pas index a1fdbede87..25b6cb40b9 100

Re: [fpc-devel] Error building xtensa rtl

2020-04-01 Thread Christo Crause via fpc-devel
On Wed, Apr 1, 2020 at 12:06 AM Sven Barth wrote: > Christo Crause schrieb am Di., 31. März 2020, > 19:45: > >> On Tue, Mar 31, 2020 at 7:39 AM Sven Barth via fpc-devel < >> fpc-devel@lists.freepascal.org> wrote: >> >>> Am 30.03.2020 um 22:07 schrieb Christo Crause via fpc-devel: >>> >>> I've no

Re: [fpc-devel] Error building xtensa rtl

2020-03-31 Thread Sven Barth via fpc-devel
Christo Crause schrieb am Di., 31. März 2020, 19:45: > On Tue, Mar 31, 2020 at 7:39 AM Sven Barth via fpc-devel < > fpc-devel@lists.freepascal.org> wrote: > >> Am 30.03.2020 um 22:07 schrieb Christo Crause via fpc-devel: >> >> I've noticed GCC uses the SLLI + SRAI instructions to perform sign >>

Re: [fpc-devel] Error building xtensa rtl

2020-03-31 Thread Christo Crause via fpc-devel
On Tue, Mar 31, 2020 at 7:39 AM Sven Barth via fpc-devel < fpc-devel@lists.freepascal.org> wrote: > Am 30.03.2020 um 22:07 schrieb Christo Crause via fpc-devel: > > I've noticed GCC uses the SLLI + SRAI instructions to perform sign > extension on ESP8266. > > Since different CPUs can support diffe

Re: [fpc-devel] Error building xtensa rtl

2020-03-31 Thread Christo Crause via fpc-devel
On Tue, Mar 31, 2020 at 7:39 AM Sven Barth via fpc-devel < fpc-devel@lists.freepascal.org> wrote: > Am 30.03.2020 um 22:07 schrieb Christo Crause via fpc-devel: > > > On Sun, Mar 29, 2020 at 11:00 PM Florian Klämpfl > wrote: > >> Am 29.03.20 um 22:46 schrieb Christo Crause via fpc-devel: >> > It

Re: [fpc-devel] Error building xtensa rtl

2020-03-30 Thread Sven Barth via fpc-devel
Am 30.03.2020 um 22:07 schrieb Christo Crause via fpc-devel: On Sun, Mar 29, 2020 at 11:00 PM Florian Klämpfl mailto:flor...@freepascal.org>> wrote: Am 29.03.20 um 22:46 schrieb Christo Crause via fpc-devel: > It seems that a different instruction sequence should be used for sign

Re: [fpc-devel] Error building xtensa rtl

2020-03-30 Thread Florian Klämpfl
Am 30.03.20 um 22:07 schrieb Christo Crause via fpc-devel: On Sun, Mar 29, 2020 at 11:00 PM Florian Klämpfl > wrote: Am 29.03.20 um 22:46 schrieb Christo Crause via fpc-devel: > It seems that a different instruction sequence should be used for sign

Re: [fpc-devel] Error building xtensa rtl

2020-03-30 Thread Christo Crause via fpc-devel
On Sun, Mar 29, 2020 at 11:00 PM Florian Klämpfl wrote: > Am 29.03.20 um 22:46 schrieb Christo Crause via fpc-devel: > > It seems that a different instruction sequence should be used for sign > > extension for the lx106 subarch. > > Ok, I see. Let me first integrate everything done so far in trun

Re: [fpc-devel] Error building xtensa rtl

2020-03-29 Thread Florian Klämpfl
Am 29.03.20 um 22:46 schrieb Christo Crause via fpc-devel: According to the Xtensa ISA 4.3.8 the SEXT instruction is optional (and some others too) and apparently not implemented for ESP8266 according to core-isa.h in ESP8266_RTOS_SDK (https://github.com/espressif/ESP8266_RTOS_SDK/blob/master/c

Re: [fpc-devel] Error building xtensa rtl

2020-03-29 Thread Christo Crause via fpc-devel
On Sun, Mar 29, 2020 at 8:38 AM Christo Crause wrote: > On Sat, Mar 28, 2020 at 11:04 PM Florian Klämpfl > wrote: > >> Am 28.03.20 um 21:33 schrieb Christo Crause via fpc-devel: >> > When building the xtensa rtl with >> > >> > make rtl FPC=~/fpc/3.3.1/compiler/ppcrossxtensa CROSSOPT=-Cacall0 >>

Re: [fpc-devel] Error building xtensa rtl

2020-03-28 Thread Christo Crause via fpc-devel
On Sat, Mar 28, 2020 at 11:04 PM Florian Klämpfl wrote: > Am 28.03.20 um 21:33 schrieb Christo Crause via fpc-devel: > > When building the xtensa rtl with > > > > make rtl FPC=~/fpc/3.3.1/compiler/ppcrossxtensa CROSSOPT=-Cacall0 > > CPU_TARGET=xtensa OS_TARGET=embedded SUBARCH=esp8266 > > BINUTIL

Re: [fpc-devel] Error building xtensa rtl

2020-03-28 Thread Florian Klämpfl
Am 28.03.20 um 21:33 schrieb Christo Crause via fpc-devel: When building the xtensa rtl with make rtl FPC=~/fpc/3.3.1/compiler/ppcrossxtensa CROSSOPT=-Cacall0 CPU_TARGET=xtensa OS_TARGET=embedded SUBARCH=esp8266 BINUTILSPREFIX=xtensa-lx106-elf- the following errors are returned by as: /home/

[fpc-devel] Error building xtensa rtl

2020-03-28 Thread Christo Crause via fpc-devel
When building the xtensa rtl with make rtl FPC=~/fpc/3.3.1/compiler/ppcrossxtensa CROSSOPT=-Cacall0 CPU_TARGET=xtensa OS_TARGET=embedded SUBARCH=esp8266 BINUTILSPREFIX=xtensa-lx106-elf- the following errors are returned by as: /home/christo/fpc/3.3.1/rtl/units/xtensa-embedded/system.s: Assembler