Regards
Shashank
On 4/21/2017 4:47 PM, Ville Syrjälä wrote:
On Fri, Apr 21, 2017 at 12:51:14PM +0300, Jyri Sarha wrote:
Add standard properties to control YCbCr to RGB conversion in DRM
planes. The created properties are stored to drm_plane object to allow
different set of supported conversio
Regards
Shashank
On 4/26/2017 6:26 PM, Jyri Sarha wrote:
On 04/24/17 19:55, Ville Syrjälä wrote:
In fact we have plane specific YCbCr to RGB CSC (only preoffset
possible), then (per crtc) gamma table, and finally a (per crtc) RGB to
YCbCr CSC with optional post offset (so it can be used eithe
Regards
Shashank
On 1/30/2017 1:30 PM, Andrzej Hajda wrote:
On 29.01.2017 06:41, Shashank Sharma wrote:
CEA-861-F specs defines new 4k video modes to be used with
HDMI 2.0 EDIDs. These modes start at VIC=93 and go all the
way till VIC=107.
Our existing CEA modedb contains only 64 modes (VIC=
Fixed typo while adding Ville's mail address.
Regards
Shashank
On 1/30/2017 2:15 PM, Sharma, Shashank wrote:
Regards
Shashank
On 1/30/2017 1:30 PM, Andrzej Hajda wrote:
On 29.01.2017 06:41, Shashank Sharma wrote:
CEA-861-F specs defines new 4k video modes to be used with
HDMI 2.0
Regards
Shashank
On 1/30/2017 2:52 PM, Andrzej Hajda wrote:
On 30.01.2017 09:45, Sharma, Shashank wrote:
Regards
Shashank
On 1/30/2017 1:30 PM, Andrzej Hajda wrote:
On 29.01.2017 06:41, Shashank Sharma wrote:
CEA-861-F specs defines new 4k video modes to be used with
HDMI 2.0 EDIDs
Regards
Shashank
On 1/30/2017 3:47 PM, Andrzej Hajda wrote:
On 30.01.2017 10:42, Sharma, Shashank wrote:
Regards
Shashank
On 1/30/2017 2:52 PM, Andrzej Hajda wrote:
On 30.01.2017 09:45, Sharma, Shashank wrote:
Regards
Shashank
On 1/30/2017 1:30 PM, Andrzej Hajda wrote:
On 29.01.2017
I just realized that the CEA spec talks about picking HDMI 2.0/861-F VIC
over HDMI14b VIC in case of 3D side-by-side format (not in 2D),
In this case, we might have to add a check while loading the VIC filed
in AVI IF (as you suggested)
Will come back with a V2 (if required), once I have more
Thanks for the review Thierry. My comments inline.
Regards
Shashank
On 2/1/2017 9:40 PM, Thierry Reding wrote:
On Wed, Feb 01, 2017 at 06:14:38PM +0530, Shashank Sharma wrote:
This patch does following:
- Adds a new structure (drm_hdmi_info) in drm_display_info.
This structure will be used t
Regards
Shashank
On 2/1/2017 10:02 PM, Thierry Reding wrote:
On Wed, Feb 01, 2017 at 06:14:39PM +0530, Shashank Sharma wrote:
HDMI 2.0 spec mandates scrambling for modes with pixel clock higher
than 340Mhz. This patch adds few new functions in drm layer for
core drivers to enable/disable scra
Thanks for the review Ville. My comments inline.
Regards
Shashank
On 2/1/2017 10:03 PM, Ville Syrjälä wrote:
On Wed, Feb 01, 2017 at 06:14:38PM +0530, Shashank Sharma wrote:
This patch does following:
- Adds a new structure (drm_hdmi_info) in drm_display_info.
This structure will be used to
Regards
Shashank
On 2/1/2017 10:02 PM, Ville Syrjälä wrote:
On Wed, Feb 01, 2017 at 06:14:39PM +0530, Shashank Sharma wrote:
HDMI 2.0 spec mandates scrambling for modes with pixel clock higher
than 340Mhz. This patch adds few new functions in drm layer for
core drivers to enable/disable scram
Regards
Shashank
On 2/1/2017 10:06 PM, Ville Syrjälä wrote:
On Wed, Feb 01, 2017 at 06:14:40PM +0530, Shashank Sharma wrote:
Geminilake platform has a native HDMI 2.0 controller, and is
capable of driving pixel-clocks upto 594Mhz. HDMI 2.0 spec
mendates scrambling for these higher clocks, for
Thanks for the review, Dhinakaran.
Regards
Shashank
On 2/2/2017 1:23 AM, Pandiyan, Dhinakaran wrote:
On Wed, 2017-02-01 at 18:14 +0530, Shashank Sharma wrote:
HDMI 2.0 spec mandates scrambling for modes with pixel clock higher
than 340Mhz. This patch adds few new functions in drm layer for
Regards
Shashank
On 2/2/2017 3:21 PM, Ville Syrjälä wrote:
On Thu, Feb 02, 2017 at 11:18:51AM +0530, Sharma, Shashank wrote:
Regards
Shashank
On 2/1/2017 10:02 PM, Ville Syrjälä wrote:
On Wed, Feb 01, 2017 at 06:14:39PM +0530, Shashank Sharma wrote:
HDMI 2.0 spec mandates scrambling for
Regards
Shashank
On 2/2/2017 3:58 PM, Ville Syrjälä wrote:
On Thu, Feb 02, 2017 at 03:46:55PM +0530, Sharma, Shashank wrote:
Regards
Shashank
On 2/2/2017 3:21 PM, Ville Syrjälä wrote:
On Thu, Feb 02, 2017 at 11:18:51AM +0530, Sharma, Shashank wrote:
Regards
Shashank
On 2/1/2017 10:02
Regards
Shashank
On 2/2/2017 3:32 PM, Ville Syrjälä wrote:
On Thu, Feb 02, 2017 at 11:23:19AM +0530, Sharma, Shashank wrote:
Regards
Shashank
On 2/1/2017 10:06 PM, Ville Syrjälä wrote:
On Wed, Feb 01, 2017 at 06:14:40PM +0530, Shashank Sharma wrote:
Geminilake platform has a native HDMI
Sure, Thanks for the information, will add that in V2.
Regards
Shashank
-Original Message-
From: Jani Nikula [mailto:jani.nik...@linux.intel.com]
Sent: Thursday, February 2, 2017 4:55 PM
To: Sharma, Shashank ;
dri-devel@lists.freedesktop.org; intel-...@lists.freedesktop.org
Regards
Shashank
On 2/2/2017 11:43 PM, Thierry Reding wrote:
On Thu, Feb 02, 2017 at 11:08:22AM +0530, Sharma, Shashank wrote:
Regards
Shashank
On 2/1/2017 10:02 PM, Thierry Reding wrote:
On Wed, Feb 01, 2017 at 06:14:39PM +0530, Shashank Sharma wrote:
HDMI 2.0 spec mandates scrambling
Regards
Shashank
On 2/7/2017 3:51 PM, Jani Nikula wrote:
On Mon, 06 Feb 2017, Shashank Sharma wrote:
Geminilake platform sports a native HDMI 2.0 controller, and is
capable of driving pixel-clocks upto 594Mhz. HDMI 2.0 spec
mendates scrambling for these higher clocks, for reduced RF footprin
Thanks for the review Jose, my comments inline.
Regards
Shashank
On 2/7/2017 4:24 PM, Jose Abreu wrote:
Hi Shashank,
Sorry for the late review.
On 06-02-2017 13:59, Shashank Sharma wrote:
From: Thierry Reding
SCDC is a mechanism defined in the HDMI 2.0 specification that allows
the so
Regards
Shashank
On 2/7/2017 4:31 PM, Jose Abreu wrote:
Hi Shashank,
On 06-02-2017 13:59, Shashank Sharma wrote:
This patch does following:
- Adds a new structure (drm_hdmi_info) in drm_display_info.
This structure will be used to save and indicate if sink
supports advanced HDMI 2.0
Regards
Shashank
On 2/7/2017 4:44 PM, Jose Abreu wrote:
Hi Shashank,
On 06-02-2017 13:59, Shashank Sharma wrote:
HDMI 2.0 spec mandates scrambling for modes with pixel clock higher
than 340 MHz. This patch adds few new functions in drm layer for
core drivers to enable/disable scrambling.
Regards
Shashank
On 2/8/2017 4:57 PM, Jose Abreu wrote:
Hi Shashank,
On 07-02-2017 16:09, Sharma, Shashank wrote:
Thanks for the review Jose, my comments inline.
Regards
Shashank
On 2/7/2017 4:24 PM, Jose Abreu wrote:
Hi Shashank,
Sorry for the late review.
On 06-02-2017 13:59
Regards
Shashank
On 2/8/2017 5:01 PM, Jose Abreu wrote:
Hi Shashank,
On 07-02-2017 16:19, Sharma, Shashank wrote:
Regards
Shashank
On 2/7/2017 4:44 PM, Jose Abreu wrote:
Hi Shashank,
On 06-02-2017 13:59, Shashank Sharma wrote:
HDMI 2.0 spec mandates scrambling for modes with pixel
Regards
Shashank
On 2/8/2017 5:06 PM, Jose Abreu wrote:
Hi,
On 07-02-2017 16:36, Thierry Reding wrote:
On Tue, Feb 07, 2017 at 09:43:15PM +0530, Sharma, Shashank wrote:
Regards
Shashank
On 2/7/2017 4:31 PM, Jose Abreu wrote:
Hi Shashank,
On 06-02-2017 13:59, Shashank Sharma wrote
Hello Ville, Jani
I have addressed all your review comments in this patch set (V3).
Can you please have a look if this seems ok ?
Link: https://patchwork.kernel.org/patch/9567061/
Regards
Shashank
-Original Message-
From: Sharma, Shashank
Sent: Friday, February 10, 2017 9:59 PM
To
Thanks for the review Maarten.
My comments inline.
Regards
Shashank
On 2/20/2017 5:48 PM, Maarten Lankhorst wrote:
Op 10-02-17 om 17:29 schreef Shashank Sharma:
Geminilake platform sports a native HDMI 2.0 controller, and is
capable of driving pixel-clocks upto 594Mhz. HDMI 2.0 spec
mendat
At the first glace, I thought LSPCON is type2 HDMI only, then I realized
not really for us (:-))
Reviewed-by: Shashank Sharma
Regards
Shashank
On 2/22/2017 6:29 PM, Ander Conselvan de Oliveira wrote:
Handle DRM_DP_DUAL_MODE_LSPCON in drm_dp_get_dual_mode_type_name(),
otherwise a call to that f
Thanks for the review Ville, my comments inline.
Regards
Shashank
On 2/22/2017 10:39 PM, Ville Syrjälä wrote:
On Wed, Feb 22, 2017 at 06:48:26PM +0530, Shashank Sharma wrote:
From: Thierry Reding
SCDC is a mechanism defined in the HDMI 2.0 specification that allows
the source and sink devi
Regards
Shashank
On 2/22/2017 10:54 PM, Ville Syrjälä wrote:
On Wed, Feb 22, 2017 at 06:48:29PM +0530, Shashank Sharma wrote:
HDMI 2.0 spec mandates scrambling for modes with pixel clock higher
than 340 MHz. This patch adds few new functions in drm layer for
core drivers to enable/disable scr
Regards
Shashank
On 2/22/2017 10:59 PM, Ville Syrjälä wrote:
On Wed, Feb 22, 2017 at 06:48:30PM +0530, Shashank Sharma wrote:
Geminilake platform sports a native HDMI 2.0 controller, and is
capable of driving pixel-clocks upto 594Mhz. HDMI 2.0 spec
mendates scrambling for these higher clocks,
Thanks for the review Ander, my comments, inline.
Regards
Shashank
On 2/23/2017 1:33 PM, Ander Conselvan De Oliveira wrote:
On Thu, 2017-02-23 at 10:01 +0530, Sharma, Shashank wrote:
Regards
Shashank
On 2/22/2017 10:59 PM, Ville Syrjälä wrote:
On Wed, Feb 22, 2017 at 06:48:30PM +0530
Regards
Shashank
On 2/23/2017 5:11 PM, Ville Syrjälä wrote:
On Thu, Feb 23, 2017 at 08:51:03AM +0530, Sharma, Shashank wrote:
Thanks for the review Ville, my comments inline.
Regards
Shashank
On 2/22/2017 10:39 PM, Ville Syrjälä wrote:
On Wed, Feb 22, 2017 at 06:48:26PM +0530, Shashank
Regards
Shashank
On 2/23/2017 5:15 PM, Ville Syrjälä wrote:
On Thu, Feb 23, 2017 at 09:05:16AM +0530, Sharma, Shashank wrote:
Regards
Shashank
On 2/22/2017 10:54 PM, Ville Syrjälä wrote:
On Wed, Feb 22, 2017 at 06:48:29PM +0530, Shashank Sharma wrote:
HDMI 2.0 spec mandates scrambling
Think about two situations where:-
- Monitor supports scrambling and scdc, but we will not enable it, as
the current mode is 1080P@148 MHz
- Monitor supports scrambling and scdc, and we will enable it, as the
current mode is 4k@596 Mhz
To differentiate between these two, we have:
config->hdmi_s
Regards
Shashank
On 11/2/2016 7:58 PM, Andrzej Hajda wrote:
> On 02.11.2016 10:46, Shashank Sharma wrote:
>> CEA-861-F specs defines new 4k video modes to be used with
>> HDMI 2.0 EDIDs. These modes start at VIC=93 and go all the
>> way till VIC=107.
>>
>> Our existing CEA modedb contains only 6
Regards
Shashank
On 11/2/2016 8:44 PM, Andrzej Hajda wrote:
> On 02.11.2016 15:44, Sharma, Shashank wrote:
>> Regards
>>
>> Shashank
>>
>>
>> On 11/2/2016 7:58 PM, Andrzej Hajda wrote:
>>> On 02.11.2016 10:46, Shashank Sharma wrote:
>>&g
Regards
Shashank
On 11/2/2016 9:32 PM, Ville Syrjälä wrote:
> On Wed, Nov 02, 2016 at 08:14:22PM +0530, Sharma, Shashank wrote:
>> Regards
>>
>> Shashank
>>
>>
>> On 11/2/2016 7:58 PM, Andrzej Hajda wrote:
>>> On 02.11.2016 10:46, Shashank S
Regards
Shashank
On 11/2/2016 9:50 PM, Ville Syrjälä wrote:
> On Wed, Nov 02, 2016 at 09:39:48PM +0530, Sharma, Shashank wrote:
>> Regards
>>
>> Shashank
>>
>>
>> On 11/2/2016 9:32 PM, Ville Syrjälä wrote:
>>> On Wed, Nov 02, 2016 at 08:14:
Regards
Shashank
On 11/2/2016 10:04 PM, Ville Syrjälä wrote:
> On Wed, Nov 02, 2016 at 03:16:10PM +0530, Shashank Sharma wrote:
>> CEA-861-F specs defines new 4k video modes to be used with
>> HDMI 2.0 EDIDs. These modes start at VIC=93 and go all the
>> way till VIC=107.
>>
>> Our existing CE
Regards
Shashank
On 11/2/2016 10:27 PM, Ville Syrjälä wrote:
> On Wed, Nov 02, 2016 at 03:16:10PM +0530, Shashank Sharma wrote:
>> CEA-861-F specs defines new 4k video modes to be used with
>> HDMI 2.0 EDIDs. These modes start at VIC=93 and go all the
>> way till VIC=107.
>>
>> Our existing CE
NACK until we get to the right reason.
-Original Message-
From: ville.syrjala at linux.intel.com [mailto:ville.syrj...@linux.intel.com]
Sent: Thursday, November 3, 2016 6:02 PM
To: dri-devel at lists.freedesktop.org
Cc: Sharma, Shashank ; Lin; Jia, Lin A ; Sharma, Akashdeep ; Jim Bride
Regards
Shashank
On 11/3/2016 6:39 PM, Ville Syrjälä wrote:
> On Thu, Nov 03, 2016 at 03:04:04PM +0200, Ville Syrjälä wrote:
>> On Thu, Nov 03, 2016 at 03:02:53PM +0200, Ville Syrjälä wrote:
>>> On Thu, Nov 03, 2016 at 12:47:39PM +, Sharma, Shashank wrote:
>>
Regards
Shashank
On 11/3/2016 6:56 PM, Ville Syrjälä wrote:
> On Thu, Nov 03, 2016 at 06:40:11PM +0530, Sharma, Shashank wrote:
>> Regards
>>
>> Shashank
>>
>>
>> On 11/3/2016 6:32 PM, Ville Syrjälä wrote:
>>> On Thu, Nov 03, 2016 at 12:47:3
On 11/3/2016 9:33 PM, Daniel Vetter wrote:
> On Thu, Nov 3, 2016 at 2:49 PM, Ville Syrjälä
> wrote:
>>> If you still think you should send this revert, I am removing my NACK.
>>> Pls Go ahead.
>> The other option is to not revert and instead slap a fix on top. But
>> that would have to be done
, Sharma, Shashank wrote:
>
>
> On 11/3/2016 9:33 PM, Daniel Vetter wrote:
>> On Thu, Nov 3, 2016 at 2:49 PM, Ville Syrjälä
>> wrote:
>>>> If you still think you should send this revert, I am removing my NACK.
>>>> Pls Go ahead.
>>> The other opti
Regards
Shashank
On 11/7/2016 8:56 PM, Emil Velikov wrote:
> On 7 November 2016 at 07:43, Sharma, Shashank
> wrote:
>> If I was not very clear for the first time, every time we send a patch to
>> drm-intel/dri-devel, we do basic testing on Gnome-desktop too (Not only
>
Regards
Shashank
> the revert:
>
> HDMI2 connected 1920x1080+0+0 (normal left inverted right x axis y axis)
> 700mm x 390mm
> - 1920x1080 60.00*+
> - 1920x1080i60.0050.00
> + 1920x1080 60.00*+ 50.0059.9430.0025.0024.0029.97
>23.98
> + 1920x1080i
Regards
Shashank
On 11/14/2016 9:19 PM, Ville Syrjälä wrote:
> On Mon, Nov 14, 2016 at 08:14:34PM +0530, Sharma, Shashank wrote:
>> Regards
>> Shashank
>>> the revert:
>>>
>>>HDMI2 connected 1920x1080+0+0 (normal left inverted right x axis y
Regards
Shashank
On 11/14/2016 9:50 PM, Ville Syrjälä wrote:
> On Mon, Nov 14, 2016 at 09:37:18PM +0530, Sharma, Shashank wrote:
>> Regards
>>
>> Shashank
>>
>>
>> On 11/14/2016 9:19 PM, Ville Syrjälä wrote:
>>> On Mon, Nov 14, 2016 at 08:14:
On 11/14/2016 10:15 PM, Ville Syrjälä wrote:
> On Mon, Nov 14, 2016 at 10:12:04PM +0530, Sharma, Shashank wrote:
>> Regards
>>
>> Shashank
>>
>>
>> On 11/14/2016 9:50 PM, Ville Syrjälä wrote:
>>> On Mon, Nov 14, 2016 at 09:37:18PM +0530, Sharma,
Regards
Shashank
On 11/15/2016 2:21 PM, Daniel Vetter wrote:
> On Mon, Nov 14, 2016 at 10:26:08PM +0530, Sharma, Shashank wrote:
>> On 11/14/2016 10:15 PM, Ville Syrjälä wrote:
>>> On Mon, Nov 14, 2016 at 10:12:04PM +0530, Sharma, Shashank wrote:
>>>&
Regards
Shashank
On 11/15/2016 3:30 PM, Daniel Vetter wrote:
> On Tue, Nov 15, 2016 at 02:30:47PM +0530, Sharma, Shashank wrote:
>> On 11/15/2016 2:21 PM, Daniel Vetter wrote:
>>> On Mon, Nov 14, 2016 at 10:26:08PM +0530, Sharma, Shashank wrote:
>>>> In any case,
Regards
Shashank
On 11/15/2016 7:48 PM, Ville Syrjälä wrote:
> On Tue, Nov 15, 2016 at 01:48:04PM +, Jose Abreu wrote:
>> Hi,
>>
>>
>>
>> On 15-11-2016 10:52, Daniel Vetter wrote:
>>> On Tue, Nov 15, 2016 at 03:36:02PM +0530, Sharma, Shashank wrote:
>>
>>
>> On 15-11-2016 10:52, Daniel Vetter wrote:
>>> On Tue, Nov 15, 2016 at 03:36:02PM +0530, Sharma, Shashank wrote:
>>>> On 11/15/2016 3:30 PM, Daniel Vetter wrote:
>>>>> On Tue, Nov 15, 2016 at 02:30:47PM +0530, Sharma, Shashank wrote:
&
Hello Thierry,
Thanks for the comments.
In fact, that was the plan earlier, but the problem is, this function is
being called from several drivers, and not all of them have
the drm_connector readily available with their caller function. For few
drivers, I might have to go up two to three level
Regards
Shashank
On 6/15/2017 6:59 PM, Ville Syrjälä wrote:
On Wed, Jun 14, 2017 at 11:17:33PM +0530, Shashank Sharma wrote:
CEA-861-F specs defines new video modes to be used with
HDMI 2.0 EDIDs. The VIC range has been extended from 1-64 to
1-107.
Our existing CEA modedb contains only 64 mo
Regards
Shashank
On 6/15/2017 8:13 PM, Ville Syrjälä wrote:
On Wed, Jun 14, 2017 at 11:17:35PM +0530, Shashank Sharma wrote:
HDMI 2.0 spec adds support for YCBCR420 sub-sampled output.
CEA-861-F adds two new blocks in EDID's CEA extension blocks,
to provide information about sink's YCBCR420 o
Regards
Shashank
On 6/15/2017 9:42 PM, Ville Syrjälä wrote:
On Thu, Jun 15, 2017 at 09:05:10PM +0530, Sharma, Shashank wrote:
Regards
Shashank
On 6/15/2017 8:13 PM, Ville Syrjälä wrote:
On Wed, Jun 14, 2017 at 11:17:35PM +0530, Shashank Sharma wrote:
HDMI 2.0 spec adds support for
while typing these
examples :-).
Ok then, I will add a flag which sounds more like ycbcr_420_supported or
so.
Regards
Shashank
On 6/15/2017 10:29 PM, Ville Syrjälä wrote:
On Thu, Jun 15, 2017 at 10:18:40PM +0530, Sharma, Shashank wrote:
Regards
Shashank
On 6/15/2017 9:42 PM, Ville Syrjälä wrote
Regards
Shashank
On 6/20/2017 7:50 PM, Ander Conselvan De Oliveira wrote:
On Mon, 2017-06-19 at 21:38 +0530, Shashank Sharma wrote:
This patch checks encoder level support for HDMI YCBCR outputs.
HDMI output mode is a connector property, this patch checks if
source and sink can support the HD
Thanks for the review, Daniel.
My comments inline.
Regards
Shashank
On 6/22/2017 12:44 PM, Daniel Vetter wrote:
On Wed, Jun 21, 2017 at 04:04:13PM +0530, Shashank Sharma wrote:
HDMI displays can support various output types, based on
the color space and subsampling type. The possible
outputs f
Regards
Shashank
On 6/22/2017 12:35 PM, Daniel Vetter wrote:
On Wed, Jun 21, 2017 at 04:04:06PM +0530, Shashank Sharma wrote:
This patch adds set of helper functions for YCBCR HDMI output
handling. These functions provide functionality like:
- check if a given video mode is YCBCR 420 only mod
Regards
Shashank
On 6/23/2017 2:42 PM, Daniel Vetter wrote:
On Thu, Jun 22, 2017 at 11:42 AM, Sharma, Shashank
wrote:
You should explain in 1-2 sentences what exactly this function does, and
when a driver should use it. Just documenting the input/output stuff
doesn't make the kerneldo
Regards
Shashank
On 6/23/2017 2:50 PM, Daniel Vetter wrote:
On Thu, Jun 22, 2017 at 10:33 AM, Sharma, Shashank
wrote:
- The property values should be limited to what the driver can support, I
guess that would mean limiting the available ycbcr modes? Or does all
our hw support all
Regards
Shashank
On 6/27/2017 5:02 PM, Ville Syrjälä wrote:
On Wed, Jun 21, 2017 at 04:04:01PM +0530, Shashank Sharma wrote:
CEA-861-F specs defines new video modes to be used with
HDMI 2.0 EDIDs. The VIC range has been extended from 1-64 to
1-107.
Our existing CEA modedb contains only 64 mo
Regards
Shashank
On 6/27/2017 5:22 PM, Ville Syrjälä wrote:
On Wed, Jun 21, 2017 at 04:04:02PM +0530, Shashank Sharma wrote:
HDMI 2.0 spec adds support for YCBCR420 sub-sampled output.
CEA-861-F adds two new blocks in EDID's CEA extension blocks,
to provide information about sink's YCBCR420 o
Regards
Shashank
On 6/27/2017 5:23 PM, Ville Syrjälä wrote:
On Wed, Jun 21, 2017 at 04:04:03PM +0530, Shashank Sharma wrote:
CEA-861-F spec adds ycbcr420 deep color support information
in hf-vsdb block. This patch extends the existing hf-vsdb parsing
function by adding parsing of ycbcr420 dee
Regards
Shashank
On 6/27/2017 5:25 PM, Ville Syrjälä wrote:
On Wed, Jun 21, 2017 at 04:04:04PM +0530, Shashank Sharma wrote:
CEA-861-F adds ycbcr capability map block, for HDMI 2.0 sinks.
This block contains a map of indexes of CEA modes, which can
support YCBCR 420 output also. To avoid mult
Regards
Shashank
On 6/27/2017 5:44 PM, Ville Syrjälä wrote:
On Wed, Jun 21, 2017 at 04:04:13PM +0530, Shashank Sharma wrote:
HDMI displays can support various output types, based on
the color space and subsampling type. The possible
outputs from a HDMI 2.0 monitor could be:
- RGB
- YCBCR
Regards
Shashank
On 6/27/2017 5:46 PM, Ander Conselvan De Oliveira wrote:
On Wed, 2017-06-21 at 16:04 +0530, Shashank Sharma wrote:
To get a YCBCR420 output from intel platforms, we need one
scaler to scale down YCBCR444 samples to YCBCR420 samples.
This patch:
- Does scaler allocation for H
Regards
Shashank
On 6/29/2017 5:38 PM, Ander Conselvan De Oliveira wrote:
On Wed, 2017-06-21 at 16:04 +0530, Shashank Sharma wrote:
To support ycbcr HDMI output, we need a pipe CSC block to
do the RGB->YCBCR conversion, as the blender output is in RGB.
Current Intel platforms have only one p
Regards
Shashank
On 6/30/2017 5:04 PM, Ander Conselvan De Oliveira wrote:
On Fri, 2017-06-30 at 11:20 +0530, Sharma, Shashank wrote:
Regards
Shashank
On 6/27/2017 5:46 PM, Ander Conselvan De Oliveira wrote:
On Wed, 2017-06-21 at 16:04 +0530, Shashank Sharma wrote:
To get a YCBCR420
Regards
Shashank
On 6/30/2017 5:16 PM, Ville Syrjälä wrote:
On Fri, Jun 30, 2017 at 10:52:54AM +0530, Sharma, Shashank wrote:
Regards
Shashank
On 6/27/2017 5:25 PM, Ville Syrjälä wrote:
On Wed, Jun 21, 2017 at 04:04:04PM +0530, Shashank Sharma wrote:
CEA-861-F adds ycbcr capability map
Regards
Shashank
On 6/30/2017 5:28 PM, Ville Syrjälä wrote:
On Fri, Jun 30, 2017 at 10:47:48AM +0530, Sharma, Shashank wrote:
Regards
Shashank
On 6/27/2017 5:22 PM, Ville Syrjälä wrote:
On Wed, Jun 21, 2017 at 04:04:02PM +0530, Shashank Sharma wrote:
HDMI 2.0 spec adds support for
Regards
Shashank
On 6/30/2017 5:37 PM, Ander Conselvan De Oliveira wrote:
On Wed, 2017-06-21 at 16:04 +0530, Shashank Sharma wrote:
This patch sets the is_hdmi2_src identifier in drm connector
for GLK platform. GLK contains a native HDMI 2.0 controller.
This identifier will help the EDID hand
Regards
Shashank
On 6/30/2017 7:45 PM, Ander Conselvan De Oliveira wrote:
On Fri, 2017-06-30 at 17:29 +0530, Sharma, Shashank wrote:
Regards
Shashank
On 6/30/2017 5:04 PM, Ander Conselvan De Oliveira wrote:
On Fri, 2017-06-30 at 11:20 +0530, Sharma, Shashank wrote:
Regards
Shashank
Regards
Shashank
On 6/30/2017 5:24 PM, Ville Syrjälä wrote:
On Wed, Jun 21, 2017 at 04:03:59PM +0530, Shashank Sharma wrote:
HDMI 1.4b support the CEA video modes as per range of CEA-861-D (VIC 1-64).
For any other mode, the VIC filed in AVI infoframes should be 0.
HDMI 2.0 sinks, support vid
Regards
Shashank
On 7/3/2017 3:27 PM, Ville Syrjälä wrote:
On Mon, Jul 03, 2017 at 02:36:58PM +0530, Sharma, Shashank wrote:
Regards
Shashank
On 6/30/2017 5:24 PM, Ville Syrjälä wrote:
On Wed, Jun 21, 2017 at 04:03:59PM +0530, Shashank Sharma wrote:
HDMI 1.4b support the CEA video modes
Please ignore this version, sent premature. Actual one on the way.
-Original Message-
From: Sharma, Shashank
Sent: Monday, July 3, 2017 8:39 PM
To: dri-devel@lists.freedesktop.org; intel-...@lists.freedesktop.org
Cc: Sharma, Shashank ; Ville Syrjala
Subject: [PATCH v3] drm/edid
Regards
Shashank
On 7/3/2017 9:14 PM, David Weinehall wrote:
On Mon, Jul 03, 2017 at 08:41:53PM +0530, Shashank Sharma wrote:
CEA-861-F introduces extended tag codes for EDID extension blocks,
which indicates the actual type of the data block. The code for
using exteded tag is 0x7, whereas in
Regards
Shashank
On 7/4/2017 9:25 PM, Ville Syrjälä wrote:
On Tue, Jul 04, 2017 at 07:41:49PM +0530, Shashank Sharma wrote:
This patch adds a bool variable (ycbcr_420_allowed) in the drm connector
structure. While handling the EDID from HDMI 2.0 sinks, its important to
know if the source is c
Regards
Shashank
On 7/4/2017 9:26 PM, Ville Syrjälä wrote:
On Tue, Jul 04, 2017 at 07:41:51PM +0530, Shashank Sharma wrote:
YCBCR420 modes are supported only on HDMI 2.0 capable sources.
This patch adds a drm helper to validate YCBCR420-only mode
on a particular connector. This function will
Regards
Shashank
On 7/4/2017 9:06 PM, Daniel Vetter wrote:
On Tue, Jul 04, 2017 at 07:41:56PM +0530, Shashank Sharma wrote:
HDMI displays can support various output types, based on
the color space and subsampling type. The possible
outputs from a HDMI 2.0 monitor could be:
- RGB
- YCBCR 4
Regards
Shashank
On 7/5/2017 12:01 PM, Daniel Vetter wrote:
On Wed, Jul 05, 2017 at 11:39:30AM +0530, Sharma, Shashank wrote:
Regards
Shashank
On 7/4/2017 9:06 PM, Daniel Vetter wrote:
On Tue, Jul 04, 2017 at 07:41:56PM +0530, Shashank Sharma wrote:
HDMI displays can support various
Regards
Shashank
On 7/5/2017 3:46 PM, Ville Syrjälä wrote:
On Wed, Jul 05, 2017 at 08:48:40AM +0530, Sharma, Shashank wrote:
Regards
Shashank
On 7/4/2017 9:26 PM, Ville Syrjälä wrote:
On Tue, Jul 04, 2017 at 07:41:51PM +0530, Shashank Sharma wrote:
YCBCR420 modes are supported only on
Thanks for the review, Ville.
My comments, inline.
Regards
Shashank
On 7/12/2017 10:45 PM, Ville Syrjälä wrote:
On Mon, Jul 10, 2017 at 04:48:47PM +0530, Shashank Sharma wrote:
We have an existing function to prepare AVI infoframes for HDMI,
this patch moves that function from HDMI layer, to D
Regards
Shashank
On 7/12/2017 10:45 PM, Ville Syrjälä wrote:
On Mon, Jul 10, 2017 at 04:48:46PM +0530, Shashank Sharma wrote:
LSPCON chips support YCBCR420 outputs. To be able to get
YCBCR420 output from LSPCON chip, the source should:
- Generate YCBCR444 HDMI output
- Set AVI infoframes for
Regads
Shashank
On 7/12/2017 10:45 PM, Ville Syrjälä wrote:
On Mon, Jul 10, 2017 at 04:48:44PM +0530, Shashank Sharma wrote:
This patch adds a helper function in DP dual mode layer to
read the vendor's IEEE OUI signature from a Dual mode adapter.
This will be used to differentiate between dif
Regards
Shashank
On 7/12/2017 10:47 PM, Ville Syrjälä wrote:
On Mon, Jul 10, 2017 at 04:48:36PM +0530, Shashank Sharma wrote:
A source must set output colorspace information in AVI
infoframes, so that the sink can decode upcoming frames
accordingly.
This patch adds a function to add the outp
Regards
Shashank
On 7/12/2017 10:47 PM, Ville Syrjälä wrote:
On Mon, Jul 10, 2017 at 04:48:41PM +0530, Shashank Sharma wrote:
To support ycbcr output, we need a pipe CSC block to do
RGB->YCBCR conversion.
Current Intel platforms have only one pipe CSC unit, so
we can either do color correcti
Regards
Shashank
On 7/12/2017 10:47 PM, Ville Syrjälä wrote:
On Mon, Jul 10, 2017 at 04:48:39PM +0530, Shashank Sharma wrote:
To get a YCBCR420 output from intel platforms, we need one
scaler to scale down YCBCR444 samples to YCBCR420 samples.
This patch:
- Does scaler allocation for HDMI yc
Regards
Shashank
On 7/12/2017 10:47 PM, Ville Syrjälä wrote:
On Mon, Jul 10, 2017 at 04:48:38PM +0530, Shashank Sharma wrote:
This patch checks encoder level support for YCBCR420 outputs.
The logic goes as simple as this:
If the input mode is YCBCR420-only mode: prepare HDMI for
YCBCR420 outp
Regards
Shashank
On 7/12/2017 10:47 PM, Ville Syrjälä wrote:
On Mon, Jul 10, 2017 at 04:48:37PM +0530, Shashank Sharma wrote:
This patch adds helper functions for YCBCR 420 handling.
These functions do:
- check if a given video mode is YCBCR 420 only mode.
- check if a given video mode is YCB
Regards
Shashank
On 7/12/2017 10:48 PM, Ville Syrjälä wrote:
On Mon, Jul 10, 2017 at 04:48:34PM +0530, Shashank Sharma wrote:
YCBCR420 modes are supported only on HDMI 2.0 capable sources.
This patch adds:
- A drm helper to validate YCBCR420-only mode on a particular
connector. This functi
Regards
Shashank
On 7/12/2017 10:48 PM, Ville Syrjälä wrote:
On Mon, Jul 10, 2017 at 04:48:35PM +0530, Shashank Sharma wrote:
CEA-861-F spec adds ycbcr420 deep color support information
in hf-vsdb block. This patch extends the existing hf-vsdb parsing
function by adding parsing of ycbcr420 de
Regards
Shashank
On 7/12/2017 10:48 PM, Ville Syrjälä wrote:
On Mon, Jul 10, 2017 at 04:48:30PM +0530, Shashank Sharma wrote:
CEA-861-F specs defines new video modes to be used with
HDMI 2.0 EDIDs. The VIC range has been extended from 1-64 to
1-107.
Our existing CEA modedb contains only 64 m
Regards
Shashank
On 7/12/2017 10:54 PM, Ville Syrjälä wrote:
On Mon, Jul 10, 2017 at 04:48:48PM +0530, Shashank Sharma wrote:
LSPCON chips can't pick the HDMI AVI infoframes from direct link.
In order to pass AVI infoframes from display controller to LSPCON,
we have to write infoframe packets
Regards
Shashank
On 7/13/2017 5:57 PM, Ville Syrjälä wrote:
On Thu, Jul 13, 2017 at 11:11:53AM +0530, Sharma, Shashank wrote:
Regards
Shashank
On 7/12/2017 10:54 PM, Ville Syrjälä wrote:
On Mon, Jul 10, 2017 at 04:48:48PM +0530, Shashank Sharma wrote:
LSPCON chips can't pick the
Regards
Shashank
On 7/13/2017 6:01 PM, Ville Syrjälä wrote:
On Thu, Jul 13, 2017 at 11:02:18AM +0530, Sharma, Shashank wrote:
Regards
Shashank
On 7/12/2017 10:48 PM, Ville Syrjälä wrote:
On Mon, Jul 10, 2017 at 04:48:34PM +0530, Shashank Sharma wrote:
YCBCR420 modes are supported only
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