On Tue 15 Apr 2025 at 14:59, Greg Kroah-Hartman
wrote:
> On Tue, Apr 15, 2025 at 02:52:47PM +0200, Jerome Brunet wrote:
>> On Wed 19 Feb 2025 at 15:20, Greg Kroah-Hartman
>> wrote:
>>
>> > On Tue, Feb 18, 2025 at 08:29:46PM +0100, Jerome Brunet wrote:
>>
On Wed 19 Feb 2025 at 15:20, Greg Kroah-Hartman
wrote:
> On Tue, Feb 18, 2025 at 08:29:46PM +0100, Jerome Brunet wrote:
>> Add helper functions to create a device on the auxiliary bus.
>>
>> This is meant for fairly simple usage of the auxiliary bus, to avoid having
>
The auxiliary device creation of this driver is simple enough to
use the available auxiliary device creation helper.
Use it and remove some boilerplate code.
Signed-off-by: Jerome Brunet
---
drivers/gpu/drm/bridge/ti-sn65dsi86.c | 49 +--
1 file changed, 7
Remove the implementation of the reset driver in axg audio
clock driver and migrate to the one provided by reset framework
on the auxiliary bus.
Signed-off-by: Jerome Brunet
---
drivers/clk/meson/Kconfig | 2 +-
drivers/clk/meson/axg-audio.c | 114
The auxiliary device creation of this driver is simple enough to
use the available auxiliary device creation helper.
Use it and remove some boilerplate code.
Signed-off-by: Jerome Brunet
---
drivers/clk/imx/clk-imx8mp-audiomix.c | 49 ++-
1 file changed, 8
the device_set_of_node_from_dev() call.
Also fix the following comment that talks about "our newfound OF node".
Signed-off-by: Théo Lebrun
Signed-off-by: Jerome Brunet
---
drivers/reset/reset-eyeq.c | 13 ++---
1 file changed, 2 insertions(+), 11 deletions(-)
diff --git a/drivers/reset/r
The auxiliary device creation of this driver is simple enough to
use the available auxiliary device creation helper.
Use it and remove some boilerplate code.
Acked-by: Conor Dooley
Signed-off-by: Jerome Brunet
---
drivers/reset/reset-mpfs.c | 56
The auxiliary device creation of this driver is simple enough to
use the available auxiliary device creation helper.
Use it and remove some boilerplate code.
Tested-by: Théo Lebrun # On Mobileye EyeQ5
Signed-off-by: Jerome Brunet
---
drivers/clk/clk-eyeq.c | 57
The auxiliary device creation of this driver is simple enough to
use the available auxiliary device creation helper.
Use it and remove some boilerplate code.
Signed-off-by: Jerome Brunet
---
drivers/platform/arm64/lenovo-yoga-c630.c | 40 +++
1 file changed, 3
Add helper functions to create a device on the auxiliary bus.
This is meant for fairly simple usage of the auxiliary bus, to avoid having
the same code repeated in the different drivers.
Suggested-by: Stephen Boyd
Cc: Arnd Bergmann
Signed-off-by: Jerome Brunet
---
drivers/base/auxiliary.c
41210-aux-device-create-helper-v1-1-5887f4d89...@baylibre.com
Signed-off-by: Jerome Brunet
---
Jerome Brunet (7):
driver core: auxiliary bus: add device creation helpers
reset: mpfs: use the auxiliary device creation
drm/bridge: ti-sn65dsi86: use the auxiliary device
platfor
On Sat 15 Feb 2025 at 07:53, Greg Kroah-Hartman
wrote:
[...]
>>
>> >
>> >> + int id)
>> >> +{
>> >> + struct auxiliary_device *auxdev;
>> >> + int ret;
>> >> +
>> >> + auxdev = kzalloc(sizeof(*auxdev), GFP_KERNEL);
>> >> + if (!auxdev)
>> >> +
On Fri 14 Feb 2025 at 10:15, Ira Weiny wrote:
> Jerome Brunet wrote:
>> The auxiliary device creation of this driver is simple enough to
>> use the available auxiliary device creation helper.
>>
>> Use it and remove some boilerplate code.
>>
>> Signed-of
On Fri 14 Feb 2025 at 17:33, Greg Kroah-Hartman
wrote:
> On Tue, Feb 11, 2025 at 06:27:58PM +0100, Jerome Brunet wrote:
>> Add helper functions to create a device on the auxiliary bus.
>>
>> This is meant for fairly simple usage of the auxiliary bus, to avoid having
>
On Thu 13 Feb 2025 at 17:59, Conor Dooley wrote:
> On Tue, Feb 11, 2025 at 06:27:59PM +0100, Jerome Brunet wrote:
>> The auxiliary device creation of this driver is simple enough to
>> use the available auxiliary device creation helper.
>>
>> Use it and r
On Thu 13 Feb 2025 at 13:26, "Arnd Bergmann" wrote:
> On Tue, Feb 11, 2025, at 18:28, Jerome Brunet wrote:
>>
>> I also think this is more readeable and maintainable than a bunch of
>> 'default CONFIG_FOO if CONFIG_FOO' for CONFIG_RESET_MESON_AUX.
On Wed 12 Feb 2025 at 15:53, Théo Lebrun wrote:
> Hello Jerome,
>
> Why the " - take 2" in the commit first line?
Because, at the origin of the dicussion for this patchet, there was
another change doing the same thing [1]. The change was reverted do
perform some rework and now it is back. It was
On Wed 12 Feb 2025 at 08:38, Doug Anderson wrote:
> Hi,
>
> On Tue, Feb 11, 2025 at 9:28 AM Jerome Brunet wrote:
>>
>> The auxiliary device creation of this driver is simple enough to
>> use the available auxiliary device creation helper.
>>
>>
27;modname' as parameter: Most driver have been using
KBUILD_MODNAME and this actually rarely align with the driver name.
- Link to v1:
https://lore.kernel.org/r/20241210-aux-device-create-helper-v1-1-5887f4d89...@baylibre.com
Signed-off-by: Jerome Brunet
---
Jerome Brunet (7):
dri
Remove the implementation of the reset driver in axg audio
clock driver and migrate to the one provided by reset framework
on the auxiliary bus.
Signed-off-by: Jerome Brunet
---
There has been a discussion about the use on imply here.
After re-reading the documentation I've sticked with
The auxiliary device creation of this driver is simple enough to
use the available auxiliary device creation helper.
Use it and remove some boilerplate code.
Signed-off-by: Jerome Brunet
---
drivers/clk/clk-eyeq.c | 57 +++---
1 file changed, 12
The auxiliary device creation of this driver is simple enough to
use the available auxiliary device creation helper.
Use it and remove some boilerplate code.
Signed-off-by: Jerome Brunet
---
drivers/clk/imx/clk-imx8mp-audiomix.c | 56 ---
1 file changed, 6
The auxiliary device creation of this driver is simple enough to
use the available auxiliary device creation helper.
Use it and remove some boilerplate code.
Signed-off-by: Jerome Brunet
---
drivers/platform/arm64/lenovo-yoga-c630.c | 42 +++
1 file changed, 4
The auxiliary device creation of this driver is simple enough to
use the available auxiliary device creation helper.
Use it and remove some boilerplate code.
Signed-off-by: Jerome Brunet
---
drivers/gpu/drm/bridge/ti-sn65dsi86.c | 84 +--
1 file changed, 20
The auxiliary device creation of this driver is simple enough to
use the available auxiliary device creation helper.
Use it and remove some boilerplate code.
Signed-off-by: Jerome Brunet
---
drivers/reset/reset-mpfs.c | 52 +++---
1 file changed, 3
Add helper functions to create a device on the auxiliary bus.
This is meant for fairly simple usage of the auxiliary bus, to avoid having
the same code repeated in the different drivers.
Suggested-by: Stephen Boyd
Cc: Arnd Bergmann
Signed-off-by: Jerome Brunet
---
drivers/base/auxiliary.c
On Wed 22 Jan 2025 at 17:50, Ao Xu wrote:
> On 2025/1/15 1:50, Jerome Brunet wrote:
>> [ EXTERNAL EMAIL ]
>>
>> On Sun 12 Jan 2025 at 23:44, Martin Blumenstingl
>> wrote:
>>
>>> Hello,
>>>
>>> On Fri, Jan 10, 2025 at 6:39 AM Ao
On Sun 12 Jan 2025 at 23:44, Martin Blumenstingl
wrote:
> Hello,
>
> On Fri, Jan 10, 2025 at 6:39 AM Ao Xu via B4 Relay
> wrote:
>>
>> This patch series adds DRM support for the Amlogic S4-series SoCs.
>> Compared to the Amlogic G12-series, the S4-series introduces the following
>> changes:
>
On Fri 10 Jan 2025 at 13:39, Ao Xu via B4 Relay
wrote:
> From: Ao Xu
>
> Add S4 compatible for DRM driver. This update driver logic to support
> S4-specific configurations. This also add vpu clock operation in
> bind, suspend, resume, shutdown stage.
>
> Signed-off-by: Ao Xu
> ---
> drivers/g
On Mon 19 Aug 2024 at 18:22, Neil Armstrong wrote:
> On 30/07/2024 14:50, Jerome Brunet wrote:
>> The Amlogic mixes direct register access and regmap ones, with several
>> custom helpers. Using a single API makes rework and maintenance easier.
>> Convert the Amlogic phy dri
On Tue 06 Aug 2024 at 23:03, Martin Blumenstingl
wrote:
> Hi Jerome,
>
> On Tue, Jul 30, 2024 at 2:50 PM Jerome Brunet wrote:
> [...]
>> + }, {
>> + .limit = 297000,
>> + .regs = gxbb_3g_regs,
>> + .reg_num =
On Tue 06 Aug 2024 at 22:49, Martin Blumenstingl
wrote:
> Hi Jerome,
>
> On Tue, Jul 30, 2024 at 2:50 PM Jerome Brunet wrote:
>>
>> This prepares the migration to regmap usage.
>>
>> To properly setup regmap, the APB needs to be in working order.
>> This
On Tue 06 Aug 2024 at 22:28, Martin Blumenstingl
wrote:
> On Tue, Jul 30, 2024 at 2:50 PM Jerome Brunet wrote:
>>
>> The Amlogic HDMI phy driver is not doing anything with the clocks
>> besides enabling on probe. CCF provides generic helpers to do that.
>>
>&
: Jerome Brunet
---
drivers/gpu/drm/meson/meson_dw_hdmi.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/meson/meson_dw_hdmi.c
b/drivers/gpu/drm/meson/meson_dw_hdmi.c
index 2890796f9d49..5cd3264ab874 100644
--- a/drivers/gpu/drm/meson/meson_dw_hdmi.c
+++ b/drivers
s
and possibly stop using the component API.
Signed-off-by: Jerome Brunet
---
This change depends on:
* 0602ba0dcd0e ("arm64: dts: amlogic: gx: correct hdmi clocks")
* 1443b6ea806d ("arm64: dts: amlogic: setup hdmi system clock")
Time is needed for these changes to s
: Jerome Brunet
---
drivers/gpu/drm/meson/meson_dw_hdmi.c | 14 +-
1 file changed, 9 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/meson/meson_dw_hdmi.c
b/drivers/gpu/drm/meson/meson_dw_hdmi.c
index 5cd3264ab874..47aa3e184e98 100644
--- a/drivers/gpu/drm/meson/meson_dw_hdmi.c
bit definitions when missing.
Signed-off-by: Jerome Brunet
---
drivers/gpu/drm/meson/meson_dw_hdmi.c | 475 --
drivers/gpu/drm/meson/meson_dw_hdmi.h | 49 +--
2 files changed, 239 insertions(+), 285 deletions(-)
diff --git a/drivers/gpu/drm/meson/meson_dw_hdmi.c
b
to get rid of HHI access in Amlogic display drivers
and possibly stop using the component API.
Signed-off-by: Jerome Brunet
---
This change depends on:
* f1ab099d6591 ("arm64: dts: amlogic: add power domain to hdmitx")
Time is needed for these changes to sink in u-boot and distros,
m
Using several string comparisons with if/else if/else clauses
is fairly inefficient and does not scale well.
Use matched data to tweak the driver depending on the matched
SoC instead.
Signed-off-by: Jerome Brunet
---
drivers/gpu/drm/meson/meson_dw_hdmi.c | 209 +-
1
vclk.
Signed-off-by: Jerome Brunet
---
drivers/gpu/drm/meson/meson_vclk.c | 8
1 file changed, 8 deletions(-)
diff --git a/drivers/gpu/drm/meson/meson_vclk.c
b/drivers/gpu/drm/meson/meson_vclk.c
index 2a942dc6a6dc..bf5cc5d92346 100644
--- a/drivers/gpu/drm/meson/meson_vclk.c
+++ b/driver
The Amlogic HDMI phy driver is not doing anything with the clocks
besides enabling on probe. CCF provides generic helpers to do that.
Use the generic clock helpers rather than using a custom one to get and
enable clocks.
Signed-off-by: Jerome Brunet
---
drivers/gpu/drm/meson/meson_dw_hdmi.c
.
This is part of an effort to clean up Amlogic HDMI related drivers which
should eventually allow to stop using the component API and HHI syscon.
Signed-off-by: Jerome Brunet
---
drivers/gpu/drm/meson/meson_dw_hdmi.c | 38 --
drivers/gpu/drm/meson/meson_encoder_hdmi.c | 16
s, to avoid breaking platforms which don't
take DT from the kernel. These 2 patches are provided as a note that
this should happen eventually.
Jerome Brunet (9):
drm/meson: hdmi: move encoder settings out of phy driver
drm/meson: vclk: drop hdmi system clock setup
drm/meson: dw-hdmi: u
Like for mipi_dsi_msleep(), usleep_range() may often be called
in between mipi_dsi_dcs_*() functions and needs a multi compatible
counter part.
Suggested-by: Dmitry Baryshkov
Signed-off-by: Jerome Brunet
---
include/drm/drm_mipi_dsi.h | 7 +++
1 file changed, 7 insertions(+)
diff --git a
Add support for the Lincoln Technologies LCD197 1080x1920 DSI panel.
Signed-off-by: Jerome Brunet
---
drivers/gpu/drm/panel/Kconfig | 11 +
drivers/gpu/drm/panel/Makefile| 1 +
.../gpu/drm/panel/panel-lincolntech-lcd197.c | 262 ++
3 files
suggested.
* Downcase hexadecimal values
[1]: https://lore.kernel.org/lkml/20240625142552.1000988-1-jbru...@baylibre.com
Jerome Brunet (3):
dt-bindings: panel-simple-dsi: add lincoln LCD197 panel bindings
drm/mipi-dsi: add mipi_dsi_usleep_range helper
drm/panel: add lincolntech lcd197
This adds the bindings for the 1080x1920 Lincoln LCD197 DSI panel to
panel-simple-dsi.
Signed-off-by: Jerome Brunet
---
.../devicetree/bindings/display/panel/panel-simple-dsi.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git
a/Documentation/devicetree/bindings/display/panel/panel
On Wed 26 Jun 2024 at 07:41, Dmitry Baryshkov
wrote:
> On Tue, Jun 25, 2024 at 04:25:50PM GMT, Jerome Brunet wrote:
>> Add support for the Lincoln LCD197 1080x1920 DSI panel.
>>
>> Signed-off-by: Jerome Brunet
>> ---
>> drivers/gpu/drm/panel/Kconfig
this by adding the power domain to HDMI Tx.
Signed-off-by: Jerome Brunet
---
arch/arm64/boot/dts/amlogic/meson-g12.dtsi | 4
arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi | 1 +
arch/arm64/boot/dts/amlogic/meson-gxl.dtsi | 1 +
arch/arm64/boot/dts/amlogic/meson-sm1.dtsi | 4
4 files
accordingly.
Signed-off-by: Jerome Brunet
---
.../devicetree/bindings/display/amlogic,meson-dw-hdmi.yaml | 5 +
1 file changed, 5 insertions(+)
diff --git
a/Documentation/devicetree/bindings/display/amlogic,meson-dw-hdmi.yaml
b/Documentation/devicetree/bindings/display/amlogic,meson-dw
This patchset add the bindings for the power domain of the HDMI Tx
on Amlogic SoC.
This is a 1st step in cleaning HDMI Tx and its direct usage of HHI
register space. Eventually, this will help remove component usage from
the Amlogic display drivers.
Jerome Brunet (2):
dt-bindings: display
This adds the bindings for the 1080x1920 Licoln LCD197 DSI panel to
panel-simple-dsi.
Signed-off-by: Jerome Brunet
---
.../devicetree/bindings/display/panel/panel-simple-dsi.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git
a/Documentation/devicetree/bindings/display/panel/panel
Add support for the Lincoln LCD197 1080x1920 DSI panel.
Signed-off-by: Jerome Brunet
---
drivers/gpu/drm/panel/Kconfig| 11 +
drivers/gpu/drm/panel/Makefile | 1 +
drivers/gpu/drm/panel/panel-lincoln-lcd197.c | 333 +++
3 files changed, 345
Lincoln Technology Solutions is a design services and LCD integration
company
Link: https://lincolntechsolutions.com/
Signed-off-by: Jerome Brunet
---
Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings
This patchset adds support for the Lincoln LCD197 1080x1920 DSI panel.
Jerome Brunet (3):
dt-bindings: vendor-prefixes: add prefix for lincoln
dt-bindings: panel-simple-dsi: add lincoln LCD197 panel bindings
drm/panel: add lincoln lcd197 support
.../display/panel/panel-simple-dsi.yaml
callback to power up the PHY
on init and leave only what is necessary for mode changes in the related
function. This is enough to fix CEC operation when HDMI display is not
enabled.
Fixes: 3f68be7d8e96 ("drm/meson: Add support for HDMI encoder and DW-HDMI
bridge + PHY")
Signed-off-by: Jer
done by restoring init values on PHY init and
disable.
Fixes: 3b7c1237a72a ("drm/meson: Add G12A support for the DW-HDMI Glue")
Signed-off-by: Jerome Brunet
---
drivers/gpu/drm/meson/meson_dw_hdmi.c | 43 ---
1 file changed, 26 insertions(+), 17 deletions(-)
di
problem.
Jerome Brunet (2):
drm/meson: dw-hdmi: power up phy on device init
drm/meson: dw-hdmi: add bandgap setting for g12
drivers/gpu/drm/meson/meson_dw_hdmi.c | 70 ---
1 file changed, 31 insertions(+), 39 deletions(-)
--
2.43.0
Applied to clk-meson (v6.10/drivers), thanks!
[2/7] clk: meson: add vclk driver
https://github.com/BayLibre/clk-meson/commit/bb5aa08572b5
[3/7] clk: meson: g12a: make VCLK2 and ENCL clock path configurable by CCF
https://github.com/BayLibre/clk-meson/commit/b70cb1a21a54
Best regards,
On Thu 04 Apr 2024 at 18:59, Neil Armstrong wrote:
> On 04/04/2024 10:13, Jerome Brunet wrote:
>> On Wed 03 Apr 2024 at 09:46, Neil Armstrong
>> wrote:
>>
>>> The VCLK and VCLK_DIV clocks have supplementary bits.
>>>
>>> The VCLK gate has a &qu
On Wed 03 Apr 2024 at 09:46, Neil Armstrong wrote:
> The VCLK and VCLK_DIV clocks have supplementary bits.
>
> The VCLK gate has a "SOFT RESET" bit to toggle after the whole
> VCLK sub-tree rate has been set, this is implemented in
> the gate enable callback.
>
> The VCLK_DIV clocks as enable a
On Mon 25 Mar 2024 at 12:09, Neil Armstrong wrote:
> In order to setup the DSI clock, let's make the unused VCLK2 clock path
> configuration via CCF.
>
> The nocache option is removed from following clocks:
> - vclk2_sel
> - vclk2_input
> - vclk2_div
> - vclk2
> - vclk_div1
> - vclk2_div2_en
>
On Mon 25 Mar 2024 at 12:09, Neil Armstrong wrote:
> The VCLK and VCLK_DIV clocks have supplementary bits.
>
> The VCLK gate has a "SOFT RESET" bit to toggle after the whole
> VCLK sub-tree rate has been set, this is implemented in
> the gate enable callback.
>
> The VCLK_DIV clocks as enable a
On Wed 13 Dec 2023 at 17:44, Neil Armstrong wrote:
> Hi Maxime,
>
> Le 13/12/2023 à 09:36, Maxime Ripard a écrit :
>> Hi,
>> On Wed, Dec 13, 2023 at 08:43:00AM +0100, Uwe Kleine-König wrote:
>>> On Wed, Dec 13, 2023 at 08:16:04AM +0100, Maxime Ripard wrote:
On Tue, Dec 12, 2023 at 06:26:37
On Wed 13 Dec 2023 at 08:16, Maxime Ripard wrote:
> [[PGP Signed Part:Undecided]]
> Hi,
>
> On Tue, Dec 12, 2023 at 06:26:37PM +0100, Uwe Kleine-König wrote:
>> Hello,
>>
>> clk_rate_exclusive_get() returns zero unconditionally. Most users "know"
>> that and don't check the return value. This
On Mon 27 Nov 2023 at 17:14, Neil Armstrong wrote:
> On 24/11/2023 15:41, Jerome Brunet wrote:
>> On Fri 24 Nov 2023 at 09:41, Neil Armstrong
>> wrote:
>>
>>> The VCLK and VCLK_DIV clocks have supplementary bits.
>>>
>>> The VCLK has a "S
>>
>>>
>>> I suspect mipi_dsi_pxclk_div was added to achieve fractional vclk/bitclk
>>> ratios,
>>> since it doesn't exist on AXG. Not sure we would ever need it... and none
>>> of the other upstream DSI drivers supports such setups.
>>>
>>> The main reasons I set only mipi_dsi_pxclk in DT is b
Applied to clk-meson (v6.8/drivers), thanks!
[01/12] dt-bindings: clk: g12a-clkc: add CTS_ENCL clock ids
https://github.com/BayLibre/clk-meson/commit/bd5ef3f21d17
[06/12] clk: meson: g12a: add CTS_ENCL & CTS_ENCL_SEL clocks
https://github.com/BayLibre/clk-meson/commit/5de4e8353e32
On Fri 24 Nov 2023 at 16:15, Neil Armstrong wrote:
> On 24/11/2023 15:12, Jerome Brunet wrote:
>> On Fri 24 Nov 2023 at 09:41, Neil Armstrong
>> wrote:
>>
>>> In order to setup the DSI clock, let's make the unused VCLK2 clock path
>>> configur
On Fri 24 Nov 2023 at 09:41, Neil Armstrong wrote:
> The VCLK and VCLK_DIV clocks have supplementary bits.
>
> The VCLK has a "SOFT RESET" bit to toggle after the whole
> VCLK sub-tree rate has been set, this is implemented in
> the gate enable callback.
>
> The VCLK_DIV clocks as enable and re
On Fri 24 Nov 2023 at 09:41, Neil Armstrong wrote:
> In order to setup the DSI clock, let's make the unused VCLK2 clock path
> configuration via CCF.
>
> The nocache option is removed from following clocks:
> - vclk2_sel
> - vclk2_input
> - vclk2_div
> - vclk2
> - vclk_div1
> - vclk2_div2_en
>
On Thu 03 Aug 2023 at 14:03, Neil Armstrong wrote:
> In order to setup the DSI clock, let's make the unused VCLK2 clock path
> configuration via CCF.
>
> The nocache option is removed from following clocks:
> - vclk2_sel
> - vclk2_input
> - vclk2_div
> - vclk2
> - vclk_div1
> - vclk2_div2_en
>
On Thu 03 Aug 2023 at 14:03, Neil Armstrong wrote:
> Add new CTS_ENCL & CTS_ENCL_SEL clocks for the G12A compatible
> SoCs, they are used to feed the VPU LCD Pixel encoder used for
> DSI display purposes.
>
> Signed-off-by: Neil Armstrong
> ---
> drivers/clk/meson/g12a.c | 40
On Thu 03 Aug 2023 at 14:03, Neil Armstrong wrote:
> The VCLK and VCLK_DIV clocks have supplementary bits.
>
> The VCLK has a "SOFT RESET" bit to toggle after the whole
> VCLK sub-tree rate has been set, this is implemented in
> the gate enable callback.
>
> The VCLK_DIV clocks as enable and re
On Tue 30 May 2023 at 17:56, Neil Armstrong wrote:
> On 30/05/2023 10:08, Jerome Brunet wrote:
>> On Tue 30 May 2023 at 09:38, Neil Armstrong
>> wrote:
>>
>>> Exposing should not be done in a single commit anymore due to
>>> dt-bindings enforced rules.
On Tue 30 May 2023 at 09:38, Neil Armstrong wrote:
> In order to setup the DSI clock, let's make the unused VCLK2 clock path
> configuration via CCF.
>
> The nocache option is removed from following clocks:
> - vclk2_sel
> - vclk2_input
> - vclk2_div
> - vclk2
> - vclk_div1
> - vclk2_div2_en
>
On Tue 30 May 2023 at 09:38, Neil Armstrong wrote:
> Exposing should not be done in a single commit anymore due to
> dt-bindings enforced rules.
>
> Prepend PRIV to the private CLK IDs so we can add new clock to
> the bindings header and in a separate commit remove such private
> define and swi
On Tue 16 May 2023 at 11:00, Neil Armstrong wrote:
> On 16/05/2023 10:44, Arnd Bergmann wrote:
>> On Mon, May 15, 2023, at 18:22, neil.armstr...@linaro.org wrote:
>>> On 15/05/2023 18:15, Krzysztof Kozlowski wrote:
On 15/05/2023 18:13, Krzysztof Kozlowski wrote:
Also one more arg
On Fri 20 Nov 2020 at 10:42, Marc Zyngier wrote:
> The HDMI driver request clocks early, but never disable them, leaving
> the clocks on even when the driver is removed.
>
> Fix it by slightly refactoring the clock code, and register a devm
> action that will eventually disable/unprepare the en
On Thu 19 Nov 2020 at 19:04, Guillaume Tucker
wrote:
> Hi Marc,
>
> On 19/11/2020 11:58, Marc Zyngier wrote:
>> On 2020-11-19 10:26, Neil Armstrong wrote:
>>> On 19/11/2020 11:20, Marc Zyngier wrote:
On 2020-11-19 08:50, Guillaume Tucker wrote:
> Please see the automated bisection rep
On Wed 18 Sep 2019 at 10:24, Cheng-Yi Chiang wrote:
> The problem of using auto ID is that the device name will be like
> hdmi-audio-codec..auto.
>
> The number might be changed when there are other platform devices being
> created before hdmi-audio-codec device.
> Use a fixed name so machine dr
setup the channel allocation provided by the generic hdmi-codec driver
Reviewed-by: Jonas Karlman
Signed-off-by: Jerome Brunet
---
drivers/gpu/drm/bridge/synopsys/dw-hdmi-i2s-audio.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi-i2s-audio.c
b
When changing the audio hw params, reset the audio fifo to make sure
any old remaining data is flushed.
The databook mentions that such reset should be followed by a reset of
the i2s block to make sure the samples stay aligned
Reviewed-by: Jonas Karlman
Signed-off-by: Jerome Brunet
On Mon 12 Aug 2019 at 14:19, Neil Armstrong wrote:
> Hi,
>
> On 12/08/2019 14:07, Jerome Brunet wrote:
>> The purpose of this patchset is to improve the support of the i2s
>> interface of the synopsys hdmi controller.
>>
>> Once applied, the interface sho
https://lkml.kernel.org/r/20190805134102.24173-1-jbru...@baylibre.com
Jerome Brunet (8):
drm/bridge: dw-hdmi-i2s: support more i2s format
drm/bridge: dw-hdmi: move audio channel setup out of ahb
drm/bridge: dw-hdmi: set channel count in the infoframes
drm/bridge: dw-hdmi-i2s: enable lpcm
Provide the eld to the generic hdmi-codec driver.
This will let the driver enforce the maximum channel number and set the
channel allocation depending on the hdmi sink.
Cc: Jonas Karlman
Signed-off-by: Jerome Brunet
---
drivers/gpu/drm/bridge/synopsys/dw-hdmi-audio.h | 1 +
drivers/gpu
The dw-hdmi-i2s supports more formats than just regular i2s.
Add support for left justified, right justified and dsp modes
A and B.
Reviewed-by: Jonas Karlman
Signed-off-by: Jerome Brunet
---
.../drm/bridge/synopsys/dw-hdmi-i2s-audio.c | 26 ---
drivers/gpu/drm/bridge
Set the number of channel in the infoframes
Reviewed-by: Jonas Karlman
Signed-off-by: Jerome Brunet
---
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
index
Part of the channel count setup done in dw-hdmi ahb should
actually be done whatever the interface providing the data.
Reviewed-by: Jonas Karlman
Let's move it to dw-hdmi driver instead.
Signed-off-by: Jerome Brunet
---
.../drm/bridge/synopsys/dw-hdmi-ahb-audio.c | 20 +++-
dr
Provide the eld to the generic hdmi-codec driver.
This will let the driver enforce the maximum channel number and set the
channel allocation depending on the hdmi sink.
Cc: Jonas Karlman
Signed-off-by: Jerome Brunet
---
drivers/gpu/drm/bridge/synopsys/dw-hdmi-audio.h | 1 +
drivers/gpu
Enable the i2s lanes depending on the number of channel in the stream
Reviewed-by: Jonas Karlman
Signed-off-by: Jerome Brunet
---
.../gpu/drm/bridge/synopsys/dw-hdmi-i2s-audio.c | 15 ++-
drivers/gpu/drm/bridge/synopsys/dw-hdmi.h | 6 +-
2 files changed, 19
Properly setup the channel count and layout in dw-hdmi i2s driver so
we are not limited to 2 channels.
Also correct the maximum channel reported by the DAI from 6 to 8 ch
Reviewed-by: Jonas Karlman
Signed-off-by: Jerome Brunet
---
drivers/gpu/drm/bridge/synopsys/dw-hdmi-i2s-audio.c | 3 ++-
1
On Wed 07 Aug 2019 at 14:57, Jonas Karlman wrote:
> On 2019-08-05 15:41, Jerome Brunet wrote:
>> Provide the eld to the generic hdmi-codec driver.
>> This will let the driver enforce the maximum channel number and set the
>> channel allocation depending on the hdmi sink.
&g
Properly setup the channel count and layout in dw-hdmi i2s driver so
we are not limited to 2 channels.
Also correct the maximum channel reported by the DAI from 6 to 8 ch
Cc: Jonas Karlman
Signed-off-by: Jerome Brunet
---
drivers/gpu/drm/bridge/synopsys/dw-hdmi-i2s-audio.c | 3 ++-
1 file
links, there is a
runtime dependency for patch 8 on this ASoC series [1].
[0]:
https://github.com/Kwiboo/linux-rockchip/commits/rockchip-5.2-for-libreelec-v5.2.3
[1]: https://lkml.kernel.org/r/20190725165949.29699-1-jbru...@baylibre.com
Jerome Brunet (8):
drm/bridge: dw-hdmi-i2s: support mor
Set the number of channel in the infoframes
Cc: Jonas Karlman
Signed-off-by: Jerome Brunet
---
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
index
Provide the eld to the generic hdmi-codec driver.
This will let the driver enforce the maximum channel number and set the
channel allocation depending on the hdmi sink.
Cc: Jonas Karlman
Signed-off-by: Jerome Brunet
---
drivers/gpu/drm/bridge/synopsys/dw-hdmi-audio.h | 1 +
drivers/gpu
Enable the i2s lanes depending on the number of channel in the stream
Cc: Jonas Karlman
Signed-off-by: Jerome Brunet
---
.../gpu/drm/bridge/synopsys/dw-hdmi-i2s-audio.c | 15 ++-
drivers/gpu/drm/bridge/synopsys/dw-hdmi.h | 6 +-
2 files changed, 19 insertions(+), 2
When changing the audio hw params, reset the audio fifo to make sure
any old remaining data is flushed.
The databook mentions that such reset should be followed by a reset of
the i2s block to make sure the samples stay aligned
Cc: Jonas Karlman
Signed-off-by: Jerome Brunet
---
drivers/gpu/drm
Part of the channel count setup done in dw-hdmi ahb should
actually be done whatever the interface providing the data.
Let's move it to dw-hdmi driver instead.
Signed-off-by: Jerome Brunet
---
.../drm/bridge/synopsys/dw-hdmi-ahb-audio.c | 20 +++-
drivers/gpu/drm/bridge/synops
1 - 100 of 116 matches
Mail list logo
