Hi,
> I believe that Matt was referring to using max-strength I & Q inputs
> to the Basic Rx along with an Rx mux setting that routes both ADC
> outputs into the same DDC. (The default config with the Basic Rx
> feeds a constant zero into the Q DDC input).
>
> Eric
I believe Matt was right ab
Hi Eric
> Eric Blossom <[EMAIL PROTECTED]> wrote:
>
> I believe that Matt was referring to using max-strength I & Q inputs
> to the Basic Rx along with an Rx mux setting that routes both ADC
> outputs into the same DDC. (The default config with the Basic Rx
> feeds a constant zero into the Q DDC
On Wed, Dec 26, 2007 at 01:56:46AM -0800, Firas Abbas wrote:
> > I agree that the results do look better. My concern is overflow when
> > both I and Q are used. If you can try all of these with max-strength
> > signals on both I and Q at the same time, I would be more than happy to
> > incl
Hi Matt,
Kindly, see my comments below:
> Matt Ettus <[EMAIL PROTECTED]> wrote:
>
> Firas,
>
> Thanks for doing these tests. See my comments inline.
> Hi Matt, Don
>
> I did the tests. We definitely have improvement in USRP SFDR by more
> than 3 dB. I did the tests as follows :
>
> 1)
Firas,
Thanks for doing these tests. See my comments inline.
Firas Abbas wrote:
Hi Matt, Don
I did the tests. We definitely have improvement in USRP SFDR by more
than 3 dB. I did the tests as follows :
1) Test Setup:
a) Using USRP Rev 4.5 with Basic-RX board.
b) Using high accuracy fun
Hi Matt, Don
I did the tests. We definitely have improvement in USRP SFDR by more than 3 dB.
I did the tests as follows :
1) Test Setup:
a) Using USRP Rev 4.5 with Basic-RX board.
b) Using high accuracy function generator.
c) Using decimation rate =8, and gain =0.
d) Using single tone (The SF
Don Ward wrote:
Hi Matt,
You are correct that I have been conservative in the scaling of the
signal sent over the data bus. However, there are some things you
need to take into account here.
First, I believe you are sending a single sine wave into the
BasicRX. In normal operation for most o
Dear Don W.,
1) Modifying the FPGA file (cordic.v) as you suggested was working fine. The
USRP dynamic range was greatly enhanced as follows (the test was done for
decimation rate of 8, using BasicRx board, and sine wave frequency =250KHz):
a) For 9 dBm i/p signal, max count was 26198 (previou
I don't have the tools to do so.
No tools are required. All what you have to do is to download the free
windows Altera FPGA design software (Quartus II Web edition) . . .
Yeah, that's the part I haven't done yet . . .
Alternatively (In this case I think it is quicker), tell me the places
Hi Don,
>>Don Ward <[EMAIL PROTECTED]> wrote:
>>I don't have the tools to do so.
No tools are required. All what you have to do is to download the free windows
Altera FPGA design software (Quartus II Web edition) from :
http://www.altera.com/products/software/products/quartus2web/sof-quar
Hi Firas,
>>I think we could quickly double the processing gain (and gain 6 dB >>S/N
>>and dynamic range at higher decimation rates) by either shifting >>by 4
>>bits before the CORDIC stage or eliminating the divide by 2 at >>the end
>>of the CORDIC stage.
Can you modify the FPGA quickly and
Hi Don
Good analysis.
>>Don Ward <[EMAIL PROTECTED]> wrote:
>>
>>I think we could quickly double the processing gain (and gain 6 dB >>S/N and
>>dynamic range at higher decimation rates) by either shifting >>by 4 bits
>>before the CORDIC stage or eliminating the divide by 2 at >>the end of th
Hi Firas,
[several examples snipped]
d) With Sinewave signal at frequency =250KHz and 10dBm input power to
BasicRX we get ,
Theoretical calculations :
When +10dBm signal injected into 50 Ohm load, then signal RMS = 0.71Volt
and
Signal P-P = 2.008183259Volt.
USRP readings :
The maximum count
On Sat, Dec 22, 2007 at 09:48:53AM -0800, Firas A. wrote:
>
>
> 2) I Think there is a problem in the 8 bit data transfer. As we know, if we
> have 12 bit number (for example), and we would truncate it to 8 bit number,
> we should take the most 8 significant bits from it and discards the rest
> le
Hi,
1) Using high accuracy function generator and USRP with Basic-RX, I tried to
investigate the dynamic range of this board. The following behaver was
obtained (0 dB gain was used in all experiments with decimation of 8):
a) With Sinewave signal at frequency =250KHz and 0dBm input power to Bas
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