Hi Don,
>>Don Ward <[EMAIL PROTECTED]> wrote: >>I don't have the tools to do so. No tools are required. All what you have to do is to download the free windows Altera FPGA design software (Quartus II Web edition) from : http://www.altera.com/products/software/products/quartus2web/sof-quarwebmain.html >>But I can point to the places in the Verilog code that I would change >> if that would help. Alternatively (In this case I think it is quicker), tell me the places in verilog code to be changed, and I will modify it and recompile the rbf file and test it. Regards, Firas A. Don Ward <[EMAIL PROTECTED]> wrote: Hi Firas, > >>I think we could quickly double the processing gain (and gain 6 dB >>S/N > >>and dynamic range at higher decimation rates) by either shifting >>by 4 > >>bits before the CORDIC stage or eliminating the divide by 2 at >>the end > >>of the CORDIC stage. > > Can you modify the FPGA quickly and send me the RBF file?. I want to make > use from the measuring equipments I have currently to test the > modifications before I return it back. It has been on my (long) list of things to do, but so far I have never built an RBF file and don't have the tools to do so. But I can point to the places in the Verilog code that I would change, if that would help. -- Don W.
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