Hi,
On Tue, Jul 21, 2020 at 01:05:57AM +0100, Ferruh Yigit wrote:
> On 7/16/2020 1:12 PM, Raslan Darawsheh wrote:
> > when trying to compile rte_mpls with pedantic enabled,
> > it will complain about bit field defintion.
> > error: type of bit-field 'bs' is a GCC extension [-Werror=pedantic]
> > e
>
> The structure cpt_request_info needs only 8 byte alignment.
> This patch replaces __rte_cache_aligned of cpt_request_info with
> __rte_aligned(8) and removes __rte_aligned(8) in cpt_meta_info structure.
>
> Fixes: fab634eb87ca ("crypto/octeontx2: support security session data path")
>
> Sign
This patch fixed the issue that rx/tx bytes overflowed
on 40 bit limitation by enlarging the limitation.
Fixes: a37bde56314d ("net/ice: support statistics")
Cc: sta...@dpdk.org
Signed-off-by: Junyu Jiang
---
drivers/net/ice/ice_ethdev.c | 28
drivers/net/ice/ice_eth
Hi,
> -Original Message-
> From: Olivier Matz
> Sent: Tuesday, July 21, 2020 10:09 AM
> To: Ferruh Yigit
> Cc: Raslan Darawsheh ; dev@dpdk.org;
> sta...@dpdk.org
> Subject: Re: [dpdk-dev] [PATCH] net: fix compilation with pedantic enabled
>
> Hi,
>
> On Tue, Jul 21, 2020 at 01:05:57AM +
> -Original Message-
> From: dev On Behalf Of Harry van Haaren
> Sent: Monday, July 20, 2020 10:38 PM
> To: dev@dpdk.org
> Cc: david.march...@redhat.com; igor.roma...@oktetlabs.ru; Honnappa
> Nagarahalli ; ferruh.yi...@intel.com; nd
> ; acon...@redhat.com;
> l.wojciec...@partner.samsung.co
Hi Raslan,
On Tue, Jul 21, 2020 at 07:37:51AM +, Raslan Darawsheh wrote:
> Hi,
> > -Original Message-
> > From: Olivier Matz
> > Sent: Tuesday, July 21, 2020 10:09 AM
> > To: Ferruh Yigit
> > Cc: Raslan Darawsheh ; dev@dpdk.org;
> > sta...@dpdk.org
> > Subject: Re: [dpdk-dev] [PATCH]
> -Original Message-
> From: Honnappa Nagarahalli
> Sent: Tuesday, July 21, 2020 6:40 AM
> To: Lukasz Wojciechowski ; Van Haaren,
> Harry ; Phil Yang ; Aaron
> Conole
> Cc: David Marchand ; Igor Romanov
> ; dev ; Yigit, Ferruh
> ; nd ; Honnappa Nagarahalli
> ; nd
> Subject: RE: [dpdk-dev
update i40e base code.
source code of i40e driver:
cid-i40e.2020.07.16.tar.gz dropped by the team which develop
basic drivers for any i40e NIC.
changelog in ND share repo:
>From fc99a1143d3f ("i40e-shared: FEC on/off support flag for X722")
To 673ff35c1c73 ("i40e-shared: Add support for firmware
Check return value of running DNL admin command.
Signed-off-by: Adam Ludkiewicz
Signed-off-by: Guinan Sun
---
drivers/net/i40e/base/i40e_common.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/net/i40e/base/i40e_common.c
b/drivers/net/i40e/base/i40e_common.c
index
This patch adds support for "Disable Unused Ports" functionality.
Signed-off-by: Damian Milosek
Signed-off-by: Guinan Sun
---
drivers/net/i40e/base/i40e_adminq_cmd.h | 1 +
drivers/net/i40e/base/i40e_common.c | 6 ++
drivers/net/i40e/base/i40e_type.h | 1 +
3 files changed, 8 inse
Add I40E_RX_PTYPE_PARSER_ABORTED definition, so i40e driver will know
opcode for parser aborted packets.
Without this definition driver would have to rely on magic numbers.
Signed-off-by: Przemyslaw Patynowski
Signed-off-by: Guinan Sun
---
drivers/net/i40e/base/i40e_type.h | 3 ++-
1 file chang
Starting with API version 1.10 firmware for X722 devices has ability
to change FEC settings in PHY. Code added in this patch
checks API version and sets appropriate capability flag.
Signed-off-by: Dawid Lukwinski
Signed-off-by: Guinan Sun
---
drivers/net/i40e/base/i40e_adminq.c | 6 ++
Upcoming FVL FW increment API version to 1.11 due to new bit and new
fields in the Replace Cloud Filters AQ command.
Signed-off-by: Jacek Naczyk
Signed-off-by: Guinan Sun
---
drivers/net/i40e/base/i40e_adminq_cmd.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/net/
This patch adds the new filter types needed for custom cloud filters.
These custom cloud filters will route traffic to VFs based on the
dst IP for both tunneled and non-tunneled packets.
Signed-off-by: Harshitha Ramamurthy
Signed-off-by: Guinan Sun
---
drivers/net/i40e/base/i40e_adminq_cmd.h |
Update base code version in readme.
Signed-off-by: Guinan Sun
---
drivers/net/i40e/base/README | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/net/i40e/base/README b/drivers/net/i40e/base/README
index 6baca4360..58174d472 100644
--- a/drivers/net/i40e/base/README
+++
Add AQ command "NVM update in process"
to replace the original AQ command "NVM progress".
Signed-off-by: Jaroslaw Ilgiewicz
Signed-off-by: Guinan Sun
---
drivers/net/i40e/base/i40e_adminq_cmd.h | 12 +-
drivers/net/i40e/base/i40e_common.c | 53 +++--
drivers/net/i40e
On Tue, Jul 21, 2020 at 10:01 AM Van Haaren, Harry
wrote:
> > > > Honnappa's suggestion in the other reply seems to not work here, as the
> > > "service_may_be_active"
> > > > won't get updated if the service core is stopped after running its final
> > > iteration..?
> > This also is a problem.
>
Fdir allocating msix resource is not strictly necessary, if no
resource left, jump the error.
Fixes: 4861cde461 (i40e: new poll mode driver)
Cc: sta...@dpdk.org
Signed-off-by: Jiang Mao
---
drivers/net/i40e/i40e_ethdev.c | 10 +++---
1 file changed, 7 insertions(+), 3 deletions(-)
---
V2: M
Hi Olivier,
> -Original Message-
> From: Olivier Matz
> Sent: Tuesday, July 21, 2020 10:50 AM
> To: Raslan Darawsheh
> Cc: Ferruh Yigit ; dev@dpdk.org; sta...@dpdk.org
> Subject: Re: [dpdk-dev] [PATCH] net: fix compilation with pedantic enabled
>
> Hi Raslan,
>
> On Tue, Jul 21, 2020 a
When dynamic flex parser feature is introduced, the support for misc
parameters 4 of flow table entry (FTE) match set is needed. The
structure of "mlx5_ifc_fte_match_param_bits" is extended with
"mlx5_ifc_fte_match_set_misc4_bits" at the end of it. The total size
of the FTE match set will be change
W dniu 21.07.2020 o 10:07, David Marchand pisze:
> On Tue, Jul 21, 2020 at 10:01 AM Van Haaren, Harry
> wrote:
> Honnappa's suggestion in the other reply seems to not work here, as the
"service_may_be_active"
> won't get updated if the service core is stopped after running its final
On 7/21/20 4:28 AM, Fu, Patrick wrote:
> Hi Maxime,
>
>> -Original Message-
>> From: Maxime Coquelin
>> Sent: Monday, July 20, 2020 9:27 PM
>> To: Fu, Patrick ; dev@dpdk.org; Xia, Chenbo
>> ; Wang, Zhihong
>> Cc: Wang, Yinan ; Jiang, Cheng1
>> ; Liang, Cunming
>> Subject: Re: [PATCH
when trying to compile rte_mpls with pedantic enabled,
on old compilers like 4.8 it will complain about bit field definition.
error: type of bit-field 'bs' is a GCC extension [-Werror=pedantic]
error: type of bit-field 'tc' is a GCC extension [-Werror=pedantic]
error: type of bit-field 'tag_lsb' i
Hi Patrick,
On 7/21/20 4:57 AM, Fu, Patrick wrote:
> Hi Maxime,
>
>> -Original Message-
>> From: Maxime Coquelin
>> Sent: Tuesday, July 21, 2020 12:40 AM
>> To: Fu, Patrick ; dev@dpdk.org; Xia, Chenbo
>>
>> Subject: Re: [PATCH v1] vhost: support cross page buf in async data path
>>
>> T
On 7/21/20 5:23 AM, patrick...@intel.com wrote:
> From: Patrick Fu
>
> This patch adds the check of dev pointer in vhost async enqueue
> completion poll. If a NULL dev pointer detected, the poll function
> returns immediately.
>
> Coverity issue: 360839
> Fixes: cd6760da1076 ("vhost: introduc
On Fri, Jul 17, 2020 at 6:20 PM Bruce Richardson
wrote:
>
> On Fri, Jul 17, 2020 at 04:35:56PM +0200, David Marchand wrote:
> > On Fri, Jul 17, 2020 at 4:32 PM David Marchand
> > wrote:
> > >
> > > On Fri, Jul 17, 2020 at 6:37 AM Phil Yang wrote:
> > > >
> > > > refcnt_atomic member in structure
On 7/21/20 5:35 AM, patrick...@intel.com wrote:
> From: Patrick Fu
>
> Vring should not be touched if vq is disabled. This patch adds the vq
> status check in async enqueue polling to avoid accessing to a disabled
> queue.
>
> Fixes: cd6760da1076 ("vhost: introduce async enqueue for split rin
On Fri, Jul 17, 2020 at 6:37 AM Phil Yang wrote:
>
> Use C11 atomic builtins with explicit ordering instead of rte_atomic
> ops which enforce unnecessary barriers on aarch64.
>
> Suggested-by: Olivier Matz
> Suggested-by: Dodji Seketeli
> Signed-off-by: Phil Yang
> Reviewed-by: Ruifeng Wang
>
<...>
> Subject: [dpdk-dev] [PATCH v2 2/2] test/service: fix race condition on
> stopping lcore
>
> This commit fixes a potential race condition in the tests
> where the lcore running a service would increment a counter
> that was already reset by the test-suite thread. The resulting
> race-condi
On 7/21/20 7:47 AM, patrick...@intel.com wrote:
> From: Patrick Fu
>
> In async enqueue copy, a packet could be split into multiple copy
> segments. When polling the copy completion status, current async data
> path assumes the async device callbacks are aware of the packet
> boundary and retu
>
> On Fri, Jul 17, 2020 at 6:20 PM Bruce Richardson
> wrote:
> >
> > On Fri, Jul 17, 2020 at 04:35:56PM +0200, David Marchand wrote:
> > > On Fri, Jul 17, 2020 at 4:32 PM David Marchand
> > > wrote:
> > > >
> > > > On Fri, Jul 17, 2020 at 6:37 AM Phil Yang wrote:
> > > > >
> > > > > refcnt_ato
On 7/10/2020 5:21 PM, Hemant Agrawal wrote:
> This experimental API is no longer required as the same
> purpose can be solved with standard DEV_RX_OFFLOAD_TIMESTAMP
>
> Signed-off-by: Hemant Agrawal
Series applied to dpdk-next-net/master, thanks.
On 7/20/2020 1:20 PM, David Marchand wrote:
On Mon, Jul 20, 2020 at 11:12 AM Radu Nicolau wrote:
Add rte_write32_wc and rte_write32_wc_relaxed functions
that implement 32bit stores using write combining memory protocol.
Provided generic stubs and x86 implementation.
What is the difference of
Defines and functions from rte_mbuf_ptype.h are not used.
Only libefx types and EF10 register definitions are used.
Native datapaths should be independent from main libefx interface.
Signed-off-by: Andrew Rybchenko
---
drivers/net/sfc/sfc_ef10_essb_rx.c | 3 ---
1 file changed, 3 deletions(-)
efx_types.h uses defines from efx_annote.h, but does not include the
header. As the result if efx_types.h is included by a driver first,
build fails.
Signed-off-by: Andrew Rybchenko
---
drivers/net/sfc/base/efx_types.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/net/sfc/base/efx_
Just an optimization to avoid extra reconfiguration when it
is not not actually required.
Signed-off-by: Andrew Rybchenko
---
drivers/net/sfc/sfc_ethdev.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/net/sfc/sfc_ethdev.c b/drivers/net/sfc/sfc_ethdev.c
index 6b3c49a284..acee3e48
Hi Maxime,
> -Original Message-
> From: Maxime Coquelin
> Sent: Tuesday, July 21, 2020 4:35 PM
> To: Fu, Patrick ; dev@dpdk.org; Xia, Chenbo
>
> Subject: Re: [PATCH v1] vhost: support cross page buf in async data path
>
> Hi Patrick,
>
> On 7/21/20 4:57 AM, Fu, Patrick wrote:
> > Hi Ma
There's chance that rte_rand() doesn't provision suitable values for
RSS hash, an extreme example could be a key with a lot of 0s in it.
This patch adds a default RSS key which has been used in ixgbe driver
and fm10k driver.
Fixes: 50370662b727 ("net/ice: support device and queue ops")
Cc: sta...
On 7/21/20 2:10 PM, patrick...@intel.com wrote:
> From: Patrick Fu
>
> zmbufs should be set to NULL when getting freed to avoid double free on
> the same buffer pointer
>
> Fixes: b0a985d1f340 ("vhost: add dequeue zero copy")
>
> Signed-off-by: Patrick Fu
> ---
> v2:
> - revise commit mess
On Mon, Jul 20, 2020 at 9:30 PM Ori Kam wrote:
> > net and vdpa code expect the common code being initialised.
> > It is a dependency internal to mlx5 drivers, I see nothing generic.
> >
> First the idea was to declare a new bus not a PMD.
> The issue is not from common code but from loading more
The current selftest function uses a single global variable to track state
which implies that only a single instance can have the selftest function
called on it. Change this to an array to allow multiple instances to be
tested.
Signed-off-by: Bruce Richardson
---
drivers/raw/ioat/ioat_rawdev_tes
Rather than having each rawdev provide its own autotest command, we can
instead just use the generic rawdev_autotest to test any and all available
rawdevs.
Signed-off-by: Bruce Richardson
Cc: hemant.agra...@nxp.com
Cc: nipun.gu...@nxp.com
---
app/test/test_rawdev.c | 27 +
Since the rawdev autotest can now be used to test all rawdevs on the
system, there is no need for a dedicated ioat autotest command.
Signed-off-by: Bruce Richardson
---
app/test/test_rawdev.c | 20
1 file changed, 20 deletions(-)
diff --git a/app/test/test_rawdev.c b/app/te
From: Cheng Jiang
Add a flag which controls whether rte_ioat_enqueue_copy and
rte_ioat_completed_copies function should process handle parameters. Not
doing so can improve the performance when handle parameters are not
necessary.
Signed-off-by: Cheng Jiang
Signed-off-by: Bruce Richardson
---
This patchset adds some small enhancements, some rework and also support
for new hardware to the ioat rawdev driver. Most rework and enhancements
are largely self-explanatory from the individual patches.
The new hardware support is for the Intel(R) DSA accelerator which will be
present in future I
Add in the basic probe/remove skeleton code for DSA devices which are bound
directly to vfio or uio driver. The kernel module for supporting these uses
the "idxd" name, so that name is used as function and file prefix to avoid
conflict with existing "ioat" prefixed functions.
Signed-off-by: Bruce
Rather than having a single long complicated header file for general use we
can split things so that there is one header with all the publically needed
information - data structs and function prototypes - while the rest of the
internal details are put separately. This makes it easier to read,
under
Only a few definitions from the hardware spec are actually used in the
driver runtime, so we can copy over those few and make the rest of the spec
a private header in the driver.
Signed-off-by: Bruce Richardson
---
drivers/raw/ioat/ioat_rawdev.c| 3 ++
.../raw/ioat/{rte_ioat_spe
From: Kevin Laatz
The Intel DSA devices can be exposed to userspace via kernel driver, so can
be used without having to bind them to vfio/uio. Therefore we add support
for using those kernel-configured devices as vdevs, taking as parameter the
individual HW work queue to be used by the vdev.
Sig
From: Kevin Laatz
Intel Data Streaming Accelerator (Intel DSA) is a high-performance data
copy and transformation accelerator which will be integrated in future
Intel processors [1].
Add DSA device support to dpdk-devbind.py script.
[1] https://01.org/blogs/2019/introducing-intel-data-streaming
Add in the relevant data structures for the data path for DSA devices. Also
include a device dump function to output the status of each device.
Signed-off-by: Bruce Richardson
---
drivers/raw/ioat/idxd_pci.c| 3 +-
drivers/raw/ioat/idxd_vdev.c | 1 +
drivers/raw/ioat/ioat
From: Kevin Laatz
For each vdev (DSA work queue) instance, create a rawdev instance. Since
the vdev support depends upon the accel-config libraries, make the vdev
support conditional upon that in meson.build.
Signed-off-by: Kevin Laatz
Signed-off-by: Bruce Richardson
---
drivers/raw/ioat/idxd
Add the start and stop functions for DSA hardware devices.
Signed-off-by: Bruce Richardson
Signed-off-by: Kevin Laatz
---
drivers/raw/ioat/idxd_pci.c | 52
drivers/raw/ioat/idxd_vdev.c | 50 ++
2 files changed, 102 insertions
When a matching device is found via PCI probe create a rawdev instance for
each queue on the hardware. Use empty self-test function for these devices
so that the overall rawdev_autotest does not report failures.
Signed-off-by: Bruce Richardson
---
drivers/raw/ioat/idxd_pci.c| 235 +++
Add the info get function for DSA devices, returning just the ring size
info about the device, same as is returned for existing IOAT/CBDMA devices.
Signed-off-by: Bruce Richardson
---
drivers/raw/ioat/idxd_pci.c | 1 +
drivers/raw/ioat/idxd_vdev.c| 1 +
drivers/raw/ioat/ioat_common.c
Add configure function for idxd devices, taking the same parameters as the
existing configure function for ioat. The ring_size parameter is used to
compute the maximum number of bursts to be supported by the driver, given
that the hardware works on individual bursts of descriptors at a time.
Signe
Rather than having the xstats as fields inside the main driver structure,
create a separate structure type for them.
Signed-off-by: Bruce Richardson
---
drivers/raw/ioat/ioat_rawdev.c | 21 --
drivers/raw/ioat/rte_ioat_rawdev_fns.h | 30 --
2 files
The xstats functions can be used by all ioat devices so move them from the
ioat_rawdev.c file to ioat_common.c, and add the function prototypes to the
internal header file.
Signed-off-by: Bruce Richardson
---
drivers/raw/ioat/ioat_common.c | 76 +
drivers/raw/ioa
Add support for doing copies using DSA hardware. This is implemented by
just switching on the device type field at the start of the inline
functions. Since there is no hardware which will have both device types
present this branch will always be predictable after the first call,
meaning it has litt
Add update of the relevant stats for the data path functions and point the
overall device struct xstats function pointers to the existing ioat
functions.
At this point, all necessary hooks for supporting the existing unit tests
are in place so call them for each device.
Signed-off-by: Bruce Richa
Now that all devices can pass the same set of unit tests, elminate the
temporary idxd_rawdev_test function and move the prototype for
ioat_rawdev_test to the proper internal header file, to be used by all
device instances.
Signed-off-by: Bruce Richardson
---
drivers/raw/ioat/idxd_pci.c |
On Fri, Jul 17, 2020 at 01:49:37PM +0100, Bruce Richardson wrote:
> On Wed, Jul 15, 2020 at 02:16:15AM +, Cheng Jiang wrote:
> > Add a flag which controls whether rte_ioat_enqueue_copy
> > and rte_ioat_completed_copies function should process
> > handle parameters to improve the performance whe
When Rx/Tx queue was being created with DevX the allocated
doorbell record size was only uint64_t. That was definitely
less than size of CPU cacheline and it might have happened the
doorbell records attached to different queues handled by
different cores were allocated within same cacheline. It mig
Hi David,
On 7/21/2020 3:04 PM, David Marchand wrote:
> On Mon, Jul 20, 2020 at 9:30 PM Ori Kam wrote:
>>> net and vdpa code expect the common code being initialised.
>>> It is a dependency internal to mlx5 drivers, I see nothing generic.
>>>
>> First the idea was to declare a new bus not a PMD.
On Tue, Jul 21, 2020 at 1:19 PM Parav Pandit wrote:
> > This way, net/mlx5 and vdpa/mlx5 will pass their id_map to the mlx5
> > pci driver whether it is registered to the pci bus or not yet.
>
> And here pci_id_table will not be const *.
> Is that ok?
This is already the case in the current patch
Performance improvement: use a write combining store
instead of a regular mmio write to update queue tail
registers.
Signed-off-by: Radu Nicolau
Acked-by: Fiona Trahe
---
drivers/common/qat/qat_adf/adf_transport_access_macros.h | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff -
Performance improvement: use a write combining store
instead of a regular mmio write to update queue tail
registers.
Signed-off-by: Radu Nicolau
Acked-by: Konstantin Ananyev
---
drivers/net/ixgbe/base/ixgbe_osdep.h | 6 ++
drivers/net/ixgbe/ixgbe_rxtx.c | 15 ---
driv
Performance improvement: use a write combining store
instead of a regular mmio write to update queue tail
registers.
Signed-off-by: Radu Nicolau
Acked-by: Bruce Richardson
---
drivers/net/i40e/base/i40e_osdep.h| 5 +
drivers/net/i40e/i40e_rxtx.c | 8
drivers/net/i40e/i
Add rte_write32_wc and rte_write32_wc_relaxed functions
that implement 32bit stores using write combining memory protocol.
Provided generic stubs and x86 implementation.
Signed-off-by: Radu Nicolau
Acked-by: Bruce Richardson
---
lib/librte_eal/arm/include/rte_io_64.h | 12 +
lib/librte
Implement 2 new functions that will enable write combining
stores depending on architecture. The functions are provided
as a generic stub and a x86 specific implementation.
The reason to implement these functions is to improve performance
by reducing the overhead associated with regular mmio write
> -Original Message-
> From: Ferruh Yigit
> Sent: Monday, July 20, 2020 18:26
> To: Slava Ovsiienko ; dev@dpdk.org
> Cc: Matan Azrad ; Raslan Darawsheh
> ; olivier.m...@6wind.com; Thomas Monjalon
> ; David Marchand ;
> Phil Yang ; Ruifeng Wang ;
> Honnappa Nagarahalli
> Subject: Re: [dpdk
The mlx5_flow_action_copy_mreg structure contains a field called src
type enum modify_reg, similarly the mlx5_rte_flow_item_tag field
contains a field called id type enum modify_reg.
The enum modify_reg variable represents different registers in the
system and it also has a field called REG_NONE wh
The flow_dv_translate_item_nvgre function add NVGRE item to matcher and
to the value.
It defines a pointer named nvrge_m that receives the item's mask into
it, and then copies some of it to the matcher.
Before copying, it checks for mask validation, and in case the mask is
NULL the function gives
The flow_hairpin_split function defines a pointer called addr that
points to the list of items.
When the function wants to progress in the list, it adds the size of an
item to the pointer.
At the end of the function, it precedes the pointer one more time even
though it is not used afterwards. In f
The mlx4_pci_probe function sets a pointer to the mlx4_priv structure,
and during that function fills its fields one by one with relevant
values.
It wants to put a value in the intr_handle field that has all its fields
zero except 2. To do so, it initializes a local struct rte_intr_handle
type var
In mlx5_sysfs_switch_info function, the driver gets switch information
associated with network interface.
The driver writes the port name into buffer and translates it.
However, when it writes the name, it does not limit writing to the
buffer size.
Limit writing to the size of the buffer.
Fixes:
When PMD releases shared IB device context, It locks the
mlx5_ibv_list_mutex lock throughout the function so that it does not
happen while removing a device from the list, another process will try
to insert another device into it.
On the other hand, having removed the device from the list even if i
The flow_dv_convert_action_mark function defines an array of
field_modify_info structures and initializes the first entity.
In the first entity id field, it initializes to 0, even though its type
is an enum that has no value of 0.
In fact, the function does not use this id field before assigning t
The device configuration stuck is not small enough to be used as
function argument by value.
Call spawn function with device configuration by value.
Signed-off-by: Michael Baum
Acked-by: Matan Azrad
---
drivers/net/mlx5/linux/mlx5_os.c | 251 +++
1 file chan
On Mon, Jun 29, 2020 at 5:03 AM wrote:
>
> From: Pavan Nikhilesh
>
> Free CQ ring memzone on Rx queue release. This prevents CQ using
> incorrect memory size when ring size is reconfigured.
>
> Signed-off-by: Pavan Nikhilesh
> ---
> This patch depends on the following patch
> http://patches.dp
21/07/2020 13:29, David Marchand:
> On Tue, Jul 21, 2020 at 1:19 PM Parav Pandit wrote:
> > Basically mlx5_pci_bus, mlx5_net and mlx5_vdpa will be called with same
> > priority RTE_PRIO_LAST.
> > driver id table and drv_flags dynamically updated as PMDs register.
> >
> > Should we have another API
> From: David Marchand
> Sent: Tuesday, July 21, 2020 4:59 PM
>
> On Tue, Jul 21, 2020 at 1:19 PM Parav Pandit wrote:
> > > This way, net/mlx5 and vdpa/mlx5 will pass their id_map to the mlx5
> > > pci driver whether it is registered to the pci bus or not yet.
> >
> > And here pci_id_table wil
On Fri, Jul 17, 2020 at 4:47 PM wangyunjian wrote:
>
> From: Yunjian Wang
>
> This patch fixes (Logically dead code) coverity issue.
>
> Coverity issue: 261777, 261778
> Fixes: dd28bc8c6ef4 ("net/qede: fix VF port creation sequence")
> Cc: sta...@dpdk.org
@Rasesh Mody
Could you Ack this change t
21/07/2020 14:13, Parav Pandit:
> From: David Marchand
> > On Tue, Jul 21, 2020 at 1:19 PM Parav Pandit wrote:
> > > > This way, net/mlx5 and vdpa/mlx5 will pass their id_map to the mlx5
> > > > pci driver whether it is registered to the pci bus or not yet.
> > >
> > > And here pci_id_table will
> From: Thomas Monjalon
> Sent: Tuesday, July 21, 2020 5:57 PM
>
> 21/07/2020 14:13, Parav Pandit:
> > From: David Marchand
> > > On Tue, Jul 21, 2020 at 1:19 PM Parav Pandit
> wrote:
> > > > > This way, net/mlx5 and vdpa/mlx5 will pass their id_map to the
> > > > > mlx5 pci driver whether i
21/07/2020 14:51, Parav Pandit:
>
> > From: Thomas Monjalon
> > Sent: Tuesday, July 21, 2020 5:57 PM
> >
> > 21/07/2020 14:13, Parav Pandit:
> > > From: David Marchand
> > > > On Tue, Jul 21, 2020 at 1:19 PM Parav Pandit
> > wrote:
> > > > > > This way, net/mlx5 and vdpa/mlx5 will pass their i
From: Yunjian Wang
The function rte_zmalloc_socket() could return NULL, the return
value need to be checked.
Fixes: 5915699153d7 ("hash: fix scaling by reducing contention")
Cc: sta...@dpdk.org
Reported-by: HuangBin
Signed-off-by: Yunjian Wang
---
lib/librte_hash/rte_cuckoo_hash.c | 9 ++
This patch removes unused fields from structs qat_qp and
qat_qp_config, together with their initializations.
Signed-off-by: Adam Dybkowski
---
drivers/common/qat/qat_qp.c | 1 -
drivers/common/qat/qat_qp.h | 8 +---
drivers/compress/qat/qat_comp_pmd.c | 1 -
drivers/crypto/qa
On Thu, Jul 09, 2020 at 12:23:34AM +0300, Dmitry Kozlyuk wrote:
> The package is available on all major distributions.
> FreeBSD has no system requirements section in its GSG,
> Windows currently neither uses pmdinfogen not is supported by it.
>
> Signed-off-by: Dmitry Kozlyuk
> ---
> doc/guides
On Thu, Jul 09, 2020 at 12:23:31AM +0300, Dmitry Kozlyuk wrote:
> This patchset implements existing pmdinfogen logic in Python, replaces
> and removes the old code. The goals of rewriting are:
>
> * easier maintenance by using a more high-level language,
> * simpler build process without host appl
On Thu, Jul 09, 2020 at 12:23:33AM +0300, Dmitry Kozlyuk wrote:
> Like for other build scripts, use Python interpreter to run pmdinfogen.
> Adjust wrapper script accordingly and also don't suppress stderr from ar
> and pmdinfogen.
>
> Add python3-pyelftools to CI configuration.
>
> Signed-off-by:
On Thu, Jul 09, 2020 at 12:23:34AM +0300, Dmitry Kozlyuk wrote:
> The package is available on all major distributions.
> FreeBSD has no system requirements section in its GSG,
> Windows currently neither uses pmdinfogen not is supported by it.
>
> Signed-off-by: Dmitry Kozlyuk
> ---
> doc/guides
On Tue, Jul 21, 2020 at 02:39:35PM +0100, Bruce Richardson wrote:
> On Thu, Jul 09, 2020 at 12:23:34AM +0300, Dmitry Kozlyuk wrote:
> > The package is available on all major distributions.
> > FreeBSD has no system requirements section in its GSG,
> > Windows currently neither uses pmdinfogen not i
v1 - Initial release (get event in Verbs only)
v2 - Handle another case of DevX get event.
Ophir Munk (1):
net/mlx5: return EAGAIN on premature disable interrupt calls
drivers/net/mlx5/mlx5_rxq.c | 23 ++-
1 file changed, 14 insertions(+), 9 deletions(-)
--
2.8.4
RXQ interrupts under Linux are based on the epoll mechanism. An
expected order of operations is as follows:
1. Call rte_eth_dev_rx_intr_enable(), to arm the CQ for receiving events
on data input.
2. Block on rte_epoll_wait() with an array of file descriptors
representing the CQ events. Upon data ar
RXQ interrupts under Linux are based on the epoll mechanism. An
expected order of operations is as follows:
1. Call rte_eth_dev_rx_intr_enable(), to arm the CQ for receiving events
on data input.
2. Block on rte_epoll_wait() with an array of file descriptors
representing the CQ events. Upon data ar
v1 - Initial release (get event in Verbs only)
v2 - Handle another case of DevX get event.
v3 - Update commit message
Ophir Munk (1):
net/mlx5: return EAGAIN on premature disable interrupt calls
drivers/net/mlx5/mlx5_rxq.c | 23 ++-
1 file changed, 14 insertions(+), 9 delet
On 7/21/2020 9:36 AM, Maxime Coquelin wrote:
>
>
> On 7/21/20 5:23 AM, patrick...@intel.com wrote:
>> From: Patrick Fu
>>
>> This patch adds the check of dev pointer in vhost async enqueue
>> completion poll. If a NULL dev pointer detected, the poll function
>> returns immediately.
>>
>> Coverit
On 7/21/2020 9:36 AM, Maxime Coquelin wrote:
>
>
> On 7/21/20 5:35 AM, patrick...@intel.com wrote:
>> From: Patrick Fu
>>
>> Vring should not be touched if vq is disabled. This patch adds the vq
>> status check in async enqueue polling to avoid accessing to a disabled
>> queue.
>>
>> Fixes: cd67
Rx RSS hash offload should be controlled by the user and should
not be enforced by RSS multi-queue Rx mode.
Fixes: 8b945a7f7dcb ("drivers/net: update Rx RSS hash offload capabilities")
Cc: sta...@dpdk.org
Signed-off-by: Andrew Rybchenko
---
drivers/net/sfc/sfc_rx.c | 4
1 file changed, 4 d
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