TB Members Attending
-
Aaron Conole
Bruce Richardson
Honnappa Nagarahalli (chair)
Jerin Jacob
Kevin Traynor
Konstantin Ananyev
Maxime Coquelin
Morten Brørup
Stephen Hemminger
NOTE: The technical board meetings are on every second Wednesday at 3pm UTC.
Meetings are public
Members Attending
-
Aaron Conole
Bruce Richardson
Hemant Agrawal
Jerin Jacob
Kevin Traynor
Konstantin Ananyev
Maxime Coquelin
Morten Brørup
Stephen Hemminger
Thomas Monjalon
NOTE: The technical board meetings are on every second Wednesday at 3pm
UTC. Meetings are public,
> On Nov 14, 2024, at 8:41 AM, Konstantin Ananyev
> wrote:
>
> Hi everyone,
>
> Looking at implementation of cryptodev callbacks
> (it uses DPDK RCU), it seems like there is a bug here:
>
> at init time we don't call rte_rcu_qsbr_thread_register().
> As I understand without it rte_rcu_qsbr_c
ly to 64 bits.
> UINT64_C was used in the fix as it is the portable way to define a 64-bit
> constant (ULL suffix is architecture dependent).
>
> Signed-off-by: Andre Muezerie
Reviewed-by: Honnappa Nagarahalli
> ---
> lib/rcu/rte_rcu_qsbr.c | 12 ++--
> 1 file cha
> On Sep 11, 2024, at 10:55 AM, Mattias Rönnblom wrote:
>
> On 2024-09-11 05:26, Varghese, Vipin wrote:
>> [AMD Official Use Only - AMD Internal Distribution Only]
>>
>>>
>>> On 2024-09-09 16:22, Varghese, Vipin wrote:
[AMD Official Use Only - AMD Internal Distribution Only]
> On Aug 2, 2024, at 8:34 AM, Thomas Monjalon wrote:
>
> 01/08/2024 21:39, Patrick Robb:
>> * Do we want to add DTS items to release notes?
>> * What is the process for building the release notes? Should the
>> people working on DTS aggregate the updates and submit them? Patrick
>> Robbshould
> On Jul 16, 2024, at 9:27 PM, Stephen Hemminger
> wrote:
>
> On Mon, 15 Jul 2024 22:11:41 +
> Wathsala Vithanage wrote:
>
>> An application provides cache stashing hints to the ethernet devices to
>> improve memory access latencies from the CPU and the NIC. This patch
>> introduces thre
> On Jul 15, 2024, at 5:53 PM, Wathsala Vithanage
> wrote:
>
> Add Arm Neoverse N3 part number to build configuration.
>
> Signed-off-by: Wathsala Vithanage
> ---
> config/arm/meson.build | 22 +-
> 1 file changed, 21 insertions(+), 1 deletion(-)
>
> diff --git a/config/a
n be simpler. “Add descriptive comments to each Arm feature listed
in rte_cpu_flag_t"
>
> Signed-off-by: Wathsala Vithanage
> Reviewed-by: Dhruv Tripathi
Otherwise, looks good.
Reviewed-by: Honnappa Nagarahalli
> ---
> lib/eal/arm/include/rte_cpuflags_64.h | 48 ++
Members Attending:
Aaron Conole
Hemant Agarwal
Honnappa Nagarahalli (Chair)
Kevin Traynor
Morten Brorup
Stephen Hemminger
Thomas Monjalon
NOTE: The Technical Board meetings take place every second Wednesday at 3 pm UTC
on
https://zoom-lfx.platform.linuxfoundation.org/meeting/96459488340
> On Jul 5, 2024, at 5:10 PM, Pavan Nikhilesh Bhagavatula
> wrote:
>
>> 04/07/2024 16:55, Stephen Hemminger:
>>> On Thu, 04 Jul 2024 16:14:42 +0200
>>> Thomas Monjalon wrote:
>>>
>> Let’s ask Pavan why this flag is used in cn10k driver.
>>
>> From our perspective, WFE is availab
> On Jun 21, 2024, at 5:18 PM, Stephen Hemminger
> wrote:
>
> On Fri, 21 Jun 2024 17:19:21 -0400
> Nicholas Pratte wrote:
>
>> +The test suite ensures the consistency of jumbo frames transmission within
>> +Poll Mode Drivers using a series of individual test cases. If a Poll Mode
>> +Driver
> if the RCU is enabled.
>
> Signed-off-by: Abdullah Ömer Yamaç
Reviewed-by: Honnappa Nagarahalli
> ---
> app/test/test_hash.c | 87 ++
> lib/hash/rte_cuckoo_hash.c | 21 +
> lib/hash/rte_hash.h| 25 +++
> lib/ha
> On May 16, 2024, at 10:29 PM, Stephen Hemminger
> wrote:
>
> On Fri, 17 May 2024 02:39:02 +0000
> Honnappa Nagarahalli wrote:
>
>>> On May 16, 2024, at 4:42 PM, Stephen Hemminger
>>> wrote:
>>>
>>> On Thu, 16 May 2024 18:22:23 +
+ Bruce for feedback on x86 architecture
> On May 16, 2024, at 10:30 PM, Stephen Hemminger
> wrote:
>
> On Fri, 17 May 2024 02:45:12 +0000
> Honnappa Nagarahalli wrote:
>
>>> + * A counter is 64 bit value that is safe from split read/write
>>> + * on 32
> On May 16, 2024, at 7:12 PM, Stephen Hemminger
> wrote:
>
> This header implements 64 bit counters that are NOT atomic
> but are safe against load/store splits on 32 bit platforms.
>
> Signed-off-by: Stephen Hemminger
> Acked-by: Morten Brørup
> ---
> lib/eal/include/meson.build | 1 +
> On May 16, 2024, at 4:42 PM, Stephen Hemminger
> wrote:
>
> On Thu, 16 May 2024 18:22:23 +
> Wathsala Wathawana Vithanage wrote:
>
>> Hi Stephen,
>>
>>> +__rte_experimental
>>> +static inline uint64_t
>>> +rte_counter64_fetch(const rte_counter64_t *counter) {
>>> + return *counter;
>>
> On May 13, 2024, at 11:35 AM, Abdullah Ömer Yamaç
> wrote:
>
> Set the maximum reclamation size to user provided value
>
> Fixes: 769b2de7fb52 ("hash: implement RCU resources reclamation")
> Cc: sta...@dpdk.org
> Cc: dharmik.thak...@arm.com
> Cc: Ho
t it was more meaningful in the header. If you want
> also, I can insert it in the description part.
I meant that we should simplify the long commit message.
>
> Do I miss something else?
>
>
> On Mon, May 13, 2024 at 5:34 PM Honnappa Nagarahalli
> wrote:
> Hi Ab
h
> uses the configuration argument to set the maximum reclamation size.
>
> Fixes: 769b2de7fb52 ("hash: implement RCU resources reclamation")
> Cc: dharmik.thak...@arm.com
> Cc: Honnappa Nagarahalli
> Cc: Yipeng Wang
> Cc: Sameh Gobriel
> Cc: Bruce Richardson
ment to set the maximum reclamation size.
Nit. This can be as follows:
“Set the maximum reclamation size to user provided value”
>
> Fixes: 769b2de7fb52 ("hash: implement RCU resources reclamation")
> Cc: dharmik.thak...@arm.com
> Cc: Honnappa Nagarahalli
> Cc: Yipeng Wang
>
Hi Abdullah,
This looks good, except for one comment inline.
> On Apr 27, 2024, at 2:54 PM, Abdullah Ömer Yamaç wrote:
>
> This patch adds a new feature to the hash library to allow the user to
> reclaim the defer queue. This is useful when the user wants to force
> reclaim resources that
> On Apr 23, 2024, at 3:56 PM, Mattias Rönnblom wrote:
>
> On 2024-04-23 13:15, Ferruh Yigit wrote:
>> On 4/23/2024 10:08 AM, Mattias Rönnblom wrote:
>>> Cache align Rx and Tx queue struct to avoid false sharing.
>>>
>>> RX struct happens to be 64 bytes on x86_64 already, so cache alignment
>>
Apologies for the late reply. Looks good, few nits inline.
Can you please some simple unit tests?
> On Apr 4, 2024, at 5:11 AM, Abdullah Ömer Yamaç wrote:
>
> Hello,
> Could you check the last commit?
> Thanks
>
> On Thu, Mar 14, 2024 at 10:04 AM Abdullah Ömer Yamaç
> wrote:
> Hello,
> Is t
> On Apr 1, 2024, at 9:53 PM, Stephen Hemminger
> wrote:
>
> On Tue, 2 Apr 2024 02:14:06 +0000
> Honnappa Nagarahalli wrote:
>
>>> On Apr 1, 2024, at 9:00 PM, Stephen Hemminger
>>> wrote:
>>>
>>> On Tue, 2 Apr 2024 01:35:28 +
>
> On Apr 2, 2024, at 6:44 PM, Stephen Hemminger
> wrote:
>
> On Mon, 1 Apr 2024 21:20:13 -0700
> Tyler Retzlaff wrote:
>
>> On Tue, Apr 02, 2024 at 03:03:13AM +, Aditya Ambadipudi wrote:
>>> Hello Stephen,
>>>
>>> I have a copy of CLRS with me. And Deque is a very standard word in
>>>
> On Apr 1, 2024, at 9:00 PM, Stephen Hemminger
> wrote:
>
> On Tue, 2 Apr 2024 01:35:28 +0000
> Honnappa Nagarahalli wrote:
>
>>> On Apr 1, 2024, at 7:47 PM, Stephen Hemminger
>>> wrote:
>>>
>>> On Mon, 1 Apr 2024 22:28:52 +
&
> On Apr 1, 2024, at 7:47 PM, Stephen Hemminger
> wrote:
>
> On Mon, 1 Apr 2024 22:28:52 +
> Aditya Ambadipudi wrote:
>
>> Thanks, Stephen, for the comment.
>>
>> Unfortunately, we don't have the dev setup nor the resources to test out
>> this change using MSVC.
>>
>> Thank you,
>> Ad
+ Wathsala
> On Mar 8, 2024, at 2:27 AM, David Marchand wrote:
>
> Hello Paul,
>
> On Thu, Mar 7, 2024 at 9:40 PM Paul Szczepanek
> wrote:
>>
>> This patchset is proposing adding a new EAL header with utility functions
>> that allow compression of arrays of pointers.
>>
>> When passing cac
> On Mar 7, 2024, at 12:02 AM, Anoob Joseph wrote:
>
> Move 'soc_cn9k' above 'soc_cn10k' to have the list alphabetically
> sorted.
>
> Signed-off-by: Anoob Joseph
Thank you
Reviewed-by: Honnappa Nagarahalli
> ---
> config/arm/meson.build |
> On Mar 6, 2024, at 4:31 PM, Paul Szczepanek wrote:
>
> On 02/03/2024 10:33, Morten Brørup wrote:
>> I think that a misconception that arch specific optimizations (such as SIMD
>> code) required stuff to go into EAL has been prevailing, and this
>> misconception is a main reason why EAL has
> On Mar 5, 2024, at 5:13 AM, Anoob Joseph wrote:
>
> Add meson build configuration for Marvell Odyssey platform with 64-bit
> ARM Neoverse V2 cores.
>
> Signed-off-by: Anoob Joseph
Reviewed-by: Honnappa Nagarahalli
> ---
>
> Depends-on: series-31141 ("
> On Mar 5, 2024, at 10:41 PM, Anoob Joseph wrote:
>
> Hi Honnappa,
>
> Thanks for the review. Please see inline.
>
> Thanks,
> Anoob
>
>> -----Original Message-----
>> From: Honnappa Nagarahalli
>> Sent: Wednesday, March 6, 2024 8:50 AM
&
> On Mar 5, 2024, at 5:13 AM, Anoob Joseph wrote:
>
> Add meson build configuration for Marvell Odyssey platform with 64-bit
> ARM Neoverse V2 cores.
>
> Signed-off-by: Anoob Joseph
> ---
>
> Depends-on: series-31141 ("config/arm: add Neoverse V2 part number")
>
> Changes in v2:
> - Renamed
> On Mar 4, 2024, at 1:33 AM, Akhil Goyal wrote:
>
>>> Hi folks,
>>>
>>> The introduction of a more unified IPsec MB library for DPDK is causing the
>>> snow3g tests to fail on ARM. Artifact here:
>>> https://lab.dpdk.org/results/dashboard/patchsets/29315/
>>> PMDs using the direct API (KASUMI
> On Mar 4, 2024, at 2:27 AM, Abdullah Ömer Yamaç wrote:
>
> Just one more question.
>
> On Sun, Mar 3, 2024 at 10:14 PM Honnappa Nagarahalli
> wrote:
> Hello Abdullah,
> Thank you for the patch, few comments inline.
>
> The short commit log could be
ow the user to
> reclaim the defer queue. This is useful when the user wants to force
> reclaim resources that are not being used. This API is only available
> if the RCU is enabled.
>
> Signed-off-by: Abdullah Ömer Yamaç
> Acked-by: Honnappa Nagarahalli
Please add this only afte
> On Mar 1, 2024, at 5:16 AM, Morten Brørup wrote:
>
>> From: Konstantin Ananyev [mailto:konstantin.anan...@huawei.com]
>> Sent: Thursday, 22 February 2024 17.16
>>
>>> For some reason your email is not visible to me, even though it's in the
>>> archive.
>>
>> No worries.
>>
>>>
>>> On 02/1
urate number of entries in the hash table available for allocation.
>
> On Thu, Feb 22, 2024 at 7:44 PM Honnappa Nagarahalli
> wrote:
>
>
> > On Feb 22, 2024, at 6:39 AM, Abdullah Ömer Yamaç
> > wrote:
> >
> > As a final decision, I will add a new hash
ned-off-by: Andrew Boyer
> Signed-off-by: Neel Patel
> Signed-off-by: R Mohamed Shah
> Signed-off-by: Alfredo Cardigliano
Build related files look good.
Reviewed-by: Honnappa Nagarahalli
> ---
> config/arm/arm64_capri_linux_gcc | 16
> config/arm/arm64_elba_linux
> On Feb 22, 2024, at 1:08 AM, Thomas Monjalon wrote:
>
> 20/02/2024 02:45, Honnappa Nagarahalli:
>> Add generic V2 CPU SoC. This will allow for compiling a binary
>> that will run on any SoC that uses V2 CPU.
> [...]
>> +soc_v2 = {
>>
> On Feb 22, 2024, at 6:39 AM, Abdullah Ömer Yamaç wrote:
>
> As a final decision, I will add a new hash API that forces the reclaim. Is it
> ok for everyone?
Ack from my side
>
> On Thu, Feb 22, 2024 at 5:37 AM Honnappa Nagarahalli
> wrote:
>
>
> > On F
> On Feb 21, 2024, at 3:51 PM, Abdullah Ömer Yamaç wrote:
>
>
>
> On Wed, Feb 21, 2024 at 6:24 AM Honnappa Nagarahalli
> wrote:
>
>
> > On Feb 20, 2024, at 12:58 PM, Abdullah Ömer Yamaç
> > wrote:
> >
> > I appreciate that you gave
> On Feb 20, 2024, at 11:01 PM, Patrick Robb wrote:
>
>
>
> On Tue, Jun 20, 2023 at 5:44 AM Fangming Fang wrote:
> v1.4 release on the arm repo breaks DPDK
> We have reverted the Arm library version to 1.3.0 to work around this issue
> according to Pablo's suggestion. The library fixing this i
ions.
>
> On Tue, Feb 20, 2024 at 2:35 AM Honnappa Nagarahalli
> wrote:
>
>
> > On Feb 19, 2024, at 3:28 PM, Abdullah Ömer Yamaç
> > wrote:
> >
> > Hello,
> >
> > Let me explain a use case;
> >
> > I have a hash table whose
> On Feb 20, 2024, at 2:28 AM, Ferruh Yigit wrote:
>
> On 2/16/2024 5:07 PM, Andrew Boyer wrote:
>> +#if defined(RTE_LIBRTE_IONIC_PMD_BARRIER_ERRATA)
>> + /* On some devices the standard 'dmb' barrier is insufficient */
>> + asm volatile("dsb st" : : : "memory");
>> + rte_write64_relaxed(rte_cp
> On Feb 16, 2024, at 11:07 AM, Andrew Boyer wrote:
>
> Add support for running DPDK applications directly on AMD Pensando
> embedded HW. The platform exposes the device BARs through UIO. The
> UIO code in the common/ionic library walks the sysfs filesystem
> to identify the relevant BARs and m
Add meson build configuration for AWS Graviton4 platform
with 64-bit Arm Neoverse V2 cores.
Signed-off-by: Honnappa Nagarahalli
Reviewed-by: Wathsala Vithanage
---
config/arm/arm64_graviton4_linux_gcc | 16
config/arm/meson.build | 14 ++
2 files
Add meson build configuration for NVIDIA Grace platform
with 64-bit Arm Neoverse V2 cores.
Signed-off-by: Honnappa Nagarahalli
Acked-by: Ruifeng Wang
Reviewed-by: Wathsala Vithanage
---
config/arm/arm64_grace_linux_gcc | 16
config/arm/meson.build | 10 ++
2
Add generic V2 CPU SoC. This will allow for compiling a binary
that will run on any SoC that uses V2 CPU.
Signed-off-by: Honnappa Nagarahalli
Reviewed-by: Wathsala Vithanage
---
config/arm/arm64_v2_linux_gcc | 16
config/arm/meson.build| 9 +
2 files changed
Add Arm Neoverse V2 CPU part number
Signed-off-by: Honnappa Nagarahalli
Acked-by: Ruifeng Wang
Reviewed-by: Wathsala Vithanage
---
config/arm/meson.build | 10 ++
1 file changed, 10 insertions(+)
diff --git a/config/arm/meson.build b/config/arm/meson.build
index 36f21d2259
dded a new API to get the number of hidden (defer queue) elements
> > in the hash table. Then the user can calculate the total number of
> > elements that are available in the hash table.
> >
> > Signed-off-by: Abdullah Ömer Yamaç
> >
> > ---
> >
Acked-by: Viacheslav Ovsiienko
>
> With best regards,
> Slava
>
>> -Original Message-
>> From: Wathsala Vithanage
>> Sent: Friday, February 9, 2024 10:42 PM
>> To: NBU-Contact-Thomas Monjalon (EXTERNAL) ;
>> Dariusz Sosnowski ; Slava Ovsiienko
z Sosnowski ; Slava Ovsiienko
>> ; Ori Kam ; Suanming Mou
>> ; Matan Azrad ;
>> dev@dpdk.org; n...@arm.com; Honnappa Nagarahalli
>>
>> Subject: Re: [PATCH] net/mlx5: enable PCI related counters
>>
>> On Fri, 9 Feb 2024 20:41:42 +
>> Wathsala
> On Feb 10, 2024, at 9:20 AM, Honnappa Nagarahalli
> wrote:
>
>
>
>> On Feb 10, 2024, at 12:49 AM, Pavan Nikhilesh Bhagavatula
>> wrote:
>>
>>
>>>>> wrote:
>>>>>>
>>>>>> Hi Pavan,
>>>&g
ld -Dc_args='-DRTE_ARM_USE_WFE' \
> --cross-file config/arm/arm64_cn10k_linux_gcc
>
> Signed-off-by: Pavan Nikhilesh
> Acked-by: Chengwen Feng
> Acked-by: Ruifeng Wang
Reviewed-by: Honnappa Nagarahalli
---
> config/arm/meson.build | 4 +++-
> 1 file changed
> On Feb 10, 2024, at 12:47 AM, Pavan Nikhilesh Bhagavatula
> wrote:
>
>>> On Feb 1, 2024, at 3:57 PM, pbhagavat...@marvell.com wrote:
>>>
>>> From: Pavan Nikhilesh
>>>
>>> Allow RTE_ARM_USE_WFE to be enabled at meson configuration
>>> time by passing it via c_args instead of modifying
>>>
> On Feb 10, 2024, at 12:49 AM, Pavan Nikhilesh Bhagavatula
> wrote:
>
>
wrote:
>
> Hi Pavan,
>
>> The compiler options march and mtune are a subset of mcpu and will
>> lead
to
>> conflicts if improper march is chosen for a given mcpu.
>> To avoid conf
located.
It would be good to see more of the PCI counters added in other NIC drivers as
well. It helps significantly with debugging.
>
> Signed-off-by: Wathsala Vithanage
> Reviewed-by: Honnappa Nagarahalli
> ---
> .mailmap| 1 +
> drivers/n
Hi Andrew,
On Feb 5, 2024, at 8:11 AM, Boyer, Andrew wrote:
>
> I see that cnxk has added inline assembly for the ARM "dsb st" barrier. We,
> too, would like to add a use of this instruction. Can a helper function be
> added to the atomics headers?
>
>> drivers/ml/cnxk/cn10k_ml_dev.h:#define
The dmb_st abd dsb_st macros are not used in the code.
Remove them to avoid any confusion.
Signed-off-by: Honnappa Nagarahalli
---
drivers/ml/cnxk/cn10k_ml_dev.h | 9 -
1 file changed, 9 deletions(-)
diff --git a/drivers/ml/cnxk/cn10k_ml_dev.h b/drivers/ml/cnxk/cn10k_ml_dev.h
index
> On Feb 1, 2024, at 3:57 PM, pbhagavat...@marvell.com wrote:
>
> From: Pavan Nikhilesh
>
> Allow RTE_ARM_USE_WFE to be enabled at meson configuration
> time by passing it via c_args instead of modifying
> `config/arm/meson.build`.
>
> Example usage:
> meson build -Dc_args='-DRTE_ARM_USE_WFE'
> On Feb 5, 2024, at 10:10 PM, Wathsala Wathawana Vithanage
> wrote:
>
> Hi Pavan,
>
>> The compiler options march and mtune are a subset of mcpu and will lead to
>> conflicts if improper march is chosen for a given mcpu.
>> To avoid conflicts, force part number march when mcpu is available a
Hello,
Following are the patches planned for 24.03 release.
1) Pointer compression APIs
https://patchwork.dpdk.org/project/dpdk/list/?series=30100
2) Add SVE support for hash bulk key lookup
https://patchwork.dpdk.org/project/dpdk/list/?series=30183
3) Add support for Neoverse V2
https:/
Debug print should use acked token value that was used for comparison.
Fixes: bf386ae377aa ("rcu: add additional debug logs")
Cc: sta...@dpdk.org
Reported-by: Nathan Brown
Signed-off-by: Honnappa Nagarahalli
Reviewed-by: Nathan Brown
---
lib/rcu/rte_rcu_qsbr.h | 9 ++---
1 fi
acked_token should be read using atomic operation as the
the API rte_rcu_qsbr_check is advertised as multi-thread safe.
Fixes: 1f90d32ce175 ("rcu: add least acknowledged token optimization")
Cc: sta...@dpdk.org
Reported-by: Ola Liljedahl
Signed-off-by: Honnappa Nagarahalli
Review
> >
> >>
> >> On Thu, Jan 25, 2024 at 11:10:47PM +0100, Morten Br�rup wrote:
> From: Mattias R�nnblom [mailto:hof...@lysator.liu.se]
> Sent: Thursday, 25 January 2024 19.54
>
> Why do rte_stdatomic.h functions have the suffix "_explicit"?
> Especially
> since the
>
> On Thu, Jan 25, 2024 at 11:10:47PM +0100, Morten Br�rup wrote:
> > > From: Mattias R�nnblom [mailto:hof...@lysator.liu.se]
> > > Sent: Thursday, 25 January 2024 19.54
> > >
> > > Why do rte_stdatomic.h functions have the suffix "_explicit"?
> > > Especially
> > > since there aren't any w
> -Original Message-
> From: Tyler Retzlaff
> Sent: Wednesday, January 24, 2024 4:18 PM
> To: dev@dpdk.org
> Cc: Bruce Richardson ; Honnappa Nagarahalli
> ; Sameh Gobriel
> ; Vladimir Medvedkin
> ; Yipeng Wang ;
> Stephen Hemminger ; Tyler Retzlaff
>
> -Original Message-
> From: Tyler Retzlaff
> Sent: Wednesday, January 24, 2024 4:18 PM
> To: dev@dpdk.org
> Cc: Bruce Richardson ; Honnappa Nagarahalli
> ; Sameh Gobriel
> ; Vladimir Medvedkin
> ; Yipeng Wang ;
> Stephen Hemminger ; Tyler Retzlaff
&g
>
> 02/11/2023 18:28, Bruce Richardson:
> > Add a new small library to make it easier for apps to work with
> > cmdline arguments and build up args to use when initializing EAL.
> >
> > This library is optional, and can be disabled at build time using the
> > disable libraries meson option.
>
>
>
> 08/01/2024 13:10, Luca Vizzarro:
> > Your proposal sounds rather interesting. Certainly enabling DTS to
> > accept YAML-written tests sounds more developer-friendly and should
> > enable quicker test-writing. As this is an extra feature though – and
> > a nice-to-have, it should definitely b
Add meson build configuration for NVIDIA Grace platform
with 64-bit Arm Neoverse V2 cores.
Signed-off-by: Honnappa Nagarahalli
---
config/arm/arm64_grace_linux_gcc | 16
config/arm/meson.build | 10 ++
2 files changed, 26 insertions(+)
create mode 100644
Add Arm Neoverse V2 part number
Signed-off-by: Honnappa Nagarahalli
---
config/arm/meson.build | 10 ++
1 file changed, 10 insertions(+)
diff --git a/config/arm/meson.build b/config/arm/meson.build
index 36f21d2259..18b595ead1 100644
--- a/config/arm/meson.build
+++ b/config/arm
TB Attendees
-
Bruce
Hemant
Honnappa
Jerin
Kevin
Konstantin
Maxime
Morten
Thomas
NOTE: The technical board meetings are on every second Wednesday at 3 pm UTC.
Meetings are public, and DPDK community members are welcome to attend.
Link to join:
https://zoom-lfx.platform.linuxfound
> -Original Message-
> From: Stephen Hemminger
> Sent: Sunday, January 7, 2024 7:59 PM
> To: dev@dpdk.org
> Cc: arshdeep.k...@intel.com; Gowda, Sandesh ;
> Reshma Pattan
> Subject: Issues around packet capture when secondary process is doing rx/tx
>
> I have been looking at a problem
>
> Hello Honnappa,
>
> [snip]
>
> > Hi Gregory,
> >I do not fully understand your proposal, it will be helpful to join
> > the DTS
> meetings to discuss this further.
> >
>
> Agree, let's discuss the proposal details during the DTS meeting.
>
> > YAML has wide support built around
> -Original Message-
> From: Luca Vizzarro
> Sent: Monday, January 8, 2024 6:18 AM
> To: Honnappa Nagarahalli ; Etelson,
> Gregory ; tho...@monjalon.net; Juraj Linkeš
> ; Paul Szczepanek ;
> Yoan Picchi ; Jeremy Spewock
> ; Patrick Robb ; c...@dpdk.org;
> dev@
> -Original Message-
> From: Etelson, Gregory
> Sent: Tuesday, December 26, 2023 1:32 AM
> To: tho...@monjalon.net; Juraj Linkeš ;
> Honnappa Nagarahalli ; Paul Szczepanek
> ; Luca Vizzarro ; Yoan
> Picchi ; Jeremy Spewock
> ; Gregory Etelson ; Patrick
>
> -Original Message-
> From: Stephen Hemminger
> Sent: Sunday, January 7, 2024 11:37 AM
> To: dev@dpdk.org
> Subject: unnecessary rx callbacks when zero packets
>
> I noticed while looking at packet capture that currently the receive callbacks
> get called even if there are no packets.
> -Original Message-
> From: David Marchand
> Sent: Friday, December 8, 2023 9:00 AM
> To: dev@dpdk.org
> Cc: tho...@monjalon.net; ferruh.yi...@amd.com;
> bruce.richard...@intel.com; step...@networkplumber.org;
> m...@smartsharesystems.com; Honnappa Nagarahalli
>
> -Original Message-
> From: Morten Brørup
> Sent: Friday, November 10, 2023 4:44 AM
> To: Konstantin Ananyev ; Ruifeng Wang
> ; Honnappa Nagarahalli
>
> Cc: dev@dpdk.org; david.march...@redhat.com; olivier.m...@6wind.com;
> Dharmik Jayesh Thakkar ; nd
> ; an
> -Original Message-
> From: Morten Brørup
> Sent: Friday, November 3, 2023 7:04 PM
> To: Phil Yang ; Honnappa Nagarahalli
> ; Ruifeng Wang
> ; dev@dpdk.org
> Cc: david.march...@redhat.com; olivier.m...@6wind.com; Dharmik Jayesh
> Thakkar ; Gavin H
> -Original Message-
> From: Morten Brørup
> Sent: Friday, October 6, 2023 10:53 AM
> To: Honnappa Nagarahalli ; Harman Kalra
> ; Anatoly Burakov ; David
> Hunt
> Cc: dev@dpdk.org; nd ; nd
> Subject: RE: How to rte_epoll_wait for IPC?
>
>
Minutes of Technical Board Meeting, 2023-August-23
Members Attending
-
-Aaron
-Bruce
-Hemant
-Honnappa (Chair)
-Jerin
-Kevin
-Maxime
-Stephen
NOTE: The technical board meetings every second Wednesday at
https://meet.jit.si/DPDK at 3 pm UTC.
Meetings are public, and DPDK communit
Hello,
Following is the roadmap for DTS for 23.11 release.
1) DTS API document auto generation
https://patches.dpdk.org/project/dpdk/cover/20230831100407.59865-1-juraj.lin...@pantheon.tech/
2) Scatter test suite along with TG packet manipulation and verification
https://patches.dpdk.org/p
> -Original Message-
> From: Thomas Monjalon
> Sent: Monday, October 9, 2023 10:54 AM
> To: Paul Szczepanek
> Cc: dev@dpdk.org; Honnappa Nagarahalli ;
> Kamalakshitha Aligeri
> Subject: Re: [RFC 1/2] eal: add pointer compression functions
>
> 27/09/
> -Original Message-
> From: Morten Brørup
> Sent: Friday, October 6, 2023 5:04 AM
> To: Harman Kalra ; Anatoly Burakov
> ; David Hunt
> Cc: dev@dpdk.org
> Subject: How to rte_epoll_wait for IPC?
>
> Dear Harman, Anatoly and David,
>
> I have been looking somewhat into power manageme
> -Original Message-
> From: Morten Brørup
> Sent: Monday, September 18, 2023 2:08 AM
> To: techbo...@dpdk.org; maxime.coque...@redhat.com
> Cc: dev@dpdk.org; Ferruh Yigit ;
> andrew.rybche...@oktetlabs.ru; Christian Koue Muf ;
> Renyong Wan
> Subject: Process for adding a new driver?
> -Original Message-
> From: Mattias Rönnblom
> Sent: Wednesday, September 13, 2023 10:48 AM
> To: Sevincer, Abdullah ; Stephen Hemminger
> ; tho...@monjalon.net
> Cc: dev@dpdk.org; Tyler Retzlaff
> Subject: Re: quick thread in DLB2
>
> On 2023-09-11 16:28, Sevincer, Abdullah wrote:
>
> -Original Message-
> From: Konstantin Ananyev
> Sent: Monday, September 4, 2023 5:13 AM
> To: Honnappa Nagarahalli ;
> jack...@nvidia.com; konstantin.v.anan...@yandex.ru
> Cc: dev@dpdk.org; Ruifeng Wang ; Aditya
> Ambadipudi ; Wathsala Wathawana Vithanage
> ;
>
> > From: Mattias Rönnblom [mailto:hof...@lysator.liu.se]
> > Sent: Thursday, 24 August 2023 12.53
> >
> > On 2023-08-24 10:05, Morten Brørup wrote:
> > >> From: Honnappa Nagarahalli [mailto:honnappa.nagaraha...@arm.com]
> > >> Sent: Tuesda
> >> Subject: Re: [RFC] lib/st_ring: add single thread ring
> >>
> >> On 2023-08-21 08:04, Honnappa Nagarahalli wrote:
> >>> Add a single thread safe and multi-thread unsafe ring data structure.
> >>
> >> One must have set the bar ver
> -Original Message-
> From: Morten Brørup
> Sent: Monday, August 21, 2023 2:37 AM
> To: Honnappa Nagarahalli ;
> jack...@nvidia.com; konstantin.v.anan...@yandex.ru
> Cc: dev@dpdk.org; Ruifeng Wang ; Aditya
> Ambadipudi ; Wathsala Wathawana Vithanage
> ; nd
> -Original Message-
> From: Mattias Rönnblom
> Sent: Monday, August 21, 2023 4:14 PM
> To: Honnappa Nagarahalli ;
> jack...@nvidia.com; konstantin.v.anan...@yandex.ru
> Cc: dev@dpdk.org; Ruifeng Wang ; Aditya
> Ambadipudi ; Wathsala Wathawana
> Vithanage ; nd
> >
> > On 2023/8/18 12:30, Honnappa Nagarahalli wrote:
> >
> >
> >
> >
> >
> > -Original Message-
> >
> > From: Jack Min
> > <mailto:jack...@nvidia.com>
> >
> >
It would be good if you could fix the email on your side to text format.
Comments inline.
From: Jack Min
Sent: Friday, August 18, 2023 8:35 PM
To: Honnappa Nagarahalli ; Stephen Hemminger
Cc: dev@dpdk.org; Matan Azrad ; viachesl...@nvidia.com; Tyler
Retzlaff ; Wathsala Wathawana Vithanage
Add a single thread safe and multi-thread unsafe ring data structure.
This library provides an simple and efficient alternative to multi-thread
safe ring when multi-thread safety is not required.
Signed-off-by: Honnappa Nagarahalli
---
v1:
1) The code is very prelimnary and is not even compiled
> -Original Message-
> From: Morten Brørup
> Sent: Sunday, August 20, 2023 4:24 AM
> To: dev@dpdk.org
> Cc: Honnappa Nagarahalli ;
> konstantin.v.anan...@yandex.ru
> Subject: Ring library optimization idea
>
> Most of the fast path ring library functions
From: Jack Min
Sent: Friday, August 18, 2023 12:57 AM
To: Honnappa Nagarahalli ; Stephen Hemminger
Cc: dev@dpdk.org; Matan Azrad ; viachesl...@nvidia.com; Tyler
Retzlaff ; Wathsala Wathawana Vithanage
; nd
Subject: Re: MLX5 PMD access ring library private data
On 2023/8/18 12:30, Honnappa
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