> On Feb 20, 2024, at 2:28 AM, Ferruh Yigit <ferruh.yi...@amd.com> wrote:
>
> On 2/16/2024 5:07 PM, Andrew Boyer wrote:
>> +#if defined(RTE_LIBRTE_IONIC_PMD_BARRIER_ERRATA)
>> + /* On some devices the standard 'dmb' barrier is insufficient */
>> + asm volatile("dsb st" : : : "memory");
>> + rte_write64_relaxed(rte_cpu_to_le_64(val), q->db);
>> +#else
>> rte_write64(rte_cpu_to_le_64(val), q->db);
>> +#endif
>>
>
> Hi Honnappa, Ruifeng,
>
> Should we have an API for the above asm instruction? What do you think?
We do not expect “dsb st” to be used as per the architecture in DPDK. This is
being used here due to a hardware errata. Hence, we do not need an API for this.
>
