cyyself wrote:
I have a question: SpacemiT-X60 does not support Zicclsm on Vector, which is
the same as K230, as discussed in #88029 . Is the Zicclsm safe here?
https://github.com/llvm/llvm-project/pull/94564
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https://github.com/sunshaoce closed
https://github.com/llvm/llvm-project/pull/94564
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https://github.com/michaelmaitland approved this pull request.
LGTM
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@@ -381,3 +381,20 @@ def XIANGSHAN_NANHU :
RISCVProcessorModel<"xiangshan-nanhu",
TuneZExtHFusion,
TuneZExtWFusion,
TuneShiftedZExtWFusion]>;
+
+
https://github.com/sunshaoce updated
https://github.com/llvm/llvm-project/pull/94564
>From 363e29385277c049bc91a86e76ff6f6ae70ceaa9 Mon Sep 17 00:00:00 2001
From: Shao-Ce SUN
Date: Thu, 6 Jun 2024 12:05:33 +0800
Subject: [PATCH 1/8] [RISCV] Add processor definition for Spacemit-K1
---
clang/t
@@ -381,3 +381,20 @@ def XIANGSHAN_NANHU :
RISCVProcessorModel<"xiangshan-nanhu",
TuneZExtHFusion,
TuneZExtWFusion,
TuneShiftedZExtWFusion]>;
+
+
https://github.com/topperc deleted
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@@ -381,3 +381,20 @@ def XIANGSHAN_NANHU :
RISCVProcessorModel<"xiangshan-nanhu",
TuneZExtHFusion,
TuneZExtWFusion,
TuneShiftedZExtWFusion]>;
+
+
@@ -381,3 +381,20 @@ def XIANGSHAN_NANHU :
RISCVProcessorModel<"xiangshan-nanhu",
TuneZExtHFusion,
TuneZExtWFusion,
TuneShiftedZExtWFusion]>;
+
+
https://github.com/sunshaoce edited
https://github.com/llvm/llvm-project/pull/94564
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@@ -381,3 +381,20 @@ def XIANGSHAN_NANHU :
RISCVProcessorModel<"xiangshan-nanhu",
TuneZExtHFusion,
TuneZExtWFusion,
TuneShiftedZExtWFusion]>;
+
+
https://github.com/wangpc-pp edited
https://github.com/llvm/llvm-project/pull/94564
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@@ -381,3 +381,20 @@ def XIANGSHAN_NANHU :
RISCVProcessorModel<"xiangshan-nanhu",
TuneZExtHFusion,
TuneZExtWFusion,
TuneShiftedZExtWFusion]>;
+
+
https://github.com/wangpc-pp approved this pull request.
LGTM.
https://github.com/llvm/llvm-project/pull/94564
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sunshaoce wrote:
> Could you explain these numbers? It looks like data in some columns is
> missing.
I only ran the default `base metrics` once. The geometric mean of this
`Estimated Base Ratio` column can be regarded as the comprehensive score for
this item.
[Q14. What is the difference be
michaelmaitland wrote:
Could you explain these numbers? It looks like data in some columns is missing.
https://github.com/llvm/llvm-project/pull/94564
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sunshaoce wrote:
I've tested this patch with `spec 2006 int`. Everything seems to be running
smoothly:
```
Estimated Estimated
Base Base BasePeak Peak Peak
Benchmarks Ref. Run Time Rati
@@ -381,3 +381,21 @@ def XIANGSHAN_NANHU :
RISCVProcessorModel<"xiangshan-nanhu",
TuneZExtHFusion,
TuneZExtWFusion,
TuneShiftedZExtWFusion]>;
+
+
@@ -381,3 +381,21 @@ def XIANGSHAN_NANHU :
RISCVProcessorModel<"xiangshan-nanhu",
TuneZExtHFusion,
TuneZExtWFusion,
TuneShiftedZExtWFusion]>;
+
+
https://github.com/sunshaoce updated
https://github.com/llvm/llvm-project/pull/94564
>From 363e29385277c049bc91a86e76ff6f6ae70ceaa9 Mon Sep 17 00:00:00 2001
From: Shao-Ce SUN
Date: Thu, 6 Jun 2024 12:05:33 +0800
Subject: [PATCH 1/7] [RISCV] Add processor definition for Spacemit-K1
---
clang/t
@@ -381,3 +381,21 @@ def XIANGSHAN_NANHU :
RISCVProcessorModel<"xiangshan-nanhu",
TuneZExtHFusion,
TuneZExtWFusion,
TuneShiftedZExtWFusion]>;
+
+
@@ -381,3 +381,21 @@ def XIANGSHAN_NANHU :
RISCVProcessorModel<"xiangshan-nanhu",
TuneZExtHFusion,
TuneZExtWFusion,
TuneShiftedZExtWFusion]>;
+
+
sunshaoce wrote:
Added:
- Sscofpmf
- Sstc
- Zvkt
- TuneDLenFactor2
Removed:
- Zvl32b
- Zvl64b
- Zvl128b
https://github.com/llvm/llvm-project/pull/94564
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https://github.com/sunshaoce updated
https://github.com/llvm/llvm-project/pull/94564
>From 363e29385277c049bc91a86e76ff6f6ae70ceaa9 Mon Sep 17 00:00:00 2001
From: Shao-Ce SUN
Date: Thu, 6 Jun 2024 12:05:33 +0800
Subject: [PATCH 1/6] [RISCV] Add processor definition for Spacemit-K1
---
clang/t
@@ -381,3 +381,20 @@ def XIANGSHAN_NANHU :
RISCVProcessorModel<"xiangshan-nanhu",
TuneZExtHFusion,
TuneZExtWFusion,
TuneShiftedZExtWFusion]>;
+
+
https://github.com/sunshaoce edited
https://github.com/llvm/llvm-project/pull/94564
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preames wrote:
> Will this core have active support on the LLVM side?
I can't speak for the vendor, but I'll say that I'm interested in having this
supported upstream. This looks to be a reasonable rva22 dev board w/V1.0, and
having in tree support seems worthwhile. I've ordered one of these
michaelmaitland wrote:
I want to circle back to a comment made by @asb
[here](https://github.com/llvm/llvm-project/pull/70294#issuecomment-1782282361):
> it's obvious that commercial designs with active support should go in
Since this is in BPi-F3, I think that it constitutes as a commercial d
https://github.com/preames edited
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@@ -381,3 +381,20 @@ def XIANGSHAN_NANHU :
RISCVProcessorModel<"xiangshan-nanhu",
TuneZExtHFusion,
TuneZExtWFusion,
TuneShiftedZExtWFusion]>;
+
+
@@ -381,3 +381,20 @@ def XIANGSHAN_NANHU :
RISCVProcessorModel<"xiangshan-nanhu",
TuneZExtHFusion,
TuneZExtWFusion,
TuneShiftedZExtWFusion]>;
+
+
@@ -381,3 +381,20 @@ def XIANGSHAN_NANHU :
RISCVProcessorModel<"xiangshan-nanhu",
TuneZExtHFusion,
TuneZExtWFusion,
TuneShiftedZExtWFusion]>;
+
+
@@ -381,3 +381,20 @@ def XIANGSHAN_NANHU :
RISCVProcessorModel<"xiangshan-nanhu",
TuneZExtHFusion,
TuneZExtWFusion,
TuneShiftedZExtWFusion]>;
+
+
https://github.com/preames edited
https://github.com/llvm/llvm-project/pull/94564
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https://github.com/preames requested changes to this pull request.
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sunshaoce wrote:
All done. Thanks!
Is there anything else that needs to be modified?
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https://github.com/sunshaoce edited
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https://github.com/llvm/llvm-project/pull/94564
>From 363e29385277c049bc91a86e76ff6f6ae70ceaa9 Mon Sep 17 00:00:00 2001
From: Shao-Ce SUN
Date: Thu, 6 Jun 2024 12:05:33 +0800
Subject: [PATCH 1/5] [RISCV] Add processor definition for Spacemit-K1
---
clang/t
wangpc-pp wrote:
The description needs to be revised.
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zqb-all wrote:
LGTM. x60 also supports `svnapot`, and although it seems to have no impact on
compiler behavior, I see that it is defined in llvm and is part of RVA23, so it
might be worth adding it as well.
https://github.com/llvm/llvm-project/pull/94564
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https://github.com/dtcxzyw approved this pull request.
LGTM. But I think it needs a double check by spacemit staffs.
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https://github.com/sunshaoce updated
https://github.com/llvm/llvm-project/pull/94564
>From 363e29385277c049bc91a86e76ff6f6ae70ceaa9 Mon Sep 17 00:00:00 2001
From: Shao-Ce SUN
Date: Thu, 6 Jun 2024 12:05:33 +0800
Subject: [PATCH 1/4] [RISCV] Add processor definition for Spacemit-K1
---
clang/t
zqb-all wrote:
Need to add zicond, which is not in RVA22S64Features
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