================
@@ -381,3 +381,20 @@ def XIANGSHAN_NANHU :
RISCVProcessorModel<"xiangshan-nanhu",
TuneZExtHFusion,
TuneZExtWFusion,
TuneShiftedZExtWFusion]>;
+
+def SPACEMIT_X60 : RISCVProcessorModel<"spacemit-x60",
+ NoSchedModel,
+ !listconcat(RVA22S64Features,
+ [FeatureStdExtV,
+ FeatureStdExtSscofpmf,
+ FeatureStdExtSstc,
+ FeatureStdExtSvnapot,
+ FeatureStdExtZbc,
+ FeatureStdExtZbkc,
+ FeatureStdExtZfh,
+ FeatureStdExtZicond,
+ FeatureStdExtZmmul,
----------------
sunshaoce wrote:
Addressed. Thanks!
https://github.com/llvm/llvm-project/pull/94564
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