ive to
> each other, and the packet rate drops through the floor until they stop
> having relative motion. And I assume that also applies to time-varying
> path-loss and path-distance (multipath reflections).
So is it time to mount test stations on model r
can be rather sophisticated.
Increased levels of sophistication in both the AQM and the endpoint's
congestion control algorithm may be used to increase the "network power"
actually obtained. The required level of complexity for each, achieving
reasonably good res
criterion 2 being
false. The number of flows going to even a family household is probably in the
low dozens at best. A control-theory approach can also work here.
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based/paced sending with limiting the amount of inflight data
So this corresponds to approach a) in Roland's taxonomy.
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ose bursts
are not lost, the flows experiencing them are not disadvantaged and the
so-called "capture effect" will not occur.
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ting limit resistors. You won't notice the
change in brightness, and the LEDs will last much longer. And if there
*aren't* any limit resistors - well, there's yer problem.
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mine. You then only need to remember which way
round to fit them.
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ot;Lite" would probably then be
sufficient.
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hat bottleneck is why SQM can't reach wire speed on that class of
hardware.
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-performance wifi AP, but it'll
handle the speed just fine, with SQM, over Ethernet. You should be able to
attach a dedicated bridge AP to it.
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> On 9 Mar, 2021, at 10:38 pm, Dave Taht wrote:
>
> sudo sysctl -w net.inet.tcp.disable_tcp_heuristics=1
Now that might well be the missing link. I think we missed it before since it
doesn't have "ecn" in its name.
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ch was
very much not the case some years ago). However, there's no tariff at any
convenient level between 1Mbps (poverty tariff) and 50Mbps (probably radio
limited on a single carrier).
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k itself, but in the consumer-end modem.
This is fixable, just as soon as Starlink put their minds to it, because it's
based on the same Atheros SoCs as the consumer CPE we're already familiar with.
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> On 4 Apr, 2020, at 2:08 am, Joel Wirāmu Pauling wrote:
>
> 128G of Ram
That's somewhat more than I have in my desktop PCs. Did you mean 128MB?
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> On 3 Dec, 2019, at 7:14 pm, Dave Taht wrote:
>
> http://www.dslreports.com/speedtest/results/isp/r2823-telenor-internet
Yes, they tell me they have fq_codel deployed on their fixed-line networks.
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is based on. Custom firmware, sticker
over the logo… it works well.
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but
> approximately half a second to the one-way path delay, with potentially
> thousands of packets existing only as radio waves in the distance between,
> not in a queue.
Continuing my train of thought, what Kleinrock really implies is that the cwnd
should *exceed* the native
hop adds only two nodes but approximately
half a second to the one-way path delay, with potentially thousands of packets
existing only as radio waves in the distance between, not in a queue.
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bly have strict priority over the
global classes but which Should Not be sent over the core network, and Should
be interpreted as Low Priority if encountered by a device not specifically
configured to understand them.
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ame way you'd *normally*
write a number down.
The TOS field can sometimes be confusing because the DSCP field is the upper 6
bits and the ECN field the lower 2, and the BSD Sockets API gives you the while
byte to work with while DSCPs are quoted as just their own 6 bits. So you have
to shi
nk logo. I'm not sure that it supports 802.11ac, but
it does work fine in my setup.
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> On 10 Jan, 2019, at 4:07 am, Dave Taht wrote:
>
> a netnews thread from 1988:
>
> https://web.archive.org/web/20030718205943/http://www-mice.cs.ucl.ac.uk:80/multimedia/misc/tcp_ip/8813.mm.www/0178.html
Obligatory: https://www.youtube.com/watch?v=LRq_SAuQDec
-
gt; ago).
I wonder if it's worth extracting the triple-isolate and set-associative hash
logic from Cake for this purpose? The interface to COBALT is clean enough to
be replaced by other AQMs relatively easily.
- Jonathan Morton
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ecessary. Then write the necessary
software in assembly, which can be translated to machine code (or at least
verified) by hand if you're truly paranoid, and toggle it in byte by byte on
the front panel.
Good luck getting a web browser ru
re you could use those addresses in a closed, controlled laboratory
network - but not in anything you plan to deploy commercially or publicly. It
would be better to use IPv6, IMHO.
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llowances from each over the same physical cable connection.
The better question would be: "what happens if/when comcast notices?"
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omised the device enough to
run a botnet anyway.
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Indeed - and conversely, there may be interference that the transmitter can
hear clearly but which is irrelevant to the intended receiver. In that
case, any form of LBT will be needlessly conservative.
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, or indirectly by
observing packet loss by dint of missing acknowledgements returned to the
transmitter.
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radeoff, of course, is that
orthogonal coding permits a reduction in waiting to transmit, but requires a
reduction in data rate during the transmission. I'm sure other people have
better data on that than I do.
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utually coordinating APs if necessary.
The above paragraph is obviously a giant handwave...
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> On 30 Jul, 2018, at 3:30 am, Dave Taht wrote:
>
> http://linuxgizmos.com/darpa-launches-posh-project-for-open-source-hardware-ip-blocks/
The $1.5B figure is overall for the fund, POSH got a few tens of millions.
- Jonathan Morton
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obviously have a lot more resources than we do. What could *we* do with
that level of funding and organisation? Take six months, and put out a router
that *doesn't* suck for a change!
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re padding to be naturally aligned in the packet.
This would give a way to halt slow-start when it reaches roughly the correct
window size, instead of having it overshoot first. It would also give a way to
gently control the cwnd to the ideal value while in steady-state, instead of
oscillating
> On 21 Jul, 2018, at 8:20 pm, Georgios Amanakis wrote:
>
> I got the same result as you. This is using latest cake.
I'd like to see a tcptrace of what's going on here. A packet capture with
snaplen 100 should allow me to generate one.
like MyHDL (based on
Python) is a tolerable alternative to coding directly in VHDL or Verilog, and
can output the latter to be consumed by Xilinx' official toolchains somehow.
I still dream of putting something very like Cake into hardware *and* not
having
> On 22 Jun, 2018, at 8:32 am, Dave Taht wrote:
>
>> Question: does anybody know what hides behind eero's sqm name?
>
> It's the sqm-scripts.
So, the likelihood of them adopting Cake is…? :-)
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and there's nothing theoretically stopping something similar being
put into future HardMAC implementations. If we get the choice of hardware,
naturally we choose wisely.
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> On 19 Jun, 2018, at 1:43 am, dpr...@deepplum.com wrote:
>
> So, no, the Network Neutrality people are NOT the problem with Bufferbloat.
No, but I think it's fair to point towards corporate greed and political
ignorance as common causes of both problems.
- J
loat
education. There are a few other reviewers who are probably capable of being
educated, as well, though they're less aware up-front.
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y of collision, given random trajectories, depends on the
sizes of *both* objects involved - and rather more strongly on the size of the
*larger* object. If you reduce the size of a 10cm object by 50%, it has much
less effect on the combined collision radius than reduc
Hear, hear.
Besides - exactly how is "securely sending messages to the web" useful in
any way? That's the part I've never been able to figure out about the IoT
nonsense.
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on't do that on a virtualised box, but you can do it
on hardware you own and operate yourself with no untrusted code.
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t 2 is a wider problem, for which ARM has produced mitigation strategies
and patches, and Variant 1 is a near-universal problem for out-of-order CPUs
running untrusted code.
Also, I think ARM is in a good position to remove or reduce exposure to these
attacks in future core designs, including new
> On 5 Jan, 2018, at 5:35 pm, dpr...@deepplum.com wrote:
>
> Of course the "press" wants everyone to be superafraid, so if they can say
> "KVM is affected" that causes the mob to start running for the exits!
Meanwhile, in XKCD land...
https://xk
syscalls. The same is likely true for any other
affected CPUs.
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e.com/watch?v=4U9MI0u2VIE
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nlikely to find in CPE).
But not on most ARM cores, nor on AMD CPUs. These all do their security checks
more promptly, so the rogue data never reaches either a shadow register nor an
execution unit, even under speculative execution.
The conceptually simplest mitigation turns out to
. These are all in-order
execution CPUs with short pipelines, and I think they're representative of what
you'd want in CPE.
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tion). Apparently there are also mitigations for Spectre v1 and v2 which
have minimal performance impact; Meltdown is the one which has a big
performance cost to deal with.
Probably some ARM and PowerPC server vendors could get a boost too, but only
after their exposure to these attacks has been prope
ver folks, OTOH...
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much on consumer PCs or routers, even if they do use Intel x86 CPUs, except
for the performance impact we might see where the mitigation is in place. The
performance impact would primarily affect system calls and context switches, I
think, with much less impact on general computation.
It looks nasty, but if it's a hardware bug then it's likely applicable only
to specific CPUs.
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sising the importance of measurement timescales is consistently
underrated in the industry and in academia alike. An hour-long bucket of
traffic tells you about a very different set of characteristics than a
millisecond-long bucket, and there are several timescales between those
extremes of great pra
Ten times average demand estimated at time of deployment, and struggling
badly with peak demand a decade later, yes. And this is the transportation
industry, where a decade is a *short* time - like less than a year in
telecoms.
- Jonathan Morton
On 13 Dec 2017 17:27, "Neil Davies" wrot
ool at the same time every day. That breaks the
assumptions behind pure statistical multiplexing, and requires a greater
provisioning factor.
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lot* of Spanish speakers
in the Nova’s target market.
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approach and the ath9k work - purely to illuminate
whether the proprietary or open-source approaches are more effective in
practice.
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ing such patents and courts from hearing cases brought
on them.
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ISPs, such as Virgin Media's Superhub 3 and Comcast's top-end Xfinity
> boxes. There are other brands, such as Linksys and Cisco, that use the
> system-on-chip that may also be affected."
I do have to ask: the Atom isn’t very powerful, but WTF is it doing
> On 17 Sep, 2016, at 21:34, Maciej Soltysiak wrote:
>
> Cake and fq_codel work on all packets and aim to signal packet loss early to
> network stacks by dropping; BBR works on TCP and aims to prevent packet loss.
By dropping, *or* by ECN marking. The latter avoids packet loss.
e reordering packets within the same flow.
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IP addresses occur while traversing the router. Cake can therefore
see the correct addresses without probing conntrack data.
There's still a huge number of people on IPv4 NAT though.
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> On 29 Jun, 2016, at 03:32, Dave Taht wrote:
>
> 10 cores, including a pair of A72s
>
> http://www.androidheadlines.com/2016/06/helio-x20-development-board-announced-by-mediatek.html
> 802.11b/g/n Wi-Fi
That it’s not AC suggests it’s an existing design.
for one purpose or the
other, but not both. This is quite common practice in the embedded world.
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sed, but is retained in the newer versions to
preserve compatibility.
I agree however that none of the R-Pis make good routers at the performance
levels we want. They just don’t have the right kind of I/O: we need direct or
PCIe attachment of Ethernet and wifi MACs, not USB and SDIO.
e, but
ARMv6 machines were usually expected to use softfp (or even softfloat) builds
originally intended for ARMv5. Since the R-Pi was obviously going to be a
“platform standard” and would always include an FPU, the effort of producing a
proper ARMv6-hf build
gt; complex device. If I do it right, it should be able to be a good
> interface for any switch/firewall.
>
> for too long, people have made network infrastructure device user
> interfaces complicated. It's time to make them simple.
I may have some ideas
ults they
obtained would have any relevance to a realistic Internet application.
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a daemon which can listen for and
produce raw Ethernet frames using some unused protocol number. It might even
turn out to be quite easy.
One quick-and-dirty solution would be to bring up an IP address (or just an ARP
daemon) on the target host, then use arping.
-
ar as peak latency is
concerned. Just because RAM is cheap these days…
For anything above switch class (ie. with visibility at Layer 3 rather than 2),
I would consider AQM mandatory to support a claim of “unbloated". Even if it’s
just WRED
> On 3 May, 2016, at 04:26, Dave Taht wrote:
>
> the onboard wifi is bcm4336
I think this implies it’s attached over SDIO, as in the R-Pi 3. It won’t be
fast.
But the Ethernet should be full performance, at least. That’s built into the
SoC.
- Jonath
at least) replace the mini-PCIe card
supporting three of the Ethernet ports with one of your choice, and still have
one GigE port.
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r, “wireless”
operation is “simpler” and “neater”, no matter what form it takes. They hardly
even notice any performance problems that come with it, or accept them as a
fact of life with "newfangled technological thingamajigs”.
- Jonathan Morton
andwidth links where latency is a bigger contributor to Web performance
and only larger transfers (which tend to already be compressed) would benefit.
I suspect most PPPoE endpoints in the wild won’t accept compression negotiation.
The default is almost certainly off, and you should keep it th
> On 9 Apr, 2016, at 04:22, Dave Taht wrote:
>
> I will put in a comment to the eu tomorrow. Michiel's rhetoric hit me
> where I live. We gotta fix what we got.
>
> from: https://nlnet.nl/people/leenaars/ec/
I have submitted a detailed respon
> On 31 Mar, 2016, at 07:35, Dave Taht wrote:
>
> https://bugzilla.kernel.org/show_bug.cgi?id=109581
In essence, HFSC doesn’t seem to like it when its leaf qdiscs do anything
interesting with the packets it expects to see.
- Jonath
MD’s system, but they could be.
Their APUs have a Cortex-A5 based “secure processor” which could in principle
be tied into the firmware-loading process, and probably has its own secure ROM.
A Cortex-M microcontroller core and ROM to do the job on a GPU would be tiny
ards) open for experimentation and
improvement.
These are compatible goals, at the fundamental level, but there is a practical
problem with existing implementations which mix the layers inappropriately.
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t Web configuration
interfaces - they are impossible to secure in the factory-fresh state.
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. The famous 3310 sold “only”
150 million - and I still have mine. It’s on its third battery, which lasts an
entire week on standby.
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ly in a different place on each device, making it hard to give
directions remotely.
But with the wifi SSID and password visible on-screen, we wouldn’t need WPS.
That’s something an ordinary router can’t do.
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is to get away from the “web interface”
concept altogether, and I have an allergic reaction to “web technology” such as
JavaScript (spit), that’s *not* what I’m going to do. Instead, I’ll prototype
something based around an emulation of the display linke
ier setup.
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ink.
If you want to copy that, here’s the board - if you can still find it on sale -
and the case:
https://www.asus.com/Motherboards/E45M1I_DELUXE/
http://www.cartft.com/catalog/il/1058
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> On 4 Mar, 2016, at 04:47, Jonathan Morton wrote:
>
> It’s also possible to reduce the cost a bit further if that’s a factor.
Here’s an alternative version that’s noticeably cheaper and gives you *three*
Ethernet ports and a mini-PCIe slot. The CPU is a little weaker, that’s all
It’s not as small as a NUC, but it’s not very large either. It’s also possible
to reduce the cost a bit further if that’s a factor.
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nificantly older) on amd64. I do have a mips
router and some armv6/7 units as well, but I haven’t actively been using them
for testing - it shouldn’t be any harder to get it running *just* because it’s
mips, though.
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> On 18 Jan, 2016, at 18:14, Michael Richardson wrote:
>
> Jonathan Morton wrote:
>> I haven’t yet found a robust way to automatically sense link capacity from
>> the upstream side. You’ll therefore need to set a conservative static
>> value for the uplink capacity
on, for me, is the ability to change "hash type" so
> that ESFQ allocates bandwidth fairly per source IP rather than per connection.
You might want to read the recent thread on the Cake list about “triple flow
isolation”. That does everything ESFQ does
latency, which should be considerably
less than the estimated RTT; you really don’t want to be consistently adding
60ms of queuing on top of your 60ms inherent 3G latency.
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tically sense link capacity from the
upstream side. You’ll therefore need to set a conservative static value for
the uplink capacity.
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For 25/25, a 3800 with cake will do fine.
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ssuming it’s working at all.
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lights on technical
equipment - even at the consumer level. By watching the lights, you might have
noticed sooner that traffic wasn’t going the way you expected.
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p is correct.
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> On 5 Sep, 2015, at 17:12, Rich Brown wrote:
>
> Please post a link to your comments when you're done.
I couldn’t figure out a way to link to my comment as submitted, so I’ve
attached it to this e-mail instead.
- Jonathan Morton
Comment re: Proposed Rulemaking on Software
Everyone except Apple. They're using the same "Airport Extreme Base
Station" branding as my 2007 draft-n model.
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There's a capability handshake during association, so there's no
compatibility problem. Clients supporting only the single checksum won't
understand multiple-checksum aggregates at all, but the transmitter will
know not to send that type to them.
-
o - but hard-MAC
hardware almost certainly can't be retrofitted in this way.
However, since 'ac' hardware is required to support individual-checksum
aggregation, a dual-band 'ac' card running on 2.4 GHz will effectively be
an 'n' card wi
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