This fix bug 210921 where DRM_INFO floods log when hitting an unsupported ASIC
in
amdgpu_device_asic_has_dc_support(). This info should be only called once.
Signed-off-by: Alexandre Demers
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion
f it applies?
5- Any chance to have some code reviewed even if it still doesn't work
if I send it on this list?
6- I have some patches on the side to help document the code and
define variables (even for Radeon), a few typos fixed, etc. Should I
send them on this list?
Cheers
Alexandre De
On Fri, 2021-01-08 at 10:28 -0500, Alex Deucher wrote:
> On Fri, Jan 8, 2021 at 3:11 AM Christian König
> wrote:
> >
> > Hi Alexandre,
> >
> > Am 08.01.21 um 05:20 schrieb Alexandre Demers:
> > > Hi there,
> > >
> > > Some of you may
On Fri, 2021-01-08 at 15:00 -0500, Alex Deucher wrote:
> On Fri, Jan 8, 2021 at 2:37 PM Alexandre Demers
> wrote:
> >
> >
> > On Fri, 2021-01-08 at 10:28 -0500, Alex Deucher wrote:
> > > On Fri, Jan 8, 2021 at 3:11 AM Christian König
> >
nd people missing the UVD and
VCE features should be the ones overriding the default choice. But this
may not work for the majority (I don't know) and I understand that
radeon is still the default for GCN 1.0/1.1.
Cheers,
Alexandre Demers
On 2019-12-05 10:32, Deucher, Alexander w
config(hwmgr);
*>* + PP_ASSERT_WITH_CODE(0 == result,
*>* + "Failed to setup dpm led config", return result);
*
will always lead to "result" being set to 0... Am I missing something?
Alexandre Demers
__
On Thursday, February 23, 2017, Alex Deucher wrote:
> On Thu, Feb 23, 2017 at 5:50 PM, Alexandre Demers
> > wrote:
> > First, sorry for not replying directly as I should normally, but I'm not
> on
> > my usual computer, so I can't. That being said...
> >
&
We were using the same mask twice. Looking at radeon, it seems
we should be using HDMI_AVI_INFO_CONT instead as the second mask.
Being there, fix typos in comments and improved readability.
I haven't looked at other DCEs, the mask may also be wrong for them.
Signed-off-by: Alexandre D
Fixed indentation for readability.
Signed-off-by: Alexandre Demers
---
drivers/gpu/drm/amd/amdgpu/dce_v8_0.c | 14 +++---
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c
b/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c
index 3ff1258..c7e5d5f
@lists.freedesktop.org] On Behalf
> > Of Alexandre Demers
> > Sent: Sunday, August 21, 2016 8:38 PM
> > To: amd-gfx@lists.freedesktop.org
> > Subject: [PATCH drm/amdgpu] Fix indentation in
> > dce_v8_0_audio_write_sad_regs()
>
> For these and future patches,
ces in the step order and even a few
more registry read and write calls. Any clue will be welcomed.
Cheers.
--
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e the last modifications need
to be done?
Thank you!
Alexandre Demers
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On Wed, 14 Jun 2017 at 13:09 Deucher, Alexander
wrote:
>
>
> *From:* amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] *On Behalf
> Of *Christian König
> *Sent:* Wednesday, June 14, 2017 12:37 PM
> *To:* Alexandre Demers; Freedesktop - AMD-gfx
> *Subject:* Re: Question
keep you up to date.
Alexandre
On Wed, 14 Jun 2017 at 14:22 Deucher, Alexander
wrote:
>
>
> *From:* Alexandre Demers [mailto:alexandre.f.dem...@gmail.com]
> *Sent:* Wednesday, June 14, 2017 1:30 PM
> *To:* Deucher, Alexander; Christian König; Freedesktop - AMD-gfx
>
>
> *
ig one. It is easier to review, comment, test and isolate
problems. Also, about the header you added to the UVD firmware, this is
one way to do it, or you could backport how it is done under radeon.
This is the path I've chosen for now under VCE.
I'll give a look at yo
nce I don't have as much
time as I'd like to work on VCE 1 for now, but this could help others to help
me
on the task.
If you are not satisfied with this first series, this can also be considered as
a RFC. Please, comment as needed.
Alexandre Demers (6):
Add initial VCE_V1_0 file
Signed-off-by: Alexandre Demers
---
drivers/gpu/drm/amd/amdgpu/vce_v1_0.c | 62 ---
1 file changed, 36 insertions(+), 26 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/vce_v1_0.c
b/drivers/gpu/drm/amd/amdgpu/vce_v1_0.c
index f541a4b5ac51..ab3b834758c6
Signed-off-by: Alexandre Demers
---
drivers/gpu/drm/radeon/radeon_uvd.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/radeon/radeon_uvd.c
b/drivers/gpu/drm/radeon/radeon_uvd.c
index 7431eb4a11b7..b4fb07ad9f4a 100644
--- a/drivers/gpu/drm/radeon/radeon_uvd.c
For consistency with other files under amdgpu driver.
Signed-off-by: Alexandre Demers
---
drivers/gpu/drm/amd/amdgpu/si.c| 15 +++-
drivers/gpu/drm/amd/amdgpu/si_dma.c| 5 +-
drivers/gpu/drm/amd/amdgpu/si_ih.c | 21 +++---
drivers/gpu/drm/amd
Signed-off-by: Alexandre Demers
---
drivers/gpu/drm/amd/amdgpu/si.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/si.c b/drivers/gpu/drm/amd/amdgpu/si.c
index 08998639daeb..bb860faa8a95 100644
--- a/drivers/gpu/drm/amd/amdgpu/si.c
+++ b/drivers
Signed-off-by: Alexandre Demers
---
drivers/gpu/drm/amd/amdgpu/vce_v1_0.c | 384 ++
drivers/gpu/drm/amd/amdgpu/vce_v1_0.h | 29 +++
2 files changed, 413 insertions(+)
create mode 100644 drivers/gpu/drm/amd/amdgpu/vce_v1_0.c
create mode 100644 drivers/gpu/drm
Inspired on how it is done under radeon for UVD firmwares.
Signed-off-by: Alexandre Demers
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c | 100
1 file changed, 75 insertions(+), 25 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c
b/drivers/gpu
ost the next series in the next few days as a RFC so others can
help me go through. I just need to split the code in a few patches.
Cheers,
Alex
>
> Thanks,
> Christian.
>
> Am 08.09.2017 um 04:48 schrieb Alexandre Demers:
>> This is the foundation for VCE 1 implementation, mostl
Oh and patch 3 "Small precision when failing to load legacy firmware"
should have been a standalone patch, it is related to the radeon driver.
I'll send it as so with drm/radeon in the title.
Alexandre Demers
On 2017-09-08 07:55, Alexandre Demers wrote:
> Hi Christian!
>
Signed-off-by: Alexandre Demers
---
drivers/gpu/drm/radeon/radeon_uvd.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/radeon/radeon_uvd.c
b/drivers/gpu/drm/radeon/radeon_uvd.c
index 7431eb4a11b7..b4fb07ad9f4a 100644
--- a/drivers/gpu/drm/radeon/radeon_uvd.c
D could release a new UVD
firmware with header and correct 40bit addressing, could you ask if an
official VCE 1.0 firmware with an official header (and whatever else
could be needed) be released at the same time?
Cheers
--
Alexandre Demers
___
amd
On 2017-11-23 00:53, Alexandre Demers wrote:
> Hi,
>
> I just want to let you know that I'm still alive and still committed to
> porting VCE 1.0 from radeon to amdgpu. However, for many reasons, I've
> been pretty much unable to work on the code since my last communica
Hi Flora. I suppose this addition preceeds
AMDGPU_GEM_CREATE_VRAM_CLEARED's usage that will be introduced in
upcoming patches?
Could you fix the commit message VARM -> VRAM?
With that fixed, you can add my Reviewed-by: Alexandre Demers
Alexandre Demers
On 2016-07-22 00:02, F
Forget my question, I just saw your other patches. ;)
Alexandre Demers
On 2016-07-22 02:32, Alexandre Demers wrote:
Hi Flora. I suppose this addition preceeds
AMDGPU_GEM_CREATE_VRAM_CLEARED's usage that will be introduced in
upcoming patches?
Could you fix the commit message VARM -&
Please, keep a similar syntax to other functions and to the file name.
"vce_v3_set_bypass_mode" should be "vce_v3_0_set_bypass_mode".
Alexandre Demers
On 2016-07-21 20:10, Eric Huang wrote:
Looks good to me. Reviewed-by: Eric Huang
Regards,
Eric
On 07/18/2016 12:
Reviewed-by: Alexandre Demers
Alexandre Demers
On 2016-07-27 16:44, Alex Deucher wrote:
The message is harmless and confusing. On PX systems,
there is one ATIF method, but potentially multiple GPUs
leading to an error on the GPU with no backlight control.
Bug: https://bugzilla.kernel.org
me to do it in
comparison. Now, if I can be of any help, let me know, my R9 280X is
waiting for some tests.
Cheers,
--
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Thank you for the update. I'll have a go on it and I'll be following
what goes in it.
Alexandre Demers
On 2016-08-01 17:14, Alex Deucher wrote:
On Mon, Aug 1, 2016 at 2:29 AM, Alexandre Demers
wrote:
Hi Alex,
I'd like to know if there is any chance to see a merge / pull req
t
and/or track with people working on bringing GCN 1.0 (and 1.1) to the
amdgpu driver (I'm able to compare the result of using
radeon+modesetting VS amdgpu+modesetting to put aside bugs that could be
related to modesetting itself).
Cheers
Alexandre Demers
On 2016-08-01 17:14, Alex De
Signed-off-by: Alexandre Demers
---
drivers/gpu/drm/amd/amdgpu/dce_v6_0.c | 22 +++---
1 file changed, 11 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c
b/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c
index 07e0475..9e327be 100644
--- a/drivers/gpu
On Mon, 8 Aug 2016 at 01:22 Huang Rui wrote:
> On Sun, Aug 07, 2016 at 05:17:41PM -0400, Alexandre Demers wrote:
> > Signed-off-by: Alexandre Demers
> >
> > ---
> > drivers/gpu/drm/amd/amdgpu/dce_v6_0.c | 22 +++---
> > 1 file change
functions)?
Thanks for your input.
Alexandre Demers
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of the same
value):
WREG32(mmHDMI_ACR_32_0 + offset, (acr.cts_32khz <<
HDMI_ACR_32_0__HDMI_ACR_CTS_32__SHIFT));
Cheers
--
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Signed-off-by: Alexandre Demers
---
drivers/gpu/drm/amd/amdgpu/dce_v8_0.c | 8 +++-
1 file changed, 3 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c
b/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c
index 4fdfab1..3ff1258 100644
--- a/drivers/gpu/drm/amd/amdgpu
h is already ready if needed, I could send it later from home if
the amdgpu's behavior is the one that we are looking for.
Cheers,
Alexandre Demers
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eaking if you fail to kmalloc a few bytes you've got bigger
> problems to worry about than your audio not working ideally.
>
>
> Tom
>
>
> ------
> *From:* amd-gfx on behalf of
> Alexandre Demers
> *Sent:* Friday, August 12, 2016 11:43
> *To
lly speaking if during
> module init a kmalloc of 100 bytes fails something bad is happening and you
> want to abort init anyways (so failing to load just because part of DCE
> fails is probably a good thing).
>
>
> Tom
>
>
>
>
>
>
that amdgpu is
> meant to support and it's not a critical bugfix (or API update) maybe time
> is better spent getting support on the amdgpu side going for that hardware
> instead.
>
>
> Cheers,
>
> Tom
>
>
> --
> *From:* Alexandre
egression I
could find if requested.
Alexandre Demers
>From e62461803e84c181d6d237e27a215b788d72fa41 Mon Sep 17 00:00:00 2001
From: "chr[]"
Date: Sun, 23 Apr 2023 06:13:47 +0200
Subject: [PATCH] amdgpu: fix suspend/resume issues
resume and irq handler happily races in set_p
Taking the opportunity to add some comments from cik_sdma.c
Signed-off-by: Alexandre Demers
---
drivers/gpu/drm/amd/amdgpu/si_dma.c | 108
drivers/gpu/drm/amd/amdgpu/sid.h| 36 --
2 files changed, 61 insertions(+), 83 deletions(-)
diff --git a/drivers
This cleans up DCE6.
I added some minor tweaks taken from CIK to exit early
Signed-off-by: Alexandre Demers
---
drivers/gpu/drm/amd/amdgpu/dce_v6_0.c | 154 +++
drivers/gpu/drm/amd/amdgpu/si_enums.h | 14 --
drivers/gpu/drm/amd/amdgpu/sid.h | 275
On Mon, Mar 17, 2025 at 11:04 AM Alex Deucher wrote:
>
> On Mon, Mar 17, 2025 at 2:38 AM Alexandre Demers
> wrote:
> >
> > Signed-off-by: Alexandre Demers
> > ---
> > drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c | 338 +++--
> > drivers/g
Move and rename DMA_SEM_INCOMPLETE_TIMER_CNTL and DMA_SEM_WAIT_FAIL_TIMER_CNTL
in oss_1_0_d.h
Signed-off-by: Alexandre Demers
---
drivers/gpu/drm/amd/amdgpu/si_dma.c | 6 +++---
drivers/gpu/drm/amd/amdgpu/sid.h | 2 --
drivers/gpu/drm/amd/include/asic_reg
Replace defines for the ones under smu_6_0_d.h and smu_6_0_sh_mask.h
Signed-off-by: Alexandre Demers
---
drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c | 338 +++--
drivers/gpu/drm/amd/pm/legacy-dpm/si_smc.c | 36 +--
2 files changed, 190 insertions(+), 184 deletions(-)
diff --git
They will be used later when switching away from sid.h/si_enums.h.
To prevent redefinition clashes, comment out the ones in sid.h. They will be
removed later.
Signed-off-by: Alexandre Demers
---
.../drm/amd/include/asic_reg/smu/smu_6_0_d.h | 44
.../include/asic_reg/smu
Send a few GFX6 defines where it's used in GFX6.
Signed-off-by: Alexandre Demers
---
drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c | 3 +++
drivers/gpu/drm/amd/amdgpu/si_enums.h | 2 --
2 files changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c
b/driver
They are properly defined under oss_1_0_d.h
Signed-off-by: Alexandre Demers
---
drivers/gpu/drm/amd/amdgpu/si_ih.c | 16
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/si_ih.c
b/drivers/gpu/drm/amd/amdgpu/si_ih.c
index 94468c87122a
They will be used later when switching away from sid.h/si_enums.h.
Signed-off-by: Alexandre Demers
---
drivers/gpu/drm/amd/include/asic_reg/gca/gfx_6_0_d.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/amd/include/asic_reg/gca/gfx_6_0_d.h
b/drivers/gpu/drm/amd/include
Replace defines for the ones in oss_1_0_d.h and oss_1_0_sh_mask.h
Taking the opportunity to add some comments taken from cik_sdma.c
Signed-off-by: Alexandre Demers
---
drivers/gpu/drm/amd/amdgpu/si_dma.c | 108
drivers/gpu/drm/amd/amdgpu/sid.h| 36
Tidy cik_sdma_hw_init() by returning directly cik_sdma_start()'s result.
Keep amdgpu_cik_gpu_check_soft_reset() early declaration with others.
Signed-off-by: Alexandre Demers
---
drivers/gpu/drm/amd/amdgpu/cik_sdma.c | 12 +++-
1 file changed, 3 insertions(+), 9 deletions(-)
Bring things on a single line and fix spacing.
Signed-off-by: Alexandre Demers
---
drivers/gpu/drm/amd/amdgpu/dce_v8_0.c | 10 +++---
drivers/gpu/drm/amd/amdgpu/vi.c | 8
2 files changed, 11 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c
b
gmc_v7_0_is_idle() does exactly what we need, so use it.
Signed-off-by: Alexandre Demers
---
drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c | 9 +
1 file changed, 1 insertion(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c
b/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c
index
This series tidy up CIK code a bit.
It uses some functions already available to remove redundant code in GMC7
and CIK SDMA.
Some GOLDEN defines are moved into GFX7, the only place where they are used.
It fixes coding style in VI and DCE8.
Alexandre Demers (5):
drm/amdgpu: use gmc_v7_0_is_idle
cik_sdma_is_idle() does exactly what we need, so use it.
Signed-off-by: Alexandre Demers
---
drivers/gpu/drm/amd/amdgpu/cik_sdma.c | 6 +-
1 file changed, 1 insertion(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/cik_sdma.c
b/drivers/gpu/drm/amd/amdgpu/cik_sdma.c
index
This should be titled patch 5/5. There was initially another one in
the lot about radeon. However, it was removed from the series and sent
alone.
Alexandre
On Sat, Mar 22, 2025 at 2:37 PM Alexandre Demers
wrote:
>
> Bring things on a single line and fix spacing.
>
> Signed-off-b
The title's prefix should only indicate [PATCH]. It was part of the
series just sent a moment ago, but it was removed from it because it
concerned drm/radeon.
Alexandre
On Sat, Mar 22, 2025 at 2:39 PM Alexandre Demers
wrote:
>
> While I don't think it is being used anywhere, if
Replace defines by the ones added earlier to GFX6, SMU6 and DCE6
Signed-off-by: Alexandre Demers
---
drivers/gpu/drm/amd/amdgpu/si.c | 369
1 file changed, 185 insertions(+), 184 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/si.c b/drivers/gpu/drm/amd
They will be used later when switching away from sid.h/si_enums.h.
Signed-off-by: Alexandre Demers
---
.../drm/amd/include/asic_reg/oss/oss_1_0_d.h | 21 +++--
.../include/asic_reg/oss/oss_1_0_sh_mask.h| 43 +++
2 files changed, 61 insertions(+), 3 deletions(-)
diff
Use shifts already available in DCE6's defines, masks and shifts.
Signed-off-by: Alexandre Demers
---
drivers/gpu/drm/amd/amdgpu/dce_v6_0.c | 4 ++--
drivers/gpu/drm/amd/amdgpu/sid.h | 8
2 files changed, 2 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/amd/a
[BONAIRE|HAWAII]_GB_ADDR_CONFIG_GOLDEN are only used by GFX7. So keep them
where they are needed.
Signed-off-by: Alexandre Demers
---
drivers/gpu/drm/amd/amdgpu/cikd.h | 3 ---
drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c | 3 +++
2 files changed, 3 insertions(+), 3 deletions(-)
diff --git a
While I don't think it is being used anywhere, if it were used, it would
be wrong. We can base this assumption on MAX_POWER_MASK, where the shift is
by 16 bits.
Signed-off-by: Alexandre Demers
---
drivers/gpu/drm/radeon/sid.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --
I should have written "v2" in the title
Alexandre
On Fri., Mar. 21, 2025, 21:47 Alexandre Demers, <
alexandre.f.dem...@gmail.com> wrote:
> The following series is intented to remove duplicated defines, shifts and
> masks or
> to classify them where they belong. si_e
Signed-off-by: Alexandre Demers
---
.../drm/amd/include/asic_reg/smu/smu_6_0_d.h | 44
.../include/asic_reg/smu/smu_6_0_sh_mask.h| 190 +-
2 files changed, 230 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/amd/include/asic_reg/smu/smu_6_0_d.h
b/drivers
Send a few GFX6 defines where it's used in GFX6.
Signed-off-by: Alexandre Demers
---
drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c | 3 +++
drivers/gpu/drm/amd/amdgpu/si_enums.h | 2 --
2 files changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c
b/driver
Signed-off-by: Alexandre Demers
---
drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c | 338 +++--
drivers/gpu/drm/amd/pm/legacy-dpm/si_smc.c | 36 +--
2 files changed, 190 insertions(+), 184 deletions(-)
diff --git a/drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c
b/drivers/gpu/drm/amd
By replacing VGA_VSTATUS_CNTL by VGA_RENDER_CONTROL__VGA_VSTATUS_CNTL_MASK,
we also need to fix its usage in GMC6.
Note: VGA_VSTATUS_CNTL's binary value was inverted in dce_6_0_sh_mask.h,
so we need to invert its value where it was used.
Signed-off-by: Alexandre Demers
---
drivers/gpu/dr
Signed-off-by: Alexandre Demers
---
.../drm/amd/include/asic_reg/oss/oss_1_0_d.h | 21 +++--
.../include/asic_reg/oss/oss_1_0_sh_mask.h| 43 +++
2 files changed, 61 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/include/asic_reg/oss/oss_1_0_d.h
b
It seems a copy-paste error: since we are working with
mmGRPH_SECONDARY_SURFACE_ADDRESS,
GRPH_SECONDARY_SURFACE_ADDRESS__GRPH_SECONDARY_SURFACE_ADDRESS_MASK
should be used.
Signed-off-by: Alexandre Demers
---
drivers/gpu/drm/amd/amdgpu/dce_v6_0.c | 2 +-
1 file changed, 1 insertion(+), 1
Use shifts already available in DCE6's defines, masks and shifts.
Signed-off-by: Alexandre Demers
---
drivers/gpu/drm/amd/amdgpu/dce_v6_0.c | 4 ++--
drivers/gpu/drm/amd/amdgpu/sid.h | 8
2 files changed, 2 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/amd/a
Signed-off-by: Alexandre Demers
---
drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c | 12
1 file changed, 8 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c
b/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c
index 5f85c3b63971..f34980c79a7e 100644
--- a/drivers/gpu/drm
ported to DCE6,
GFX6 and GMC6 defines, shifts and masks. There location was based on CIK and
later.
However, most of them were already available, but not used where they could be.
This series is running on my PITCAIRN setup without any visible drawbacks.
Alexandre Demers (18):
drm/amdgpu: move
Signed-off-by: Alexandre Demers
---
drivers/gpu/drm/amd/include/asic_reg/gca/gfx_6_0_d.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/amd/include/asic_reg/gca/gfx_6_0_d.h
b/drivers/gpu/drm/amd/include/asic_reg/gca/gfx_6_0_d.h
index c75aee25619e..a1240dd430aa 100644
Now that we are using the proper defines, cleanup useless old "substituted"
defines.
Signed-off-by: Alexandre Demers
---
drivers/gpu/drm/amd/amdgpu/sid.h | 1219 +-
1 file changed, 9 insertions(+), 1210 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdg
PACKET3 is already in sid.h, as it is done under cikd.h for CIK
Signed-off-by: Alexandre Demers
---
drivers/gpu/drm/amd/amdgpu/si_enums.h | 123 --
1 file changed, 123 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/si_enums.h
b/drivers/gpu/drm/amd/amdgpu
Remove more duplicated defines and move some in sid.h for coherence with
CIK.
Signed-off-by: Alexandre Demers
---
drivers/gpu/drm/amd/amdgpu/si_enums.h | 90 +--
drivers/gpu/drm/amd/amdgpu/sid.h | 16 -
2 files changed, 14 insertions(+), 92 deletions(-)
diff
Move and rename DMA_SEM_INCOMPLETE_TIMER_CNTL and DMA_SEM_WAIT_FAIL_TIMER_CNTL
in oss_1_0_d.h
Signed-off-by: Alexandre Demers
---
drivers/gpu/drm/amd/amdgpu/si_dma.c | 6 +++---
drivers/gpu/drm/amd/amdgpu/sid.h | 2 --
drivers/gpu/drm/amd/include/asic_reg
They are properly defined under oss_1_0_d.h
Signed-off-by: Alexandre Demers
---
drivers/gpu/drm/amd/amdgpu/si_ih.c | 16
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/si_ih.c
b/drivers/gpu/drm/amd/amdgpu/si_ih.c
index 94468c87122a
Signed-off-by: Alexandre Demers
---
drivers/gpu/drm/amd/amdgpu/si.c | 369
1 file changed, 185 insertions(+), 184 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/si.c b/drivers/gpu/drm/amd/amdgpu/si.c
index 75d3b7471c68..3b8c65a966b9 100644
--- a/drivers
PACKET3 is already in sid.h, as it is done under cikd.h for CIK
Signed-off-by: Alexandre Demers
---
drivers/gpu/drm/amd/amdgpu/si_enums.h | 123 --
1 file changed, 123 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/si_enums.h
b/drivers/gpu/drm/amd/amdgpu
Just fix the style and add a comment for reading easiness
Signed-off-by: Alexandre Demers
---
drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c | 12
1 file changed, 8 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c
b/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c
Remove more duplicated defines and move some in sid.h for coherence with
CIK.
Signed-off-by: Alexandre Demers
---
drivers/gpu/drm/amd/amdgpu/si_enums.h | 90 +--
drivers/gpu/drm/amd/amdgpu/sid.h | 16 -
2 files changed, 14 insertions(+), 92 deletions(-)
diff
Replace defines by the ones added earlier to GFX6, SMU6 and DCE6
Signed-off-by: Alexandre Demers
---
drivers/gpu/drm/amd/amdgpu/si.c | 369
1 file changed, 185 insertions(+), 184 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/si.c b/drivers/gpu/drm/amd
First patch moves some DCE files around so they are distributed as are
other DCE files
Second patch implements gmc_v6_0_set_clockgating_state(), which was mostly
there, but commented out. A few tweeks were needed to make it work under
amdgpu.
Alexandre Demers (2):
drm/amd/display/dc
This cleans up DCE6.
I added some minor tweaks taken from CIK to exit early
Signed-off-by: Alexandre Demers
---
drivers/gpu/drm/amd/amdgpu/dce_v6_0.c | 154 +++
drivers/gpu/drm/amd/amdgpu/si_enums.h | 14 --
drivers/gpu/drm/amd/amdgpu/sid.h | 275
The defines, shifts and masks are already available in dce_6_0_d.h,
dce_6_0_sh_mask.h.
Signed-off-by: Alexandre Demers
---
drivers/gpu/drm/amd/amdgpu/si.c | 26 +-
drivers/gpu/drm/amd/amdgpu/sid.h | 16
2 files changed, 13 insertions(+), 29 deletions
On Mon, Mar 24, 2025 at 2:21 PM Alex Deucher wrote:
>
> On Sat, Mar 22, 2025 at 2:48 PM Alexandre Demers
> wrote:
> >
> > Bring things on a single line and fix spacing.
> >
> > Signed-off-by: Alexandre Demers
> > ---
> > drivers/gpu/drm/amd/amdgp
On Mon, Mar 24, 2025 at 3:03 PM Alex Deucher wrote:
>
> On Fri, Mar 21, 2025 at 9:48 PM Alexandre Demers
> wrote:
> >
> > They will be used later when switching away from sid.h/si_enums.h.
> >
> > To prevent redefinition clashes, comment out the ones in sid.
Now that we are using the proper defines, cleanup useless old "substituted"
defines.
Signed-off-by: Alexandre Demers
---
drivers/gpu/drm/amd/amdgpu/sid.h | 1219 +-
1 file changed, 9 insertions(+), 1210 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdg
atches 11, 13 and 15: Correct accordingly to patch 10
Alexandre Demers (18):
drm/amdgpu: move GFX6 defines into gfx_v6_0.c
drm/amdgpu: wire up defines, shifts and masks through SI code
drm/amdgpu: use proper defines, shifts and masks in DCE6 code
drm/amdgpu: remove PACKET3 duplicated def
They will be used later when switching away from sid.h/si_enums.h.
Signed-off-by: Alexandre Demers
---
.../drm/amd/include/asic_reg/smu/smu_6_0_d.h | 44
.../include/asic_reg/smu/smu_6_0_sh_mask.h| 190 +-
2 files changed, 230 insertions(+), 4 deletions(-)
diff --git
Replace defines for the ones under smu_6_0_d.h and smu_6_0_sh_mask.h
Signed-off-by: Alexandre Demers
---
drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c | 338 +++--
drivers/gpu/drm/amd/pm/legacy-dpm/si_smc.c | 36 +--
2 files changed, 190 insertions(+), 184 deletions(-)
diff --git
This series goes from fixing typos in amdgpu and radeon to renaming functions
in DCE11.0 so it follows the convention of using a DCE/DCN version prefix for
naming functions.
Alexandre Demers (6):
drm/amdgpu: rename function to follow naming convention in dce110
drm/amdgpu: add missing
"aligned" not "aligend"
Signed-off-by: Alexandre Demers
---
drivers/gpu/drm/amd/include/atombios.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/include/atombios.h
b/drivers/gpu/drm/amd/include/atombios.h
index b78360a71bc9..52bac
i2c_speed_in_khz was set twice with the same values. Looking at other DCE
versions, we probably wanted to set the value for i2c_speed_in_khz_hdcp.
Signed-off-by: Alexandre Demers
---
.../gpu/drm/amd/display/dc/resource/dce100/dce100_resource.c| 2 +-
1 file changed, 1 insertion(+), 1
The prefix dce110 is used on all functions, but init_pipes() and
init_hw(). Under DCN, these sames functions are prefixed.
Let's keep thing coherent.
Signed-off-by: Alexandre Demers
---
drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c | 8
1 file changed, 4 insertions(
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