This fix bug 210921 where DRM_INFO floods log when hitting an unsupported ASIC
in
amdgpu_device_asic_has_dc_support(). This info should be only called once.
Signed-off-by: Alexandre Demers
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion
f it applies?
5- Any chance to have some code reviewed even if it still doesn't work
if I send it on this list?
6- I have some patches on the side to help document the code and
define variables (even for Radeon), a few typos fixed, etc. Should I
send them on this list?
Cheers
Alexandre De
On Fri, 2021-01-08 at 10:28 -0500, Alex Deucher wrote:
> On Fri, Jan 8, 2021 at 3:11 AM Christian König
> wrote:
> >
> > Hi Alexandre,
> >
> > Am 08.01.21 um 05:20 schrieb Alexandre Demers:
> > > Hi there,
> > >
> > > Some of you may
On Fri, 2021-01-08 at 15:00 -0500, Alex Deucher wrote:
> On Fri, Jan 8, 2021 at 2:37 PM Alexandre Demers
> wrote:
> >
> >
> > On Fri, 2021-01-08 at 10:28 -0500, Alex Deucher wrote:
> > > On Fri, Jan 8, 2021 at 3:11 AM Christian König
> >
nd people missing the UVD and
VCE features should be the ones overriding the default choice. But this
may not work for the majority (I don't know) and I understand that
radeon is still the default for GCN 1.0/1.1.
Cheers,
Alexandre Demers
On 2019-12-05 10:32, Deucher, Alexander w
config(hwmgr);
*>* + PP_ASSERT_WITH_CODE(0 == result,
*>* + "Failed to setup dpm led config", return result);
*
will always lead to "result" being set to 0... Am I missing something?
Alexandre Demers
__
On Thursday, February 23, 2017, Alex Deucher wrote:
> On Thu, Feb 23, 2017 at 5:50 PM, Alexandre Demers
> > wrote:
> > First, sorry for not replying directly as I should normally, but I'm not
> on
> > my usual computer, so I can't. That being said...
> >
&
We were using the same mask twice. Looking at radeon, it seems
we should be using HDMI_AVI_INFO_CONT instead as the second mask.
Being there, fix typos in comments and improved readability.
I haven't looked at other DCEs, the mask may also be wrong for them.
Signed-off-by: Alexandre D
Fixed indentation for readability.
Signed-off-by: Alexandre Demers
---
drivers/gpu/drm/amd/amdgpu/dce_v8_0.c | 14 +++---
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c
b/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c
index 3ff1258..c7e5d5f
@lists.freedesktop.org] On Behalf
> > Of Alexandre Demers
> > Sent: Sunday, August 21, 2016 8:38 PM
> > To: amd-gfx@lists.freedesktop.org
> > Subject: [PATCH drm/amdgpu] Fix indentation in
> > dce_v8_0_audio_write_sad_regs()
>
> For these and future patches,
ces in the step order and even a few
more registry read and write calls. Any clue will be welcomed.
Cheers.
--
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e the last modifications need
to be done?
Thank you!
Alexandre Demers
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On Wed, 14 Jun 2017 at 13:09 Deucher, Alexander
wrote:
>
>
> *From:* amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] *On Behalf
> Of *Christian König
> *Sent:* Wednesday, June 14, 2017 12:37 PM
> *To:* Alexandre Demers; Freedesktop - AMD-gfx
> *Subject:* Re: Question
keep you up to date.
Alexandre
On Wed, 14 Jun 2017 at 14:22 Deucher, Alexander
wrote:
>
>
> *From:* Alexandre Demers [mailto:alexandre.f.dem...@gmail.com]
> *Sent:* Wednesday, June 14, 2017 1:30 PM
> *To:* Deucher, Alexander; Christian König; Freedesktop - AMD-gfx
>
>
> *
ig one. It is easier to review, comment, test and isolate
problems. Also, about the header you added to the UVD firmware, this is
one way to do it, or you could backport how it is done under radeon.
This is the path I've chosen for now under VCE.
I'll give a look at yo
nce I don't have as much
time as I'd like to work on VCE 1 for now, but this could help others to help
me
on the task.
If you are not satisfied with this first series, this can also be considered as
a RFC. Please, comment as needed.
Alexandre Demers (6):
Add initial VCE_V1_0 file
Signed-off-by: Alexandre Demers
---
drivers/gpu/drm/amd/amdgpu/vce_v1_0.c | 62 ---
1 file changed, 36 insertions(+), 26 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/vce_v1_0.c
b/drivers/gpu/drm/amd/amdgpu/vce_v1_0.c
index f541a4b5ac51..ab3b834758c6
Signed-off-by: Alexandre Demers
---
drivers/gpu/drm/radeon/radeon_uvd.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/radeon/radeon_uvd.c
b/drivers/gpu/drm/radeon/radeon_uvd.c
index 7431eb4a11b7..b4fb07ad9f4a 100644
--- a/drivers/gpu/drm/radeon/radeon_uvd.c
For consistency with other files under amdgpu driver.
Signed-off-by: Alexandre Demers
---
drivers/gpu/drm/amd/amdgpu/si.c| 15 +++-
drivers/gpu/drm/amd/amdgpu/si_dma.c| 5 +-
drivers/gpu/drm/amd/amdgpu/si_ih.c | 21 +++---
drivers/gpu/drm/amd
Signed-off-by: Alexandre Demers
---
drivers/gpu/drm/amd/amdgpu/si.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/si.c b/drivers/gpu/drm/amd/amdgpu/si.c
index 08998639daeb..bb860faa8a95 100644
--- a/drivers/gpu/drm/amd/amdgpu/si.c
+++ b/drivers
Signed-off-by: Alexandre Demers
---
drivers/gpu/drm/amd/amdgpu/vce_v1_0.c | 384 ++
drivers/gpu/drm/amd/amdgpu/vce_v1_0.h | 29 +++
2 files changed, 413 insertions(+)
create mode 100644 drivers/gpu/drm/amd/amdgpu/vce_v1_0.c
create mode 100644 drivers/gpu/drm
Inspired on how it is done under radeon for UVD firmwares.
Signed-off-by: Alexandre Demers
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c | 100
1 file changed, 75 insertions(+), 25 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c
b/drivers/gpu
ost the next series in the next few days as a RFC so others can
help me go through. I just need to split the code in a few patches.
Cheers,
Alex
>
> Thanks,
> Christian.
>
> Am 08.09.2017 um 04:48 schrieb Alexandre Demers:
>> This is the foundation for VCE 1 implementation, mostl
Oh and patch 3 "Small precision when failing to load legacy firmware"
should have been a standalone patch, it is related to the radeon driver.
I'll send it as so with drm/radeon in the title.
Alexandre Demers
On 2017-09-08 07:55, Alexandre Demers wrote:
> Hi Christian!
>
Signed-off-by: Alexandre Demers
---
drivers/gpu/drm/radeon/radeon_uvd.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/radeon/radeon_uvd.c
b/drivers/gpu/drm/radeon/radeon_uvd.c
index 7431eb4a11b7..b4fb07ad9f4a 100644
--- a/drivers/gpu/drm/radeon/radeon_uvd.c
D could release a new UVD
firmware with header and correct 40bit addressing, could you ask if an
official VCE 1.0 firmware with an official header (and whatever else
could be needed) be released at the same time?
Cheers
--
Alexandre Demers
___
amd
On 2017-11-23 00:53, Alexandre Demers wrote:
> Hi,
>
> I just want to let you know that I'm still alive and still committed to
> porting VCE 1.0 from radeon to amdgpu. However, for many reasons, I've
> been pretty much unable to work on the code since my last communica
Hi Flora. I suppose this addition preceeds
AMDGPU_GEM_CREATE_VRAM_CLEARED's usage that will be introduced in
upcoming patches?
Could you fix the commit message VARM -> VRAM?
With that fixed, you can add my Reviewed-by: Alexandre Demers
Alexandre Demers
On 2016-07-22 00:02, F
Forget my question, I just saw your other patches. ;)
Alexandre Demers
On 2016-07-22 02:32, Alexandre Demers wrote:
Hi Flora. I suppose this addition preceeds
AMDGPU_GEM_CREATE_VRAM_CLEARED's usage that will be introduced in
upcoming patches?
Could you fix the commit message VARM -&
Please, keep a similar syntax to other functions and to the file name.
"vce_v3_set_bypass_mode" should be "vce_v3_0_set_bypass_mode".
Alexandre Demers
On 2016-07-21 20:10, Eric Huang wrote:
Looks good to me. Reviewed-by: Eric Huang
Regards,
Eric
On 07/18/2016 12:
Reviewed-by: Alexandre Demers
Alexandre Demers
On 2016-07-27 16:44, Alex Deucher wrote:
The message is harmless and confusing. On PX systems,
there is one ATIF method, but potentially multiple GPUs
leading to an error on the GPU with no backlight control.
Bug: https://bugzilla.kernel.org
me to do it in
comparison. Now, if I can be of any help, let me know, my R9 280X is
waiting for some tests.
Cheers,
--
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Thank you for the update. I'll have a go on it and I'll be following
what goes in it.
Alexandre Demers
On 2016-08-01 17:14, Alex Deucher wrote:
On Mon, Aug 1, 2016 at 2:29 AM, Alexandre Demers
wrote:
Hi Alex,
I'd like to know if there is any chance to see a merge / pull req
t
and/or track with people working on bringing GCN 1.0 (and 1.1) to the
amdgpu driver (I'm able to compare the result of using
radeon+modesetting VS amdgpu+modesetting to put aside bugs that could be
related to modesetting itself).
Cheers
Alexandre Demers
On 2016-08-01 17:14, Alex De
Signed-off-by: Alexandre Demers
---
drivers/gpu/drm/amd/amdgpu/dce_v6_0.c | 22 +++---
1 file changed, 11 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c
b/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c
index 07e0475..9e327be 100644
--- a/drivers/gpu
On Mon, 8 Aug 2016 at 01:22 Huang Rui wrote:
> On Sun, Aug 07, 2016 at 05:17:41PM -0400, Alexandre Demers wrote:
> > Signed-off-by: Alexandre Demers
> >
> > ---
> > drivers/gpu/drm/amd/amdgpu/dce_v6_0.c | 22 +++---
> > 1 file change
functions)?
Thanks for your input.
Alexandre Demers
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of the same
value):
WREG32(mmHDMI_ACR_32_0 + offset, (acr.cts_32khz <<
HDMI_ACR_32_0__HDMI_ACR_CTS_32__SHIFT));
Cheers
--
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Signed-off-by: Alexandre Demers
---
drivers/gpu/drm/amd/amdgpu/dce_v8_0.c | 8 +++-
1 file changed, 3 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c
b/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c
index 4fdfab1..3ff1258 100644
--- a/drivers/gpu/drm/amd/amdgpu
h is already ready if needed, I could send it later from home if
the amdgpu's behavior is the one that we are looking for.
Cheers,
Alexandre Demers
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eaking if you fail to kmalloc a few bytes you've got bigger
> problems to worry about than your audio not working ideally.
>
>
> Tom
>
>
> ------
> *From:* amd-gfx on behalf of
> Alexandre Demers
> *Sent:* Friday, August 12, 2016 11:43
> *To
lly speaking if during
> module init a kmalloc of 100 bytes fails something bad is happening and you
> want to abort init anyways (so failing to load just because part of DCE
> fails is probably a good thing).
>
>
> Tom
>
>
>
>
>
>
that amdgpu is
> meant to support and it's not a critical bugfix (or API update) maybe time
> is better spent getting support on the amdgpu side going for that hardware
> instead.
>
>
> Cheers,
>
> Tom
>
>
> --
> *From:* Alexandre
egression I
could find if requested.
Alexandre Demers
>From e62461803e84c181d6d237e27a215b788d72fa41 Mon Sep 17 00:00:00 2001
From: "chr[]"
Date: Sun, 23 Apr 2023 06:13:47 +0200
Subject: [PATCH] amdgpu: fix suspend/resume issues
resume and irq handler happily races in set_p
While going throught DCE6 code, I took on myself to add some comments
and to fix style in a few places.
Alexandre Demers (2):
drm/amdgpu: add some comments in DCE6
dmr/amdgpu: fix style in DCE6
drivers/gpu/drm/amd/amdgpu/dce_v6_0.c | 32 ++-
1 file changed, 21
For coherence with DCE8 et DCE10, add or move some values under sid.h.
Signed-off-by: Alexandre Demers
---
drivers/gpu/drm/amd/amdgpu/dce_v6_0.c | 63 ++-
drivers/gpu/drm/amd/amdgpu/si_enums.h | 7 ---
drivers/gpu/drm/amd/amdgpu/sid.h | 29 +---
3 files
Keep a uniform way of where and how variables are defined between
DCE6, DCE8 and DCE10. It is easier to understand the code, their
similarities and their modifications.
Alexandre Demers (2):
drm/amdgpu: add or move defines for DCE6 in sid.h
drm/amdgpu: add defines for pin_offsets in DCE8
Define pin_offsets values in the same way it is done in DCE8
Signed-off-by: Alexandre Demers
---
drivers/gpu/drm/amd/amdgpu/cikd.h | 9 +
drivers/gpu/drm/amd/amdgpu/dce_v8_0.c | 14 +++---
2 files changed, 16 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/amd
Signed-off-by: Alexandre Demers
---
drivers/gpu/drm/amd/amdgpu/dce_v6_0.c | 18 --
1 file changed, 16 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c
b/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c
index eb7de9122d99..78402e7444db 100644
--- a/drivers
A few returns not where they should be.
Signed-off-by: Alexandre Demers
---
drivers/gpu/drm/amd/amdgpu/dce_v6_0.c | 14 +-
1 file changed, 5 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c
b/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c
index 78402e7444db
On Thu, Feb 27, 2025 at 2:01 PM Alex Deucher wrote:
>
> On Thu, Feb 27, 2025 at 1:52 PM Alexandre Demers
> wrote:
> >
> > On Thu, Feb 27, 2025 at 9:23 AM Alex Deucher wrote:
> > >
> > > On Thu, Feb 27, 2025 at 12:49 AM Alexandre Demers
> > > wr
On Thu, Feb 27, 2025 at 2:05 PM Alex Deucher wrote:
>
> On Thu, Feb 27, 2025 at 2:01 PM Alex Deucher wrote:
> >
> > On Thu, Feb 27, 2025 at 1:52 PM Alexandre Demers
> > wrote:
> > >
> > > On Thu, Feb 27, 2025 at 9:23 AM Alex Deucher
> > >
On Fri, Feb 28, 2025 at 9:31 PM Alexandre Demers
wrote:
>
> Keep a uniform way of where and how variables are defined between
> DCE6, DCE8 and DCE10. It is easier to understand the code, their
> similarities and their modifications.
>
> Alexandre Demers (2):
> drm/amdgpu
On Thu, Mar 6, 2025 at 10:17 AM Alex Deucher wrote:
>
> On Wed, Mar 5, 2025 at 8:57 PM Alexandre Demers
> wrote:
> >
> > Let's finish the cleanup in sid.h to calm down things after wiring it into
> > dce_v6_0.c.
> >
> > This is a bigger cleanup.
>
On Thu, Mar 6, 2025 at 10:19 AM Alex Deucher wrote:
>
> On Wed, Mar 5, 2025 at 9:08 PM Alexandre Demers
> wrote:
> >
> > For coherence with DCE8 et DCE10, add or move some values under sid.h.
> >
> > Signed-off-by: Alexandre Demers
>
> This change doesn&#
ed with CIK,
isn't SI DMA also a "system DMA"? Could we use the same naming
convention and talk about sDMA, name defines values, shifts and masks?
Could si_dma.c/.h be renamed to si_sdma.c/.h? Was the naming
difference introduced to CIK so different that the naming covention
needed to be modified?
Thanks,
Alexandre Demers
.
Alexandre Demers (3):
drm/amdgpu: fix warning and errors caused by duplicated defines in
sid.h
drm/amdgpu: move and fix X_GB_ADDR_CONFIG_GOLDEN values
drm/amdgpu: add or move defines for DCE6 in sid.h
drivers/gpu/drm/amd/amdgpu/dce_v6_0.c | 73 ++---
drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c
On Sat, Mar 8, 2025 at 7:32 PM Alexandre Demers
wrote:
>
> On Thu, Mar 6, 2025 at 10:19 AM Alex Deucher wrote:
> >
> > On Wed, Mar 5, 2025 at 9:08 PM Alexandre Demers
> > wrote:
> > >
> > > For coherence with DCE8 et DCE10, add or move some val
On Sun, Mar 9, 2025 at 12:47 PM Alex Deucher wrote:
>
> On Sat, Mar 8, 2025 at 3:39 AM Alexandre Demers
> wrote:
> >
> > Hi,
> >
> > While working on cleaning up sid.h, si_enums.h and some other SI
> > related files, I've been scratching my head a
.h and properly linked in where needed.
Signed-off-by: Alexandre Demers
---
drivers/gpu/drm/amd/amdgpu/dce_v6_0.c | 12 +-
drivers/gpu/drm/amd/amdgpu/si.c | 68 +++---
drivers/gpu/drm/amd/amdgpu/si_enums.h | 2 -
drivers/gpu/drm/amd/amdgpu/sid.h | 336 +-
under gfx_v6_0.c where they are used (as it is done under cik)
Signed-off-by: Alexandre Demers
---
drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c | 15 +--
drivers/gpu/drm/amd/amdgpu/si_enums.h | 4
drivers/gpu/drm/amd/amdgpu/sid.h | 4
3 files changed, 13 insertions(+
For coherence with DCE8 et DCE10, add or move some values under sid.h.
Signed-off-by: Alexandre Demers
---
drivers/gpu/drm/amd/amdgpu/dce_v6_0.c | 63 ++-
drivers/gpu/drm/amd/amdgpu/si_enums.h | 7 ---
drivers/gpu/drm/amd/amdgpu/sid.h | 29 +---
3 files
Keep a uniform way of where and how variables are defined between
DCE6, DCE8 and DCE10. It is easier to understand the code, their
similarities and their modifications.
Since sid.h is being wired up in dce_v6_0.c, duplicated defines need
to be cleaned up.
Alexandre Demers (5):
drm/amdgpu: add
Define pin_offsets values in the same way it is done in DCE8
Signed-off-by: Alexandre Demers
---
drivers/gpu/drm/amd/amdgpu/cikd.h | 9 +
drivers/gpu/drm/amd/amdgpu/dce_v8_0.c | 14 +++---
2 files changed, 16 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/amd
under gfx_v6_0.c where they are used (as it is done under cik)
Signed-off-by: Alexandre Demers
---
drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c | 15 +--
drivers/gpu/drm/amd/amdgpu/si_enums.h | 6 --
drivers/gpu/drm/amd/amdgpu/sid.h | 4
3 files changed, 13 insertions(+), 12 dele
d from sid.h and properly linked in where needed.
Signed-off-by: Alexandre Demers
---
drivers/gpu/drm/amd/amdgpu/dce_v6_0.c | 10 +-
drivers/gpu/drm/amd/amdgpu/si.c | 68 +++---
drivers/gpu/drm/amd/amdgpu/sid.h | 336 +-
3 files changed, 43 insertions(+), 371
On Sun, Mar 9, 2025 at 12:49 PM Alexandre Demers
wrote:
>
> Keep a uniform way of where and how variables are defined between
> DCE6, DCE8 and DCE10. It is easier to understand the code, their
> similarities and their modifications.
>
> Since sid.h is being wired up in dce_
For coherence with DCE8 et DCE10, add or move some values under sid.h
and remove duplicated from si_enums.h.
Signed-off-by: Alexandre Demers
---
drivers/gpu/drm/amd/amdgpu/dce_v6_0.c | 63 ++-
drivers/gpu/drm/amd/amdgpu/si_enums.h | 6 ---
drivers/gpu/drm/amd/amdgpu
On Thu, Feb 27, 2025 at 9:23 AM Alex Deucher wrote:
>
> On Thu, Feb 27, 2025 at 12:49 AM Alexandre Demers
> wrote:
> >
> > DCE6 was missing soft reset, but it was easily identifiable under radeon.
> > This should be it, pretty much as it is done under DCE8 and D
dce_v6_0_set_crtc_vline_interrupt_state() was empty without any info to
inform the user.
Based on DCE8 and DCE10 code.
Signed-off-by: Alexandre Demers
---
drivers/gpu/drm/amd/amdgpu/dce_v6_0.c | 44 +++
1 file changed, 44 insertions(+)
diff --git a/drivers/gpu/drm/amd
Found some typos while exploring amdgpu code.
Signed-off-by: Alexandre Demers
---
drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c | 2 +-
drivers/gpu/drm/amd/amdgpu/uvd_v3_1.c | 6 +++---
drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c | 3 ++-
drivers/gpu/drm/amd/amdgpu/vce_v2_0.c | 2 +-
4 files changed
Fix typos
Signed-off-by: Alexandre Demers
---
drivers/gpu/drm/amd/amdgpu/si.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/si.c b/drivers/gpu/drm/amd/amdgpu/si.c
index d1c06d0d6a2d..68f6f4ec8a47 100644
--- a/drivers/gpu/drm/amd/amdgpu/si.c
Found some typos while exploring radeon code.
Signed-off-by: Alexandre Demers
---
drivers/gpu/drm/radeon/radeon_device.c | 6 +++---
drivers/gpu/drm/radeon/radeon_fence.c | 2 +-
drivers/gpu/drm/radeon/si.c| 2 +-
3 files changed, 5 insertions(+), 5 deletions(-)
diff --git a
dce_v6_0_set_crtc_vline_interrupt_state() was empty without any info to
inform the user.
Based on DCE8 and DCE10 code.
Signed-off-by: Alexandre Demers
---
drivers/gpu/drm/amd/amdgpu/dce_v6_0.c | 44 +++
1 file changed, 44 insertions(+)
diff --git a/drivers/gpu/drm/amd
This series uniformizes some value definitions between DCE6, 8 and 10.
It also adds missing code for dce_v6_0_soft_reset() and
dce_v6_0_set_crtc_vline_interrupt_state()
Alexandre Demers (6):
drm/amdgpu: add or move defines for DCE6 in sid.h
drm/amdgpu: add dce_v6_0_soft_reset() to DCE6
drm
For coherence with DCE8 et DCE10, add or move some values under sid.h.
Signed-off-by: Alexandre Demers
---
drivers/gpu/drm/amd/amdgpu/dce_v6_0.c | 63 ++-
drivers/gpu/drm/amd/amdgpu/si_enums.h | 7 ---
drivers/gpu/drm/amd/amdgpu/sid.h | 29 +---
3 files
A few returns not where they should be.
Signed-off-by: Alexandre Demers
---
drivers/gpu/drm/amd/amdgpu/dce_v6_0.c | 14 +-
1 file changed, 5 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c
b/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c
index fd2eb454a5d8
Signed-off-by: Alexandre Demers
---
drivers/gpu/drm/amd/amdgpu/dce_v6_0.c | 18 --
1 file changed, 16 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c
b/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c
index e805c4f9222c..fd2eb454a5d8 100644
--- a/drivers
DCE6 was missing soft reset, but it was easily identifiable under radeon.
This should be it, pretty much as it is done under DCE8 and DCE10.
Signed-off-by: Alexandre Demers
---
drivers/gpu/drm/amd/amdgpu/dce_v6_0.c | 62 ---
1 file changed, 57 insertions(+), 5 deletions
Define pin_offsets values in the same way it is done in DCE8
Signed-off-by: Alexandre Demers
---
drivers/gpu/drm/amd/amdgpu/cikd.h | 9 +
drivers/gpu/drm/amd/amdgpu/dce_v8_0.c | 14 +++---
2 files changed, 16 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/amd
DCE6 was missing soft reset, but it was easily identifiable under radeon.
This should be it, pretty much as it is done under DCE8 and DCE10.
Signed-off-by: Alexandre Demers
---
drivers/gpu/drm/amd/amdgpu/dce_v6_0.c | 53 ++-
1 file changed, 51 insertions(+), 2 deletions
Third set of split patchset.
Add to DCE6
dce_v6_0_soft_reset()
dce_v6_0_set_crtc_vline_interrupt_state() to DCE6
Alexandre Demers (2):
drm/amdgpu: add dce_v6_0_soft_reset() to DCE6
drm/amdgpu: complete dce_v6_0_set_crtc_vline_interrupt_state() in DCE6
drivers/gpu/drm/amd/amdgpu/dce_v6_0.c
same under both radeon and
amdgpu, so I would be inclined to think they are the good ones.
However, gfx_v6_0.c uses the si_enums.h definitions.
Alex, what do you think of it?
On Sat, Mar 1, 2025 at 4:35 PM Alexandre Demers
wrote:
>
> On Fri, Feb 28, 2025 at 9:31 PM Alexandre Deme
To be able to remove as much duplicated defines, the different files
containing definitions, shifts and masks must be properly included.
Once done, the code will be migrated where needed to shifts and masks and
proper defines, before removing useless defines in the end.
Signed-off-by: Alexandre
Signed-off-by: Alexandre Demers
---
.../drm/amd/include/asic_reg/smu/smu_6_0_d.h | 44
.../include/asic_reg/smu/smu_6_0_sh_mask.h| 190 +-
2 files changed, 230 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/amd/include/asic_reg/smu/smu_6_0_d.h
b/drivers
Send a few GFX6 defines where it's used in GFX6.
Signed-off-by: Alexandre Demers
---
drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c | 3 +++
drivers/gpu/drm/amd/amdgpu/si_enums.h | 2 --
2 files changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c
b/driver
Signed-off-by: Alexandre Demers
---
drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c | 338 +++--
drivers/gpu/drm/amd/pm/legacy-dpm/si_smc.c | 36 +--
2 files changed, 190 insertions(+), 184 deletions(-)
diff --git a/drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c
b/drivers/gpu/drm/amd
By replacing VGA_VSTATUS_CNTL by VGA_RENDER_CONTROL__VGA_VSTATUS_CNTL_MASK,
we also need to fix its usage in GMC6.
Note: VGA_VSTATUS_CNTL's binary value was inverted in dce_6_0_sh_mask.h,
so we need to invert its value where it was used.
Signed-off-by: Alexandre Demers
---
drivers/gpu/dr
Signed-off-by: Alexandre Demers
---
.../drm/amd/include/asic_reg/oss/oss_1_0_d.h | 21 +++--
.../include/asic_reg/oss/oss_1_0_sh_mask.h| 43 +++
2 files changed, 61 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/include/asic_reg/oss/oss_1_0_d.h
b
It seems a copy-paste error: since we are working with
mmGRPH_SECONDARY_SURFACE_ADDRESS,
GRPH_SECONDARY_SURFACE_ADDRESS__GRPH_SECONDARY_SURFACE_ADDRESS_MASK
should be used.
Signed-off-by: Alexandre Demers
---
drivers/gpu/drm/amd/amdgpu/dce_v6_0.c | 2 +-
1 file changed, 1 insertion(+), 1
Use shifts already available in DCE6's defines, masks and shifts.
Signed-off-by: Alexandre Demers
---
drivers/gpu/drm/amd/amdgpu/dce_v6_0.c | 4 ++--
drivers/gpu/drm/amd/amdgpu/sid.h | 8
2 files changed, 2 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/amd/a
Signed-off-by: Alexandre Demers
---
drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c | 12
1 file changed, 8 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c
b/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c
index 5f85c3b63971..f34980c79a7e 100644
--- a/drivers/gpu/drm
ported to DCE6,
GFX6 and GMC6 defines, shifts and masks. There location was based on CIK and
later.
However, most of them were already available, but not used where they could be.
This series is running on my PITCAIRN setup without any visible drawbacks.
Alexandre Demers (18):
drm/amdgpu: move
Signed-off-by: Alexandre Demers
---
drivers/gpu/drm/amd/include/asic_reg/gca/gfx_6_0_d.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/amd/include/asic_reg/gca/gfx_6_0_d.h
b/drivers/gpu/drm/amd/include/asic_reg/gca/gfx_6_0_d.h
index c75aee25619e..a1240dd430aa 100644
Now that we are using the proper defines, cleanup useless old "substituted"
defines.
Signed-off-by: Alexandre Demers
---
drivers/gpu/drm/amd/amdgpu/sid.h | 1219 +-
1 file changed, 9 insertions(+), 1210 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdg
PACKET3 is already in sid.h, as it is done under cikd.h for CIK
Signed-off-by: Alexandre Demers
---
drivers/gpu/drm/amd/amdgpu/si_enums.h | 123 --
1 file changed, 123 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/si_enums.h
b/drivers/gpu/drm/amd/amdgpu
Remove more duplicated defines and move some in sid.h for coherence with
CIK.
Signed-off-by: Alexandre Demers
---
drivers/gpu/drm/amd/amdgpu/si_enums.h | 90 +--
drivers/gpu/drm/amd/amdgpu/sid.h | 16 -
2 files changed, 14 insertions(+), 92 deletions(-)
diff
Move and rename DMA_SEM_INCOMPLETE_TIMER_CNTL and DMA_SEM_WAIT_FAIL_TIMER_CNTL
in oss_1_0_d.h
Signed-off-by: Alexandre Demers
---
drivers/gpu/drm/amd/amdgpu/si_dma.c | 6 +++---
drivers/gpu/drm/amd/amdgpu/sid.h | 2 --
drivers/gpu/drm/amd/include/asic_reg
They are properly defined under oss_1_0_d.h
Signed-off-by: Alexandre Demers
---
drivers/gpu/drm/amd/amdgpu/si_ih.c | 16
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/si_ih.c
b/drivers/gpu/drm/amd/amdgpu/si_ih.c
index 94468c87122a
Signed-off-by: Alexandre Demers
---
drivers/gpu/drm/amd/amdgpu/si.c | 369
1 file changed, 185 insertions(+), 184 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/si.c b/drivers/gpu/drm/amd/amdgpu/si.c
index 75d3b7471c68..3b8c65a966b9 100644
--- a/drivers
1 - 100 of 134 matches
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