Hi,
While looking into dce_v8_0.c, I stumbled upon something that might be
wrong dce_v8_0_afmt_update_ACR(). We can read:
WREG32(mmHDMI_ACR_32_0 + offset, (acr.cts_32khz <<
HDMI_ACR_44_0__HDMI_ACR_CTS_44__SHIFT));
However, I'm mostly sure it should be (luckily, the shift is of the same
value):
WREG32(mmHDMI_ACR_32_0 + offset, (acr.cts_32khz <<
HDMI_ACR_32_0__HDMI_ACR_CTS_32__SHIFT));
Cheers
--
Alexandre Demers
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