Re: [U-Boot] [PATCH 2/6] usb:udc:samsung: Remove redundant cache operation from Samsung UDC driver
Hi Marek, > On Saturday, February 01, 2014 at 10:56:27 AM, Lukasz Majewski wrote: > > On Sat, 1 Feb 2014 03:50:26 +0100 > > > > Marek Vasut wrote: > > > On Friday, January 31, 2014 at 01:16:25 PM, Lukasz Majewski wrote: > > > > A set of cache operations (both invalidation and flush) were > > > > redundant in the S3C HS OTG Samsung driver. > > > > > > > > Test condition > > > > - test HW + measurement: Trats - Exynos4210 rev.1 > > > > - test HW Trats2 - Exynos4412 rev.1 > > > > 400 MiB compressed rootfs image download with `thor 0 mmc 0` > > > > > > The commit message is missing a proper explanation _WHY_ were they > > > redundant. I do not understand why they were redundant ... and no, > > > the test you performed does not justify removal of cache > > > management calls. > > > > The s3c UDC driver is in u-boot since 2011. It has been added when > > at Samsung boards (s5p_goni) we didn't have cache enabled. > > > > Then there was a transition, after which L1 was enabled. Since UDC > > is co-working with gadgets on the beginning it was easier to > > perform the cache management inside the UDC driver. > > > > That is why we had to copy the buffers (since e.g. device > > descriptors tends to be unaligned) - which also degraded > > performance. > > > > Now, all gadget code seems to be memalign'ed and ready for direct > > buffer passing (despite the two overlooked kmallocs in the mass > > storage gadget - which I fix in this patch set). > > > > To sum up: > > > > 1. s3c_udc_ep0_zlp - EP0 ZLP packets don't need to invalidate the > > cache (since it is zero length transmission) > > > > 2. s3c_udc_pre_setup - cache invalidation is not needed when I setup > > buffer for OUT EP0 transmission. > > > > The above two invalidation calls had been added by me, and are mine > > mistakes. Those don't contribute to transmission speed up (and > > shall be regarded as a cosmetic changes) > > > > 3. setdma_rx - here I invalidate parts of the s3c UDC driver's > > internal buffer. This call is not needed anymore since we reuse the > > buffers passed from gadgets. > > And you do correct cache management on those in the UDC driver or in > the gadget driver ? For download, buffers are allocated in gadgets. Then buffer is passed to the UDC driver in a USB request. After receiving data via USB the UDC driver takes care to invalidate cache, hence the gadget can work on the data. Cache management is performed in the UDC driver. > > > This is the key speed improvement here. > > This should be in the commit message really ;-) I wrongly assumed, that code explains what was the rationale :-). I'm going to prepare more verbose commit message for v2. > > Best regards, > Marek Vasut -- Best regards, Lukasz Majewski Samsung R&D Institute Poland (SRPOL) | Linux Platform Group ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH V2 1/8] arm:exynos: add cpu revision
Dear Wolfgang Denk, On 23/01/14 19:28, Wolfgang Denk wrote: > Dear Piotr Wilczek, > > In message <1390402477-24340-2-git-send-email-p.wilc...@samsung.com> you > wrote: >> This patch enables to read cpu revision on Exynos CPU. > > Sorry, you really need to refactor your patches. > > In this commit you add references to "s5p_cpu_id": > >> @@ -196,10 +198,12 @@ static inline void s5p_set_cpu_id(void) >> case 0x210: >> /* Exynos4210 EVT1 */ >> s5p_cpu_id = 0x4210; >> +s5p_cpu_rev = cpu_rev; >> break; >> case 0x412: >> /* Exynos4412 */ >> s5p_cpu_id = 0x4412; >> +s5p_cpu_rev = cpu_rev; >> break; >> case 0x520: >> /* Exynos5250 */ > > But this variable does not exist anywhere. It is only added in the > next patch. Adding this patch causes build breakage, i. e. your patch > series is not bisectable. s5p_cpu_id and s5p_cpu_rev exist on "arch/arm/cpu/armv7/s5p-common/cpu_info.c". This patch looks fine to me. Thanks, Minkyu Kang. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] u-boot spl with FIT images
Hi Simon, On 02/01/2014 01:28 AM, Simon Glass wrote: > +U-Boot (good to copy the list) yes, sure. > > Hi Michal, > > On 28 January 2014 06:23, Michal Simek wrote: >> Hi Simon, >> >> hope that you are good. >> IRC you mentioned at u-boot minisummit that you are enabling >> FIT support for u-boot SPL. >> I have checked the code and there is support for legacy format >> not for FIT images. >> IRC that you have done that. >> Have you sent any patches regarding that? > > Yes I have certainly had FIT support built into SPL. However my memory > is a little unclear at this stage. I did submit quite a long list of > image-related improvements: ok. > 689a197 sandbox: image: Create a test for loading FIT images > af732a6 sandbox: image: Adjust FIT image printing to work with sandbox > 4aec530 image: Use fit_image_load() to load kernel > 63544a0 image: Use fit_image_load() to load FDT > 48b7e7a image: Use fit_image_load() to load ramdisk > d48eed3 image: Introduce fit_image_load() to load images from FITs > 2ce9f76 mkimage: Add map_sysmem() and IH_ARCH_DEFAULT to simplfy building > 13d0698 image: Add device tree setup to image library > 44d3a30 image: Split libfdt code into image-fdt.c > 87ebee3 image: Add CONFIG_FIT_SPL_PRINT to control FIT image printing in SPL > 1fe7d93 image: Remove remaining #ifdefs in image-fit.c > aa6d6db mkimage: Put FIT loading in function and tidy error handling > 35e7b0f sandbox: image: Add support for booting images in sandbox > d8b7536 image: Rename hash printing to fit_image_print_verification_data() > bbb467d image: Rename fit_add_hashes() to fit_add_verification_data() > 003efd7 image: Export fit_conf_get_prop_node() > e754da2 image: Move error! string to common place > ab9efc6 image: Move hash checking into its own function > b8da836 image: Rename fit_image_check_hashes() to fit_image_verify() > b726091 image: Convert fit_image_hash_set_value() to static, and rename > 94e5fa4 image: Split hash node processing into its own function > 604f23d image: Move HOSTCC image code to tools/ > 53fbb7e image: Split FIT code into new image-fit.c > 61a439a image: Export fit_check_ramdisk() > 859e92b image: Move timestamp #ifdefs to header file > 816cb03 mkimage: Move ARRAY_SIZE to header file > 0ccff50 image: Use crc header file instead of C prototypes > > > However I am not sure exactly what I had to do to enable FIT in SPL. > Have you tried it? What support do you think is missing? That might > help jog my memory. spl_parse_image_header() is that function I am talking about. There is this checking image_get_magic(header) == IH_MAGIC where IH_MAGIC is 0x27051956 which is old u-boot image format. What I thought that you have is support for images in doc/uImage.FIT format in u-boot SPL. Just to have kernel/dtb/ramdisk in one file. Thanks, Michal -- Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91 w: www.monstr.eu p: +42-0-721842854 Maintainer of Linux kernel - Microblaze cpu - http://www.monstr.eu/fdt/ Maintainer of Linux kernel - Xilinx Zynq ARM architecture Microblaze U-BOOT custodian and responsible for u-boot arm zynq platform signature.asc Description: OpenPGP digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Signed-off-by for RPI U-Boot USB patches
Hi Stephen, > (Sorry for the spam; resending with the correct U-Boot mailing list > in CC) > > On 02/01/2014 11:14 PM, Stephen Warren wrote: > > Oleksandr, I'm starting to look at getting USB support enabled for > > the Raspberry Pi in mainline U-Boot. To that end, I looked at: > > > > git://github.com/gonzoua/u-boot-pi.git rpi > > > > I took the DWC driver from there and applied it to a very recent > > mainline U-Boot. It works very well:-) Could you be more specific about the exact DWC USB IP block, which you plan to port for PI? Is this host or device controller? The USB controller designed by DesignWare is very popular (at least the USB 2.0) in the industry. For example in u-boot there already is s3c_udc_*.c implementation for device controller. Also you can look into the s3c_hsotg.c in the linux mainline kernel. > > > > The main thing preventing me from sending the driver for inclusion > > in mainline U-Boot is that none of the commits in that branch > > contain a Signed-off-by tag from you. Could you please reply here > > with your s-o-b line for all the commits listed below? > > > > Thank you very much! > > > > For details of what s-o-b means, please see > > https://www.kernel.org/doc/Documentation/SubmittingPatches section > > 12 "Sign your work". (There's also a standalone website containing > > that section now, but I can't for the life of me find it...) > > > > b22090f Fix usb_lowlevel_init and usb_lowlevel_stop > > 8d5c624 Merge of doom: update to latest u-boot > > cd2dac2 Increase buffer for bulk transfers and make virtual hub > > highspeed fc4164b Enable USB mass storage support > > 9085155 Increase timeout for soft reset > > 4b3863c More sophysticated initialization code > > 8cb8ecc Rmeove hardcoded MAC address > > 6ab7258 Report error, do not hang > > 9e5763c Fix typo and whitespaces > > d141598 Fix memory layout for U-Boot > > 5d8b20f Cleanup and add function declarations > > eb2bb98 Add sanity check, just in case > > 8c85e48 Clean up mess with buffers > > d8fb4c3 Get rid of device-specific structures/registers > > ce7f827 Merge branch 'rpi' of github.com:gonzoua/u-boot-pi into rpi > > a78f29e Slap licenses on top of the newly created files > > d80dd6a Remove debug level > > cc7227e Minor cleanup > > 0d3c12f More stable CONTROL transfers, working BULK transfers > > 9da26b0 Remove debug output > > 70f4b54 Add support for USB ethernet and SMSC95XX > > ae9e5fc Add stripped-down version of Linux driver for DWC OTG > > a1bfc20 Skeleton DWC OTG driver implementation > > b47e41c Slap licenses on top of the newly created files > > ded1dc9 Remove debug level > > 602704e Minor cleanup > > ecc6e3d More stable CONTROL transfers, working BULK transfers > > d966ac2 Add support for USB ethernet and SMSC95XX > > 71633e5 Add stripped-down version of Linux driver for DWC OTG > > 182c5b0 Skeleton DWC OTG driver implementation > > > > (yes, there are duplicate entries in that list, because there are > > in the git tree I took the code from) > > > > ___ > > linux-rpi-kernel mailing list > > linux-rpi-ker...@lists.infradead.org > > http://lists.infradead.org/mailman/listinfo/linux-rpi-kernel > > > > ___ > U-Boot mailing list > U-Boot@lists.denx.de > http://lists.denx.de/mailman/listinfo/u-boot -- Best regards, Lukasz Majewski Samsung R&D Institute Poland (SRPOL) | Linux Platform Group ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] powerpc/mpc85xx: SECURE BOOT- Add secure boot target for B4860QDS
Changes:
1. L2 cache is being invalidated by Boot ROM code for e6500 core.
So removing the invalidation from start.S
2. Clear the LAW and corresponding configuration for CPC. Boot ROM
code uses it as hosekeeping area.
3. For Secure boot, CPC is configured as SRAM and used as house
keeping area. This configuration is to be disabled once in uboot.
Earlier this disabling of CPC as SRAM was happening in cpu_init_r.
As a result cache invalidation function was getting skipped in
case CPC is configured as SRAM.This was causing random crashes.
Signed-off-by: Ruchika Gupta
Signed-off-by: Aneesh Bansal
---
README | 4
arch/powerpc/cpu/mpc85xx/cpu_init.c| 27 ++-
arch/powerpc/cpu/mpc85xx/start.S | 3 ++-
arch/powerpc/include/asm/fsl_secure_boot.h | 6 ++
boards.cfg | 1 +
5 files changed, 35 insertions(+), 6 deletions(-)
Changes from v2:
Squashed with previous patch after removing the ISBC version as per discussion
diff --git a/README b/README
index 176de61..3ca307f 100644
--- a/README
+++ b/README
@@ -428,6 +428,10 @@ The following options need to be configured:
In this mode, a single differential clock is used to supply
clocks to the sysclock, ddrclock and usbclock.
+ CONFIG_SYS_SECURE_HKAREA_CPC
+ This CONFIG is defined for the SoC's in which the BootROM code
uses
+ the platform cache configured as SRAM for house keeping.
+
- Generic CPU options:
CONFIG_SYS_BIG_ENDIAN, CONFIG_SYS_LITTLE_ENDIAN
diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init.c
b/arch/powerpc/cpu/mpc85xx/cpu_init.c
index b31efb7..2b2fd27 100644
--- a/arch/powerpc/cpu/mpc85xx/cpu_init.c
+++ b/arch/powerpc/cpu/mpc85xx/cpu_init.c
@@ -125,17 +125,14 @@ void config_8560_ioports (volatile ccsr_cpm_t * cpm)
#endif
#ifdef CONFIG_SYS_FSL_CPC
-static void enable_cpc(void)
+#if defined(CONFIG_RAMBOOT_PBL) || defined(CONFIG_SYS_SECURE_HKAREA_CPC)
+static void disable_cpc_sram(void)
{
int i;
- u32 size = 0;
cpc_corenet_t *cpc = (cpc_corenet_t *)CONFIG_SYS_FSL_CPC_ADDR;
for (i = 0; i < CONFIG_SYS_NUM_CPC; i++, cpc++) {
- u32 cpccfg0 = in_be32(&cpc->cpccfg0);
- size += CPC_CFG0_SZ_K(cpccfg0);
-#ifdef CONFIG_RAMBOOT_PBL
if (in_be32(&cpc->cpcsrcr0) & CPC_SRCR0_SRAMEN) {
/* find and disable LAW of SRAM */
struct law_entry law =
find_law(CONFIG_SYS_INIT_L3_ADDR);
@@ -150,8 +147,21 @@ static void enable_cpc(void)
out_be32(&cpc->cpccsr0, 0);
out_be32(&cpc->cpcsrcr0, 0);
}
+ }
+}
#endif
+static void enable_cpc(void)
+{
+ int i;
+ u32 size = 0;
+
+ cpc_corenet_t *cpc = (cpc_corenet_t *)CONFIG_SYS_FSL_CPC_ADDR;
+
+ for (i = 0; i < CONFIG_SYS_NUM_CPC; i++, cpc++) {
+ u32 cpccfg0 = in_be32(&cpc->cpccfg0);
+ size += CPC_CFG0_SZ_K(cpccfg0);
+
#ifdef CONFIG_SYS_FSL_ERRATUM_CPC_A002
setbits_be32(&cpc->cpchdbcr0, CPC_HDBCR0_TAG_ECC_SCRUB_DIS);
#endif
@@ -250,6 +260,10 @@ void cpu_init_f (void)
law = find_law(CONFIG_SYS_PBI_FLASH_BASE);
if (law.index != -1)
disable_law(law.index);
+
+#if defined(CONFIG_SYS_SECURE_HKAREA_CPC)
+ disable_cpc_sram();
+#endif
#endif
#ifdef CONFIG_CPM2
@@ -550,6 +564,9 @@ skip_l2:
puts("disabled\n");
#endif
+#if defined(CONFIG_RAMBOOT_PBL)
+ disable_cpc_sram();
+#endif
enable_cpc();
#ifndef CONFIG_SYS_FSL_NO_SERDES
diff --git a/arch/powerpc/cpu/mpc85xx/start.S b/arch/powerpc/cpu/mpc85xx/start.S
index dbbd8e5..4ef0985 100644
--- a/arch/powerpc/cpu/mpc85xx/start.S
+++ b/arch/powerpc/cpu/mpc85xx/start.S
@@ -115,7 +115,8 @@ _start_e500:
#endif
-#if defined(CONFIG_SECURE_BOOT) && defined(CONFIG_E500MC)
+#if defined(CONFIG_SECURE_BOOT) && defined(CONFIG_E500MC) && \
+ !defined(CONFIG_E6500)
/* ISBC uses L2 as stack.
* Disable L2 cache here so that u-boot can enable it later
* as part of it's normal flow
diff --git a/arch/powerpc/include/asm/fsl_secure_boot.h
b/arch/powerpc/include/asm/fsl_secure_boot.h
index 4c7f0b1..9973100 100644
--- a/arch/powerpc/include/asm/fsl_secure_boot.h
+++ b/arch/powerpc/include/asm/fsl_secure_boot.h
@@ -15,5 +15,11 @@
#endif
#define CONFIG_SYS_PBI_FLASH_WINDOW0xcff8
+#if defined(CONFIG_B4860QDS)
+#define CONFIG_SYS_SECURE_HKAREA_CPC
+#undef CONFIG_SYS_INIT_L3_ADDR
+#define CONFIG_SYS_INIT_L3_ADDR0xbff0
+#endif
+
#endif
#endif
diff --git a/boards.cfg b/boards.cfg
index 2dfd2b4..0312595 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -781,6 +781,7 @@ Active powerpc mpc85xx- freescale
b4860qds
Active powerpc mpc85xx- free
[U-Boot] [PATCH][v3] powerpc/mpc85xx: SECURE BOOT- Add secure boot target for B4860QDS
Changes:
1. L2 cache is being invalidated by Boot ROM code for e6500 core.
So removing the invalidation from start.S
2. Clear the LAW and corresponding configuration for CPC. Boot ROM
code uses it as hosekeeping area.
3. For Secure boot, CPC is configured as SRAM and used as house
keeping area. This configuration is to be disabled once in uboot.
Earlier this disabling of CPC as SRAM was happening in cpu_init_r.
As a result cache invalidation function was getting skipped in
case CPC is configured as SRAM.This was causing random crashes.
Signed-off-by: Ruchika Gupta
Signed-off-by: Aneesh Bansal
---
README | 4
arch/powerpc/cpu/mpc85xx/cpu_init.c| 27 ++-
arch/powerpc/cpu/mpc85xx/start.S | 3 ++-
arch/powerpc/include/asm/fsl_secure_boot.h | 6 ++
boards.cfg | 1 +
5 files changed, 35 insertions(+), 6 deletions(-)
Changes from v2:
Squashed with previous patch after removing the ISBC version as per discussion.
Changed the Subject Line.
diff --git a/README b/README
index 176de61..3ca307f 100644
--- a/README
+++ b/README
@@ -428,6 +428,10 @@ The following options need to be configured:
In this mode, a single differential clock is used to supply
clocks to the sysclock, ddrclock and usbclock.
+ CONFIG_SYS_SECURE_HKAREA_CPC
+ This CONFIG is defined for the SoC's in which the BootROM code
uses
+ the platform cache configured as SRAM for house keeping.
+
- Generic CPU options:
CONFIG_SYS_BIG_ENDIAN, CONFIG_SYS_LITTLE_ENDIAN
diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init.c
b/arch/powerpc/cpu/mpc85xx/cpu_init.c
index b31efb7..2b2fd27 100644
--- a/arch/powerpc/cpu/mpc85xx/cpu_init.c
+++ b/arch/powerpc/cpu/mpc85xx/cpu_init.c
@@ -125,17 +125,14 @@ void config_8560_ioports (volatile ccsr_cpm_t * cpm)
#endif
#ifdef CONFIG_SYS_FSL_CPC
-static void enable_cpc(void)
+#if defined(CONFIG_RAMBOOT_PBL) || defined(CONFIG_SYS_SECURE_HKAREA_CPC)
+static void disable_cpc_sram(void)
{
int i;
- u32 size = 0;
cpc_corenet_t *cpc = (cpc_corenet_t *)CONFIG_SYS_FSL_CPC_ADDR;
for (i = 0; i < CONFIG_SYS_NUM_CPC; i++, cpc++) {
- u32 cpccfg0 = in_be32(&cpc->cpccfg0);
- size += CPC_CFG0_SZ_K(cpccfg0);
-#ifdef CONFIG_RAMBOOT_PBL
if (in_be32(&cpc->cpcsrcr0) & CPC_SRCR0_SRAMEN) {
/* find and disable LAW of SRAM */
struct law_entry law =
find_law(CONFIG_SYS_INIT_L3_ADDR);
@@ -150,8 +147,21 @@ static void enable_cpc(void)
out_be32(&cpc->cpccsr0, 0);
out_be32(&cpc->cpcsrcr0, 0);
}
+ }
+}
#endif
+static void enable_cpc(void)
+{
+ int i;
+ u32 size = 0;
+
+ cpc_corenet_t *cpc = (cpc_corenet_t *)CONFIG_SYS_FSL_CPC_ADDR;
+
+ for (i = 0; i < CONFIG_SYS_NUM_CPC; i++, cpc++) {
+ u32 cpccfg0 = in_be32(&cpc->cpccfg0);
+ size += CPC_CFG0_SZ_K(cpccfg0);
+
#ifdef CONFIG_SYS_FSL_ERRATUM_CPC_A002
setbits_be32(&cpc->cpchdbcr0, CPC_HDBCR0_TAG_ECC_SCRUB_DIS);
#endif
@@ -250,6 +260,10 @@ void cpu_init_f (void)
law = find_law(CONFIG_SYS_PBI_FLASH_BASE);
if (law.index != -1)
disable_law(law.index);
+
+#if defined(CONFIG_SYS_SECURE_HKAREA_CPC)
+ disable_cpc_sram();
+#endif
#endif
#ifdef CONFIG_CPM2
@@ -550,6 +564,9 @@ skip_l2:
puts("disabled\n");
#endif
+#if defined(CONFIG_RAMBOOT_PBL)
+ disable_cpc_sram();
+#endif
enable_cpc();
#ifndef CONFIG_SYS_FSL_NO_SERDES
diff --git a/arch/powerpc/cpu/mpc85xx/start.S b/arch/powerpc/cpu/mpc85xx/start.S
index dbbd8e5..4ef0985 100644
--- a/arch/powerpc/cpu/mpc85xx/start.S
+++ b/arch/powerpc/cpu/mpc85xx/start.S
@@ -115,7 +115,8 @@ _start_e500:
#endif
-#if defined(CONFIG_SECURE_BOOT) && defined(CONFIG_E500MC)
+#if defined(CONFIG_SECURE_BOOT) && defined(CONFIG_E500MC) && \
+ !defined(CONFIG_E6500)
/* ISBC uses L2 as stack.
* Disable L2 cache here so that u-boot can enable it later
* as part of it's normal flow
diff --git a/arch/powerpc/include/asm/fsl_secure_boot.h
b/arch/powerpc/include/asm/fsl_secure_boot.h
index 4c7f0b1..9973100 100644
--- a/arch/powerpc/include/asm/fsl_secure_boot.h
+++ b/arch/powerpc/include/asm/fsl_secure_boot.h
@@ -15,5 +15,11 @@
#endif
#define CONFIG_SYS_PBI_FLASH_WINDOW0xcff8
+#if defined(CONFIG_B4860QDS)
+#define CONFIG_SYS_SECURE_HKAREA_CPC
+#undef CONFIG_SYS_INIT_L3_ADDR
+#define CONFIG_SYS_INIT_L3_ADDR0xbff0
+#endif
+
#endif
#endif
diff --git a/boards.cfg b/boards.cfg
index 2dfd2b4..0312595 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -781,6 +781,7 @@ Active powerpc mpc85xx- freescale
b4860qds
Active powerpc mpc8
Re: [U-Boot] [PATCH 2/3] powerpc/p1010rdb: SECURE BOOT- enable workaround for IFC errata A003399
> -Original Message- > From: Wood Scott-B07421 > Sent: Wednesday, January 29, 2014 2:38 AM > To: Bansal Aneesh-B39320 > Cc: u-boot@lists.denx.de; Sun York-R58495 > Subject: Re: [PATCH 2/3] powerpc/p1010rdb: SECURE BOOT- enable workaround > for IFC errata A003399 > > On Sun, 2014-01-26 at 23:27 -0600, Bansal Aneesh-B39320 wrote: > > > -Original Message- > > > From: Wood Scott-B07421 > > > Sent: Tuesday, January 21, 2014 3:36 AM > > > To: Bansal Aneesh-B39320 > > > Cc: u-boot@lists.denx.de; Sun York-R58495 > > > Subject: Re: [PATCH 2/3] powerpc/p1010rdb: SECURE BOOT- enable > > > workaround for IFC errata A003399 > > > > > > On Mon, 2014-01-20 at 14:57 +0530, Aneesh Bansal wrote: > > > > The workaround for IFC errata A003399 was not enabled in case of > > > > secure boot. So, secure boot from NOR was not working. > > > > > > > > Signed-off-by: Aneesh Bansal > > > > --- > > > > include/configs/P1010RDB.h | 3 +-- > > > > 1 file changed, 1 insertion(+), 2 deletions(-) > > > > > > > > diff --git a/include/configs/P1010RDB.h > > > > b/include/configs/P1010RDB.h index c21cf07..b0e51fb 100644 > > > > --- a/include/configs/P1010RDB.h > > > > +++ b/include/configs/P1010RDB.h > > > > @@ -455,8 +455,7 @@ extern unsigned long get_sdram_size(void); > > > > #endif > > > > > > > > #ifdef CONFIG_SYS_FSL_ERRATUM_IFC_A003399 > > > > -#if !defined(CONFIG_SPL) && !defined(CONFIG_SYS_RAMBOOT)\ > > > > - && !defined(CONFIG_SECURE_BOOT) > > > > +#if !defined(CONFIG_SPL) && !defined(CONFIG_SYS_RAMBOOT) > > > > #define CONFIG_A003399_NOR_WORKAROUND #endif #endif > > > > > > Why do you need the workaround? Doesn't secure boot involve the > > > bootrom loading U-Boot into SRAM, rather than execute-in-place from > NOR? > > > > > > -Scott > > > > > The Boot ROM code does not copy the U-boot from NOR into SRAM. In case > > of secure boot from NOR, it is executed as an execute-in-place memory > > and so this workaround is required. > > That doesn't sound very secure. > > -Scott > Can you please elaborate on the kind of security threats that you see with this approach. If you are concerned about someone replacing the NOR flash at runtime, then we have the Hardware Tamper detect mechanism to deal with that. So, currently the bootROM code does not copy from NOR to SRAM. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 4/6] usb:udc:samsung: Zero copy approach for data passed to Samsung's UDC driver
Hi Marek, > On Saturday, February 01, 2014 at 12:05:29 PM, Lukasz Majewski wrote: > > On Sat, 1 Feb 2014 03:55:20 +0100 > > > > Marek Vasut wrote: > > > On Friday, January 31, 2014 at 01:16:27 PM, Lukasz Majewski wrote: > > > > The Samsung's UDC driver is not anymore copying data from USB > > > > requests to data aligned internal buffers. Now it works > > > > directly in data allocated in the upper layers like UMS, DFU, > > > > THOR. > > > > > > > > This change is possible since those gadgets now take care to > > > > allocate buffers aligned to cache line > > > > (CONFIG_SYS_CACHELINE_SIZE ). > > > > > > > > Previously the UDC needed to copy this data to internal aligned > > > > buffer to prevent from unaligned access exceptions. > > > > > > > > Test condition > > > > - test HW + measurement: Trats - Exynos4210 rev.1 > > > > - test HW Trats2 - Exynos4412 rev.1 > > > > 400 MiB compressed rootfs image download with `thor 0 mmc 0` > > > > > > > > Measurement: > > > > Transmission speed: 27.04 MiB/s > > > > > > > > Change-Id: I1df1fbafc72ec703f0367ddee3fedf3a3f5523ed > > > > Signed-off-by: Lukasz Majewski > > > > Cc: Marek Vasut > > > > > > You should use ROUND_UP(), not ROUND() throughout the patch. > > > Otherwise you might fail to flush/invalidate the last little bit > > > of data in some cacheline. > > > > I might overlooked something, so please correct me if needed. > > > > I allocate buffers in gadgets which are aligned to cache line with > > starting address and its size is a multiplication of cache line size > > (so I will not trash data allocated next to it when I invalidate > > cache). > > > > In the code I'm using ROUND to invalidate/flush more data than > > needed (ROUND(176, 32) = 192). I'm prepared for this since buffer > > in gadget is properly allocated (with DEFINE_CACHE_ALIGN_BUFFER() > > which uses roundup() internally). > > The problem is in case you receive buffer which is aligned to > cacheline with it's start, but is [(k * cacheline_size) + > (cacheline_size / 2) - 1] big. I think it's unlikely, but if this > happens, you will get corruption, right ? Let's suppose, that I will receive 2063B = [(64 * 32) + 16 -1] from UDC. If the passed buffer was exactly 2063 B in size, then we would have here a data corruption. However this situation will not happen since the buffer at gadget is allocated with DEFINE_CACHE_ALIGN_BUFFER() or is an aligned multiplication of cache line size (like 1MiB). I think, that it is the responsibility of gadget developer to allocate buffers with proper alignment and size. > You might actually want to > check for this condition and throw a warning in such a case. The check is already implemented at ./arch/arm/cpu/armv7/cache_v7.c. It complains with "ERROR" message when start or end address is not aligned (that is how I've discovered the unaligned buffers at UMS). > > I understand your argument with trying to not trash data, but then > you will get a corruption during transfer, right ? After applying those patches, the cache management would be performed when the USB request is completed (in the UDC). The only requirement for UDC is the correctly allocated buffer at gadget. > > Best regards, > Marek Vasut -- Best regards, Lukasz Majewski Samsung R&D Institute Poland (SRPOL) | Linux Platform Group ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 3/3] exynos: pinmux: remove unnecessary routine
Acked-by: Jaehoon Chung
On 01/29/2014 05:04 PM, Minkyu Kang wrote:
> Because of the list of peripherals is not sequential,
> such a routine does not check for valid correctly.
> Error check will be done when call the exynos_pinmux_config function.
>
> Signed-off-by: Minkyu Kang
> ---
> arch/arm/cpu/armv7/exynos/pinmux.c |7 +--
> 1 file changed, 1 insertion(+), 6 deletions(-)
>
> diff --git a/arch/arm/cpu/armv7/exynos/pinmux.c
> b/arch/arm/cpu/armv7/exynos/pinmux.c
> index 904177a..645c497 100644
> --- a/arch/arm/cpu/armv7/exynos/pinmux.c
> +++ b/arch/arm/cpu/armv7/exynos/pinmux.c
> @@ -751,12 +751,7 @@ static int exynos5_pinmux_decode_periph_id(const void
> *blob, int node)
> if (err)
> return PERIPH_ID_NONE;
>
> - /* check for invalid peripheral id */
> - if ((PERIPH_ID_SDMMC4 > cell[1]) || (cell[1] < PERIPH_ID_UART0))
> - return cell[1];
> -
> - debug(" invalid peripheral id\n");
> - return PERIPH_ID_NONE;
> + return cell[1];
> }
>
> int pinmux_decode_periph_id(const void *blob, int node)
>
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Re: [U-Boot] [PATCH] pci: mx6: Implement reset callback
Hi Marek,
sorry for late answer.
On 28/01/2014 20:32, Marek Vasut wrote:
> On Tuesday, January 28, 2014 at 04:06:12 PM, Stefano Babic wrote:
>> Hi Marek,
>>
>> On 24/01/2014 16:25, Marek Vasut wrote:
>>> Add a callback so that a board can implement it's own specific routine to
>>> toggle the port's nRESET line.
>>>
>>> Signed-off-by: Marek Vasut
>>> Cc: Stefano Babic
>>> ---
>>>
>>> drivers/pci/pcie_imx.c | 12 +---
>>> 1 file changed, 9 insertions(+), 3 deletions(-)
>>>
>>> diff --git a/drivers/pci/pcie_imx.c b/drivers/pci/pcie_imx.c
>>> index 0a74867..b554075 100644
>>> --- a/drivers/pci/pcie_imx.c
>>> +++ b/drivers/pci/pcie_imx.c
>>> @@ -450,6 +450,13 @@ static int imx6_pcie_init_phy(void)
>>>
>>> return 0;
>>>
>>> }
>>>
>>> +__weak int imx6_pcie_toggle_reset(void)
>>> +{
>>> + /* This function ought to be overridden ! */
>>> + puts("WARNING: Make sure the PCIe nRESET line is connected!\n");
>>> + return 0;
>>> +}
>>> +
>>
>> Just to know: I assume that the nRESET is implemented with a GPIO.
>
> Yes, that's how it is on all designs I saw thus far (but see below).
>
>> I am
>> expecting then in the board files a diffusion of imx6_pcie_toggle_reset,
>> where the oinly difference is the number of GPIO.
>
> The problem is, there are boards with no nRESET connected to the slot.
Any reference to the Sabrelite is, of course, purely coincidental. But
this is a hardware bug on a specific board and we should not adjust all
boards according to the broken one.
What do you think to check the validity of the GPIO ? For example,
setting the GPIO to -1 for sabrelite and printing the message if the
GPIO is negative or not defined ?
> These
> boards are broken, thus will print the warning message.
Right - but there is nothing we can do it. The hardware must be fixed.
Best regards,
Stefano Babic
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=
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Re: [U-Boot] [PATCH 1/2] power: add PFUZE100 PMIC driver
Hi Tim,
On 01/02/2014 20:49, Tim Harvey wrote:
> Signed-off-by: Tim Harvey
> ---
> drivers/power/pmic/Makefile| 1 +
> drivers/power/pmic/pmic_pfuze100.c | 42 +
> include/power/pfuze100_pmic.h | 96
> ++
> 3 files changed, 139 insertions(+)
> create mode 100644 drivers/power/pmic/pmic_pfuze100.c
> create mode 100644 include/power/pfuze100_pmic.h
>
> diff --git a/drivers/power/pmic/Makefile b/drivers/power/pmic/Makefile
> index 0b45ffa..4129bda 100644
> --- a/drivers/power/pmic/Makefile
> +++ b/drivers/power/pmic/Makefile
> @@ -9,5 +9,6 @@ obj-$(CONFIG_POWER_MAX8998) += pmic_max8998.o
> obj-$(CONFIG_POWER_MAX8997) += pmic_max8997.o
> obj-$(CONFIG_POWER_MUIC_MAX8997) += muic_max8997.o
> obj-$(CONFIG_POWER_MAX77686) += pmic_max77686.o
> +obj-$(CONFIG_POWER_PFUZE100) += pmic_pfuze100.o
> obj-$(CONFIG_POWER_TPS65217) += pmic_tps65217.o
> obj-$(CONFIG_POWER_TPS65910) += pmic_tps65910.o
> diff --git a/drivers/power/pmic/pmic_pfuze100.c
> b/drivers/power/pmic/pmic_pfuze100.c
> new file mode 100644
> index 000..c382921
> --- /dev/null
> +++ b/drivers/power/pmic/pmic_pfuze100.c
> @@ -0,0 +1,42 @@
> +/*
> + * Copyright (C) 2014 Gateworks Corporation
> + * Tim Harvey
> + *
> + * SPDX-License-Identifier: GPL-2.0+
> + */
> +
> +#include
> +#include
> +#include
> +#include
> +#include
> +
> +int pmic_init(unsigned char bus)
> +{
> + static const char name[] = "PFUZE100_PMIC";
> + int ret;
> + struct pmic *p = pmic_alloc();
> +
> + if (!p) {
> + printf("%s: POWER allocation error!\n", __func__);
> + return -ENOMEM;
> + }
> +
> + p->name = name;
> + p->interface = PMIC_I2C;
> + p->number_of_regs = PMIC_NUM_OF_REGS;
> + p->hw.i2c.addr = CONFIG_POWER_PFUZE100_I2C_ADDR;
> + p->hw.i2c.tx_num = 1;
> + p->bus = bus;
> +
> + ret = i2c_set_bus_num(p->bus);
> + if (ret)
> + return ret;
> + if (!i2c_probe(p->hw.i2c.addr)) {
> + unsigned char dev_id, rev_id;
> + i2c_read(p->hw.i2c.addr, PFUZE100_DEVICEID, 1, &dev_id, 1);
> + i2c_read(p->hw.i2c.addr, PFUZE100_REVID, 1, &rev_id, 1);
> + printf("PMIC: PFUZE100 0x%02x/0x%02x\n", dev_id, rev_id);
This is always printed, not only on your board - even from other board,
if any, that will use this pmic. If you want that your board always
prints the pmic revision, move this output to your board file - maybe in
checkboard().
> + }
> + return 0;
If i2c_probe() returns with error, why does this function returns with
zero (= no error) ?
Best regards,
Stefano Babic
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[U-Boot] Booting in Internal mode
After a successful booting in SPI-NOR(FUSE) mode I would like to boot the same board in INTERNAL mode i.e Serial download mode.Can anyone suggest me commands and steps to achieve the same? ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [uBoot] [PATCH v2 1/2] common: spl: Add spl sata boot support
Add spl_sata to read a fat partition from a bootable SATA
drive.
Signed-off-by: Dan Murphy
---
v2 - Removed debug print - http://patchwork.ozlabs.org/patch/314811/
common/Makefile |3 +++
common/cmd_scsi.c |2 ++
common/spl/Makefile |1 +
common/spl/spl.c |5 +
common/spl/spl_sata.c | 49 +
include/spl.h |3 +++
spl/Makefile |1 +
7 files changed, 64 insertions(+)
create mode 100644 common/spl/spl_sata.c
diff --git a/common/Makefile b/common/Makefile
index 4d99ecd..b0f5b62 100644
--- a/common/Makefile
+++ b/common/Makefile
@@ -201,6 +201,9 @@ ifdef CONFIG_SPL_USB_HOST_SUPPORT
obj-$(CONFIG_SPL_USB_SUPPORT) += usb.o usb_hub.o
obj-$(CONFIG_USB_STORAGE) += usb_storage.o
endif
+ifdef CONFIG_SPL_SATA_SUPPORT
+obj-$(CONFIG_CMD_SCSI) += cmd_scsi.o
+endif
ifneq ($(CONFIG_SPL_NET_SUPPORT),y)
obj-$(CONFIG_ENV_IS_NOWHERE) += env_nowhere.o
obj-$(CONFIG_ENV_IS_IN_MMC) += env_mmc.o
diff --git a/common/cmd_scsi.c b/common/cmd_scsi.c
index 7b97dc9..b3f7687 100644
--- a/common/cmd_scsi.c
+++ b/common/cmd_scsi.c
@@ -168,7 +168,9 @@ removable:
scsi_curr_dev = -1;
printf("Found %d device(s).\n", scsi_max_devs);
+#ifndef CONFIG_SPL_BUILD
setenv_ulong("scsidevs", scsi_max_devs);
+#endif
}
int scsi_get_disk_count(void)
diff --git a/common/spl/Makefile b/common/spl/Makefile
index 65a1484f..64569c2 100644
--- a/common/spl/Makefile
+++ b/common/spl/Makefile
@@ -18,4 +18,5 @@ obj-$(CONFIG_SPL_NET_SUPPORT) += spl_net.o
obj-$(CONFIG_SPL_MMC_SUPPORT) += spl_mmc.o
obj-$(CONFIG_SPL_USB_SUPPORT) += spl_usb.o
obj-$(CONFIG_SPL_FAT_SUPPORT) += spl_fat.o
+obj-$(CONFIG_SPL_SATA_SUPPORT) += spl_sata.o
endif
diff --git a/common/spl/spl.c b/common/spl/spl.c
index 0645cee..774fdad 100644
--- a/common/spl/spl.c
+++ b/common/spl/spl.c
@@ -210,6 +210,11 @@ void board_init_r(gd_t *dummy1, ulong dummy2)
spl_usb_load_image();
break;
#endif
+#ifdef CONFIG_SPL_SATA_SUPPORT
+ case BOOT_DEVICE_SATA:
+ spl_sata_load_image();
+ break;
+#endif
default:
debug("SPL: Un-supported Boot Device\n");
hang();
diff --git a/common/spl/spl_sata.c b/common/spl/spl_sata.c
new file mode 100644
index 000..2e7adca
--- /dev/null
+++ b/common/spl/spl_sata.c
@@ -0,0 +1,49 @@
+/*
+ * (C) Copyright 2013
+ * Texas Instruments,
+ *
+ * Dan Murphy
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ *
+ * Derived work from spl_usb.c
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+DECLARE_GLOBAL_DATA_PTR;
+
+void spl_sata_load_image(void)
+{
+ int err;
+ block_dev_desc_t *stor_dev;
+
+ err = init_sata(CONFIG_SPL_SATA_BOOT_DEVICE);
+ if (err) {
+#ifdef CONFIG_SPL_LIBCOMMON_SUPPORT
+ printf("spl: sata init failed: err - %d\n", err);
+#endif
+ hang();
+ } else {
+ /* try to recognize storage devices immediately */
+ stor_dev = scsi_get_dev(0);
+ }
+
+#ifdef CONFIG_SPL_OS_BOOT
+ if (spl_start_uboot() || spl_load_image_fat_os(stor_dev,
+
CONFIG_SYS_SATA_FAT_BOOT_PARTITION))
+#endif
+ err = spl_load_image_fat(stor_dev,
+ CONFIG_SYS_SATA_FAT_BOOT_PARTITION,
+ CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME);
+ if (err) {
+ puts("Error loading sata device\n");
+ hang();
+ }
+}
diff --git a/include/spl.h b/include/spl.h
index 5e24856..ee09fb6 100644
--- a/include/spl.h
+++ b/include/spl.h
@@ -64,6 +64,9 @@ void spl_net_load_image(const char *device);
/* USB SPL functions */
void spl_usb_load_image(void);
+/* SATA SPL functions */
+void spl_sata_load_image(void);
+
/* SPL FAT image functions */
int spl_load_image_fat(block_dev_desc_t *block_dev, int partition, const char
*filename);
int spl_load_image_fat_os(block_dev_desc_t *block_dev, int partition);
diff --git a/spl/Makefile b/spl/Makefile
index 4143e38..28fcfdd 100644
--- a/spl/Makefile
+++ b/spl/Makefile
@@ -85,6 +85,7 @@ LIBS-$(CONFIG_SPL_USBETH_SUPPORT) += drivers/usb/gadget/
LIBS-$(CONFIG_SPL_WATCHDOG_SUPPORT) += drivers/watchdog/
LIBS-$(CONFIG_SPL_USB_HOST_SUPPORT) += drivers/usb/host/
LIBS-$(CONFIG_OMAP_USB_PHY) += drivers/usb/phy/
+LIBS-$(CONFIG_SPL_SATA_SUPPORT) += drivers/block/
ifneq (,$(CONFIG_MX23)$(CONFIG_MX35)$(filter $(SOC), mx25 mx27 mx5 mx6 mx31
mx35))
LIBS-y += arch/$(ARCH)/imx-common/
--
1.7.9.5
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[U-Boot] [uBoot] [PATCH v2 2/2] ARM: O5/dra7xx: Add SATA boot support
Add the SATA boot support for OMAP5 and dra7xx.
Renamed the omap_sata_init to the common init_sata(int dev)
for commonality in with sata stack.
Added the ROM boot device ID for SATA.
Signed-off-by: Dan Murphy
---
v2 - Removed omap_sata_init from header -
http://patchwork.ozlabs.org/patch/314812/
arch/arm/cpu/armv7/omap-common/sata.c |3 ++-
arch/arm/include/asm/arch-omap5/sata.h |9 -
arch/arm/include/asm/arch-omap5/spl.h |1 +
board/ti/dra7xx/evm.c |2 +-
board/ti/omap5_uevm/evm.c |2 +-
5 files changed, 5 insertions(+), 12 deletions(-)
diff --git a/arch/arm/cpu/armv7/omap-common/sata.c
b/arch/arm/cpu/armv7/omap-common/sata.c
index f5468c4..cad4fee 100644
--- a/arch/arm/cpu/armv7/omap-common/sata.c
+++ b/arch/arm/cpu/armv7/omap-common/sata.c
@@ -12,6 +12,7 @@
#include
#include
#include
+#include
#include
#include "pipe3-phy.h"
@@ -31,7 +32,7 @@ struct omap_pipe3 sata_phy = {
.dpll_map = dpll_map_sata,
};
-int omap_sata_init(void)
+int init_sata(int dev)
{
int ret;
u32 val;
diff --git a/arch/arm/include/asm/arch-omap5/sata.h
b/arch/arm/include/asm/arch-omap5/sata.h
index 2ca8947..b69165b 100644
--- a/arch/arm/include/asm/arch-omap5/sata.h
+++ b/arch/arm/include/asm/arch-omap5/sata.h
@@ -36,13 +36,4 @@
#define TI_SATA_IDLE_SMART_WAKE(0x3 << 2)
#define TI_SATA_IDLE_SMART (0x2 << 2)
-#ifdef CONFIG_SCSI_AHCI_PLAT
-int omap_sata_init(void);
-#else
-static inline int omap_sata_init(void)
-{
- return 0;
-}
-#endif /* CONFIG_SCSI_AHCI_PLAT */
-
#endif /* _TI_SATA_H */
diff --git a/arch/arm/include/asm/arch-omap5/spl.h
b/arch/arm/include/asm/arch-omap5/spl.h
index 2d5a62e..4a279cf 100644
--- a/arch/arm/include/asm/arch-omap5/spl.h
+++ b/arch/arm/include/asm/arch-omap5/spl.h
@@ -15,6 +15,7 @@
#define BOOT_DEVICE_MMC15
#define BOOT_DEVICE_MMC26
#define BOOT_DEVICE_MMC2_2 7
+#define BOOT_DEVICE_SATA 9
#define BOOT_DEVICE_SPI10
#define BOOT_DEVICE_UART 0x43
diff --git a/board/ti/dra7xx/evm.c b/board/ti/dra7xx/evm.c
index 1b60b8f..38d656c 100644
--- a/board/ti/dra7xx/evm.c
+++ b/board/ti/dra7xx/evm.c
@@ -80,7 +80,7 @@ int board_init(void)
int board_late_init(void)
{
- omap_sata_init();
+ init_sata(0);
return 0;
}
diff --git a/board/ti/omap5_uevm/evm.c b/board/ti/omap5_uevm/evm.c
index af854da..abf7fe3 100644
--- a/board/ti/omap5_uevm/evm.c
+++ b/board/ti/omap5_uevm/evm.c
@@ -70,7 +70,7 @@ int board_init(void)
int board_late_init(void)
{
- omap_sata_init();
+ init_sata(0);
return 0;
}
--
1.7.9.5
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[U-Boot] [PATCH] fpga: zynqpl: Add support for zc7015 device
Just extend tables with this new device.
Signed-off-by: Michal Simek
---
board/xilinx/zynq/board.c | 4
include/zynqpl.h | 5 +
2 files changed, 9 insertions(+)
diff --git a/board/xilinx/zynq/board.c b/board/xilinx/zynq/board.c
index a5b9bde..5a47149 100644
--- a/board/xilinx/zynq/board.c
+++ b/board/xilinx/zynq/board.c
@@ -23,6 +23,7 @@ Xilinx_desc fpga;
/* It can be done differently */
Xilinx_desc fpga010 = XILINX_XC7Z010_DESC(0x10);
+Xilinx_desc fpga015 = XILINX_XC7Z015_DESC(0x15);
Xilinx_desc fpga020 = XILINX_XC7Z020_DESC(0x20);
Xilinx_desc fpga030 = XILINX_XC7Z030_DESC(0x30);
Xilinx_desc fpga045 = XILINX_XC7Z045_DESC(0x45);
@@ -40,6 +41,9 @@ int board_init(void)
case XILINX_ZYNQ_7010:
fpga = fpga010;
break;
+ case XILINX_ZYNQ_7015:
+ fpga = fpga015;
+ break;
case XILINX_ZYNQ_7020:
fpga = fpga020;
break;
diff --git a/include/zynqpl.h b/include/zynqpl.h
index 6107cbf..c81446e 100644
--- a/include/zynqpl.h
+++ b/include/zynqpl.h
@@ -17,6 +17,7 @@ extern int zynq_dump(Xilinx_desc *desc, const void *buf,
size_t bsize);
extern int zynq_info(Xilinx_desc *desc);
#define XILINX_ZYNQ_7010 0x2
+#define XILINX_ZYNQ_7015 0x1b
#define XILINX_ZYNQ_7020 0x7
#define XILINX_ZYNQ_7030 0xc
#define XILINX_ZYNQ_7045 0x11
@@ -24,6 +25,7 @@ extern int zynq_info(Xilinx_desc *desc);
/* Device Image Sizes */
#define XILINX_XC7Z010_SIZE16669920/8
+#define XILINX_XC7Z015_SIZE28085344/8
#define XILINX_XC7Z020_SIZE32364512/8
#define XILINX_XC7Z030_SIZE47839328/8
#define XILINX_XC7Z045_SIZE106571232/8
@@ -33,6 +35,9 @@ extern int zynq_info(Xilinx_desc *desc);
#define XILINX_XC7Z010_DESC(cookie) \
{ xilinx_zynq, devcfg, XILINX_XC7Z010_SIZE, NULL, cookie, "7z010" }
+#define XILINX_XC7Z015_DESC(cookie) \
+{ xilinx_zynq, devcfg, XILINX_XC7Z015_SIZE, NULL, cookie, "7z015" }
+
#define XILINX_XC7Z020_DESC(cookie) \
{ xilinx_zynq, devcfg, XILINX_XC7Z020_SIZE, NULL, cookie, "7z020" }
--
1.8.2.3
pgpUlIz4RznoG.pgp
Description: PGP signature
___
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U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2] OMAP24xx I2C: Add support for 'setspeed'
changes to omap24_i2c_write(...) for polling ARDY Bit from IRQ-Status.
Otherwise on a subsequent call the transfer of last byte from the
predecessor is aborted and therefore lost. For exmaple when
i2c_write(...) is followed by a i2c_setspeed(...) (which has to
deactivate and activate master for changing psc,...).
Signed-off-by: Hannes Petermaier
---
Changes for v2:
- fixed compile error due to '= ='
- removed [PATCH 1/2]: only 1 patch is needed
- fixed omap24_i2c_write(...) for waiting until all transfer is finished.
drivers/i2c/omap24xx_i2c.c | 128
include/i2c.h |1 +
2 files changed, 84 insertions(+), 45 deletions(-)
diff --git a/drivers/i2c/omap24xx_i2c.c b/drivers/i2c/omap24xx_i2c.c
index c784004..2d841eb 100644
--- a/drivers/i2c/omap24xx_i2c.c
+++ b/drivers/i2c/omap24xx_i2c.c
@@ -32,6 +32,10 @@
* - Status functions now read irqstatus_raw as per TRM guidelines
* (except for OMAP243X and OMAP34XX).
* - Driver now supports up to I2C5 (OMAP5).
+ *
+ * Copyright (c) 2014 Hannes Petermaier , B&R
+ * - Added support for set_speed
+ *
*/
#include
@@ -53,43 +57,65 @@ static int wait_for_bb(struct i2c_adapter *adap);
static struct i2c *omap24_get_base(struct i2c_adapter *adap);
static u16 wait_for_event(struct i2c_adapter *adap);
static void flush_fifo(struct i2c_adapter *adap);
-
-static void omap24_i2c_init(struct i2c_adapter *adap, int speed, int slaveadd)
+static int omap24_i2c_findpsc(u32 *pscl, u32 *psch, uint speed)
{
- struct i2c *i2c_base = omap24_get_base(adap);
- int psc, fsscll, fssclh;
- int hsscll = 0, hssclh = 0;
- u32 scll, sclh;
- int timeout = I2C_TIMEOUT;
+ unsigned int sampleclk, prescaler;
+ int fsscll, fssclh;
- /* Only handle standard, fast and high speeds */
- if ((speed != OMAP_I2C_STANDARD) &&
- (speed != OMAP_I2C_FAST_MODE) &&
- (speed != OMAP_I2C_HIGH_SPEED)) {
- printf("Error : I2C unsupported speed %d\n", speed);
- return;
- }
+ speed <<= 1;
+ prescaler = 0;
+ /* some divisors may cause a precission loss, but shouldn't
+* be a big thing, because i2c_clk is then allready very slow.
+*/
+ while (prescaler <= 0xFF) {
+ sampleclk = I2C_IP_CLK / (prescaler+1);
+
+ fsscll = sampleclk / speed;
+ fssclh = fsscll;
+ fsscll -= I2C_FASTSPEED_SCLL_TRIM;
+ fssclh -= I2C_FASTSPEED_SCLH_TRIM;
+
+ if (((fsscll > 0) && (fssclh > 0)) &&
+ ((fsscll <= (255-I2C_FASTSPEED_SCLL_TRIM)) &&
+ (fssclh <= (255-I2C_FASTSPEED_SCLH_TRIM {
+ if (pscl)
+ *pscl = fsscll;
+ if (psch)
+ *psch = fssclh;
- psc = I2C_IP_CLK / I2C_INTERNAL_SAMPLING_CLK;
- psc -= 1;
- if (psc < I2C_PSC_MIN) {
- printf("Error : I2C unsupported prescalar %d\n", psc);
- return;
+ return prescaler;
+ }
+ prescaler++;
}
+ return -1;
+}
+static uint omap24_i2c_setspeed(struct i2c_adapter *adap, uint speed)
+{
+ struct i2c *i2c_base = omap24_get_base(adap);
+ int psc, fsscll = 0, fssclh = 0;
+ int hsscll = 0, hssclh = 0;
+ u32 scll = 0, sclh = 0;
- if (speed == OMAP_I2C_HIGH_SPEED) {
+ if (speed >= OMAP_I2C_HIGH_SPEED) {
/* High speed */
+ psc = I2C_IP_CLK / I2C_INTERNAL_SAMPLING_CLK;
+ psc -= 1;
+ if (psc < I2C_PSC_MIN) {
+ printf("Error : I2C unsupported prescaler %d\n", psc);
+ return -1;
+ }
/* For first phase of HS mode */
- fsscll = fssclh = I2C_INTERNAL_SAMPLING_CLK /
- (2 * OMAP_I2C_FAST_MODE);
+ fsscll = I2C_INTERNAL_SAMPLING_CLK / (2 * speed);
+ fssclh = fsscll;
fsscll -= I2C_HIGHSPEED_PHASE_ONE_SCLL_TRIM;
fssclh -= I2C_HIGHSPEED_PHASE_ONE_SCLH_TRIM;
if (((fsscll < 0) || (fssclh < 0)) ||
((fsscll > 255) || (fssclh > 255))) {
puts("Error : I2C initializing first phase clock\n");
- return;
+ return -1;
}
/* For second phase of HS mode */
@@ -100,7 +126,7 @@ static void omap24_i2c_init(struct i2c_adapter *adap, int
speed, int slaveadd)
if (((fsscll < 0) || (fssclh < 0)) ||
((fsscll > 255) || (fssclh > 255))) {
puts("Error : I2C initializing second phase clock\n");
- return;
+ return -1;
}
scll = (unsigned int)hsscll << 8 | (un
[U-Boot] [PATCH v3 1/9] arc: add architecture header files
These are header files used by ARC700 architecture.
Also note that "arch-arc700/hardware.h" is only required for compilation of
"designware_i2c" driver which refers to "asm/arch/hardware.h".
It would be good to fix mentioned driver sometime soon but it will cause
changes in ARM board configs that use "designware_i2c".
Signed-off-by: Alexey Brodkin
Cc: Vineet Gupta
Cc: Francois Bedard
Cc: Wolfgang Denk
Cc: Heiko Schocher
---
Changes for v3:
* Clean-up of headers copied form Linux kernel and other architectures.
* Removed BCR registers as non-needed in u-Boot.
* Removal of legacy chech for __KERNEL__ definition.
* Added "u-boot-arc.h" with ARC-specific init functions.
* Added comment on existence of "hardware.h".
* Move all AUX regs into one header.
* Use "__raw_{read|write}" accessors from Linux.
arch/arc/include/asm/arch-arc700/hardware.h | 10 ++
arch/arc/include/asm/arcregs.h | 55 +++
arch/arc/include/asm/bitops.h | 19 +++
arch/arc/include/asm/byteorder.h| 23 +++
arch/arc/include/asm/cache.h| 23 +++
arch/arc/include/asm/config.h | 12 ++
arch/arc/include/asm/errno.h| 1 +
arch/arc/include/asm/global_data.h | 19 +++
arch/arc/include/asm/io.h | 218
arch/arc/include/asm/posix_types.h | 39 +
arch/arc/include/asm/ptrace.h | 50 +++
arch/arc/include/asm/sections.h | 14 ++
arch/arc/include/asm/string.h | 27
arch/arc/include/asm/types.h| 55 +++
arch/arc/include/asm/u-boot-arc.h | 12 ++
arch/arc/include/asm/u-boot.h | 15 ++
arch/arc/include/asm/unaligned.h| 1 +
17 files changed, 593 insertions(+)
create mode 100644 arch/arc/include/asm/arch-arc700/hardware.h
create mode 100644 arch/arc/include/asm/arcregs.h
create mode 100644 arch/arc/include/asm/bitops.h
create mode 100644 arch/arc/include/asm/byteorder.h
create mode 100644 arch/arc/include/asm/cache.h
create mode 100644 arch/arc/include/asm/config.h
create mode 100644 arch/arc/include/asm/errno.h
create mode 100644 arch/arc/include/asm/global_data.h
create mode 100644 arch/arc/include/asm/io.h
create mode 100644 arch/arc/include/asm/posix_types.h
create mode 100644 arch/arc/include/asm/ptrace.h
create mode 100644 arch/arc/include/asm/sections.h
create mode 100644 arch/arc/include/asm/string.h
create mode 100644 arch/arc/include/asm/types.h
create mode 100644 arch/arc/include/asm/u-boot-arc.h
create mode 100644 arch/arc/include/asm/u-boot.h
create mode 100644 arch/arc/include/asm/unaligned.h
diff --git a/arch/arc/include/asm/arch-arc700/hardware.h
b/arch/arc/include/asm/arch-arc700/hardware.h
new file mode 100644
index 000..8ec13a8
--- /dev/null
+++ b/arch/arc/include/asm/arch-arc700/hardware.h
@@ -0,0 +1,10 @@
+/*
+ * Copyright (C) 2014 Synopsys, Inc. All rights reserved.
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+/*
+ * This file is only required to allow compilation of "designware_i2c" driver.
+ * Which explicitly includes .
+ */
diff --git a/arch/arc/include/asm/arcregs.h b/arch/arc/include/asm/arcregs.h
new file mode 100644
index 000..5d48d11
--- /dev/null
+++ b/arch/arc/include/asm/arcregs.h
@@ -0,0 +1,55 @@
+/*
+ * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. All rights reserved.
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#ifndef _ASM_ARC_ARCREGS_H
+#define _ASM_ARC_ARCREGS_H
+
+/*
+ * ARC architecture has additional address space - auxiliary registers.
+ * These registers are mostly used for configuration purposes.
+ * These registers are not memory mapped and special commands are used for
+ * access: "lr"/"sr".
+ */
+
+#define ARC_AUX_IDENTITY 0x04
+#define ARC_AUX_STATUS32 0x0a
+
+/* Instruction cache related auxiliary registers */
+#define ARC_AUX_IC_IVIC0x10
+#define ARC_AUX_IC_CTRL0x11
+#define ARC_AUX_IC_IVIL0x19
+#if (CONFIG_ARC_MMU_VER > 2)
+#define ARC_AUX_IC_PTAG0x1E
+#endif
+
+/* Timer related auxiliary registers */
+#define ARC_AUX_TIMER0_CNT 0x21/* Timer 0 count */
+#define ARC_AUX_TIMER0_CTRL0x22/* Timer 0 control */
+#define ARC_AUX_TIMER0_LIMIT 0x23/* Timer 0 limit */
+
+#define ARC_AUX_INTR_VEC_BASE 0x25
+
+/* Data cache related auxiliary registers */
+#define ARC_AUX_DC_IVDC0x47
+#define ARC_AUX_DC_CTRL0x48
+
+#define ARC_AUX_DC_IVDL0x4A
+#define ARC_AUX_DC_FLSH0x4B
+#define ARC_AUX_DC_FLDL0x4C
+#if (CONFIG_ARC_MMU_VER > 2)
+#define ARC_AUX_DC_PTAG0x5C
+#endif
+
+#ifndef __ASSEMBLY__
+/* Accessors for auxiliary registers */
+#define read_aux_reg(reg) __builtin_arc_lr(reg)
+
+/* gcc builtin sr needs reg param to be long immediate */
+#define write_aux_reg(reg_immed, val)
[U-Boot] [PATCH v3 0/9] Add support for the ARC700 architecture
This patch series adds support for the Synopsys DesignWare ARC700 architecture. DesignWare ARC700 is family of 32-bit CPUs developed by Synopsys, Inc. Since version 3.9 ARC architecture is supported in mainline Linux developemnt. And now to get better support in commonly used boot-loader we are introducing port of U-Boot for ARC700 CPUs. Patches included in this series are also available on GitHub in the 'for-upstream-v3' branch: g...@github.com:foss-for-synopsys-dwc-arc-processors/u-boot.git Also browsable here: https://github.com/foss-for-synopsys-dwc-arc-processors/u-boot/tree/for-upstream-v3 NOTE: there's an acked by Tom Rini prerequisite for Arcangel4 board: http://patchwork.ozlabs.org/patch/300901/ For those who are interested in building this port please download pre-built toolchains for x86_64 hosts. For RedHat-based distros: https://github.com/foss-for-synopsys-dwc-arc-processors/toolchain/releases/download/arc-4.8-R2/arc_gnu_4.8-R2_prebuilt_uclibc_le_rhel6_install.tar.gz For Debian-based distros: https://github.com/foss-for-synopsys-dwc-arc-processors/toolchain/releases/download/arc-4.8-R2/arc_gnu_4.8-R2_prebuilt_uclibc_le_ubuntu_install.tar.gz Major changes for v3: * Clean-up of headers copied from Linux kernel and other architectures. * Fix checkpatch.pl errors and most of warnings (except really required "typedefs" in "posix_types.h" and "volatile" in data accessors implemented with assembly instuctions). * Arcangel4 board now has big-endian modificatoin so both endianesses could be used for testing and debugging. * Common board init functionality moved from boards to cpu sources. Each patch that follows has detailed description of its changes. Alexey Brodkin (9): arc: add architecture header files arc: add cpu files arc: add library functions arc: bdinfo, image and arc-specific init functions declarations support arc: add support for standalone programs arc: add Arcangel4 board support arc: add AXS101 board support arc: add architecture to MAKEALL arc: add README for architecture MAKEALL | 6 + arch/arc/config.mk | 31 arch/arc/cpu/arc700/Makefile| 13 ++ arch/arc/cpu/arc700/cache.c | 138 arch/arc/cpu/arc700/config.mk | 7 + arch/arc/cpu/arc700/cpu.c | 47 ++ arch/arc/cpu/arc700/interrupts.c| 142 arch/arc/cpu/arc700/reset.c | 19 +++ arch/arc/cpu/arc700/start.S | 241 arch/arc/cpu/arc700/timer.c | 24 +++ arch/arc/cpu/arc700/u-boot.lds | 72 + arch/arc/include/asm/arch-arc700/hardware.h | 10 ++ arch/arc/include/asm/arcregs.h | 55 +++ arch/arc/include/asm/bitops.h | 19 +++ arch/arc/include/asm/byteorder.h| 23 +++ arch/arc/include/asm/cache.h| 23 +++ arch/arc/include/asm/config.h | 12 ++ arch/arc/include/asm/errno.h| 1 + arch/arc/include/asm/global_data.h | 19 +++ arch/arc/include/asm/io.h | 218 + arch/arc/include/asm/posix_types.h | 39 + arch/arc/include/asm/ptrace.h | 50 ++ arch/arc/include/asm/sections.h | 14 ++ arch/arc/include/asm/string.h | 27 arch/arc/include/asm/types.h| 55 +++ arch/arc/include/asm/u-boot-arc.h | 12 ++ arch/arc/include/asm/u-boot.h | 15 ++ arch/arc/include/asm/unaligned.h| 1 + arch/arc/lib/Makefile | 16 ++ arch/arc/lib/bootm.c| 106 arch/arc/lib/memcmp.S | 121 ++ arch/arc/lib/memcpy-700.S | 63 arch/arc/lib/memset.S | 62 +++ arch/arc/lib/relocate.c | 72 + arch/arc/lib/sections.c | 21 +++ arch/arc/lib/strchr-700.S | 141 arch/arc/lib/strcmp.S | 97 +++ arch/arc/lib/strcpy-700.S | 67 arch/arc/lib/strlen.S | 80 + board/synopsys/arcangel4/Makefile | 11 ++ board/synopsys/axs101/Makefile | 8 + board/synopsys/axs101/axs101.c | 44 + board/synopsys/axs101/nand.c| 226 ++ boards.cfg | 3 + common/cmd_bdinfo.c | 18 +++ common/image.c | 1 + doc/README.ARC | 27 examples/standalone/stubs.c | 13 ++ include/common.h| 3 + include/configs/arcangel4-be.h | 96
[U-Boot] [PATCH v3 3/9] arc: add library functions
These are library functions used by ARC700 architecture.
Following files were borrowed from Linux kernel sources,
commit 5ee54f38171b9b3541c5e9cf9c3a9e53455fd8b4 (Linux 3.11.10):
* memcmp.S
* memcpy-700.S
* memset.S
* strchr-700.S
* strcmp.S
* strcpy-700.S
* strlen.S
Signed-off-by: Alexey Brodkin
Cc: Vineet Gupta
Cc: Francois Bedard
Cc: Wolfgang Denk
Cc: Heiko Schocher
---
Changes for v3:
* Mostly cosmetics in string routines.
* Moved declaration of "__text_end" to "asm/sections.h".
arch/arc/lib/Makefile | 16 ++
arch/arc/lib/bootm.c | 106 ++
arch/arc/lib/memcmp.S | 121 +++
arch/arc/lib/memcpy-700.S | 63 +
arch/arc/lib/memset.S | 62
arch/arc/lib/relocate.c | 72 +++
arch/arc/lib/sections.c | 21 +++
arch/arc/lib/strchr-700.S | 141 ++
arch/arc/lib/strcmp.S | 97 +++
arch/arc/lib/strcpy-700.S | 67 ++
arch/arc/lib/strlen.S | 80 ++
11 files changed, 846 insertions(+)
create mode 100644 arch/arc/lib/Makefile
create mode 100644 arch/arc/lib/bootm.c
create mode 100644 arch/arc/lib/memcmp.S
create mode 100644 arch/arc/lib/memcpy-700.S
create mode 100644 arch/arc/lib/memset.S
create mode 100644 arch/arc/lib/relocate.c
create mode 100644 arch/arc/lib/sections.c
create mode 100644 arch/arc/lib/strchr-700.S
create mode 100644 arch/arc/lib/strcmp.S
create mode 100644 arch/arc/lib/strcpy-700.S
create mode 100644 arch/arc/lib/strlen.S
diff --git a/arch/arc/lib/Makefile b/arch/arc/lib/Makefile
new file mode 100644
index 000..7675f85
--- /dev/null
+++ b/arch/arc/lib/Makefile
@@ -0,0 +1,16 @@
+#
+# Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y += sections.o
+obj-y += relocate.o
+obj-y += strchr-700.o
+obj-y += strcmp.o
+obj-y += strcpy-700.o
+obj-y += strlen.o
+obj-y += memcmp.o
+obj-y += memcpy-700.o
+obj-y += memset.o
+obj-$(CONFIG_CMD_BOOTM) += bootm.o
diff --git a/arch/arc/lib/bootm.c b/arch/arc/lib/bootm.c
new file mode 100644
index 000..d185a50
--- /dev/null
+++ b/arch/arc/lib/bootm.c
@@ -0,0 +1,106 @@
+/*
+ * Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include
+
+DECLARE_GLOBAL_DATA_PTR;
+
+static ulong get_sp(void)
+{
+ ulong ret;
+
+ asm("mov %0, sp" : "=r"(ret) : );
+ return ret;
+}
+
+void arch_lmb_reserve(struct lmb *lmb)
+{
+ ulong sp;
+
+ /*
+* Booting a (Linux) kernel image
+*
+* Allocate space for command line and board info - the
+* address should be as high as possible within the reach of
+* the kernel (see CONFIG_SYS_BOOTMAPSZ settings), but in unused
+* memory, which means far enough below the current stack
+* pointer.
+*/
+ sp = get_sp();
+ debug("## Current stack ends at 0x%08lx ", sp);
+
+ /* adjust sp by 4K to be safe */
+ sp -= 4096;
+ lmb_reserve(lmb, sp, (CONFIG_SYS_SDRAM_BASE + gd->ram_size - sp));
+}
+
+static int cleanup_before_linux(void)
+{
+ disable_interrupts();
+ flush_dcache_all();
+ invalidate_icache_all();
+
+ return 0;
+}
+
+/* Subcommand: PREP */
+static void boot_prep_linux(bootm_headers_t *images)
+{
+ if (image_setup_linux(images))
+ hang();
+}
+
+/* Subcommand: GO */
+static void boot_jump_linux(bootm_headers_t *images, int flag)
+{
+ void (*kernel_entry)(int zero, int arch, uint params);
+ unsigned int r0, r2;
+ int fake = (flag & BOOTM_STATE_OS_FAKE_GO);
+
+ kernel_entry = (void (*)(int, int, uint))images->ep;
+
+ debug("## Transferring control to Linux (at address %08lx)...\n",
+ (ulong) kernel_entry);
+ bootstage_mark(BOOTSTAGE_ID_RUN_OS);
+
+ printf("\nStarting kernel ...%s\n\n", fake ?
+ "(fake run for tracing)" : "");
+ bootstage_mark_name(BOOTSTAGE_ID_BOOTM_HANDOFF, "start_kernel");
+
+ cleanup_before_linux();
+
+ if (IMAGE_ENABLE_OF_LIBFDT && images->ft_len) {
+ r0 = 2;
+ r2 = (unsigned int)images->ft_addr;
+ } else {
+ r0 = 1;
+ r2 = (unsigned int)getenv("bootargs");
+ }
+
+ if (!fake)
+ kernel_entry(r0, 0, r2);
+}
+
+int do_bootm_linux(int flag, int argc, char *argv[], bootm_headers_t *images)
+{
+ /* No need for those on ARC */
+ if ((flag & BOOTM_STATE_OS_BD_T) || (flag & BOOTM_STATE_OS_CMDLINE))
+ return -1;
+
+ if (flag & BOOTM_STATE_OS_PREP) {
+ boot_prep_linux(images);
+ return 0;
+ }
+
+ if (flag & (BOOTM_STATE_OS_GO | BOOTM_STATE_OS_FAKE_GO)) {
+ boot_jump_linux(images, fla
[U-Boot] [PATCH v3 4/9] arc: bdinfo, image and arc-specific init functions declarations support
Signed-off-by: Alexey Brodkin
Cc: Vineet Gupta
Cc: Francois Bedard
Cc: Wolfgang Denk
Cc: Heiko Schocher
---
Changes for v3:
* Added inclusion of "u-boot-arc.h" in "common.h".
common/cmd_bdinfo.c | 18 ++
common/image.c | 1 +
include/common.h| 3 +++
include/image.h | 1 +
4 files changed, 23 insertions(+)
diff --git a/common/cmd_bdinfo.c b/common/cmd_bdinfo.c
index 713de14..15119a7 100644
--- a/common/cmd_bdinfo.c
+++ b/common/cmd_bdinfo.c
@@ -517,6 +517,24 @@ int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char *
const argv[])
return 0;
}
+#elif defined(CONFIG_ARC700)
+
+int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+{
+ bd_t *bd = gd->bd;
+
+ print_num("mem start", bd->bi_memstart);
+ print_lnum("mem size", bd->bi_memsize);
+
+#if defined(CONFIG_CMD_NET)
+ print_eth(0);
+ printf("ip_addr = %s\n", getenv("ipaddr"));
+#endif
+ printf("baudrate= %d bps\n", bd->bi_baudrate);
+
+ return 0;
+}
+
#else
#error "a case for this architecture does not exist!"
#endif
diff --git a/common/image.c b/common/image.c
index ae95c3f..9c6bec5 100644
--- a/common/image.c
+++ b/common/image.c
@@ -82,6 +82,7 @@ static const table_entry_t uimage_arch[] = {
{ IH_ARCH_OPENRISC, "or1k", "OpenRISC 1000",},
{ IH_ARCH_SANDBOX,"sandbox", "Sandbox", },
{ IH_ARCH_ARM64, "arm64","AArch64", },
+ { IH_ARCH_ARC,"arc", "ARC", },
{ -1, "", "", },
};
diff --git a/include/common.h b/include/common.h
index d5ebb25..221b776 100644
--- a/include/common.h
+++ b/include/common.h
@@ -408,6 +408,9 @@ static inline int setenv_addr(const char *varname, const
void *addr)
#ifdef CONFIG_MIPS
# include
#endif /* CONFIG_MIPS */
+#ifdef CONFIG_ARC
+# include
+#endif /* CONFIG_ARC */
#ifdef CONFIG_AUTO_COMPLETE
int env_complete(char *var, int maxv, char *cmdv[], int maxsz, char *buf);
diff --git a/include/image.h b/include/image.h
index 7de2bb2..3ba8c2e 100644
--- a/include/image.h
+++ b/include/image.h
@@ -157,6 +157,7 @@ struct lmb;
#define IH_ARCH_NDS32 20 /* ANDES Technology - NDS32 */
#define IH_ARCH_OPENRISC21 /* OpenRISC 1000 */
#define IH_ARCH_ARM64 22 /* ARM64*/
+#define IH_ARCH_ARC23 /* Synopsys DesignWare ARC */
/*
* Image Types
--
1.8.5.3
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[U-Boot] [PATCH v3 2/9] arc: add cpu files
Signed-off-by: Alexey Brodkin
Cc: Vineet Gupta
Cc: Francois Bedard
Cc: Wolfgang Denk
Cc: Heiko Schocher
---
Changes for v3:
* Fixed checkpatch.pl errors.
* All AUX regs were moved into one header.
* Removed BCR (Build configuration Register) checks as not needed in u-Boot.
* Clean-up of context saving/otput in exceptions.
arch/arc/config.mk | 31 +
arch/arc/cpu/arc700/Makefile | 13 +++
arch/arc/cpu/arc700/cache.c | 138 ++
arch/arc/cpu/arc700/config.mk| 7 ++
arch/arc/cpu/arc700/cpu.c| 47
arch/arc/cpu/arc700/interrupts.c | 142 +++
arch/arc/cpu/arc700/reset.c | 19 +++
arch/arc/cpu/arc700/start.S | 241 +++
arch/arc/cpu/arc700/timer.c | 24
arch/arc/cpu/arc700/u-boot.lds | 72
10 files changed, 734 insertions(+)
create mode 100644 arch/arc/config.mk
create mode 100644 arch/arc/cpu/arc700/Makefile
create mode 100644 arch/arc/cpu/arc700/cache.c
create mode 100644 arch/arc/cpu/arc700/config.mk
create mode 100644 arch/arc/cpu/arc700/cpu.c
create mode 100644 arch/arc/cpu/arc700/interrupts.c
create mode 100644 arch/arc/cpu/arc700/reset.c
create mode 100644 arch/arc/cpu/arc700/start.S
create mode 100644 arch/arc/cpu/arc700/timer.c
create mode 100644 arch/arc/cpu/arc700/u-boot.lds
diff --git a/arch/arc/config.mk b/arch/arc/config.mk
new file mode 100644
index 000..76f4f7c
--- /dev/null
+++ b/arch/arc/config.mk
@@ -0,0 +1,31 @@
+#
+# Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+ifndef CONFIG_SYS_BIG_ENDIAN
+CONFIG_SYS_LITTLE_ENDIAN = 1
+endif
+
+ifdef CONFIG_SYS_LITTLE_ENDIAN
+CROSS_COMPILE ?= arc-buildroot-linux-uclibc-
+endif
+
+ifdef CONFIG_SYS_BIG_ENDIAN
+CROSS_COMPILE ?= arceb-buildroot-linux-uclibc-
+PLATFORM_LDFLAGS += -EB
+endif
+
+PLATFORM_CPPFLAGS += -ffixed-r25 -D__ARC__ -DCONFIG_ARC -gdwarf-2
+
+LDSCRIPT := $(SRCTREE)/$(CPUDIR)/u-boot.lds
+
+# Needed for relocation
+LDFLAGS_FINAL += -pie
+
+# Load address for standalone apps
+CONFIG_STANDALONE_LOAD_ADDR ?= 0x8200
+
+# Support generic board on ARC
+__HAVE_ARCH_GENERIC_BOARD := y
diff --git a/arch/arc/cpu/arc700/Makefile b/arch/arc/cpu/arc700/Makefile
new file mode 100644
index 000..cdc5002
--- /dev/null
+++ b/arch/arc/cpu/arc700/Makefile
@@ -0,0 +1,13 @@
+#
+# Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+extra-y+= start.o
+
+obj-y += cache.o
+obj-y += cpu.o
+obj-y += interrupts.o
+obj-y += reset.o
+obj-y += timer.o
diff --git a/arch/arc/cpu/arc700/cache.c b/arch/arc/cpu/arc700/cache.c
new file mode 100644
index 000..39d522d
--- /dev/null
+++ b/arch/arc/cpu/arc700/cache.c
@@ -0,0 +1,138 @@
+/*
+ * Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include
+#include
+
+/* Bit values in IC_CTRL */
+#define IC_CTRL_CACHE_DISABLE (1 << 0)
+
+/* Bit values in DC_CTRL */
+#define DC_CTRL_CACHE_DISABLE (1 << 0)
+#define DC_CTRL_INV_MODE_FLUSH (1 << 6)
+#define DC_CTRL_FLUSH_STATUS (1 << 8)
+
+int icache_status(void)
+{
+ return (read_aux_reg(ARC_AUX_IC_CTRL) & IC_CTRL_CACHE_DISABLE) !=
+ IC_CTRL_CACHE_DISABLE;
+}
+
+void icache_enable(void)
+{
+ write_aux_reg(ARC_AUX_IC_CTRL, read_aux_reg(ARC_AUX_IC_CTRL) &
+ ~IC_CTRL_CACHE_DISABLE);
+}
+
+void icache_disable(void)
+{
+ write_aux_reg(ARC_AUX_IC_CTRL, read_aux_reg(ARC_AUX_IC_CTRL) |
+ IC_CTRL_CACHE_DISABLE);
+}
+
+void invalidate_icache_all(void)
+{
+#ifndef CONFIG_SYS_ICACHE_OFF
+ /* Any write to IC_IVIC register triggers invalidation of entire I$ */
+ write_aux_reg(ARC_AUX_IC_IVIC, 1);
+#endif /* CONFIG_SYS_ICACHE_OFF */
+}
+
+int dcache_status(void)
+{
+ return (read_aux_reg(ARC_AUX_DC_CTRL) & DC_CTRL_CACHE_DISABLE) !=
+ DC_CTRL_CACHE_DISABLE;
+}
+
+void dcache_enable(void)
+{
+ write_aux_reg(ARC_AUX_DC_CTRL, read_aux_reg(ARC_AUX_DC_CTRL) &
+ ~(DC_CTRL_INV_MODE_FLUSH | DC_CTRL_CACHE_DISABLE));
+}
+
+void dcache_disable(void)
+{
+ write_aux_reg(ARC_AUX_DC_CTRL, read_aux_reg(ARC_AUX_DC_CTRL) |
+ DC_CTRL_CACHE_DISABLE);
+}
+
+void flush_dcache_all(void)
+{
+ /* Do flush of entire cache */
+ write_aux_reg(ARC_AUX_DC_FLSH, 1);
+
+ /* Wait flush end */
+ while (read_aux_reg(ARC_AUX_DC_CTRL) & DC_CTRL_FLUSH_STATUS)
+ ;
+}
+
+#ifndef CONFIG_SYS_DCACHE_OFF
+static void dcache_flush_line(unsigned addr)
+{
+#if (CONFIG_ARC_MMU_VER > 2)
+ write_aux_reg(ARC_AUX_DC_PTAG, addr);
+#endif
+ write_aux_reg(ARC_AUX_DC_FLDL, addr);
+
+ /* Wait flush end */
+ while (read_aux_reg(ARC_AUX_DC_CTRL) & DC_CTRL_FLUSH_STATUS)
+ ;
+
+#ifndef CONFIG_SYS_ICACHE_OFF
+ /*
+* Invalidate I$ f
[U-Boot] [PATCH v3 7/9] arc: add AXS101 board support
AXS101 is a new generation of devlopment boards from Synopsys that houses
ASIC with ARC700 and lots of DesignWare peripherals:
* DW APB UART
* DW Mobile Storage (MMC/SD)
* DW I2C
* DW GMAC
Signed-off-by: Alexey Brodkin
Cc: Vineet Gupta
Cc: Francois Bedard
Cc: Wolfgang Denk
Cc: Heiko Schocher
---
Changes for v3:
* Removed network parameters.
* Common board init code moved to cpu sources.
board/synopsys/axs101/Makefile | 8 ++
board/synopsys/axs101/axs101.c | 44
board/synopsys/axs101/nand.c | 226 +
boards.cfg | 1 +
include/configs/axs101.h | 186 +
5 files changed, 465 insertions(+)
create mode 100644 board/synopsys/axs101/Makefile
create mode 100644 board/synopsys/axs101/axs101.c
create mode 100644 board/synopsys/axs101/nand.c
create mode 100644 include/configs/axs101.h
diff --git a/board/synopsys/axs101/Makefile b/board/synopsys/axs101/Makefile
new file mode 100644
index 000..f0965f7
--- /dev/null
+++ b/board/synopsys/axs101/Makefile
@@ -0,0 +1,8 @@
+#
+# Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y += axs101.o
+obj-$(CONFIG_CMD_NAND) += nand.o
diff --git a/board/synopsys/axs101/axs101.c b/board/synopsys/axs101/axs101.c
new file mode 100644
index 000..4dbeaea
--- /dev/null
+++ b/board/synopsys/axs101/axs101.c
@@ -0,0 +1,44 @@
+/*
+ * Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include
+#include
+#include
+#include
+#include
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int board_mmc_init(bd_t *bis)
+{
+ struct dwmci_host *host = NULL;
+
+ host = malloc(sizeof(struct dwmci_host));
+ if (!host) {
+ printf("dwmci_host malloc fail!\n");
+ return 1;
+ }
+
+ memset(host, 0, sizeof(struct dwmci_host));
+ host->name = "Synopsys Mobile storage";
+ host->ioaddr = (void *)ARC_DWMMC_BASE;
+ host->buswidth = 4;
+ host->dev_index = 0;
+ host->bus_hz = 2500;
+
+ add_dwmci(host, 5200, 40);
+
+ return 0;
+}
+
+int board_eth_init(bd_t *bis)
+{
+ if (designware_initialize(0, ARC_DWGMAC_BASE, 0,
+ PHY_INTERFACE_MODE_RGMII) >= 0)
+ return 1;
+
+ return 0;
+}
diff --git a/board/synopsys/axs101/nand.c b/board/synopsys/axs101/nand.c
new file mode 100644
index 000..8672803
--- /dev/null
+++ b/board/synopsys/axs101/nand.c
@@ -0,0 +1,226 @@
+/*
+ * Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include
+#include
+#include
+#include
+#include
+
+#define BUS_WIDTH 8 /* AXI data bus width in bytes */
+
+/* DMA buffer descriptor bits & masks */
+#define BD_STAT_OWN(1 << 31)
+#define BD_STAT_BD_FIRST (1 << 3)
+#define BD_STAT_BD_LAST(1 << 2)
+#define BD_SIZES_BUFFER1_MASK 0xfff
+
+#define BD_STAT_BD_COMPLETE(BD_STAT_BD_FIRST | BD_STAT_BD_LAST)
+
+/* Controller command flags */
+#define B_WFR (1 << 19) /* 1b - Wait for ready */
+#define B_LC (1 << 18) /* 1b - Last cycle */
+#define B_IWC (1 << 13) /* 1b - Interrupt when complete */
+
+/* NAND cycle types */
+#define B_CT_ADDRESS (0x0 << 16) /* Address operation*/
+#define B_CT_COMMAND (0x1 << 16) /* Command operation*/
+#define B_CT_WRITE (0x2 << 16) /* Write operation */
+#define B_CT_READ (0x3 << 16) /* Write operation */
+
+enum nand_isr_t {
+ NAND_ISR_DATAREQUIRED = 0,
+ NAND_ISR_TXUNDERFLOW,
+ NAND_ISR_TXOVERFLOW,
+ NAND_ISR_DATAAVAILABLE,
+ NAND_ISR_RXUNDERFLOW,
+ NAND_ISR_RXOVERFLOW,
+ NAND_ISR_TXDMACOMPLETE,
+ NAND_ISR_RXDMACOMPLETE,
+ NAND_ISR_DESCRIPTORUNAVAILABLE,
+ NAND_ISR_CMDDONE,
+ NAND_ISR_CMDAVAILABLE,
+ NAND_ISR_CMDERROR,
+ NAND_ISR_DATATRANSFEROVER,
+ NAND_ISR_NONE
+};
+
+enum nand_regs_t {
+ AC_FIFO = 0,/* address and command fifo */
+ IDMAC_BDADDR = 0x18,/* idmac descriptor list base address */
+ INT_STATUS = 0x118, /* interrupt status register */
+ INT_CLR_STATUS = 0x120, /* interrupt clear status register */
+};
+
+struct nand_bd {
+ uint32_t status;/* DES0 */
+ uint32_t sizes; /* DES1 */
+ uint32_t buffer_ptr0; /* DES2 */
+ uint32_t buffer_ptr1; /* DES3 */
+};
+
+#define NAND_REG_WRITE(r, v) writel(v, CONFIG_SYS_NAND_BASE + r)
+#define NAND_REG_READ(r) readl(CONFIG_SYS_NAND_BASE + r)
+
+static struct nand_bd *bd; /* DMA buffer descriptors */
+
+/**
+ * axs101_nand_write_buf - write buffer to chip
+ * @mtd: MTD device struct
[U-Boot] [PATCH v3 9/9] arc: add README for architecture
Signed-off-by: Alexey Brodkin Cc: Vineet Gupta Cc: Francois Bedard Cc: Wolfgang Denk Cc: Heiko Schocher --- No changes for v3. doc/README.ARC | 27 +++ 1 file changed, 27 insertions(+) create mode 100644 doc/README.ARC diff --git a/doc/README.ARC b/doc/README.ARC new file mode 100644 index 000..5f414fb --- /dev/null +++ b/doc/README.ARC @@ -0,0 +1,27 @@ +Synopsys' DesignWare(r) ARC(r) Processors are a family of 32-bit CPUs +that SoC designers can optimize for a wide range of uses, from deeply embedded +to high-performance host applications. + +More information on ARC cores avaialble here: +http://www.synopsys.com/IP/ProcessorIP/ARCProcessors/Pages/default.aspx + +Designers can differentiate their products by using patented configuration +technology to tailor each ARC processor instance to meet specific performance, +power and area requirements. + +The DesignWare ARC processors are also extendable, allowing designers to add +their own custom instructions that dramatically increase performance. + +Synopsys' ARC processors have been used by over 170 customers worldwide who +collectively ship more than 1 billion ARC-based chips annually. + +All DesignWare ARC processors utilize a 16-/32-bit ISA that provides excellent +performance and code density for embedded and host SoC applications. + +The RISC microprocessors are synthesizable and can be implemented in any foundry +or process, and are supported by a complete suite of development tools. + +The ARC GNU toolchain with support for all ARC Processors can be downloaded +from here (available pre-built toolchains as well): + +https://github.com/foss-for-synopsys-dwc-arc-processors/toolchain/releases -- 1.8.5.3 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v3 8/9] arc: add architecture to MAKEALL
Signed-off-by: Alexey Brodkin
Cc: Vineet Gupta
Cc: Francois Bedard
Cc: Wolfgang Denk
Cc: Heiko Schocher
---
No changes for v3.
MAKEALL | 6 ++
1 file changed, 6 insertions(+)
diff --git a/MAKEALL b/MAKEALL
index 562071a..54b0d89 100755
--- a/MAKEALL
+++ b/MAKEALL
@@ -529,6 +529,12 @@ LIST_sparc="$(targets_by_arch sparc)"
LIST_nds32="$(targets_by_arch nds32)"
+#
+## ARC Systems
+#
+
+LIST_arc="$(targets_by_arch arc)"
+
#---
get_target_location() {
--
1.8.5.3
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[U-Boot] [PATCH v3 6/9] arc: add Arcangel4 board support
Arcangel4 is a FPGA-based development board that is used for prototyping and verification of of both ARC hardware (CPUs) and software running upon CPU. Prerequisite is http://patchwork.ozlabs.org/patch/300901/ This board avaialble in 2 flavours: * Little-endian (arcangel4) * Big-endian (arcangel4-be) Signed-off-by: Alexey Brodkin Cc: Vineet Gupta Cc: Francois Bedard Cc: Wolfgang Denk Cc: Heiko Schocher --- Changes for v3: * Added big-endian flavour of the board. * Common board init code moved to cpu sources. board/synopsys/arcangel4/Makefile | 11 + boards.cfg| 2 + include/configs/arcangel4-be.h| 96 +++ include/configs/arcangel4.h | 95 ++ 4 files changed, 204 insertions(+) create mode 100644 board/synopsys/arcangel4/Makefile create mode 100644 include/configs/arcangel4-be.h create mode 100644 include/configs/arcangel4.h diff --git a/board/synopsys/arcangel4/Makefile b/board/synopsys/arcangel4/Makefile new file mode 100644 index 000..575e58f --- /dev/null +++ b/board/synopsys/arcangel4/Makefile @@ -0,0 +1,11 @@ +# +# Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved. +# +# SPDX-License-Identifier: GPL-2.0+ +# + +# This board is mostly used for debugging U-Boot in simulation (ISS). +# The only peripheral which is used on this board is a serial port which +# requires no initialization except those in "include/configs/arcangel4.h". +# And now there's no specific initializations for this board. +# So this Makefile is only required for satisfaction of U-Boot build system. diff --git a/boards.cfg b/boards.cfg index 2dfd2b4..a873aaa 100644 --- a/boards.cfg +++ b/boards.cfg @@ -1229,6 +1229,8 @@ Active sparc leon3 - gaisler - Active sparc leon3 - gaisler - gr_xc3s_1500 - - Active sparc leon3 - gaisler - grsim- - Active x86 x86corebootchromebook-x86 coreboot coreboot-x86 coreboot:SYS_TEXT_BASE=0x0111 - +Active arc arc700 - synopsys- arcangel4- Alexey Brodkin +Active arc arc700 - synopsysarcangel4 arcangel4-be- Alexey Brodkin Orphan arm arm1136mx31- imx31_phycore imx31_phycore_eetimx31_phycore:IMX31_PHYCORE_EET (resigned) Guennadi Liakhovetski Orphan arm arm1136mx31freescale - mx31ads - (resigned) Guennadi Liakhovetski Orphan arm pxa- - - lubbock - (dead address) Kyle Harris diff --git a/include/configs/arcangel4-be.h b/include/configs/arcangel4-be.h new file mode 100644 index 000..f026626 --- /dev/null +++ b/include/configs/arcangel4-be.h @@ -0,0 +1,96 @@ +/* + * Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved. + * + * SPDX-License-Identifier:GPL-2.0+ + */ + +#ifndef _CONFIG_ARCANGEL4_H_ +#define _CONFIG_ARCANGEL4_H_ + +/* + * CPU configuration + */ +#define CONFIG_SYS_BIG_ENDIAN +#define CONFIG_ARC700 +#define CONFIG_ARC_MMU_VER 3 +#define CONFIG_SYS_CACHELINE_SIZE 64 +#define CONFIG_SYS_CLK_FREQ7000 +#define CONFIG_SYS_TIMER_RATE CONFIG_SYS_CLK_FREQ + +/* + * Board configuration + */ +#define CONFIG_SYS_GENERIC_BOARD +#define CONFIG_SKIP_LOWLEVEL_INIT /* U-Boot is in RAM already */ + +#define CONFIG_ARCH_EARLY_INIT_R + +/* + * Memory configuration + */ +#define CONFIG_SYS_TEXT_BASE 0x8100 +#define CONFIG_SYS_MONITOR_BASECONFIG_SYS_TEXT_BASE + +#define CONFIG_
[U-Boot] [PATCH v2] OMAP24xx: Add support for set-speed
Adds support for set-speed on the OMAP24xx I2C Adapter.
Changes to omap24_i2c_write(...) for polling ARDY Bit from IRQ-Status.
Otherwise on a subsequent call the transfer of last byte from the
predecessor is aborted and therefore lost. For exmaple when
i2c_write(...) is followed by a i2c_setspeed(...) (which has to
deactivate and activate master for changing psc,...).
Signed-off-by: Hannes Petermaier
---
Changes for v3:
- patch v2 was corrupt at line 114 ?!
- more meaningfull text in commit-message
Changes for v2:
- fixed compile error due to '= ='
- removed [PATCH 1/2]: only 1 patch is needed
- fixed omap24_i2c_write(...) for waiting until all transfer is finished.
drivers/i2c/omap24xx_i2c.c | 128
include/i2c.h |1 +
2 files changed, 84 insertions(+), 45 deletions(-)
diff --git a/drivers/i2c/omap24xx_i2c.c b/drivers/i2c/omap24xx_i2c.c
index c784004..f724ee7 100644
--- a/drivers/i2c/omap24xx_i2c.c
+++ b/drivers/i2c/omap24xx_i2c.c
@@ -32,6 +32,10 @@
* - Status functions now read irqstatus_raw as per TRM guidelines
* (except for OMAP243X and OMAP34XX).
* - Driver now supports up to I2C5 (OMAP5).
+ *
+ * Copyright (c) 2014 Hannes Petermaier , B&R
+ * - Added support for set_speed
+ *
*/
#include
@@ -53,43 +57,65 @@ static int wait_for_bb(struct i2c_adapter *adap);
static struct i2c *omap24_get_base(struct i2c_adapter *adap);
static u16 wait_for_event(struct i2c_adapter *adap);
static void flush_fifo(struct i2c_adapter *adap);
-
-static void omap24_i2c_init(struct i2c_adapter *adap, int speed, int slaveadd)
+static int omap24_i2c_findpsc(u32 *pscl, u32 *psch, uint speed)
{
- struct i2c *i2c_base = omap24_get_base(adap);
- int psc, fsscll, fssclh;
- int hsscll = 0, hssclh = 0;
- u32 scll, sclh;
- int timeout = I2C_TIMEOUT;
+ unsigned int sampleclk, prescaler;
+ int fsscll, fssclh;
- /* Only handle standard, fast and high speeds */
- if ((speed != OMAP_I2C_STANDARD) &&
- (speed != OMAP_I2C_FAST_MODE) &&
- (speed != OMAP_I2C_HIGH_SPEED)) {
- printf("Error : I2C unsupported speed %d\n", speed);
- return;
- }
+ speed <<= 1;
+ prescaler = 0;
+ /* some divisors may cause a precission loss, but shouldn't
+* be a big thing, because i2c_clk is then allready very slow.
+*/
+ while (prescaler <= 0xFF) {
+ sampleclk = I2C_IP_CLK / (prescaler+1);
- psc = I2C_IP_CLK / I2C_INTERNAL_SAMPLING_CLK;
- psc -= 1;
- if (psc < I2C_PSC_MIN) {
- printf("Error : I2C unsupported prescalar %d\n", psc);
- return;
+ fsscll = sampleclk / speed;
+ fssclh = fsscll;
+ fsscll -= I2C_FASTSPEED_SCLL_TRIM;
+ fssclh -= I2C_FASTSPEED_SCLH_TRIM;
+
+ if (((fsscll > 0) && (fssclh > 0)) &&
+ ((fsscll <= (255-I2C_FASTSPEED_SCLL_TRIM)) &&
+ (fssclh <= (255-I2C_FASTSPEED_SCLH_TRIM {
+ if (pscl)
+ *pscl = fsscll;
+ if (psch)
+ *psch = fssclh;
+
+ return prescaler;
+ }
+ prescaler++;
}
+ return -1;
+}
+static uint omap24_i2c_setspeed(struct i2c_adapter *adap, uint speed)
+{
+ struct i2c *i2c_base = omap24_get_base(adap);
+ int psc, fsscll = 0, fssclh = 0;
+ int hsscll = 0, hssclh = 0;
+ u32 scll = 0, sclh = 0;
- if (speed == OMAP_I2C_HIGH_SPEED) {
+ if (speed >= OMAP_I2C_HIGH_SPEED) {
/* High speed */
+ psc = I2C_IP_CLK / I2C_INTERNAL_SAMPLING_CLK;
+ psc -= 1;
+ if (psc < I2C_PSC_MIN) {
+ printf("Error : I2C unsupported prescaler %d\n", psc);
+ return -1;
+ }
/* For first phase of HS mode */
- fsscll = fssclh = I2C_INTERNAL_SAMPLING_CLK /
- (2 * OMAP_I2C_FAST_MODE);
+ fsscll = I2C_INTERNAL_SAMPLING_CLK / (2 * speed);
+
+ fssclh = fsscll;
fsscll -= I2C_HIGHSPEED_PHASE_ONE_SCLL_TRIM;
fssclh -= I2C_HIGHSPEED_PHASE_ONE_SCLH_TRIM;
if (((fsscll < 0) || (fssclh < 0)) ||
((fsscll > 255) || (fssclh > 255))) {
puts("Error : I2C initializing first phase clock\n");
- return;
+ return -1;
}
/* For second phase of HS mode */
@@ -100,7 +126,7 @@ static void omap24_i2c_init(struct i2c_adapter *adap, int
speed, int slaveadd)
if (((fsscll < 0) || (fssclh < 0)) ||
((fsscll > 255) || (fssclh > 255))) {
puts("Error : I2C initializing secon
[U-Boot] [PATCH v3 5/9] arc: add support for standalone programs
Signed-off-by: Alexey Brodkin Cc: Vineet Gupta Cc: Francois Bedard Cc: Wolfgang Denk Cc: Heiko Schocher --- No changes for v3. examples/standalone/stubs.c | 13 + 1 file changed, 13 insertions(+) diff --git a/examples/standalone/stubs.c b/examples/standalone/stubs.c index 32a19ce..9346bc2 100644 --- a/examples/standalone/stubs.c +++ b/examples/standalone/stubs.c @@ -210,6 +210,19 @@ gd_t *global_data; " l.jrr13\n" \ " l.nop\n"\ : : "i"(offsetof(gd_t, jt)), "i"(XF_ ## x * sizeof(void *)) : "r13"); +#elif defined(CONFIG_ARC) +/* + * r25 holds the pointer to the global_data. r10 is call clobbered. + */ +#define EXPORT_FUNC(x) \ + asm volatile( \ +" .align 4\n" \ +" .globl " #x "\n" \ +#x ":\n" \ +" ld %%r10, [%%r25, %0]\n" \ +" ld %%r10, [%%r10, %1]\n" \ +" j [%%r10]\n" \ + : : "i"(offsetof(gd_t, jt)), "i"(XF_ ## x * sizeof(void *)) : "r10"); #else /*"addi$sp, $sp, -24\n"\ " br $r16\n" \*/ -- 1.8.5.3 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Signed-off-by for RPI U-Boot USB patches
On 02/03/2014 01:23 AM, Lukasz Majewski wrote: > Hi Stephen, > >> (Sorry for the spam; resending with the correct U-Boot mailing list >> in CC) >> >> On 02/01/2014 11:14 PM, Stephen Warren wrote: >>> Oleksandr, I'm starting to look at getting USB support enabled for >>> the Raspberry Pi in mainline U-Boot. To that end, I looked at: >>> >>> git://github.com/gonzoua/u-boot-pi.git rpi >>> >>> I took the DWC driver from there and applied it to a very recent >>> mainline U-Boot. It works very well:-) > > Could you be more specific about the exact DWC USB IP block, which you > plan to port for PI? > > Is this host or device controller? > > The USB controller designed by DesignWare is very popular (at least the > USB 2.0) in the industry. > > For example in u-boot there already is s3c_udc_*.c implementation for > device controller. Also you can look into the s3c_hsotg.c in the linux > mainline kernel. It's a driver for the DWC2 IP block, acting as a host controller (I don't know if this one can act as a device or not). (part of my upstreaming process will likely require s/dwc/dwc2/ everywhere, since I know there's at least a DWC3 in the kernel, and I would assume that means there could be a DWC1 somewhere too). ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] Please pull u-boot-mpc85xx master
Tom, The following changes since commit 07e2822d158940a0e8ba45b6ab0344ffa1011a07: board: nios2: Check if flash is configured before calling early_flash_cmd_reset() (2014-01-29 16:44:18 -0500) are available in the git repository at: git://git.denx.de/u-boot-mpc85xx.git master for you to fetch changes up to 1b4175d6fa12b8012c119889ad5cc1e65c3cf6ba: driver/ifc:Change accessor function to take care of endianness (2014-02-03 08:38:51 -0800) Nikhil Badola (1): powerpc/usb: Enable dual phy for T1040 Prabhakar Kushwaha (6): driver/fsl_pci:Update print to display PCIe generation powerpc/mpc85xx:Fix README to show correct flash memory map powerpc/mpc85xx: Update serdes protocols for T1040 boards/t1040qds: Adds ethernet support for T1040 powerpc/t104xrdb: Update T1042RDB.h in config folder driver/ifc:Change accessor function to take care of endianness Priyanka Jain (2): powerpc/t104xrdb: Update T1040RDB.h in config folder powerpc/t104xrdb: Add basic ethernet support Rainer Boschung (2): kmp204x: support for QRIO1 bootcounter kmp204x: I2C deblocking support Valentin Longchamp (7): kmp204x: introduce QRIO GPIO functions kmp204x: implement workaround for A-006559 kmp204x: add support for the kmcoge4 board kmp204x: update I2C field of RCW KM: add the KM_UBI_PART_BOOT_OPTS #define kmp204x: enable support for SPANSION SPI NOR kmp204x: initial support for PCIe FPGA configuration poonam aggrwal (1): powerpc/mpc85xx: Update LIODNs for T1040 README |6 + arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.c |2 + arch/powerpc/cpu/mpc85xx/t1040_ids.c | 36 -- arch/powerpc/cpu/mpc85xx/t1040_serdes.c| 63 ++- arch/powerpc/include/asm/config_mpc85xx.h |6 +- arch/powerpc/include/asm/fsl_serdes.h |8 +- arch/powerpc/include/asm/immap_85xx.h | 11 + board/freescale/t1040qds/Makefile |1 + board/freescale/t1040qds/README|6 +- board/freescale/t1040qds/eth.c | 492 board/freescale/t1040qds/t1040qds.c|1 + board/freescale/t104xrdb/Makefile |1 + board/freescale/t104xrdb/README|6 +- board/freescale/t104xrdb/eth.c | 72 board/keymile/kmp204x/Makefile |2 +- board/keymile/kmp204x/kmp204x.c| 128 +++--- board/keymile/kmp204x/kmp204x.h| 10 + board/keymile/kmp204x/pbi.cfg | 10 + board/keymile/kmp204x/pci.c| 85 board/keymile/kmp204x/qrio.c | 146 +++ board/keymile/kmp204x/rcw_kmp204x.cfg |2 +- boards.cfg |1 + doc/README.b4860qds|4 +- drivers/mtd/nand/fsl_ifc_nand.c| 243 ++-- drivers/mtd/nand/fsl_ifc_spl.c | 60 +-- drivers/net/fm/t1040.c | 56 +++ drivers/pci/fsl_pci_init.c |4 +- include/configs/T1040QDS.h |5 +- include/configs/T1040RDB.h | 24 +- include/configs/T1042RDB_PI.h | 20 +- include/configs/km/keymile-common.h| 10 +- include/configs/km/kmp204x-common.h| 21 +- include/configs/kmp204x.h |7 +- include/fsl_ifc.h | 42 +- 34 files changed, 1230 insertions(+), 361 deletions(-) create mode 100644 board/freescale/t1040qds/eth.c create mode 100644 board/freescale/t104xrdb/eth.c create mode 100644 board/keymile/kmp204x/qrio.c Thanks, York ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 2/6] usb:udc:samsung: Remove redundant cache operation from Samsung UDC driver
On Monday, February 03, 2014 at 09:05:06 AM, Lukasz Majewski wrote: [...] > > > To sum up: > > > > > > 1. s3c_udc_ep0_zlp - EP0 ZLP packets don't need to invalidate the > > > cache (since it is zero length transmission) > > > > > > 2. s3c_udc_pre_setup - cache invalidation is not needed when I setup > > > buffer for OUT EP0 transmission. > > > > > > The above two invalidation calls had been added by me, and are mine > > > mistakes. Those don't contribute to transmission speed up (and > > > shall be regarded as a cosmetic changes) > > > > > > 3. setdma_rx - here I invalidate parts of the s3c UDC driver's > > > internal buffer. This call is not needed anymore since we reuse the > > > buffers passed from gadgets. > > > > And you do correct cache management on those in the UDC driver or in > > the gadget driver ? > > For download, buffers are allocated in gadgets. Then buffer is passed > to the UDC driver in a USB request. > After receiving data via USB the UDC driver takes care to invalidate > cache, hence the gadget can work on the data. > > Cache management is performed in the UDC driver. OK, this is the correct place. I just wanted to make sure about this. Thanks :) > > > This is the key speed improvement here. > > > > This should be in the commit message really ;-) > > I wrongly assumed, that code explains what was the rationale :-). I'm > going to prepare more verbose commit message for v2. Please do, thanks! Best regards, Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] pci: mx6: Implement reset callback
On Monday, February 03, 2014 at 12:56:04 PM, Stefano Babic wrote:
> Hi Marek,
>
> sorry for late answer.
>
> On 28/01/2014 20:32, Marek Vasut wrote:
> > On Tuesday, January 28, 2014 at 04:06:12 PM, Stefano Babic wrote:
> >> Hi Marek,
> >>
> >> On 24/01/2014 16:25, Marek Vasut wrote:
> >>> Add a callback so that a board can implement it's own specific routine
> >>> to toggle the port's nRESET line.
> >>>
> >>> Signed-off-by: Marek Vasut
> >>> Cc: Stefano Babic
> >>> ---
> >>>
> >>> drivers/pci/pcie_imx.c | 12 +---
> >>> 1 file changed, 9 insertions(+), 3 deletions(-)
> >>>
> >>> diff --git a/drivers/pci/pcie_imx.c b/drivers/pci/pcie_imx.c
> >>> index 0a74867..b554075 100644
> >>> --- a/drivers/pci/pcie_imx.c
> >>> +++ b/drivers/pci/pcie_imx.c
> >>> @@ -450,6 +450,13 @@ static int imx6_pcie_init_phy(void)
> >>>
> >>> return 0;
> >>>
> >>> }
> >>>
> >>> +__weak int imx6_pcie_toggle_reset(void)
> >>> +{
> >>> + /* This function ought to be overridden ! */
> >>> + puts("WARNING: Make sure the PCIe nRESET line is connected!\n");
> >>> + return 0;
> >>> +}
> >>> +
> >>
> >> Just to know: I assume that the nRESET is implemented with a GPIO.
> >
> > Yes, that's how it is on all designs I saw thus far (but see below).
> >
> >> I am
> >> expecting then in the board files a diffusion of imx6_pcie_toggle_reset,
> >> where the oinly difference is the number of GPIO.
> >
> > The problem is, there are boards with no nRESET connected to the slot.
>
> Any reference to the Sabrelite is, of course, purely coincidental. But
> this is a hardware bug on a specific board and we should not adjust all
> boards according to the broken one.
Well ... SL and N6X both. For all I care, we can have #define
MX6_PCIE_RESET_GPIO and if that's not defined, puke out this warning. And
ultimatelly let this function be overriden anyway in case people used some GPIO
expander or whatnot. So the change to this would be:
__weak int imx6_pcie_toggle_reset(void)
{
#ifdef CONFIG_MX6_PCIE_RESET_GPIO
gpio_set...
mdelay();
gpio_set...
mdelay();
#else
puts("Oh yeah, broken design :-(\n");
#endif
}
This should effectivelly give you all the flexibility, what do you say?
> What do you think to check the validity of the GPIO ? For example,
> setting the GPIO to -1 for sabrelite and printing the message if the
> GPIO is negative or not defined ?
>
> > These
> > boards are broken, thus will print the warning message.
>
> Right - but there is nothing we can do it. The hardware must be fixed.
CCing Troy, Eric, Tim, surely this will make their day ;-)
Best regards,
Marek Vasut
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Re: [U-Boot] [PATCH 4/6] usb:udc:samsung: Zero copy approach for data passed to Samsung's UDC driver
On Monday, February 03, 2014 at 12:06:59 PM, Lukasz Majewski wrote: > Hi Marek, > > > On Saturday, February 01, 2014 at 12:05:29 PM, Lukasz Majewski wrote: > > > On Sat, 1 Feb 2014 03:55:20 +0100 > > > > > > Marek Vasut wrote: > > > > On Friday, January 31, 2014 at 01:16:27 PM, Lukasz Majewski wrote: > > > > > The Samsung's UDC driver is not anymore copying data from USB > > > > > requests to data aligned internal buffers. Now it works > > > > > directly in data allocated in the upper layers like UMS, DFU, > > > > > THOR. > > > > > > > > > > This change is possible since those gadgets now take care to > > > > > allocate buffers aligned to cache line > > > > > (CONFIG_SYS_CACHELINE_SIZE ). > > > > > > > > > > Previously the UDC needed to copy this data to internal aligned > > > > > buffer to prevent from unaligned access exceptions. > > > > > > > > > > Test condition > > > > > - test HW + measurement: Trats - Exynos4210 rev.1 > > > > > - test HW Trats2 - Exynos4412 rev.1 > > > > > 400 MiB compressed rootfs image download with `thor 0 mmc 0` > > > > > > > > > > Measurement: > > > > > Transmission speed: 27.04 MiB/s > > > > > > > > > > Change-Id: I1df1fbafc72ec703f0367ddee3fedf3a3f5523ed > > > > > Signed-off-by: Lukasz Majewski > > > > > Cc: Marek Vasut > > > > > > > > You should use ROUND_UP(), not ROUND() throughout the patch. > > > > Otherwise you might fail to flush/invalidate the last little bit > > > > of data in some cacheline. > > > > > > I might overlooked something, so please correct me if needed. > > > > > > I allocate buffers in gadgets which are aligned to cache line with > > > starting address and its size is a multiplication of cache line size > > > (so I will not trash data allocated next to it when I invalidate > > > cache). > > > > > > In the code I'm using ROUND to invalidate/flush more data than > > > needed (ROUND(176, 32) = 192). I'm prepared for this since buffer > > > in gadget is properly allocated (with DEFINE_CACHE_ALIGN_BUFFER() > > > which uses roundup() internally). > > > > The problem is in case you receive buffer which is aligned to > > cacheline with it's start, but is [(k * cacheline_size) + > > (cacheline_size / 2) - 1] big. I think it's unlikely, but if this > > happens, you will get corruption, right ? > > Let's suppose, that I will receive 2063B = [(64 * 32) + 16 -1] from UDC. > If the passed buffer was exactly 2063 B in size, then we would have > here a data corruption. > > However this situation will not happen _Should_ not happen ... I am absolutelly positive someone will be bitten by such assumption. I think this assumption about buffer alignment should really be documented somewhere. > since the buffer at gadget is > allocated with DEFINE_CACHE_ALIGN_BUFFER() or is an aligned > multiplication of cache line size (like 1MiB). > > I think, that it is the responsibility of gadget developer to allocate > buffers with proper alignment and size. Document that please, I doubt this is documented anywhere, but it's clearly part of the API. Also, some checks might be put in place for the alignment , they might be in #ifdef DEBUG for all I care, but it would be nice to have such a check, since I'm worried someone will really be bitten. > > You might actually want to > > check for this condition and throw a warning in such a case. > > The check is already implemented at ./arch/arm/cpu/armv7/cache_v7.c. Yeah, for arm926ejs core as well. Maybe that check shall be shifted into the cache management routine prototypes somehow ... not all CPUs implement that check :-( > It complains with "ERROR" message when start or end address is not > aligned (that is how I've discovered the unaligned buffers at UMS). Yes. > > I understand your argument with trying to not trash data, but then > > you will get a corruption during transfer, right ? > > After applying those patches, the cache management would be performed > when the USB request is completed (in the UDC). > > The only requirement for UDC is the correctly allocated buffer at > gadget. Got it. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] pci: mx6: Implement reset callback
Hi Marek,
On 02/03/2014 11:17 AM, Marek Vasut wrote:
On Monday, February 03, 2014 at 12:56:04 PM, Stefano Babic wrote:
Hi Marek,
sorry for late answer.
On 28/01/2014 20:32, Marek Vasut wrote:
On Tuesday, January 28, 2014 at 04:06:12 PM, Stefano Babic wrote:
Hi Marek,
On 24/01/2014 16:25, Marek Vasut wrote:
Add a callback so that a board can implement it's own specific routine
to toggle the port's nRESET line.
Signed-off-by: Marek Vasut
Cc: Stefano Babic
---
drivers/pci/pcie_imx.c | 12 +---
1 file changed, 9 insertions(+), 3 deletions(-)
diff --git a/drivers/pci/pcie_imx.c b/drivers/pci/pcie_imx.c
index 0a74867..b554075 100644
--- a/drivers/pci/pcie_imx.c
+++ b/drivers/pci/pcie_imx.c
@@ -450,6 +450,13 @@ static int imx6_pcie_init_phy(void)
return 0;
}
+__weak int imx6_pcie_toggle_reset(void)
+{
+ /* This function ought to be overridden ! */
+ puts("WARNING: Make sure the PCIe nRESET line is connected!\n");
+ return 0;
+}
+
Just to know: I assume that the nRESET is implemented with a GPIO.
Yes, that's how it is on all designs I saw thus far (but see below).
I am
expecting then in the board files a diffusion of imx6_pcie_toggle_reset,
where the oinly difference is the number of GPIO.
The problem is, there are boards with no nRESET connected to the slot.
Any reference to the Sabrelite is, of course, purely coincidental. But
this is a hardware bug on a specific board and we should not adjust all
boards according to the broken one.
Well ... SL and N6X both. For all I care, we can have #define
MX6_PCIE_RESET_GPIO and if that's not defined, puke out this warning. And
ultimatelly let this function be overriden anyway in case people used some GPIO
expander or whatnot. So the change to this would be:
__weak int imx6_pcie_toggle_reset(void)
{
#ifdef CONFIG_MX6_PCIE_RESET_GPIO
gpio_set...
mdelay();
gpio_set...
mdelay();
#else
puts("Oh yeah, broken design :-(\n");
That's pretty harsh!
We have lots of stuff working without a GPIO...
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Re: [U-Boot] [PATCH][v3] powerpc/mpc85xx: SECURE BOOT- Add secure boot target for B4860QDS
Dear Aneesh Bansal, In message <1391419033-14283-1-git-send-email-aneesh.ban...@freescale.com> you wrote: > Changes: > 1. L2 cache is being invalidated by Boot ROM code for e6500 core. >So removing the invalidation from start.S > 2. Clear the LAW and corresponding configuration for CPC. Boot ROM >code uses it as hosekeeping area. > 3. For Secure boot, CPC is configured as SRAM and used as house >keeping area. This configuration is to be disabled once in uboot. >Earlier this disabling of CPC as SRAM was happening in cpu_init_r. >As a result cache invalidation function was getting skipped in >case CPC is configured as SRAM.This was causing random crashes. ... > +#if defined(CONFIG_RAMBOOT_PBL) > + disable_cpc_sram(); > +#endif What is the meaning of this undocumented CONFIG_RAMBOOT_PBL option? As far as I understand, this is not a boot from RAM at all, but a totally normal step in a boot process form regular boot media? Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de The perversity of nature is nowhere better demonstrated by the fact that, when exposed to the same atmosphere, bread becomes hard while crackers become soft. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2] OMAP24xx I2C: Add support for 'setspeed'
Dear Hannes,
In message <1391444250-29430-1-git-send-email-oe5...@oevsv.at> you wrote:
> changes to omap24_i2c_write(...) for polling ARDY Bit from IRQ-Status.
> Otherwise on a subsequent call the transfer of last byte from the
> predecessor is aborted and therefore lost. For exmaple when
> i2c_write(...) is followed by a i2c_setspeed(...) (which has to
> deactivate and activate master for changing psc,...).
>
> Signed-off-by: Hannes Petermaier
> ---
> Changes for v2:
>- fixed compile error due to '= ='
>- removed [PATCH 1/2]: only 1 patch is needed
>- fixed omap24_i2c_write(...) for waiting until all transfer is finished.
General note: it is always a wise idea to add the responsible custodian
(here Heiko) on Cc: (done here). [You can automate this by adding a
Cc: line below you Signed-off-by: entry - then git-send-email will
automatically do what is needed.
> + /* some divisors may cause a precission loss, but shouldn't
> + * be a big thing, because i2c_clk is then allready very slow.
> + */
This is incorrect multi-line comment format; it should look like
this:
/*
* some divisors may cause a precission loss, but shouldn't
* be a big thing, because i2c_clk is then allready very slow.
*/
Please fix globally.
> + omap24_i2c_setspeed(adap, speed);
omap24_i2c_setspeed() returns int, and can return error codes. These
should be handled - here, and everywhere else where the function is
being called.
> + /* poll ARDY bit for making sure that last byte really has been
> + * transferred on the bus.
> + */
> + do {
> + status = wait_for_event(adap);
> + } while (!(status & I2C_STAT_ARDY));
This is potentially an endless loop. Please make sure that it will
time out (and then issue an error message).
Best regards,
Wolfgang Denk
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HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de
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little consequence. The only thing of consequence is what we do.
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Re: [U-Boot] [PATCH v3 6/9] arc: add Arcangel4 board support
Dear Alexey Brodkin,
In message <1391445368-10545-7-git-send-email-abrod...@synopsys.com> you wrote:
> Arcangel4 is a FPGA-based development board that is used for prototyping and
> verification of of both ARC hardware (CPUs) and software running upon CPU.
>
> Prerequisite is http://patchwork.ozlabs.org/patch/300901/
Is this commentuseful in the commit message?
> +#define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE + 0x200)
> +#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x1234)
This definitely makes no sense at all. Please see bullet 2. in
doc/README.memory-test
> +#define CONFIG_BAUDRATE 115200
> +#define CONFIG_SYS_BAUDRATE_TABLE{9600, 19200, 38400, 57600, 115200}
This is standard, isn't it? So you can omit it.
...
> +#define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE + 0x200)
> +#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x1234)
...
> +#define CONFIG_BAUDRATE 115200
> +#define CONFIG_SYS_BAUDRATE_TABLE{9600, 19200, 38400, 57600, 115200}
See above.
Best regards,
Wolfgang Denk
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Re: [U-Boot] [PATCH v3 7/9] arc: add AXS101 board support
Dear Alexey,
In message <1391445368-10545-8-git-send-email-abrod...@synopsys.com> you wrote:
> AXS101 is a new generation of devlopment boards from Synopsys that houses
> ASIC with ARC700 and lots of DesignWare peripherals:
...
> +#define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE + 0x200)
> +#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x1234)
...
> +#define CONFIG_BAUDRATE 115200
> +#define CONFIG_SYS_BAUDRATE_TABLE{9600, 19200, 38400, 57600, 115200}
See before.
> +/*
> + * I2C configuration
> + */
> +#define CONFIG_HARD_I2C 1
> +#define CONFIG_DW_I2C1
...
> +#define CONFIG_I2C_MULTI_BUS 1
...
Please do not define values for logical variables [please check
everywhere].
> +#define CONFIG_SYS_MAXARGS 16
You define this pretty much inconsistentlyu across your boards. Is
this intentionally?
> +/*
> + * Environment settings
> + */
> +#define CONFIG_ENV_IS_IN_EEPROM
> +#define CONFIG_ENV_SIZE 0x00200 /* 512 bytes */
> +#define CONFIG_ENV_OFFSET0
Uh, oh. Environment in EEPROM is about the worst thing you can do.
You should reconsider this design decision.
Best regards,
Wolfgang Denk
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Re: [U-Boot] [PATCH 1/2] power: add PFUZE100 PMIC driver
On Mon, Feb 3, 2014 at 4:05 AM, Stefano Babic wrote:
> Hi Tim,
>
> On 01/02/2014 20:49, Tim Harvey wrote:
>> Signed-off-by: Tim Harvey
>> ---
>> drivers/power/pmic/Makefile| 1 +
>> drivers/power/pmic/pmic_pfuze100.c | 42 +
>> include/power/pfuze100_pmic.h | 96
>> ++
>> 3 files changed, 139 insertions(+)
>> create mode 100644 drivers/power/pmic/pmic_pfuze100.c
>> create mode 100644 include/power/pfuze100_pmic.h
>>
>> diff --git a/drivers/power/pmic/Makefile b/drivers/power/pmic/Makefile
>> index 0b45ffa..4129bda 100644
>> --- a/drivers/power/pmic/Makefile
>> +++ b/drivers/power/pmic/Makefile
>> @@ -9,5 +9,6 @@ obj-$(CONFIG_POWER_MAX8998) += pmic_max8998.o
>> obj-$(CONFIG_POWER_MAX8997) += pmic_max8997.o
>> obj-$(CONFIG_POWER_MUIC_MAX8997) += muic_max8997.o
>> obj-$(CONFIG_POWER_MAX77686) += pmic_max77686.o
>> +obj-$(CONFIG_POWER_PFUZE100) += pmic_pfuze100.o
>> obj-$(CONFIG_POWER_TPS65217) += pmic_tps65217.o
>> obj-$(CONFIG_POWER_TPS65910) += pmic_tps65910.o
>> diff --git a/drivers/power/pmic/pmic_pfuze100.c
>> b/drivers/power/pmic/pmic_pfuze100.c
>> new file mode 100644
>> index 000..c382921
>> --- /dev/null
>> +++ b/drivers/power/pmic/pmic_pfuze100.c
>> @@ -0,0 +1,42 @@
>> +/*
>> + * Copyright (C) 2014 Gateworks Corporation
>> + * Tim Harvey
>> + *
>> + * SPDX-License-Identifier: GPL-2.0+
>> + */
>> +
>> +#include
>> +#include
>> +#include
>> +#include
>> +#include
>> +
>> +int pmic_init(unsigned char bus)
>> +{
>> + static const char name[] = "PFUZE100_PMIC";
>> + int ret;
>> + struct pmic *p = pmic_alloc();
>> +
>> + if (!p) {
>> + printf("%s: POWER allocation error!\n", __func__);
>> + return -ENOMEM;
>> + }
>> +
>> + p->name = name;
>> + p->interface = PMIC_I2C;
>> + p->number_of_regs = PMIC_NUM_OF_REGS;
>> + p->hw.i2c.addr = CONFIG_POWER_PFUZE100_I2C_ADDR;
>> + p->hw.i2c.tx_num = 1;
>> + p->bus = bus;
>> +
>> + ret = i2c_set_bus_num(p->bus);
>> + if (ret)
>> + return ret;
>> + if (!i2c_probe(p->hw.i2c.addr)) {
>> + unsigned char dev_id, rev_id;
>> + i2c_read(p->hw.i2c.addr, PFUZE100_DEVICEID, 1, &dev_id, 1);
>> + i2c_read(p->hw.i2c.addr, PFUZE100_REVID, 1, &rev_id, 1);
>> + printf("PMIC: PFUZE100 0x%02x/0x%02x\n", dev_id, rev_id);
>
> This is always printed, not only on your board - even from other board,
> if any, that will use this pmic. If you want that your board always
> prints the pmic revision, move this output to your board file - maybe in
> checkboard().
I noticed that all the pmic drivers in drivers/power/pmic print
something very generic in their pmic_init such as 'Board PMIC init'
(even though no initialization or communication with the pmic has
occurred). I thought I would be a bit more specific and display
exactly which PMIC init has been called and provide some details about
the PMIC version.
I would agree that this can go into checkboard()
Is there value in adding the 'puts("Board PMIC init\n")? I didn't
want to display that if the pmic isn't present (as this PMIC isn't
present on some Ventana boards).
>
>> + }
>> + return 0;
>
> If i2c_probe() returns with error, why does this function returns with
> zero (= no error) ?
oops! If displaying the version info shouldn't go in pmic_init, then
I'm not sure the value of even doing the probe here either so I will
remove.
Thanks for the review!
Tim
>
> Best regards,
> Stefano Babic
>
> --
> =
> DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
> HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
> Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de
> =
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Re: [U-Boot] [PATCH] pci: mx6: Implement reset callback
On Monday, February 03, 2014 at 07:40:09 PM, Eric Nelson wrote:
[...]
> > Well ... SL and N6X both. For all I care, we can have #define
> > MX6_PCIE_RESET_GPIO and if that's not defined, puke out this warning. And
> > ultimatelly let this function be overriden anyway in case people used
> > some GPIO expander or whatnot. So the change to this would be:
> >
> > __weak int imx6_pcie_toggle_reset(void)
> > {
> > #ifdef CONFIG_MX6_PCIE_RESET_GPIO
> >
> > gpio_set...
> > mdelay();
> > gpio_set...
> > mdelay();
> >
> > #else
> >
> > puts("Oh yeah, broken design :-(\n");
>
> That's pretty harsh!
Yes, I know that won't please you :-(
> We have lots of stuff working without a GPIO...
Actually, see PCI Express Base Specification, Rev. 3.0 : Section 6.6.1 :
Paragraph 2 . Quote:
"
6.6.1. Conventional Reset
Conventional Reset includes all reset mechanisms other than Function Level
Reset. There are two categories of Conventional Resets: Fundamental Reset and
resets that are not Fundamental Reset. This section applies to all types of
Conventional Reset.
In all form factors and system hardware configurations, there must, at some
level, be a hardware mechanism for setting or returning all Port states to the
initial conditions specified in this document – this mechanism is called
“Fundamental Reset.” This mechanism can take the form of an auxiliary
signal provided by the system to a component or adapter card, in which case the
signal must be called PERST#, and must conform to the rules specified in
Section
4.2.4.8.1. When PERST# is provided to a component or adapter, this signal must
be used by the component or adapter as Fundamental Reset.
When PERST# is not provided to a component or adapter, Fundamental Reset is
generated autonomously by the component or adapter, and the details of how this
is done are outside the scope of this document. If a Fundamental Reset is
generated autonomously by the component or adapter, and if power is supplied by
the platform to the component/adapter, the component/adapter must generate a
Fundamental Reset to itself if the supplied power goes outside of the limits
specified for the form factor or system.
"
This means, your platform _MUST_ have a FR implementation. If you have PERST
connected (that's the reset pin) to for example GPIO, then so be it and that's
your FR.
The third paragraph states that if you do NOT have PERST connected, you need
some other way of doing FR. Another way of generating FR is to depend on POR,
so
when power is applied to the component, it will generate FR internally. Thus to
produce an "alternative" FR without PERST connected, you toggle the power GPIO
of the particular slot.
I think the SL can do neither, right ? :-(
Best regards,
Marek Vasut
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Re: [U-Boot] [PATCH 1/2] power: add PFUZE100 PMIC driver
Hi
Il 01/feb/2014 20:51 "Tim Harvey" ha scritto:
>
> Signed-off-by: Tim Harvey
> ---
> drivers/power/pmic/Makefile| 1 +
> drivers/power/pmic/pmic_pfuze100.c | 42 +
> include/power/pfuze100_pmic.h | 96
++
> 3 files changed, 139 insertions(+)
> create mode 100644 drivers/power/pmic/pmic_pfuze100.c
> create mode 100644 include/power/pfuze100_pmic.h
>
> diff --git a/drivers/power/pmic/Makefile b/drivers/power/pmic/Makefile
> index 0b45ffa..4129bda 100644
> --- a/drivers/power/pmic/Makefile
> +++ b/drivers/power/pmic/Makefile
> @@ -9,5 +9,6 @@ obj-$(CONFIG_POWER_MAX8998) += pmic_max8998.o
> obj-$(CONFIG_POWER_MAX8997) += pmic_max8997.o
> obj-$(CONFIG_POWER_MUIC_MAX8997) += muic_max8997.o
> obj-$(CONFIG_POWER_MAX77686) += pmic_max77686.o
> +obj-$(CONFIG_POWER_PFUZE100) += pmic_pfuze100.o
> obj-$(CONFIG_POWER_TPS65217) += pmic_tps65217.o
> obj-$(CONFIG_POWER_TPS65910) += pmic_tps65910.o
> diff --git a/drivers/power/pmic/pmic_pfuze100.c
b/drivers/power/pmic/pmic_pfuze100.c
> new file mode 100644
> index 000..c382921
> --- /dev/null
> +++ b/drivers/power/pmic/pmic_pfuze100.c
> @@ -0,0 +1,42 @@
> +/*
> + * Copyright (C) 2014 Gateworks Corporation
> + * Tim Harvey
> + *
> + * SPDX-License-Identifier: GPL-2.0+
> + */
> +
> +#include
> +#include
> +#include
> +#include
> +#include
> +
> +int pmic_init(unsigned char bus)
> +{
> + static const char name[] = "PFUZE100_PMIC";
> + int ret;
> + struct pmic *p = pmic_alloc();
> +
> + if (!p) {
> + printf("%s: POWER allocation error!\n", __func__);
> + return -ENOMEM;
> + }
> +
> + p->name = name;
> + p->interface = PMIC_I2C;
> + p->number_of_regs = PMIC_NUM_OF_REGS;
> + p->hw.i2c.addr = CONFIG_POWER_PFUZE100_I2C_ADDR;
> + p->hw.i2c.tx_num = 1;
> + p->bus = bus;
> +
> + ret = i2c_set_bus_num(p->bus);
> + if (ret)
> + return ret;
> + if (!i2c_probe(p->hw.i2c.addr)) {
Can you use ret = i2c_probe and invert condition?
Michael
> + unsigned char dev_id, rev_id;
> + i2c_read(p->hw.i2c.addr, PFUZE100_DEVICEID, 1, &dev_id,
1);
> + i2c_read(p->hw.i2c.addr, PFUZE100_REVID, 1, &rev_id, 1);
> + printf("PMIC: PFUZE100 0x%02x/0x%02x\n", dev_id, rev_id);
> + }
> + return 0;
> +}
> diff --git a/include/power/pfuze100_pmic.h b/include/power/pfuze100_pmic.h
> new file mode 100644
> index 000..2a9032a
> --- /dev/null
> +++ b/include/power/pfuze100_pmic.h
> @@ -0,0 +1,96 @@
> +/*
> + * Copyright (C) 2014 Gateworks Corporation
> + * Tim Harvey
> + *
> + * SPDX-License-Identifier: GPL-2.0+
> + */
> +
> +#ifndef __PFUZE100_PMIC_H_
> +#define __PFUZE100_PMIC_H_
> +
> +/* PFUZE100 registers */
> +enum {
> + PFUZE100_DEVICEID = 0x00,
> + PFUZE100_REVID = 0x03,
> + PFUZE100_FABID = 0x04,
> +
> + PFUZE100_SW1ABVOL = 0x20,
> + PFUZE100_SW1CVOL= 0x2e,
> + PFUZE100_SW2VOL = 0x35,
> + PFUZE100_SW3AVOL= 0x3c,
> + PFUZE100_SW3BVOL= 0x43,
> + PFUZE100_SW4VOL = 0x4a,
> + PFUZE100_SWBSTCON1 = 0x66,
> + PFUZE100_VREFDDRCON = 0x6a,
> + PFUZE100_VSNVSVOL = 0x6b,
> + PFUZE100_VGEN1VOL = 0x6c,
> + PFUZE100_VGEN2VOL = 0x6d,
> + PFUZE100_VGEN3VOL = 0x6e,
> + PFUZE100_VGEN4VOL = 0x6f,
> + PFUZE100_VGEN5VOL = 0x70,
> + PFUZE100_VGEN6VOL = 0x71,
> +
> + PMIC_NUM_OF_REGS= 0x7f,
> +};
> +
> +/*
> + * LDO Configuration
> + */
> +
> +/* VGEN1/2 Voltage Configuration */
> +#define LDOA_0_80V 0
> +#define LDOA_0_85V 1
> +#define LDOA_0_90V 2
> +#define LDOA_0_95V 3
> +#define LDOA_1_00V 4
> +#define LDOA_1_05V 5
> +#define LDOA_1_10V 6
> +#define LDOA_1_15V 7
> +#define LDOA_1_20V 8
> +#define LDOA_1_25V 9
> +#define LDOA_1_30V 10
> +#define LDOA_1_35V 11
> +#define LDOA_1_40V 12
> +#define LDOA_1_45V 13
> +#define LDOA_1_50V 14
> +#define LDOA_1_55V 15
> +
> +/* VGEN3/4/5/6 Voltage Configuration */
> +#define LDOB_1_80V 0
> +#define LDOB_1_90V 1
> +#define LDOB_2_00V 2
> +#define LDOB_2_10V 3
> +#define LDOB_2_20V 4
> +#define LDOB_2_30V 5
> +#define LDOB_2_40V 6
> +#define LDOB_2_50V 7
> +#define LDOB_2_60V 8
> +#define LDOB_2_70V 9
> +#define LDOB_2_80V 10
> +#define LDOB_2_90V 11
> +#define LDOB_3_00V 12
> +#define LDOB_3_10V 13
> +#define LDOB_3_20V 14
> +#define LDOB_3_30V 15
> +
> +#define LDO_VOL_MASK 0xf
> +#define LDO_EN 4
> +
> +/*
> + * Boost Regulator
> + */
> +
> +/* SWBST Output Voltage */
> +#define SWBST_5_00V0
> +#define SWBST_5_05V1
> +#define SWBST_5_10V2
> +#define SWBST_5_15V3
> +
> +#define SWBST_VOL_MASK 0x3
> +#defin
Re: [U-Boot] [PATCH v3 6/9] arc: add Arcangel4 board support
Hello Wolfgang,
On Mon, 2014-02-03 at 20:15 +0100, Wolfgang Denk wrote:
> Dear Alexey Brodkin,
>
> In message <1391445368-10545-7-git-send-email-abrod...@synopsys.com> you
> wrote:
> > Arcangel4 is a FPGA-based development board that is used for prototyping and
> > verification of of both ARC hardware (CPUs) and software running upon CPU.
> >
> > Prerequisite is http://patchwork.ozlabs.org/patch/300901/
>
> Is this commentuseful in the commit message?
Do you mean comment regarding Arcangel4 board itself?
I upstreamed a number of drivers in both u-Boot and Linux kernel and
each time I put a brief description of device I'm submitting sources for
in commit message.
If this is uncommon and/or redundant I may remove this message in the
next re-spin.
> > +#define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE + 0x200)
> > +#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x1234)
>
> This definitely makes no sense at all. Please see bullet 2. in
> doc/README.memory-test
Thanks, will re-visit this part.
> > +#define CONFIG_BAUDRATE115200
> > +#define CONFIG_SYS_BAUDRATE_TABLE {9600, 19200, 38400, 57600, 115200}
>
> This is standard, isn't it? So you can omit it.
Indeed this is standard. But as I wrote earlier - since there's no
guidance (or at least I didn't manage to find it) on how to use stuff in
u-boot I went grepping through existing u-Boot sources and I saw how
it's done.
It might be once again my tough luck in selection of examples...
Regards,
Alexey
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Re: [U-Boot] [PATCH v3 7/9] arc: add AXS101 board support
Hello Wolfgang, On Mon, 2014-02-03 at 20:19 +0100, Wolfgang Denk wrote: > > +/* > > + * I2C configuration > > + */ > > +#define CONFIG_HARD_I2C1 > > +#define CONFIG_DW_I2C 1 > ... > > +#define CONFIG_I2C_MULTI_BUS 1 > ... > > Please do not define values for logical variables [please check > everywhere]. Oops, those slipped from my attention. Thanks for pointing out. > > +#define CONFIG_SYS_MAXARGS 16 > > You define this pretty much inconsistentlyu across your boards. Is > this intentionally? Not clear what do you mean. All 3 boards have CONFIG_SYS_MAXARGS = 16. > > +/* > > + * Environment settings > > + */ > > +#define CONFIG_ENV_IS_IN_EEPROM > > +#define CONFIG_ENV_SIZE0x00200 /* 512 bytes */ > > +#define CONFIG_ENV_OFFSET 0 > > Uh, oh. Environment in EEPROM is about the worst thing you can do. > You should reconsider this design decision. Well I may agree on this point. But due to the fact that Linux driver is still not ready for our custom NAND controller we don't rely on NAND for whatever storage. And then the only persistent storage that remains is I2C EEPROM. Regards, Alexey ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] pci: mx6: Implement reset callback
Hi Marek,
On 02/03/2014 12:33 PM, Marek Vasut wrote:
On Monday, February 03, 2014 at 07:40:09 PM, Eric Nelson wrote:
[...]
Well ... SL and N6X both. For all I care, we can have #define
MX6_PCIE_RESET_GPIO and if that's not defined, puke out this warning. And
ultimatelly let this function be overriden anyway in case people used
some GPIO expander or whatnot. So the change to this would be:
__weak int imx6_pcie_toggle_reset(void)
{
#ifdef CONFIG_MX6_PCIE_RESET_GPIO
gpio_set...
mdelay();
gpio_set...
mdelay();
#else
puts("Oh yeah, broken design :-(\n");
That's pretty harsh!
Yes, I know that won't please you :-(
Ouch!
We have lots of stuff working without a GPIO...
Actually, see PCI Express Base Specification, Rev. 3.0 : Section 6.6.1 :
Paragraph 2 . Quote:
"
6.6.1. Conventional Reset
Conventional Reset includes all reset mechanisms other than Function Level
Reset. There are two categories of Conventional Resets: Fundamental Reset and
resets that are not Fundamental Reset. This section applies to all types of
Conventional Reset.
In all form factors and system hardware configurations, there must, at some
level, be a hardware mechanism for setting or returning all Port states to the
initial conditions specified in this document – this mechanism is called
“Fundamental Reset.” This mechanism can take the form of an auxiliary
signal provided by the system to a component or adapter card, in which case the
signal must be called PERST#, and must conform to the rules specified in Section
4.2.4.8.1. When PERST# is provided to a component or adapter, this signal must
be used by the component or adapter as Fundamental Reset.
When PERST# is not provided to a component or adapter, Fundamental Reset is
generated autonomously by the component or adapter, and the details of how this
is done are outside the scope of this document. If a Fundamental Reset is
generated autonomously by the component or adapter, and if power is supplied by
the platform to the component/adapter, the component/adapter must generate a
Fundamental Reset to itself if the supplied power goes outside of the limits
specified for the form factor or system.
"
This means, your platform _MUST_ have a FR implementation. If you have PERST
connected (that's the reset pin) to for example GPIO, then so be it and that's
your FR.
The third paragraph states that if you do NOT have PERST connected, you need
some other way of doing FR. Another way of generating FR is to depend on POR, so
when power is applied to the component, it will generate FR internally. Thus to
produce an "alternative" FR without PERST connected, you toggle the power GPIO
of the particular slot.
I think the SL can do neither, right ? :-(
Right again.
PCIe was very much an afterthought (and late addition) on SABRE Lite,
and unfortunately only slightly improved on Nitrogen6x.
We have had success in using/testing PCIe devices without either, but
that doesn't mean we match the spec, and I suppose we'll have to live
with the "broken design" message...
Regards,
Eric
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Re: [U-Boot] [PATCH] powerpc/mpc85xx: Update serdes protocols for T1040
On 01/24/2014 04:21 AM, Prabhakar Kushwaha wrote: > T1040 has only one SerDes block. so update the code accordingly. > > Also, add support of SerDes Protocol 0x00, 0x06, 0x40, 0x69 0x85, > 0xA7 and 0xAA > > Signed-off-by: Arpit Goel > Signed-off-by: Poonam Aggrwal > Signed-off-by: Priyanka Jain > Signed-off-by: Prabhakar Kushwaha > --- Applied to u-boot-mpc85xx master branch. York ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] pci: mx6: Implement reset callback
Hi Marek,
On 03/02/2014 19:17, Marek Vasut wrote:
Well ... SL and N6X both. For all I care, we can have #define
MX6_PCIE_RESET_GPIO and if that's not defined, puke out this warning. And
ultimatelly let this function be overriden anyway in case people used some GPIO
expander or whatnot. So the change to this would be:
__weak int imx6_pcie_toggle_reset(void)
{
#ifdef CONFIG_MX6_PCIE_RESET_GPIO
gpio_set...
mdelay();
gpio_set...
mdelay();
#else
puts("Oh yeah, broken design :-(\n");
#endif
}
This should effectivelly give you all the flexibility, what do you say?
Right. Go on !
Best regards,
Stefano Babic
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Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de
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Re: [U-Boot] [U-Boot, 2/2, v2] boards/t1040qds: Adds ethernet support for T1040
On 01/27/2014 02:25 AM, Prabhakar Kushwaha wrote: > Enable entherent for T1040QDS. It enables FM1@DTSEC3, FM1@DTSEC4, FM1@DTSEC5 > - Define MDIO related configs > - Added eth.c file > - Update t1040.c to support RGMII and SGMII > - Update t1040qds.c to support ethernet > - Define the PHY address > > Signed-off-by: Arpit Goel > Signed-off-by: Bhupesh Sharma > Signed-off-by: Poonam Aggrwal > Signed-off-by: Priyanka Jain > Signed-off-by: Prabhakar Kushwaha > > --- > Changes for v2: > - Added missed sign off > Applied to u-boot-mpc85xx master branch. York ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] driver/fsl_pci:Update print to display PCIe generation
On 01/24/2014 11:23 PM, Prabhakar Kushwaha wrote: > Current print only display width of PCIe device. Add print to display > PCIe generation supported by the device. > > Signed-off-by: Prabhakar Kushwaha > --- Applied to u-boot-mpc85xx master branch. York ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [U-Boot, v2] powerpc/t104xrdb: Update T1040RDB.h in config folder
On 01/27/2014 12:37 AM, Priyanka Jain wrote: > -Add usb2 node entry in "hwconfig string" > > -Remove controller interleaving from hwconfig string as T1040 > has only one DDR conroller > > -SPI related macros which were earlier under #ifdef CONFIG_SPIFLASH > are move outside so that they are defined for all cases as these > macros are also used by other u-boot code > > -Add CONFIG_SYS_CSPR2_EXT to make cpld accessible in u-boot > > Signed-off-by: Poonam Aggrwal > Signed-off-by: Priyanka Jain > > --- > Changes for v2: > correct usb1 string for ; > Applied to u-boot-mpc85xx master branch. York ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH][v0] powerpc/mpc85xx: Update LIODNs for T1040
On 01/23/2014 12:54 PM, Poonam Aggrwal wrote: > Removed LIODNs for RMAN, RIO, 10G. T1040 has 10 QMAN portals so assigned > LIODNs accordingly. > > Signed-off-by: Poonam Aggrwal > --- Applied to u-boot-mpc85xx master branch. York ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [U-Boot, v2] powerpc/t104xrdb: Update T1042RDB.h in config folder
On 01/27/2014 01:11 AM, Prabhakar Kushwaha wrote: > -Add usb2 node entry in "hwconfig string" > > -Remove controller interleaving from hwconfig string as T1040 > has only one DDR conroller > > -SPI related macros which were earlier under #ifdef CONFIG_SPIFLASH > are move outside so that they are defined for all cases as these > macros are also used by other u-boot code > > -Add CONFIG_SYS_CSPR2_EXT to make cpld accessible in u-boot > > Signed-off-by: Prabhakar Kushwaha > > --- > Changes for v2: > correct usb1 string for ; Applied to u-boot-mpc85xx master branch. York ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] powerpc/mpc85xx:Fix README to show correct flash memory map
On 01/24/2014 10:41 PM, Prabhakar Kushwaha wrote: > Due to increased size of u-boot, FMAN ucode start address has been shifted > by 256KB causing a overlap with rootfs start address. > > Update rootfs start address to reflect correct memory map. > > Also fix minor typo in README > > Signed-off-by: Prabhakar Kushwaha > --- Applied to u-boot-mpc85xx master branch. York ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] pci: mx6: Implement reset callback
On Monday, February 03, 2014 at 08:57:30 PM, Eric Nelson wrote: [...] > > " > > 6.6.1. Conventional Reset > > > > Conventional Reset includes all reset mechanisms other than Function > > Level Reset. There are two categories of Conventional Resets: > > Fundamental Reset and resets that are not Fundamental Reset. This > > section applies to all types of Conventional Reset. > > > > In all form factors and system hardware configurations, there must, at > > some level, be a hardware mechanism for setting or returning all Port > > states to the initial conditions specified in this document – this > > mechanism is called “Fundamental Reset.” This mechanism can take the > > form of an auxiliary signal provided by the system to a component or > > adapter card, in which case the signal must be called PERST#, and must > > conform to the rules specified in Section 4.2.4.8.1. When PERST# is > > provided to a component or adapter, this signal must be used by the > > component or adapter as Fundamental Reset. > > > > When PERST# is not provided to a component or adapter, Fundamental Reset > > is generated autonomously by the component or adapter, and the details > > of how this is done are outside the scope of this document. If a > > Fundamental Reset is generated autonomously by the component or adapter, > > and if power is supplied by the platform to the component/adapter, the > > component/adapter must generate a Fundamental Reset to itself if the > > supplied power goes outside of the limits specified for the form factor > > or system. > > " > > > > This means, your platform _MUST_ have a FR implementation. If you have > > PERST connected (that's the reset pin) to for example GPIO, then so be > > it and that's your FR. > > > > The third paragraph states that if you do NOT have PERST connected, you > > need some other way of doing FR. Another way of generating FR is to > > depend on POR, so when power is applied to the component, it will > > generate FR internally. Thus to produce an "alternative" FR without > > PERST connected, you toggle the power GPIO of the particular slot. > > > > I think the SL can do neither, right ? :-( > > Right again. > > PCIe was very much an afterthought (and late addition) on SABRE Lite, > and unfortunately only slightly improved on Nitrogen6x. OK. This wasn't an attack in the SL direction, really. I really want to warn people to comply with the spec, since otherwise they will suffer from weird bugs that are hard to find. The PERST is a prime example of that :-( We really should start waving a sign "YOU MUST CONNECT PERST IN YOUR NEW DESIGN, OTHERWISE A KITTEN DIES!" > We have had success in using/testing PCIe devices without either, but > that doesn't mean we match the spec, and I suppose we'll have to live > with the "broken design" message... I know. The design without FR works most of the time, but there is one particular scenario where it may fail (means it fails reliably). I will assume we have just a simple RC<->EP connection with EP being i82574L card (well supported and easily available intel NIC): 1) Cold boot the system 2) Bring up the PCIe link in U-Boot 3) Use the e1000e driver for some transfer 4) Boot Linux 5) Bring up the PCIe link in Linux 6) Use the e1000e driver for some transfer 7) Reboot the system from Linux 8) Bring up the PCIe link in U-Boot In case you don't have means to do FR, your system will fail during 5) and/or during 8) because in either case, the link and/or EP device can be in undefined state from previous usage. You are therefore not able to send in-band messages to the EP (to issue hot reset for example*) nor restart the link, thus you're trapped. * if you try to send anything over unstable PCIe link on MX6, it can stall your entire system to the point where the system bus is stuck and not even JTAG debugger can halt the CPU (!) Best regards, Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH][v2] powerpc/t104xrdb: Add basic ethernet support
On 01/29/2014 10:00 PM, Priyanka Jain wrote: > This covers only non-L2 switch ethernet interfaces i.e. > RGMII and SGMII interface for both > -T1040RDB > -T1042RDB_PI > > T1040RDB is configured as serdes protocol 0x66 which can > support following interfaces > -2 RGMIIS on DTSEC4, DTSEC5 > -1 SGMII on DTSEC3 > > T1042RDB_PI is configured as serdes protocol 0x06 which can > support following interfaces > -2 RGMIIS on DTSEC4, DTSEC5 > > > Signed-off-by: Poonam Aggrwal > Signed-off-by: Priyanka Jain > --- > Changes for v2: > Initialized phy_addr to remove compilation warning. > > Applied to u-boot-mpc85xx master branch. York ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] powerpc/usb: Enable dual phy for T1040
On 01/27/2014 01:51 AM, Nikhil Badola wrote: > Define CONFIG_SYS_FSL_USB_DUAL_PHY_ENABLE macro for enabling dual > phy in t1040 > > Signed-off-by: Nikhil Badola > Applied to u-boot-mpc85xx master branch. York ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH V3 04/12] cmd_test: use table lookup for parsing
On 01/31/2014 05:03 PM, Simon Glass wrote: > Hi Stephen, > > On 27 January 2014 13:49, Stephen Warren wrote: >> From: Stephen Warren >> >> do_test() currently uses strcmp() twice to determine which operator is >> present; once to determine how many arguments the operator needs, then >> a second time to actually decode the operator and implement it. >> >> Rewrite the code so that a table lookup is used to translate the operator >> string to an integer, and use a more efficient switch statement to decode >> and execute the operator. >> >> This approach also acts as enablement for the following patches. >> >> This patch should introduce no behavioural change. >> >> Signed-off-by: Stephen Warren >> --- >> v3: New patch. > > Wow that's some interesting code...it took me a while to understand > both the old and the new code. It looks correct to me but I wonder if > it is deserving of some tests? Something like test/command_ut.c might > show a simple way to run some tests. OK, I'll send V4 of this series with your minor issues addressed, and I'll send a separate follow-on series which adds the unit tests, just so it doesn't delay or cause revisions to the main series. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH V4 01/12] fs: fix generic save command implementation
From: Stephen Warren
Fix a few issues with the generic "save" shell command, and fs_write()
function.
1) fstypes[].write wasn't filled in for some file-systems, and isn't
checked when used, which could cause crashes/... if executing save
on e.g. fat/ext filesystems.
2) fs_write() requires the length argument to be non-zero, since it needs
to know exactly how many bytes to write. Adjust the comments and code
according to this.
3) fs_write() wasn't prototyped in like other generic functions;
other code should be able to call this directly rather than invoking
the "save" shell command.
Signed-off-by: Stephen Warren
Acked-by: Simon Glass
---
v4: No change.
v3: No change.
v2: No change.
---
fs/fs.c | 9 +++--
include/fs.h | 10 ++
2 files changed, 13 insertions(+), 6 deletions(-)
diff --git a/fs/fs.c b/fs/fs.c
index be1855d1291f..9c2ef6b6597c 100644
--- a/fs/fs.c
+++ b/fs/fs.c
@@ -75,6 +75,7 @@ static struct fstype_info fstypes[] = {
.close = fat_close,
.ls = file_fat_ls,
.read = fat_read_file,
+ .write = fs_write_unsupported,
},
#endif
#ifdef CONFIG_FS_EXT4
@@ -84,6 +85,7 @@ static struct fstype_info fstypes[] = {
.close = ext4fs_close,
.ls = ext4fs_ls,
.read = ext4_read_file,
+ .write = fs_write_unsupported,
},
#endif
#ifdef CONFIG_SANDBOX
@@ -212,16 +214,11 @@ int fs_write(const char *filename, ulong addr, int
offset, int len)
void *buf;
int ret;
- /*
-* We don't actually know how many bytes are being read, since len==0
-* means read the whole file.
-*/
buf = map_sysmem(addr, len);
ret = info->write(filename, buf, offset, len);
unmap_sysmem(buf);
- /* If we requested a specific number of bytes, check we got it */
- if (ret >= 0 && len && ret != len) {
+ if (ret >= 0 && ret != len) {
printf("** Unable to write file %s **\n", filename);
ret = -1;
}
diff --git a/include/fs.h b/include/fs.h
index 7d9403ed8758..97b0094e954b 100644
--- a/include/fs.h
+++ b/include/fs.h
@@ -55,6 +55,16 @@ int fs_ls(const char *dirname);
int fs_read(const char *filename, ulong addr, int offset, int len);
/*
+ * Write file "filename" to the partition previously set by fs_set_blk_dev(),
+ * from address "addr", starting at byte offset "offset", and writing "len"
+ * bytes. "offset" may be 0 to write to the start of the file. Note that not
+ * all filesystem types support offset!=0.
+ *
+ * Returns number of bytes read on success. Returns <= 0 on error.
+ */
+int fs_write(const char *filename, ulong addr, int offset, int len);
+
+/*
* Common implementation for various filesystem commands, optionally limited
* to a specific filesystem type via the fstype parameter.
*/
--
1.8.1.5
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[U-Boot] [PATCH V4 05/12] cmd_test: check for binary operators before unary
From: Stephen Warren
This better mirrors the behaviour of bash, for example:
$ if test -z = -z; then echo yes; else echo no; fi
yes
This is parsed as a string comparison of "-z" and "-z", since the check
for the binary "=" operator occurs first. Without this change, the
command would be parsed as a -z test of "-", followed by a syntax error;
a trailing -z without and operand.
This is a behavioural change, but I believe any commands affected were
previously invalid or bizarely formed.
Signed-off-by: Stephen Warren
---
v4: No change.
v3: New patch.
---
common/cmd_test.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/common/cmd_test.c b/common/cmd_test.c
index 69b1b4cee69a..e65dd531877e 100644
--- a/common/cmd_test.c
+++ b/common/cmd_test.c
@@ -39,10 +39,6 @@ const struct {
int op;
int adv;
} op_adv[] = {
- {0, "-o", OP_OR, 1},
- {0, "-a", OP_AND, 1},
- {0, "-z", OP_STR_EMPTY, 2},
- {0, "-n", OP_STR_NEMPTY, 2},
{1, "=", OP_STR_EQ, 3},
{1, "!=", OP_STR_NEQ, 3},
{1, "<", OP_STR_LT, 3},
@@ -53,6 +49,10 @@ const struct {
{1, "-le", OP_INT_LE, 3},
{1, "-gt", OP_INT_GT, 3},
{1, "-ge", OP_INT_GE, 3},
+ {0, "-o", OP_OR, 1},
+ {0, "-a", OP_AND, 1},
+ {0, "-z", OP_STR_EMPTY, 2},
+ {0, "-n", OP_STR_NEMPTY, 2},
};
static int do_test(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
--
1.8.1.5
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[U-Boot] [PATCH V4 03/12] fs: don't pass NULL dev_desc to most filesystems
From: Stephen Warren
FAT and ext4 expect that the passed in block device descriptor not be
NULL. This causes problems on sandbox, where get_device_and_partition()
succeeds for the "host" device, yet passes back a NULL device descriptor.
Add special handling for this situation, so that the generic filesystem
commands operate as expected on sandbox.
Signed-off-by: Stephen Warren
---
v4: Added comment for struct fstype_info.null_dev_desc_ok member.
v3: New patch.
---
fs/fs.c | 16
1 file changed, 16 insertions(+)
diff --git a/fs/fs.c b/fs/fs.c
index 8fe2403a46ae..aaa6732a879c 100644
--- a/fs/fs.c
+++ b/fs/fs.c
@@ -64,6 +64,15 @@ static inline void fs_close_unsupported(void)
struct fstype_info {
int fstype;
+ /*
+* Is it legal to pass NULL as .probe()'s fs_dev_desc parameter? This
+* should be false in most cases. For "virtual" filesystems which
+* aren't based on a U-Boot block device (e.g. sandbox), this can be
+* set to true. This should also be true for the dumm entry at the end
+* of fstypes[], since that is essentially a "virtual" (non-existent)
+* filesystem.
+*/
+ bool null_dev_desc_ok;
int (*probe)(block_dev_desc_t *fs_dev_desc,
disk_partition_t *fs_partition);
int (*ls)(const char *dirname);
@@ -77,6 +86,7 @@ static struct fstype_info fstypes[] = {
#ifdef CONFIG_FS_FAT
{
.fstype = FS_TYPE_FAT,
+ .null_dev_desc_ok = false,
.probe = fat_set_blk_dev,
.close = fat_close,
.ls = file_fat_ls,
@@ -88,6 +98,7 @@ static struct fstype_info fstypes[] = {
#ifdef CONFIG_FS_EXT4
{
.fstype = FS_TYPE_EXT,
+ .null_dev_desc_ok = false,
.probe = ext4fs_probe,
.close = ext4fs_close,
.ls = ext4fs_ls,
@@ -99,6 +110,7 @@ static struct fstype_info fstypes[] = {
#ifdef CONFIG_SANDBOX
{
.fstype = FS_TYPE_SANDBOX,
+ .null_dev_desc_ok = true,
.probe = sandbox_fs_set_blk_dev,
.close = sandbox_fs_close,
.ls = sandbox_fs_ls,
@@ -109,6 +121,7 @@ static struct fstype_info fstypes[] = {
#endif
{
.fstype = FS_TYPE_ANY,
+ .null_dev_desc_ok = true,
.probe = fs_probe_unsupported,
.close = fs_close_unsupported,
.ls = fs_ls_unsupported,
@@ -162,6 +175,9 @@ int fs_set_blk_dev(const char *ifname, const char
*dev_part_str, int fstype)
fstype != info->fstype)
continue;
+ if (!fs_dev_desc && !info->null_dev_desc_ok)
+ continue;
+
if (!info->probe(fs_dev_desc, &fs_partition)) {
fs_type = info->fstype;
return 0;
--
1.8.1.5
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[U-Boot] [PATCH V4 07/12] cmd_test: evaluate to false without any arguments
From: Stephen Warren This emulates bash: $ if test; then echo yes; else echo no; fi no Currently, the code sets expr = -1 in this case, which gets mapped to 0 (true) at the end of do_test() by the logical -> shell exit code conversion. Signed-off-by: Stephen Warren --- v4: No change. v3: New patch. --- common/cmd_test.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/common/cmd_test.c b/common/cmd_test.c index b927d09eb3e0..4c2f967c6dc0 100644 --- a/common/cmd_test.c +++ b/common/cmd_test.c @@ -77,7 +77,7 @@ static int do_test(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) left = argc - 1; ap = argv + 1; - expr = -1; + expr = 0; last_unop = OP_INVALID; last_binop = OP_INVALID; last_expr = -1; -- 1.8.1.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH V4 10/12] sandbox: enable CONFIG_CMD_FS_GENERIC
From: Stephen Warren Since the generic ls command no longer segfaults sandbox, enable it. Signed-off-by: Stephen Warren Acked-by: Simon Glass --- v4: No change. v3: New patch. --- include/configs/sandbox.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/configs/sandbox.h b/include/configs/sandbox.h index a6d55822b82e..e77d06bcd3ed 100644 --- a/include/configs/sandbox.h +++ b/include/configs/sandbox.h @@ -42,6 +42,7 @@ #define CONFIG_CMD_PART #define CONFIG_DOS_PARTITION #define CONFIG_HOST_MAX_DEVICES 4 +#define CONFIG_CMD_FS_GENERIC #define CONFIG_SYS_VSNPRINTF -- 1.8.1.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH V4 02/12] fs: implement infrastructure for an 'exists' function
From: Stephen Warren
This could be used in scripts such as:
if test -e mmc 0:1 /boot/boot.scr; then
load mmc 0:1 ${scriptaddr} /boot/boot.scr
source ${scriptaddr}
fi
rather than:
if load mmc 0:1 ${scriptaddr} /boot/boot.scr; then
source ${scriptaddr}
fi
This prevents errors being printed by attempts to load non-existent
files, which can be important when checking for a large set of files,
such as /boot/boot.scr.uimg, /boot/boot.scr, /boot/extlinux.conf,
/boot.scr.uimg, /boot.scr, /extlinux.conf.
Signed-off-by: Stephen Warren
Acked-by: Simon Glass
---
v4: s/infra-structure/infrastructure/.
v3:
* Remove addition of "exists" command; it's implemented in a separate
patch later, as an operator in the "test" command.
* Invert return value of fs_exists()/file_exists() so it returns a
logical value; the mapping to shell command return value is performed
(later) in the test command.
v2: No change.
---
fs/fs.c | 32
include/fs.h | 9 +
2 files changed, 41 insertions(+)
diff --git a/fs/fs.c b/fs/fs.c
index 9c2ef6b6597c..8fe2403a46ae 100644
--- a/fs/fs.c
+++ b/fs/fs.c
@@ -41,6 +41,11 @@ static inline int fs_ls_unsupported(const char *dirname)
return -1;
}
+static inline int fs_exists_unsupported(const char *filename)
+{
+ return 0;
+}
+
static inline int fs_read_unsupported(const char *filename, void *buf,
int offset, int len)
{
@@ -62,6 +67,7 @@ struct fstype_info {
int (*probe)(block_dev_desc_t *fs_dev_desc,
disk_partition_t *fs_partition);
int (*ls)(const char *dirname);
+ int (*exists)(const char *filename);
int (*read)(const char *filename, void *buf, int offset, int len);
int (*write)(const char *filename, void *buf, int offset, int len);
void (*close)(void);
@@ -74,6 +80,7 @@ static struct fstype_info fstypes[] = {
.probe = fat_set_blk_dev,
.close = fat_close,
.ls = file_fat_ls,
+ .exists = fs_exists_unsupported,
.read = fat_read_file,
.write = fs_write_unsupported,
},
@@ -84,6 +91,7 @@ static struct fstype_info fstypes[] = {
.probe = ext4fs_probe,
.close = ext4fs_close,
.ls = ext4fs_ls,
+ .exists = fs_exists_unsupported,
.read = ext4_read_file,
.write = fs_write_unsupported,
},
@@ -94,6 +102,7 @@ static struct fstype_info fstypes[] = {
.probe = sandbox_fs_set_blk_dev,
.close = sandbox_fs_close,
.ls = sandbox_fs_ls,
+ .exists = fs_exists_unsupported,
.read = fs_read_sandbox,
.write = fs_write_sandbox,
},
@@ -103,6 +112,7 @@ static struct fstype_info fstypes[] = {
.probe = fs_probe_unsupported,
.close = fs_close_unsupported,
.ls = fs_ls_unsupported,
+ .exists = fs_exists_unsupported,
.read = fs_read_unsupported,
.write = fs_write_unsupported,
},
@@ -184,6 +194,19 @@ int fs_ls(const char *dirname)
return ret;
}
+int fs_exists(const char *filename)
+{
+ int ret;
+
+ struct fstype_info *info = fs_get_info(fs_type);
+
+ ret = info->exists(filename);
+
+ fs_close();
+
+ return ret;
+}
+
int fs_read(const char *filename, ulong addr, int offset, int len)
{
struct fstype_info *info = fs_get_info(fs_type);
@@ -309,6 +332,15 @@ int do_ls(cmd_tbl_t *cmdtp, int flag, int argc, char *
const argv[],
return 0;
}
+int file_exists(const char *dev_type, const char *dev_part, const char *file,
+ int fstype)
+{
+ if (fs_set_blk_dev(dev_type, dev_part, fstype))
+ return 0;
+
+ return fs_exists(file);
+}
+
int do_save(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[],
int fstype)
{
diff --git a/include/fs.h b/include/fs.h
index 97b0094e954b..26de0539f7d9 100644
--- a/include/fs.h
+++ b/include/fs.h
@@ -44,6 +44,13 @@ int fs_set_blk_dev(const char *ifname, const char
*dev_part_str, int fstype);
int fs_ls(const char *dirname);
/*
+ * Determine whether a file exists
+ *
+ * Returns 1 if the file exists, 0 if it doesn't exist.
+ */
+int fs_exists(const char *filename);
+
+/*
* Read file "filename" from the partition previously set by fs_set_blk_dev(),
* to address "addr", starting at byte offset "offset", and reading "len"
* bytes. "offset" may be 0 to read from the start of the file. "len" may be
@@ -72,6 +79,8 @@ int do_load(cmd_tbl_t *cmdtp, int flag, int argc, char *
const argv[],
int fstype);
int do_ls(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[],
int fstype);
+int file_exists(const char *dev_type, const char *dev_part, const char *file,
+
[U-Boot] [PATCH V4 08/12] cmd_test: implement -e test for file existence
From: Stephen Warren
This is much like a regular shell's -e operator, except that it takes
multiple arguments to specify the device type and device/partition ID
in addition to the usual filename:
if test -e mmc 0:1 /boot/boot.scr; then echo yes; else echo no; fi
Signed-off-by: Stephen Warren
---
v4: No change.
v3: New patch.
---
common/cmd_test.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/common/cmd_test.c b/common/cmd_test.c
index 4c2f967c6dc0..c93fe7823100 100644
--- a/common/cmd_test.c
+++ b/common/cmd_test.c
@@ -16,6 +16,7 @@
#include
#include
+#include
#define OP_INVALID 0
#define OP_NOT 1
@@ -33,6 +34,7 @@
#define OP_INT_LE 13
#define OP_INT_GT 14
#define OP_INT_GE 15
+#define OP_FILE_EXISTS 16
const struct {
int arg;
@@ -55,6 +57,7 @@ const struct {
{0, "-a", OP_AND, 1},
{0, "-z", OP_STR_EMPTY, 2},
{0, "-n", OP_STR_NEMPTY, 2},
+ {0, "-e", OP_FILE_EXISTS, 4},
};
static int do_test(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
@@ -143,6 +146,9 @@ static int do_test(cmd_tbl_t *cmdtp, int flag, int argc,
char * const argv[])
expr = simple_strtol(ap[0], NULL, 10) >=
simple_strtol(ap[2], NULL, 10);
break;
+ case OP_FILE_EXISTS:
+ expr = file_exists(ap[1], ap[2], ap[3], FS_TYPE_ANY);
+ break;
}
switch (op) {
--
1.8.1.5
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[U-Boot] [PATCH V4 06/12] cmd_test: implement ! on sub-expressions
From: Stephen Warren
Currently, ! can only be parsed as the first operator in an expression.
This prevents the following from working:
$ if test ! ! 1 -eq 1; then echo yes; else echo no; fi
yes
$ if test ! 1 -eq 2 -a ! 3 -eq 4; then echo yes; else echo no; fi
yes
Fix this by parsing ! like any other operator, and and handling it
similarly to -a and -o.
Signed-off-by: Stephen Warren
---
v4: No change.
v3: New patch.
---
common/cmd_test.c | 43 ---
1 file changed, 24 insertions(+), 19 deletions(-)
diff --git a/common/cmd_test.c b/common/cmd_test.c
index e65dd531877e..b927d09eb3e0 100644
--- a/common/cmd_test.c
+++ b/common/cmd_test.c
@@ -18,6 +18,7 @@
#include
#define OP_INVALID 0
+#define OP_NOT 1
#define OP_OR 2
#define OP_AND 3
#define OP_STR_EMPTY 4
@@ -49,6 +50,7 @@ const struct {
{1, "-le", OP_INT_LE, 3},
{1, "-gt", OP_INT_GT, 3},
{1, "-ge", OP_INT_GE, 3},
+ {0, "!", OP_NOT, 1},
{0, "-o", OP_OR, 1},
{0, "-a", OP_AND, 1},
{0, "-z", OP_STR_EMPTY, 2},
@@ -58,7 +60,7 @@ const struct {
static int do_test(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
char * const *ap;
- int i, op, left, adv, expr, last_expr, neg, last_cmp;
+ int i, op, left, adv, expr, last_expr, last_unop, last_binop;
/* args? */
if (argc < 3)
@@ -73,17 +75,11 @@ static int do_test(cmd_tbl_t *cmdtp, int flag, int argc,
char * const argv[])
}
#endif
- last_expr = 0;
- left = argc - 1; ap = argv + 1;
- if (left > 0 && strcmp(ap[0], "!") == 0) {
- neg = 1;
- ap++;
- left--;
- } else
- neg = 0;
-
+ left = argc - 1;
+ ap = argv + 1;
expr = -1;
- last_cmp = OP_INVALID;
+ last_unop = OP_INVALID;
+ last_binop = OP_INVALID;
last_expr = -1;
while (left > 0) {
for (i = 0; i < ARRAY_SIZE(op_adv); i++) {
@@ -152,27 +148,36 @@ static int do_test(cmd_tbl_t *cmdtp, int flag, int argc,
char * const argv[])
switch (op) {
case OP_OR:
last_expr = expr;
- last_cmp = OP_OR;
+ last_binop = OP_OR;
break;
case OP_AND:
last_expr = expr;
- last_cmp = OP_AND;
+ last_binop = OP_AND;
+ break;
+ case OP_NOT:
+ if (last_unop == OP_NOT)
+ last_unop = OP_INVALID;
+ else
+ last_unop = OP_NOT;
break;
default:
- if (last_cmp == OP_OR)
+ if (last_unop == OP_NOT) {
+ expr = !expr;
+ last_unop = OP_INVALID;
+ }
+
+ if (last_binop == OP_OR)
expr = last_expr || expr;
- else if (last_cmp == OP_AND)
+ else if (last_binop == OP_AND)
expr = last_expr && expr;
- last_cmp = OP_INVALID;
+ last_binop = OP_INVALID;
+
break;
}
ap += adv; left -= adv;
}
- if (neg)
- expr = !expr;
-
expr = !expr;
debug (": returns %d\n", expr);
--
1.8.1.5
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Re: [U-Boot] [PATCH v2 4/9] kmp204x: implement workaround for A-006559
On 01/27/2014 02:49 AM, Valentin Longchamp wrote: > According to the errata, some bits of an undocumented register in the > DCSR must be set for every core in order to avoid a possible data or > instruction corruption. > > This is required for the 2.0 revision of the P2041 that should be used > as soon as available in our design. > > Signed-off-by: Valentin Longchamp > --- > > Changes in v2: None Applied to u-boot-mpc85xx master branch. York ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 1/9] kmp204x: support for QRIO1 bootcounter
On 01/27/2014 02:49 AM, Valentin Longchamp wrote: > From: Rainer Boschung > > - make use of the QRIO1 32bit register at 0x20 as bootcounter register > - check for BOOTCOUNT_MAGIC pattern when before bootcounter value is read > > Signed-off-by: Rainer Boschung > Signed-off-by: Valentin Longchamp > > --- > > Changes in v2: > - change bootcounter implementation to use generic driver > Applied to u-boot-mpc85xx master branch. York ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH V4 09/12] sandbox: implement exists() function
From: Stephen Warren
This hooks into the generic "file exists" support added in an earlier
patch, and provides an implementation for the sandbox test environment.
Signed-off-by: Stephen Warren
Acked-by: Simon Glass
---
v4: No change.
v3:
* Remove "sb exists" command; it's part of "test" now.
* Invert return value of exists(), per change to previous patch.
v2: No change.
---
fs/fs.c| 2 +-
fs/sandbox/sandboxfs.c | 8
include/sandboxfs.h| 1 +
3 files changed, 10 insertions(+), 1 deletion(-)
diff --git a/fs/fs.c b/fs/fs.c
index aaa6732a879c..2e60f57bc450 100644
--- a/fs/fs.c
+++ b/fs/fs.c
@@ -114,7 +114,7 @@ static struct fstype_info fstypes[] = {
.probe = sandbox_fs_set_blk_dev,
.close = sandbox_fs_close,
.ls = sandbox_fs_ls,
- .exists = fs_exists_unsupported,
+ .exists = sandbox_fs_exists,
.read = fs_read_sandbox,
.write = fs_write_sandbox,
},
diff --git a/fs/sandbox/sandboxfs.c b/fs/sandbox/sandboxfs.c
index dd028da8e32b..85079788c990 100644
--- a/fs/sandbox/sandboxfs.c
+++ b/fs/sandbox/sandboxfs.c
@@ -72,6 +72,14 @@ int sandbox_fs_ls(const char *dirname)
return 0;
}
+int sandbox_fs_exists(const char *filename)
+{
+ ssize_t sz;
+
+ sz = os_get_filesize(filename);
+ return sz >= 0;
+}
+
void sandbox_fs_close(void)
{
}
diff --git a/include/sandboxfs.h b/include/sandboxfs.h
index 8ea8cb7e2e62..a51ad13044e1 100644
--- a/include/sandboxfs.h
+++ b/include/sandboxfs.h
@@ -25,6 +25,7 @@ long sandbox_fs_read_at(const char *filename, unsigned long
pos,
void sandbox_fs_close(void);
int sandbox_fs_ls(const char *dirname);
+int sandbox_fs_exists(const char *filename);
int fs_read_sandbox(const char *filename, void *buf, int offset, int len);
int fs_write_sandbox(const char *filename, void *buf, int offset, int len);
--
1.8.1.5
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[U-Boot] [PATCH V4 11/12] ext4: implement exists() for ext4fs
From: Stephen Warren
This hooks into the generic "file exists" support added in an earlier
patch, and provides an implementation for the ext4 filesystem.
Signed-off-by: Stephen Warren
Acked-by: Simon Glass
---
v4: No change.
v3: Invert return value of exists(), per change to previous patch.
v2: No change.
---
fs/ext4/ext4fs.c | 8
fs/fs.c | 2 +-
include/ext4fs.h | 1 +
3 files changed, 10 insertions(+), 1 deletion(-)
diff --git a/fs/ext4/ext4fs.c b/fs/ext4/ext4fs.c
index 735b2564175b..417ce7b63bf0 100644
--- a/fs/ext4/ext4fs.c
+++ b/fs/ext4/ext4fs.c
@@ -174,6 +174,14 @@ int ext4fs_ls(const char *dirname)
return 0;
}
+int ext4fs_exists(const char *filename)
+{
+ int file_len;
+
+ file_len = ext4fs_open(filename);
+ return file_len >= 0;
+}
+
int ext4fs_read(char *buf, unsigned len)
{
if (ext4fs_root == NULL || ext4fs_file == NULL)
diff --git a/fs/fs.c b/fs/fs.c
index 2e60f57bc450..4e9b162d49ff 100644
--- a/fs/fs.c
+++ b/fs/fs.c
@@ -102,7 +102,7 @@ static struct fstype_info fstypes[] = {
.probe = ext4fs_probe,
.close = ext4fs_close,
.ls = ext4fs_ls,
- .exists = fs_exists_unsupported,
+ .exists = ext4fs_exists,
.read = ext4_read_file,
.write = fs_write_unsupported,
},
diff --git a/include/ext4fs.h b/include/ext4fs.h
index 242938039662..aacb147de24b 100644
--- a/include/ext4fs.h
+++ b/include/ext4fs.h
@@ -134,6 +134,7 @@ int ext4fs_read(char *buf, unsigned len);
int ext4fs_mount(unsigned part_length);
void ext4fs_close(void);
int ext4fs_ls(const char *dirname);
+int ext4fs_exists(const char *filename);
void ext4fs_free_node(struct ext2fs_node *node, struct ext2fs_node *currroot);
int ext4fs_devread(lbaint_t sector, int byte_offset, int byte_len, char *buf);
void ext4fs_set_blk_dev(block_dev_desc_t *rbdd, disk_partition_t *info);
--
1.8.1.5
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[U-Boot] [PATCH V4 12/12] fat: implement exists() for FAT fs
From: Stephen Warren
This hooks into the generic "file exists" support added in an earlier
patch, and provides an implementation for the FAT filesystem.
Signed-off-by: Stephen Warren
Acked-by: Simon Glass
---
v4: No change.
v3:
* s/ext/fat/ in the commit description too:-(
* Invert return value of exists(), per change to previous patch.
v2: s/ext/fat/ in the commit subject.
---
fs/fat/fat.c | 18 ++
fs/fs.c | 2 +-
include/fat.h | 1 +
3 files changed, 16 insertions(+), 5 deletions(-)
diff --git a/fs/fat/fat.c b/fs/fat/fat.c
index b41d62e3c386..54f42eae0d05 100644
--- a/fs/fat/fat.c
+++ b/fs/fat/fat.c
@@ -808,7 +808,7 @@ __u8 do_fat_read_at_block[MAX_CLUSTSIZE]
long
do_fat_read_at(const char *filename, unsigned long pos, void *buffer,
- unsigned long maxsize, int dols)
+ unsigned long maxsize, int dols, int dogetsize)
{
char fnamecopy[2048];
boot_sector bs;
@@ -1152,7 +1152,10 @@ rootdir_done:
subname = nextname;
}
- ret = get_contents(mydata, dentptr, pos, buffer, maxsize);
+ if (dogetsize)
+ ret = FAT2CPU32(dentptr->size);
+ else
+ ret = get_contents(mydata, dentptr, pos, buffer, maxsize);
debug("Size: %d, got: %ld\n", FAT2CPU32(dentptr->size), ret);
exit:
@@ -1163,7 +1166,7 @@ exit:
long
do_fat_read(const char *filename, void *buffer, unsigned long maxsize, int
dols)
{
- return do_fat_read_at(filename, 0, buffer, maxsize, dols);
+ return do_fat_read_at(filename, 0, buffer, maxsize, dols, 0);
}
int file_fat_detectfs(void)
@@ -1233,11 +1236,18 @@ int file_fat_ls(const char *dir)
return do_fat_read(dir, NULL, 0, LS_YES);
}
+int fat_exists(const char *filename)
+{
+ int sz;
+ sz = do_fat_read_at(filename, 0, NULL, 0, LS_NO, 1);
+ return sz >= 0;
+}
+
long file_fat_read_at(const char *filename, unsigned long pos, void *buffer,
unsigned long maxsize)
{
printf("reading %s\n", filename);
- return do_fat_read_at(filename, pos, buffer, maxsize, LS_NO);
+ return do_fat_read_at(filename, pos, buffer, maxsize, LS_NO, 0);
}
long file_fat_read(const char *filename, void *buffer, unsigned long maxsize)
diff --git a/fs/fs.c b/fs/fs.c
index 4e9b162d49ff..79d432d58fe0 100644
--- a/fs/fs.c
+++ b/fs/fs.c
@@ -90,7 +90,7 @@ static struct fstype_info fstypes[] = {
.probe = fat_set_blk_dev,
.close = fat_close,
.ls = file_fat_ls,
- .exists = fs_exists_unsupported,
+ .exists = fat_exists,
.read = fat_read_file,
.write = fs_write_unsupported,
},
diff --git a/include/fat.h b/include/fat.h
index 2c951e7d79c6..c8eb7ccd2904 100644
--- a/include/fat.h
+++ b/include/fat.h
@@ -188,6 +188,7 @@ file_read_func file_fat_read;
int file_cd(const char *path);
int file_fat_detectfs(void);
int file_fat_ls(const char *dir);
+int fat_exists(const char *filename);
long file_fat_read_at(const char *filename, unsigned long pos, void *buffer,
unsigned long maxsize);
long file_fat_read(const char *filename, void *buffer, unsigned long maxsize);
--
1.8.1.5
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Re: [U-Boot] [PATCH v2 2/9] kmp204x: introduce QRIO GPIO functions
On 01/27/2014 02:49 AM, Valentin Longchamp wrote: > The QRIO GPIO functions can be of general interest. They are thus added > to a qrio.c and their prototype are available from kmp204x.h. The QRIO > prst function are also included in this file, as well as the functions > required for the I2C deblocking support (open-drain). > > Signed-off-by: Valentin Longchamp > --- > > Changes in v2: None > Applied to u-boot-mpc85xx master branch. York ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 6/9] kmp204x: update I2C field of RCW
On 01/27/2014 02:49 AM, Valentin Longchamp wrote: > On the previous HW revision (now unsupported), there was a need for > external DMA signals and thus the I2C3/4 signals were used > DMA1_DONE/ACK/REQ. > > These signals now are configured as GPIO[16:19]. > > Signed-off-by: Valentin Longchamp > --- > > Changes in v2: None > Applied to u-boot-mpc85xx master branch. York ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v4] OMAP24xx I2C: Add support for set-speed
Adds support for set-speed on the OMAP24xx I2C Adapter.
Changes to omap24_i2c_write(...) for polling ARDY Bit from IRQ-Status.
Otherwise on a subsequent call the transfer of last byte from the
predecessor is aborted and therefore lost. For exmaple when
i2c_write(...) is followed by a i2c_setspeed(...) (which has to
deactivate and activate master for changing psc,...).
Minor cosmetical changes.
Signed-off-by: Hannes Petermaier
Cc: Heiko Schocher
---
Changes for v4:
- patch v3 had style problems: fixed
- handle return value of omap24_i2c_setspeed during init
- polling ARDY bit could end up in an endless-loop: fixed
Changes for v3:
- patch v2 was corrupt at line 114 ?!
- more meaningfull text in commit-message
Changes for v2:
- fixed compile error due to '= ='
- removed [PATCH 1/2]: only 1 patch is needed
- fixed omap24_i2c_write(...) for waiting until all transfer is finished.
drivers/i2c/omap24xx_i2c.c | 147 +---
include/i2c.h |1 +
2 files changed, 98 insertions(+), 50 deletions(-)
diff --git a/drivers/i2c/omap24xx_i2c.c b/drivers/i2c/omap24xx_i2c.c
index c784004..a39b591 100644
--- a/drivers/i2c/omap24xx_i2c.c
+++ b/drivers/i2c/omap24xx_i2c.c
@@ -32,6 +32,10 @@
* - Status functions now read irqstatus_raw as per TRM guidelines
* (except for OMAP243X and OMAP34XX).
* - Driver now supports up to I2C5 (OMAP5).
+ *
+ * Copyright (c) 2014 Hannes Petermaier , B&R
+ * - Added support for set_speed
+ *
*/
#include
@@ -53,43 +57,66 @@ static int wait_for_bb(struct i2c_adapter *adap);
static struct i2c *omap24_get_base(struct i2c_adapter *adap);
static u16 wait_for_event(struct i2c_adapter *adap);
static void flush_fifo(struct i2c_adapter *adap);
-
-static void omap24_i2c_init(struct i2c_adapter *adap, int speed, int slaveadd)
+static int omap24_i2c_findpsc(u32 *pscl, u32 *psch, uint speed)
{
- struct i2c *i2c_base = omap24_get_base(adap);
- int psc, fsscll, fssclh;
- int hsscll = 0, hssclh = 0;
- u32 scll, sclh;
- int timeout = I2C_TIMEOUT;
+ unsigned int sampleclk, prescaler;
+ int fsscll, fssclh;
- /* Only handle standard, fast and high speeds */
- if ((speed != OMAP_I2C_STANDARD) &&
- (speed != OMAP_I2C_FAST_MODE) &&
- (speed != OMAP_I2C_HIGH_SPEED)) {
- printf("Error : I2C unsupported speed %d\n", speed);
- return;
- }
+ speed <<= 1;
+ prescaler = 0;
+ /*
+* some divisors may cause a precission loss, but shouldn't
+* be a big thing, because i2c_clk is then allready very slow.
+*/
+ while (prescaler <= 0xFF) {
+ sampleclk = I2C_IP_CLK / (prescaler+1);
- psc = I2C_IP_CLK / I2C_INTERNAL_SAMPLING_CLK;
- psc -= 1;
- if (psc < I2C_PSC_MIN) {
- printf("Error : I2C unsupported prescalar %d\n", psc);
- return;
+ fsscll = sampleclk / speed;
+ fssclh = fsscll;
+ fsscll -= I2C_FASTSPEED_SCLL_TRIM;
+ fssclh -= I2C_FASTSPEED_SCLH_TRIM;
+
+ if (((fsscll > 0) && (fssclh > 0)) &&
+ ((fsscll <= (255-I2C_FASTSPEED_SCLL_TRIM)) &&
+ (fssclh <= (255-I2C_FASTSPEED_SCLH_TRIM {
+ if (pscl)
+ *pscl = fsscll;
+ if (psch)
+ *psch = fssclh;
+
+ return prescaler;
+ }
+ prescaler++;
}
+ return -1;
+}
+static uint omap24_i2c_setspeed(struct i2c_adapter *adap, uint speed)
+{
+ struct i2c *i2c_base = omap24_get_base(adap);
+ int psc, fsscll = 0, fssclh = 0;
+ int hsscll = 0, hssclh = 0;
+ u32 scll = 0, sclh = 0;
- if (speed == OMAP_I2C_HIGH_SPEED) {
+ if (speed >= OMAP_I2C_HIGH_SPEED) {
/* High speed */
+ psc = I2C_IP_CLK / I2C_INTERNAL_SAMPLING_CLK;
+ psc -= 1;
+ if (psc < I2C_PSC_MIN) {
+ printf("Error : I2C unsupported prescaler %d\n", psc);
+ return -1;
+ }
/* For first phase of HS mode */
- fsscll = fssclh = I2C_INTERNAL_SAMPLING_CLK /
- (2 * OMAP_I2C_FAST_MODE);
+ fsscll = I2C_INTERNAL_SAMPLING_CLK / (2 * speed);
+
+ fssclh = fsscll;
fsscll -= I2C_HIGHSPEED_PHASE_ONE_SCLL_TRIM;
fssclh -= I2C_HIGHSPEED_PHASE_ONE_SCLH_TRIM;
if (((fsscll < 0) || (fssclh < 0)) ||
((fsscll > 255) || (fssclh > 255))) {
puts("Error : I2C initializing first phase clock\n");
- return;
+ return -1;
}
/* For second phase of HS mode */
@@ -100,7 +127,7 @@ static void omap
[U-Boot] [PATCH 2/2] unit-test: add lots of tests for the Hush 'test' command
From: Stephen Warren
I recently re-wrote cmd_test() to add new features. Add a bunch of unit-
tests to make sure I didn't break anything.
Suggested-by: Simon Glass
Signed-off-by: Stephen Warren
---
This patch depends on my 12-entry patch series that implements "test -e",
since it tests that new feature.
---
test/command_ut.c | 89 +++
1 file changed, 89 insertions(+)
diff --git a/test/command_ut.c b/test/command_ut.c
index 98f7625dda12..620a297d45ac 100644
--- a/test/command_ut.c
+++ b/test/command_ut.c
@@ -58,6 +58,95 @@ static int do_ut_cmd(cmd_tbl_t *cmdtp, int flag, int argc,
char * const argv[])
"setenv list ${list}3", strlen("setenv list 1"), 0);
assert(!strcmp("1", getenv("list")));
+#ifdef CONFIG_SYS_HUSH_PARSER
+ /* Test the 'test' command */
+
+#define HUSH_TEST(name, expr, expected_result) \
+ run_command("if test " expr " ; then " \
+ "setenv " #name "_" #expected_result " y; else " \
+ "setenv " #name "_" #expected_result " n; fi", 0); \
+ assert(!strcmp(#expected_result, getenv(#name "_" #expected_result)));
+
+ /* Basic operators */
+ HUSH_TEST(streq, "aaa = aaa", y);
+ HUSH_TEST(streq, "aaa = bbb", n);
+
+ HUSH_TEST(strneq, "aaa != bbb", y);
+ HUSH_TEST(strneq, "aaa != aaa", n);
+
+ HUSH_TEST(strlt, "aaa < bbb", y);
+ HUSH_TEST(strlt, "bbb < aaa", n);
+
+ HUSH_TEST(strgt, "bbb > aaa", y);
+ HUSH_TEST(strgt, "aaa > bbb", n);
+
+ HUSH_TEST(eq, "123 -eq 123", y);
+ HUSH_TEST(eq, "123 -eq 456", n);
+
+ HUSH_TEST(ne, "123 -ne 456", y);
+ HUSH_TEST(ne, "123 -ne 123", n);
+
+ HUSH_TEST(lt, "123 -lt 456", y);
+ HUSH_TEST(lt_eq, "123 -lt 123", n);
+ HUSH_TEST(lt, "456 -lt 123", n);
+
+ HUSH_TEST(le, "123 -le 456", y);
+ HUSH_TEST(le_eq, "123 -le 123", y);
+ HUSH_TEST(le, "456 -le 123", n);
+
+ HUSH_TEST(gt, "456 -gt 123", y);
+ HUSH_TEST(gt_eq, "123 -gt 123", n);
+ HUSH_TEST(gt, "123 -gt 456", n);
+
+ HUSH_TEST(ge, "456 -ge 123", y);
+ HUSH_TEST(ge_eq, "123 -ge 123", y);
+ HUSH_TEST(ge, "123 -ge 456", n);
+
+ HUSH_TEST(z, "-z \"\"", y);
+ HUSH_TEST(z, "-z \"aaa\"", n);
+
+ HUSH_TEST(n, "-n \"aaa\"", y);
+ HUSH_TEST(n, "-n \"\"", n);
+
+ /* Inversion of simple tests */
+ HUSH_TEST(streq_inv, "! aaa = aaa", n);
+ HUSH_TEST(streq_inv, "! aaa = bbb", y);
+
+ HUSH_TEST(streq_inv_inv, "! ! aaa = aaa", y);
+ HUSH_TEST(streq_inv_inv, "! ! aaa = bbb", n);
+
+ /* Binary operators */
+ HUSH_TEST(or_0_0, "aaa != aaa -o bbb != bbb", n);
+ HUSH_TEST(or_0_1, "aaa != aaa -o bbb = bbb", y);
+ HUSH_TEST(or_1_0, "aaa = aaa -o bbb != bbb", y);
+ HUSH_TEST(or_1_1, "aaa = aaa -o bbb = bbb", y);
+
+ HUSH_TEST(and_0_0, "aaa != aaa -a bbb != bbb", n);
+ HUSH_TEST(and_0_1, "aaa != aaa -a bbb = bbb", n);
+ HUSH_TEST(and_1_0, "aaa = aaa -a bbb != bbb", n);
+ HUSH_TEST(and_1_1, "aaa = aaa -a bbb = bbb", y);
+
+ /* Inversion within binary operators */
+ HUSH_TEST(or_0_0_inv, "! aaa != aaa -o ! bbb != bbb", y);
+ HUSH_TEST(or_0_1_inv, "! aaa != aaa -o ! bbb = bbb", y);
+ HUSH_TEST(or_1_0_inv, "! aaa = aaa -o ! bbb != bbb", y);
+ HUSH_TEST(or_1_1_inv, "! aaa = aaa -o ! bbb = bbb", n);
+
+ HUSH_TEST(or_0_0_inv_inv, "! ! aaa != aaa -o ! ! bbb != bbb", n);
+ HUSH_TEST(or_0_1_inv_inv, "! ! aaa != aaa -o ! ! bbb = bbb", y);
+ HUSH_TEST(or_1_0_inv_inv, "! ! aaa = aaa -o ! ! bbb != bbb", y);
+ HUSH_TEST(or_1_1_inv_inv, "! ! aaa = aaa -o ! ! bbb = bbb", y);
+
+#ifdef CONFIG_SANDBOX
+ /*
+* File existence
+* This assume U-Boot sandbox is run from the U-Boot build directory
+*/
+ HUSH_TEST(e, "-e host - u-boot", y);
+ HUSH_TEST(e, "-e host - creating_this_file_breaks_uboot_unit_test", n);
+#endif
+#endif
+
printf("%s: Everything went swimmingly\n", __func__);
return 0;
}
--
1.8.1.5
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Re: [U-Boot] [PATCH v2 5/9] kmp204x: add support for the kmcoge4 board
On 01/27/2014 02:49 AM, Valentin Longchamp wrote: > The kmcoge4 board is the product board derived from the kmlion1 > prototype. The main difference between the 2 boards is that the kmcoge4 > does not configure the Local Bus controller for LCS2. > > Signed-off-by: Valentin Longchamp > --- > > Changes in v2: None > Applied to u-boot-mpc85xx master branch. York ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 1/2] unit-test: fix 'env default' invocation
From: Stephen Warren
"env default -f" doesn't work any more; replace it with
"env default -f -a". This avoids the following when running the ut
command:
do_ut_cmd: Testing commands
env - environment handling commands
Usage:
env default [-f] -a - [forcibly] reset default environment
...
Signed-off-by: Stephen Warren
---
test/command_ut.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/test/command_ut.c b/test/command_ut.c
index 0e83db0cca0e..98f7625dda12 100644
--- a/test/command_ut.c
+++ b/test/command_ut.c
@@ -15,7 +15,7 @@ static const char test_cmd[] = "setenv list 1\n setenv list
${list}2; "
static int do_ut_cmd(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
printf("%s: Testing commands\n", __func__);
- run_command("env default -f", 0);
+ run_command("env default -f -a", 0);
/* run a single command */
run_command("setenv single 1", 0);
--
1.8.1.5
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Re: [U-Boot] [PATCH v2 9/9] kmp204x: initial support for PCIe FPGA configuration
On 01/27/2014 02:49 AM, Valentin Longchamp wrote: > The PEXHC PCIe configuration mechanism ensures that the FPGA get > configured at power-up. Since all the PCIe devices should be configured > when the kernel start, u-boot has to take care that the FPGA gets > configured also in other reset scenarios, mostly because of possible > configuration change. > > The used mechanism is taken from the km_kirkwood design and adapted to > the kmp204x case (slightly different HW and PCIe configuration). > > Signed-off-by: Valentin Longchamp > --- > > Changes in v2: None > Applied to u-boot-mpc85xx master branch. York ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 7/9] KM: add the KM_UBI_PART_BOOT_OPTS #define
On 01/27/2014 02:49 AM, Valentin Longchamp wrote: > This define can be used if the ubi boot partition (defined for all > Keymile boards with KM_UBI_PARTITION_NAME_BOOT #define to ubi0) needs > some additionnal boot options. > > This is the case for the kmp204x boards since u-boot does not support > NAND Flash subpage accesses on this platform, an additionnal argument > that defines the VID offstet must be given to the kernel. > > The UBI cmd line option now looks like this "ubi.mtd=ubi0,2048" on this > platform. > > Signed-off-by: Valentin Longchamp > --- > > Changes in v2: None > Applied to u-boot-mpc85xx master branch. York ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 8/9] kmp204x: enable support for SPANSION SPI NOR
On 01/27/2014 02:49 AM, Valentin Longchamp wrote: > The new prototype and the final series was moved from Micron to Spansion > to have a better reset sequence that is easier to support. > > Signed-off-by: Valentin Longchamp > --- > > Changes in v2: None > Applied to u-boot-mpc85xx master branch. York ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v4 3/9] kmp204x: I2C deblocking support
On 02/02/2014 11:45 PM, Valentin Longchamp wrote: > From: Rainer Boschung > > This patch adds support for using some GPIOs that are connected to the > I2C bus to force the bus lines state and perform some bus deblocking > sequences. > > The KM common deblocking algorithm from board/keymile/common/common.c is > used. The GPIO lines used for deblocking the I2C bus are some external > GPIOs provided by the QRIO CPLD: > - SCL = GPIOA_20 > - SDA = GPIOA_21 > > The QRIO GPIOs act in an open-drain-like manner, for 0 the line is > driven low and for 1 the GPIO is set as input and the line gets > pulled-up. > > Signed-off-by: Rainer Boschung > Signed-off-by: Valentin Longchamp > > --- > > Changes in v4: > - fix usage of the #define names that got wrong in the merge process > > Changes in v3: > - rewrite the commit message and and the comments for more clarity > - fix the GPIO numbers that where not correct > > Changes in v2: None > Applied to u-boot-mpc85xx master branch. York ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH][v2] driver/ifc:Change accessor function to take care of endianness
On 01/17/2014 10:58 PM, Prabhakar Kushwaha wrote: > IFC registers can be of type Little Endian or big Endian depending upon > Freescale SoC. Here SoC defines the register type of IFC IP. > > So update acessor functions with common IFC acessor functions to take care > both type of endianness. > > Signed-off-by: Prabhakar Kushwaha > --- > Changes for v2: > - fix spelling mistakes > Applied to u-boot-mpc85xx master branch. York ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH V4 04/12] cmd_test: use table lookup for parsing
From: Stephen Warren
do_test() currently uses strcmp() twice to determine which operator is
present; once to determine how many arguments the operator needs, then
a second time to actually decode the operator and implement it.
Rewrite the code so that a table lookup is used to translate the operator
string to an integer, and use a more efficient switch statement to decode
and execute the operator.
This approach also acts as enablement for the following patches.
This patch should introduce no behavioural change.
Signed-off-by: Stephen Warren
---
v4: No change.
v3: New patch.
---
common/cmd_test.c | 177 +-
1 file changed, 110 insertions(+), 67 deletions(-)
diff --git a/common/cmd_test.c b/common/cmd_test.c
index bacc3684069b..69b1b4cee69a 100644
--- a/common/cmd_test.c
+++ b/common/cmd_test.c
@@ -17,10 +17,48 @@
#include
#include
+#define OP_INVALID 0
+#define OP_OR 2
+#define OP_AND 3
+#define OP_STR_EMPTY 4
+#define OP_STR_NEMPTY 5
+#define OP_STR_EQ 6
+#define OP_STR_NEQ 7
+#define OP_STR_LT 8
+#define OP_STR_GT 9
+#define OP_INT_EQ 10
+#define OP_INT_NEQ 11
+#define OP_INT_LT 12
+#define OP_INT_LE 13
+#define OP_INT_GT 14
+#define OP_INT_GE 15
+
+const struct {
+ int arg;
+ const char *str;
+ int op;
+ int adv;
+} op_adv[] = {
+ {0, "-o", OP_OR, 1},
+ {0, "-a", OP_AND, 1},
+ {0, "-z", OP_STR_EMPTY, 2},
+ {0, "-n", OP_STR_NEMPTY, 2},
+ {1, "=", OP_STR_EQ, 3},
+ {1, "!=", OP_STR_NEQ, 3},
+ {1, "<", OP_STR_LT, 3},
+ {1, ">", OP_STR_GT, 3},
+ {1, "-eq", OP_INT_EQ, 3},
+ {1, "-ne", OP_INT_NEQ, 3},
+ {1, "-lt", OP_INT_LT, 3},
+ {1, "-le", OP_INT_LE, 3},
+ {1, "-gt", OP_INT_GT, 3},
+ {1, "-ge", OP_INT_GE, 3},
+};
+
static int do_test(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
char * const *ap;
- int left, adv, expr, last_expr, neg, last_cmp;
+ int i, op, left, adv, expr, last_expr, neg, last_cmp;
/* args? */
if (argc < 3)
@@ -45,83 +83,88 @@ static int do_test(cmd_tbl_t *cmdtp, int flag, int argc,
char * const argv[])
neg = 0;
expr = -1;
- last_cmp = -1;
+ last_cmp = OP_INVALID;
last_expr = -1;
while (left > 0) {
-
- if (strcmp(ap[0], "-o") == 0 || strcmp(ap[0], "-a") == 0)
- adv = 1;
- else if (strcmp(ap[0], "-z") == 0 || strcmp(ap[0], "-n") == 0)
- adv = 2;
- else
- adv = 3;
-
- if (left < adv) {
+ for (i = 0; i < ARRAY_SIZE(op_adv); i++) {
+ if (left <= op_adv[i].arg)
+ continue;
+ if (!strcmp(ap[op_adv[i].arg], op_adv[i].str)) {
+ op = op_adv[i].op;
+ adv = op_adv[i].adv;
+ break;
+ }
+ }
+ if (i == ARRAY_SIZE(op_adv)) {
expr = 1;
break;
}
-
- if (adv == 1) {
- if (strcmp(ap[0], "-o") == 0) {
- last_expr = expr;
- last_cmp = 0;
- } else if (strcmp(ap[0], "-a") == 0) {
- last_expr = expr;
- last_cmp = 1;
- } else {
- expr = 1;
- break;
- }
+ if (left < adv) {
+ expr = 1;
+ break;
}
- if (adv == 2) {
- if (strcmp(ap[0], "-z") == 0)
- expr = strlen(ap[1]) == 0 ? 1 : 0;
- else if (strcmp(ap[0], "-n") == 0)
- expr = strlen(ap[1]) == 0 ? 0 : 1;
- else {
- expr = 1;
- break;
- }
-
- if (last_cmp == 0)
- expr = last_expr || expr;
- else if (last_cmp == 1)
- expr = last_expr && expr;
- last_cmp = -1;
+ switch (op) {
+ case OP_STR_EMPTY:
+ expr = strlen(ap[1]) == 0 ? 1 : 0;
+ break;
+ case OP_STR_NEMPTY:
+ expr = strlen(ap[1]) == 0 ? 0 : 1;
+ break;
+ case OP_STR_EQ:
+ expr = strcmp(ap[0], ap[2]) == 0;
+ break;
+ case OP_STR_NEQ:
+ expr = strcmp
Re: [U-Boot] [PATCH V3 04/12] cmd_test: use table lookup for parsing
Hi Stephen, On 3 February 2014 13:19, Stephen Warren wrote: > > On 01/31/2014 05:03 PM, Simon Glass wrote: > > Hi Stephen, > > > > On 27 January 2014 13:49, Stephen Warren wrote: > >> From: Stephen Warren > >> > >> do_test() currently uses strcmp() twice to determine which operator is > >> present; once to determine how many arguments the operator needs, then > >> a second time to actually decode the operator and implement it. > >> > >> Rewrite the code so that a table lookup is used to translate the operator > >> string to an integer, and use a more efficient switch statement to decode > >> and execute the operator. > >> > >> This approach also acts as enablement for the following patches. > >> > >> This patch should introduce no behavioural change. > >> > >> Signed-off-by: Stephen Warren > >> --- > >> v3: New patch. > > > > Wow that's some interesting code...it took me a while to understand > > both the old and the new code. It looks correct to me but I wonder if > > it is deserving of some tests? Something like test/command_ut.c might > > show a simple way to run some tests. > > OK, I'll send V4 of this series with your minor issues addressed, and > I'll send a separate follow-on series which adds the unit tests, just so > it doesn't delay or cause revisions to the main series. Sounds good, thanks. Regards, Simon ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] powerpc/usb: Enable dual phy for T1040
On 01/27/2014 01:51 AM, Nikhil Badola wrote: > Define CONFIG_SYS_FSL_USB_DUAL_PHY_ENABLE macro for enabling dual > phy in t1040 > > Signed-off-by: Nikhil Badola > Applied to u-boot-mpc85xx master branch. York ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH V2] pci: mx6: Implement reset callback
Add a callback so that a board can implement it's own specific routine to
toggle the port's #PERST line or #define a GPIO to do so.
Signed-off-by: Marek Vasut
---
drivers/pci/pcie_imx.c | 47 ---
1 file changed, 44 insertions(+), 3 deletions(-)
V2: - Document the #PERST line toggling properly within the code, add some more
details on how this reset logic works and why it needs to be connected.
- Introduce CONFIG_PCIE_IMX_PERST_GPIO so in simple designs, one can specify
just the reset GPIO instead of reimplementing the entire reset logic.
diff --git a/drivers/pci/pcie_imx.c b/drivers/pci/pcie_imx.c
index 0a74867..34377e9 100644
--- a/drivers/pci/pcie_imx.c
+++ b/drivers/pci/pcie_imx.c
@@ -15,6 +15,7 @@
#include
#include
#include
+#include
#include
#include
#include
@@ -450,6 +451,47 @@ static int imx6_pcie_init_phy(void)
return 0;
}
+__weak int imx6_pcie_toggle_reset(void)
+{
+ /*
+* See 'PCI EXPRESS BASE SPECIFICATION, REV 3.0, SECTION 6.6.1'
+* for detailed understanding of the PCIe CR reset logic.
+*
+* The PCIe #PERST reset line _MUST_ be connected, otherwise your
+* design does not conform to the specification. You must wait at
+* least 20 mS after de-asserting the #PERST so the EP device can
+* do self-initialisation.
+*
+* In case your #PERST pin is connected to a plain GPIO pin of the
+* CPU, you can define CONFIG_PCIE_IMX_PERST_GPIO in your board's
+* configuration file and the condition below will handle the rest
+* of the reset toggling.
+*
+* In case your #PERST toggling logic is more complex, for example
+* connected via CPLD or somesuch, you can override this function
+* in your board file and implement reset logic as needed. You must
+* not forget to wait at least 20 mS after de-asserting #PERST in
+* this case either though.
+*
+* In case your #PERST line of the PCIe EP device is not connected
+* at all, your design is broken and you should fix your design,
+* otherwise you will observe problems like for example the link
+* not coming up after rebooting the system back from running Linux
+* that uses the PCIe as well OR the PCIe link might not come up in
+* Linux at all in the first place since it's in some non-reset
+* state due to being previously used in U-Boot.
+*/
+#ifdef CONFIG_PCIE_IMX_PERST_GPIO
+ gpio_direction_output(CONFIG_PCIE_IMX_PERST_GPIO, 0);
+ mdelay(20);
+ gpio_set_value(CONFIG_PCIE_IMX_PERST_GPIO, 1);
+ mdelay(20);
+#else
+ puts("WARNING: Make sure the PCIe #PERST line is connected!\n");
+#endif
+ return 0;
+}
+
static int imx6_pcie_deassert_core_reset(void)
{
struct iomuxc *iomuxc_regs = (struct iomuxc *)IOMUXC_BASE_ADDR;
@@ -466,10 +508,9 @@ static int imx6_pcie_deassert_core_reset(void)
* Wait for the clock to settle a bit, when the clock are sourced
* from the CPU, we need about 30mS to settle.
*/
- mdelay(30);
+ mdelay(50);
- /* FIXME: GPIO reset goes here */
- mdelay(100);
+ imx6_pcie_toggle_reset();
return 0;
}
--
1.8.5.3
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Re: [U-Boot] [PATCH] pci: mx6: Implement reset callback
Hi Marek, On 02/03/2014 01:16 PM, Marek Vasut wrote: On Monday, February 03, 2014 at 08:57:30 PM, Eric Nelson wrote: [...] I like having this bit included, but do you need to attribute copyright for this block? " 6.6.1. Conventional Reset Conventional Reset includes all reset mechanisms other than Function Level Reset. There are two categories of Conventional Resets: Fundamental Reset and resets that are not Fundamental Reset. This section applies to all types of Conventional Reset. In all form factors and system hardware configurations, there must, at some level, be a hardware mechanism for setting or returning all Port states to the initial conditions specified in this document – this mechanism is called “Fundamental Reset.” This mechanism can take the form of an auxiliary signal provided by the system to a component or adapter card, in which case the signal must be called PERST#, and must conform to the rules specified in Section 4.2.4.8.1. When PERST# is provided to a component or adapter, this signal must be used by the component or adapter as Fundamental Reset. When PERST# is not provided to a component or adapter, Fundamental Reset is generated autonomously by the component or adapter, and the details of how this is done are outside the scope of this document. If a Fundamental Reset is generated autonomously by the component or adapter, and if power is supplied by the platform to the component/adapter, the component/adapter must generate a Fundamental Reset to itself if the supplied power goes outside of the limits specified for the form factor or system. " This means, your platform _MUST_ have a FR implementation. If you have PERST connected (that's the reset pin) to for example GPIO, then so be it and that's your FR. The third paragraph states that if you do NOT have PERST connected, you need some other way of doing FR. Another way of generating FR is to depend on POR, so when power is applied to the component, it will generate FR internally. Thus to produce an "alternative" FR without PERST connected, you toggle the power GPIO of the particular slot. I think the SL can do neither, right ? :-( Right again. PCIe was very much an afterthought (and late addition) on SABRE Lite, and unfortunately only slightly improved on Nitrogen6x. OK. This wasn't an attack in the SL direction, really. I really want to warn people to comply with the spec, since otherwise they will suffer from weird bugs that are hard to find. The PERST is a prime example of that :-( No worries. I appreciate the details. We really should start waving a sign "YOU MUST CONNECT PERST IN YOUR NEW DESIGN, OTHERWISE A KITTEN DIES!" Hey, leave the kittens alone! We have had success in using/testing PCIe devices without either, but that doesn't mean we match the spec, and I suppose we'll have to live with the "broken design" message... I know. The design without FR works most of the time, but there is one particular scenario where it may fail (means it fails reliably). I will assume we have just a simple RC<->EP connection with EP being i82574L card (well supported and easily available intel NIC): 1) Cold boot the system 2) Bring up the PCIe link in U-Boot 3) Use the e1000e driver for some transfer 4) Boot Linux 5) Bring up the PCIe link in Linux 6) Use the e1000e driver for some transfer 7) Reboot the system from Linux 8) Bring up the PCIe link in U-Boot In case you don't have means to do FR, your system will fail during 5) and/or during 8) because in either case, the link and/or EP device can be in undefined state from previous usage. You are therefore not able to send in-band messages to the EP (to issue hot reset for example*) nor restart the link, thus you're trapped. * if you try to send anything over unstable PCIe link on MX6, it can stall your entire system to the point where the system bus is stuck and not even JTAG debugger can halt the CPU (!) Thanks. That's a useful test scenario. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 3/4] ARM: tegra: fix NV_PA_CSITE_BASE for Tegra124
From: Stephen Warren Tegra124 moved the CSITE block's base address. Fix U-Boot to use the correct address. Signed-off-by: Stephen Warren --- arch/arm/include/asm/arch-tegra/tegra.h | 5 + 1 file changed, 5 insertions(+) diff --git a/arch/arm/include/asm/arch-tegra/tegra.h b/arch/arm/include/asm/arch-tegra/tegra.h index 5fe19ae1ac13..d63af0e5fd9c 100644 --- a/arch/arm/include/asm/arch-tegra/tegra.h +++ b/arch/arm/include/asm/arch-tegra/tegra.h @@ -34,7 +34,12 @@ #define NV_PA_PMC_BASE (NV_PA_APB_MISC_BASE + 0xE400) #define NV_PA_EMC_BASE (NV_PA_APB_MISC_BASE + 0xF400) #define NV_PA_FUSE_BASE(NV_PA_APB_MISC_BASE + 0xF800) +#if defined(CONFIG_TEGRA20) || defined(CONFIG_TEGRA30) || \ + defined(CONFIG_TEGRA114) #define NV_PA_CSITE_BASE 0x7004 +#else +#define NV_PA_CSITE_BASE 0x7080 +#endif #define TEGRA_USB_ADDR_MASK0xC000 #define NV_PA_SDRC_CS0 NV_PA_SDRAM_BASE -- 1.8.1.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v1 1/6] arch: kona: Initial commit of kona-common architecture code
The Kona architecture is present on a number of Broadcom mobile SoCs
including the bcm281xx family of chips.
Signed-off-by: Darwin Rambo
Reviewed-by: Steve Rae
Reviewed-by: Tim Kryger
---
arch/arm/cpu/armv7/Makefile|1 +
arch/arm/cpu/armv7/kona-common/Makefile|9
arch/arm/cpu/armv7/kona-common/clk-stubs.c | 21 +
arch/arm/cpu/armv7/kona-common/hwinit-common.c | 16 +
arch/arm/cpu/armv7/kona-common/s_init.c| 12 ++
arch/arm/include/asm/kona-common/clk.h | 29
arch/arm/include/asm/kona-common/kona_sdhci.h | 12 ++
7 files changed, 100 insertions(+)
create mode 100644 arch/arm/cpu/armv7/kona-common/Makefile
create mode 100644 arch/arm/cpu/armv7/kona-common/clk-stubs.c
create mode 100644 arch/arm/cpu/armv7/kona-common/hwinit-common.c
create mode 100644 arch/arm/cpu/armv7/kona-common/s_init.c
create mode 100644 arch/arm/include/asm/kona-common/clk.h
create mode 100644 arch/arm/include/asm/kona-common/kona_sdhci.h
diff --git a/arch/arm/cpu/armv7/Makefile b/arch/arm/cpu/armv7/Makefile
index 0467d00..119ebb3 100644
--- a/arch/arm/cpu/armv7/Makefile
+++ b/arch/arm/cpu/armv7/Makefile
@@ -23,6 +23,7 @@ obj-y += nonsec_virt.o
obj-y += virt-v7.o
endif
+obj-$(CONFIG_KONA) += kona-common/
obj-$(CONFIG_OMAP_COMMON) += omap-common/
obj-$(CONFIG_TEGRA) += tegra-common/
diff --git a/arch/arm/cpu/armv7/kona-common/Makefile
b/arch/arm/cpu/armv7/kona-common/Makefile
new file mode 100644
index 000..8af6f2c
--- /dev/null
+++ b/arch/arm/cpu/armv7/kona-common/Makefile
@@ -0,0 +1,9 @@
+#
+# Copyright 2013 Broadcom Corporation. All rights reserved.
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y += s_init.o
+obj-y += hwinit-common.o
+obj-y += clk-stubs.o
diff --git a/arch/arm/cpu/armv7/kona-common/clk-stubs.c
b/arch/arm/cpu/armv7/kona-common/clk-stubs.c
new file mode 100644
index 000..824d597
--- /dev/null
+++ b/arch/arm/cpu/armv7/kona-common/clk-stubs.c
@@ -0,0 +1,21 @@
+/*
+ * Copyright 2013 Broadcom Corporation. All rights reserved.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include
+
+/*
+ * These weak functions are available to kona architectures that don't
+ * require clock enables from the driver code.
+ */
+int __weak clk_sdio_enable(void *base, u32 rate, u32 *actual_ratep)
+{
+ return 0;
+}
+
+int __weak clk_bsc_enable(void *base, u32 rate, u32 *actual_ratep)
+{
+ return 0;
+}
diff --git a/arch/arm/cpu/armv7/kona-common/hwinit-common.c
b/arch/arm/cpu/armv7/kona-common/hwinit-common.c
new file mode 100644
index 000..eb046a5
--- /dev/null
+++ b/arch/arm/cpu/armv7/kona-common/hwinit-common.c
@@ -0,0 +1,16 @@
+/*
+ * Copyright 2013 Broadcom Corporation. All rights reserved.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include
+#include
+
+#ifndef CONFIG_SYS_DCACHE_OFF
+void enable_caches(void)
+{
+ /* Enable D-cache. I-cache is already enabled in start.S */
+ dcache_enable();
+}
+#endif
diff --git a/arch/arm/cpu/armv7/kona-common/s_init.c
b/arch/arm/cpu/armv7/kona-common/s_init.c
new file mode 100644
index 000..510896c
--- /dev/null
+++ b/arch/arm/cpu/armv7/kona-common/s_init.c
@@ -0,0 +1,12 @@
+/*
+ * System init
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+/*
+ * Early system init. Currently empty.
+ */
+void s_init(void)
+{
+}
diff --git a/arch/arm/include/asm/kona-common/clk.h
b/arch/arm/include/asm/kona-common/clk.h
new file mode 100644
index 000..52031d3
--- /dev/null
+++ b/arch/arm/include/asm/kona-common/clk.h
@@ -0,0 +1,29 @@
+/*
+ * Copyright 2013 Broadcom Corporation. All rights reserved.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+/* This API file is loosely based on u-boot/drivers/video/ipu.h and linux */
+
+#ifndef __KONA_COMMON_CLK_H
+#define __KONA_COMMON_CLK_H
+
+#include
+
+struct clk;
+
+/* Only implement required functions for your specific architecture */
+int clk_init(void);
+struct clk *clk_get(const char *id);
+int clk_enable(struct clk *clk);
+void clk_disable(struct clk *clk);
+unsigned long clk_get_rate(struct clk *clk);
+long clk_round_rate(struct clk *clk, unsigned long rate);
+int clk_set_rate(struct clk *clk, unsigned long rate);
+int clk_set_parent(struct clk *clk, struct clk *parent);
+struct clk *clk_get_parent(struct clk *clk);
+int clk_sdio_enable(void *base, u32 rate, u32 *actual_ratep);
+int clk_bsc_enable(void *base);
+
+#endif
diff --git a/arch/arm/include/asm/kona-common/kona_sdhci.h
b/arch/arm/include/asm/kona-common/kona_sdhci.h
new file mode 100644
index 000..03f04dd
--- /dev/null
+++ b/arch/arm/include/asm/kona-common/kona_sdhci.h
@@ -0,0 +1,12 @@
+/*
+ * Copyright 2013 Broadcom Corporation. All rights reserved.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef __KONA_SDHCI_H
+#define __KONA_SDHCI_H
+
+int kona_sdhci_init(int dev_index, u32 min_clk, u32 quirks);
+
+#endif
--
1.7.9.5
__
[U-Boot] [PATCH v1 0/6] Introducing the Broadcom bcm281xx Architecture
This patchset introduces the Broadcom bcm281xx family of mobile SoC chips. Broadcom kona hardware blocks are often found in Broadcom mobile SoC chips including the bcm281xx family, so support for some of these kona blocks is also provided here. These patches work on u-boot master as well as the u-boot-arm custodian tree. v1 changes -- Delete lowlevel_init.S and create s_init.c. File header cleanup, cosmetic changes, dead code removal. Create include/bitfield.h. Use get_ram_size(). Use weak timer_init(); Skip lowlevel init. Remove memory test config. Use standard baud table and prompt. Darwin Rambo (6): arch: kona: Initial commit of kona-common architecture code arch: bcm281xx: Initial commit of bcm281xx architecture code gpio: kona: Add Kona gpio driver i2c: kona: Add Kona I2C driver mmc: kona: Add Kona mmc driver board: bcm28155_ap: Add board files arch/arm/cpu/armv7/Makefile|1 + arch/arm/cpu/armv7/bcm281xx/Makefile | 11 + arch/arm/cpu/armv7/bcm281xx/clk-bcm281xx.c | 523 + arch/arm/cpu/armv7/bcm281xx/clk-bsc.c | 52 ++ arch/arm/cpu/armv7/bcm281xx/clk-core.c | 513 + arch/arm/cpu/armv7/bcm281xx/clk-core.h | 495 arch/arm/cpu/armv7/bcm281xx/clk-sdio.c | 73 +++ arch/arm/cpu/armv7/bcm281xx/reset.c| 27 + arch/arm/cpu/armv7/kona-common/Makefile|9 + arch/arm/cpu/armv7/kona-common/clk-stubs.c | 21 + arch/arm/cpu/armv7/kona-common/hwinit-common.c | 16 + arch/arm/cpu/armv7/kona-common/s_init.c| 12 + arch/arm/include/asm/arch-bcm281xx/gpio.h | 15 + arch/arm/include/asm/arch-bcm281xx/sysmap.h| 25 + arch/arm/include/asm/kona-common/clk.h | 29 + arch/arm/include/asm/kona-common/kona_sdhci.h | 12 + board/broadcom/bcm28155_ap/Makefile|7 + board/broadcom/bcm28155_ap/bcm28155_ap.c | 87 +++ boards.cfg |1 + drivers/gpio/Makefile |1 + drivers/gpio/kona_gpio.c | 141 + drivers/i2c/Makefile |1 + drivers/i2c/kona_i2c.c | 730 drivers/mmc/Makefile |1 + drivers/mmc/kona_sdhci.c | 125 include/bitfield.h | 56 ++ include/configs/bcm28155_ap.h | 140 + 27 files changed, 3124 insertions(+) create mode 100644 arch/arm/cpu/armv7/bcm281xx/Makefile create mode 100644 arch/arm/cpu/armv7/bcm281xx/clk-bcm281xx.c create mode 100644 arch/arm/cpu/armv7/bcm281xx/clk-bsc.c create mode 100644 arch/arm/cpu/armv7/bcm281xx/clk-core.c create mode 100644 arch/arm/cpu/armv7/bcm281xx/clk-core.h create mode 100644 arch/arm/cpu/armv7/bcm281xx/clk-sdio.c create mode 100644 arch/arm/cpu/armv7/bcm281xx/reset.c create mode 100644 arch/arm/cpu/armv7/kona-common/Makefile create mode 100644 arch/arm/cpu/armv7/kona-common/clk-stubs.c create mode 100644 arch/arm/cpu/armv7/kona-common/hwinit-common.c create mode 100644 arch/arm/cpu/armv7/kona-common/s_init.c create mode 100644 arch/arm/include/asm/arch-bcm281xx/gpio.h create mode 100644 arch/arm/include/asm/arch-bcm281xx/sysmap.h create mode 100644 arch/arm/include/asm/kona-common/clk.h create mode 100644 arch/arm/include/asm/kona-common/kona_sdhci.h create mode 100644 board/broadcom/bcm28155_ap/Makefile create mode 100644 board/broadcom/bcm28155_ap/bcm28155_ap.c create mode 100644 drivers/gpio/kona_gpio.c create mode 100644 drivers/i2c/kona_i2c.c create mode 100644 drivers/mmc/kona_sdhci.c create mode 100644 include/bitfield.h create mode 100644 include/configs/bcm28155_ap.h -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 4/4] ARM: tegra: simplify halt_avp()
From: Stephen Warren
In order to completely halt the AVP processor, we should simply write
FLOW_MODE_STOP without any extra options that allow wakeup. Amend the
code to do this.
I believe that enabling FIQ_1 and IRQ_1 allow the CPU to be awoken by
interrupts. We don't want this; if later SW wishes to use the AVP, it
should be reset and booted from scratch.
Related, the bits that were previously IRQ_1 and FIQ_1 have a slightly
different definition starting with Tegra114, so the values we're
writing don't entirely make sense there anyway.
Signed-off-by: Stephen Warren
---
arch/arm/cpu/arm720t/tegra-common/cpu.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/arch/arm/cpu/arm720t/tegra-common/cpu.c
b/arch/arm/cpu/arm720t/tegra-common/cpu.c
index 2c5cd63917d3..168f525ec7c8 100644
--- a/arch/arm/cpu/arm720t/tegra-common/cpu.c
+++ b/arch/arm/cpu/arm720t/tegra-common/cpu.c
@@ -378,8 +378,7 @@ void clock_enable_coresight(int enable)
void halt_avp(void)
{
for (;;) {
- writel((HALT_COP_EVENT_JTAG | HALT_COP_EVENT_IRQ_1 \
- | HALT_COP_EVENT_FIQ_1 | (FLOW_MODE_STOP<<29)),
- FLOW_CTLR_HALT_COP_EVENTS);
+ writel(HALT_COP_EVENT_JTAG | (FLOW_MODE_STOP << 29),
+ FLOW_CTLR_HALT_COP_EVENTS);
}
}
--
1.8.1.5
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[U-Boot] [PATCH 1/4] ARM: tegra: move CONFIG_TEGRAnn
From: Stephen Warren needs to use CONFIG_TEGRA* to conditionalize some definitions, since some modules moved between generations. Move the definition of CONFIG_TEGRAnn to a header that's included earlier, so that it's set by the time tegra.h needs to use it. Signed-off-by: Stephen Warren --- arch/arm/include/asm/arch-tegra114/tegra.h | 2 ++ arch/arm/include/asm/arch-tegra124/tegra.h | 2 ++ arch/arm/include/asm/arch-tegra20/tegra.h | 2 ++ arch/arm/include/asm/arch-tegra30/tegra.h | 2 ++ include/configs/tegra114-common.h | 5 - include/configs/tegra124-common.h | 5 - include/configs/tegra20-common.h | 5 - include/configs/tegra30-common.h | 5 - 8 files changed, 8 insertions(+), 20 deletions(-) diff --git a/arch/arm/include/asm/arch-tegra114/tegra.h b/arch/arm/include/asm/arch-tegra114/tegra.h index 5d426b524a1e..705ca5758e2b 100644 --- a/arch/arm/include/asm/arch-tegra114/tegra.h +++ b/arch/arm/include/asm/arch-tegra114/tegra.h @@ -17,6 +17,8 @@ #ifndef _TEGRA114_H_ #define _TEGRA114_H_ +#define CONFIG_TEGRA114 + #define NV_PA_SDRAM_BASE 0x8000 /* 0x8000 for real T114 */ #define NV_PA_TSC_BASE 0x700F /* System Counter TSC regs */ diff --git a/arch/arm/include/asm/arch-tegra124/tegra.h b/arch/arm/include/asm/arch-tegra124/tegra.h index db3d8379203b..86ebd19453ef 100644 --- a/arch/arm/include/asm/arch-tegra124/tegra.h +++ b/arch/arm/include/asm/arch-tegra124/tegra.h @@ -8,6 +8,8 @@ #ifndef _TEGRA124_H_ #define _TEGRA124_H_ +#define CONFIG_TEGRA124 + #define NV_PA_SDRAM_BASE 0x8000 #define NV_PA_TSC_BASE 0x700F /* System Counter TSC regs */ #define NV_PA_MC_BASE 0x70019000 /* Mem Ctlr regs (MCB, etc.) */ diff --git a/arch/arm/include/asm/arch-tegra20/tegra.h b/arch/arm/include/asm/arch-tegra20/tegra.h index 18856ac3727d..6a4b40ec7608 100644 --- a/arch/arm/include/asm/arch-tegra20/tegra.h +++ b/arch/arm/include/asm/arch-tegra20/tegra.h @@ -8,6 +8,8 @@ #ifndef _TEGRA20_H_ #define _TEGRA20_H_ +#define CONFIG_TEGRA20 + #define NV_PA_SDRAM_BASE 0x #include diff --git a/arch/arm/include/asm/arch-tegra30/tegra.h b/arch/arm/include/asm/arch-tegra30/tegra.h index c02c5d850037..4ad8b1c05346 100644 --- a/arch/arm/include/asm/arch-tegra30/tegra.h +++ b/arch/arm/include/asm/arch-tegra30/tegra.h @@ -17,6 +17,8 @@ #ifndef _TEGRA30_H_ #define _TEGRA30_H_ +#define CONFIG_TEGRA30 + #define NV_PA_SDRAM_BASE 0x8000 /* 0x8000 for real T30 */ #include diff --git a/include/configs/tegra114-common.h b/include/configs/tegra114-common.h index a4e8a5f5eb53..1bf5af5b3830 100644 --- a/include/configs/tegra114-common.h +++ b/include/configs/tegra114-common.h @@ -26,11 +26,6 @@ */ #define V_NS16550_CLK 40800 /* 408MHz (pllp_out0) */ -/* - * High Level Configuration Options - */ -#define CONFIG_TEGRA114/* in a NVidia Tegra114 core */ - /* Environment information, boards can override if required */ #define CONFIG_LOADADDR0x80408000 /* def. location for kernel */ diff --git a/include/configs/tegra124-common.h b/include/configs/tegra124-common.h index 0a4541bd20e6..4568bc761ecd 100644 --- a/include/configs/tegra124-common.h +++ b/include/configs/tegra124-common.h @@ -18,11 +18,6 @@ */ #define V_NS16550_CLK 40800 /* 408MHz (pllp_out0) */ -/* - * High Level Configuration Options - */ -#define CONFIG_TEGRA124/* is an NVIDIA Tegra124 core */ - /* Environment information, boards can override if required */ #define CONFIG_LOADADDR0x80408000 /* def. location for kernel */ diff --git a/include/configs/tegra20-common.h b/include/configs/tegra20-common.h index b009a316b14c..d2c45321b46a 100644 --- a/include/configs/tegra20-common.h +++ b/include/configs/tegra20-common.h @@ -24,11 +24,6 @@ */ #define V_NS16550_CLK 21600 /* 216MHz (pllp_out0) */ -/* - * High Level Configuration Options - */ -#define CONFIG_TEGRA20 /* in a NVidia Tegra20 core */ - /* Environment information, boards can override if required */ #define CONFIG_LOADADDR0x00408000 /* def. location for kernel */ diff --git a/include/configs/tegra30-common.h b/include/configs/tegra30-common.h index b5550d7d099c..edb930e032bc 100644 --- a/include/configs/tegra30-common.h +++ b/include/configs/tegra30-common.h @@ -23,11 +23,6 @@ */ #define V_NS16550_CLK 40800 /* 408MHz (pllp_out0) */ -/* - * High Level Configuration Options - */ -#define CONFIG_TEGRA30 /* in a NVidia Tegra30 core */ - /* Environment information, boards can override if required */ #define CONFIG_LOADADDR0x80408000 /* def. location for kernel */ -- 1.8.1.5 ___ U-Boot mailing list U-Boot@lists.d
[U-Boot] [PATCH 2/4] ARM: tegra: fix pmc_pwrgate_timer_mult register definition
From: Stephen Warren
Register pmc_pwrgate_timer_mult has a different layout on Tegra114 and
Tegra124. Reflect this in pmc.h.
Also, simply write the whole of the register in start_cpu() rather than
doing a read-modify-write; the register is simple enough that the code
can easily construct the entire desired value.
Signed-off-by: Stephen Warren
---
arch/arm/cpu/arm720t/tegra124/cpu.c | 4 ++--
arch/arm/include/asm/arch-tegra/pmc.h | 11 +++
2 files changed, 13 insertions(+), 2 deletions(-)
diff --git a/arch/arm/cpu/arm720t/tegra124/cpu.c
b/arch/arm/cpu/arm720t/tegra124/cpu.c
index c03aaf17e945..97f5928bd7da 100644
--- a/arch/arm/cpu/arm720t/tegra124/cpu.c
+++ b/arch/arm/cpu/arm720t/tegra124/cpu.c
@@ -252,8 +252,8 @@ void start_cpu(u32 reset_vector)
tegra124_init_clocks();
/* Set power-gating timer multiplier */
- clrbits_le32(&pmc->pmc_pwrgate_timer_mult, TIMER_MULT_MASK);
- setbits_le32(&pmc->pmc_pwrgate_timer_mult, MULT_8);
+ writel((MULT_8 << TIMER_MULT_SHIFT) | (MULT_8 << TIMER_MULT_CPU_SHIFT),
+ &pmc->pmc_pwrgate_timer_mult);
enable_cpu_power_rail();
enable_cpu_clocks();
diff --git a/arch/arm/include/asm/arch-tegra/pmc.h
b/arch/arm/include/asm/arch-tegra/pmc.h
index 4c3264b3859b..1dd3154fbccb 100644
--- a/arch/arm/include/asm/arch-tegra/pmc.h
+++ b/arch/arm/include/asm/arch-tegra/pmc.h
@@ -298,14 +298,25 @@ struct pmc_ctlr {
#define PMC_XOFS_SHIFT 1
#define PMC_XOFS_MASK (0x3F << PMC_XOFS_SHIFT)
+#if defined(CONFIG_TEGRA114)
#define TIMER_MULT_SHIFT 0
#define TIMER_MULT_MASK(3 << TIMER_MULT_SHIFT)
#define TIMER_MULT_CPU_SHIFT 2
#define TIMER_MULT_CPU_MASK(3 << TIMER_MULT_CPU_SHIFT)
+#elif defined(CONFIG_TEGRA124)
+#define TIMER_MULT_SHIFT 0
+#define TIMER_MULT_MASK(7 << TIMER_MULT_SHIFT)
+#define TIMER_MULT_CPU_SHIFT 3
+#define TIMER_MULT_CPU_MASK(7 << TIMER_MULT_CPU_SHIFT)
+#endif
+
#define MULT_1 0
#define MULT_2 1
#define MULT_4 2
#define MULT_8 3
+#if defined(CONFIG_TEGRA124)
+#define MULT_164
+#endif
#define AMAP_WRITE_SHIFT 20
#define AMAP_WRITE_ON (1 << AMAP_WRITE_SHIFT)
--
1.8.1.5
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[U-Boot] [PATCH v1 2/6] arch: bcm281xx: Initial commit of bcm281xx architecture code
Add bcm281xx architecture support code including a clock framework and
chip reset. Define register block base addresses for the bcm281xx
architecture and create an empty gpio header file required when
CONFIG_CMD_GPIO is set.
Signed-off-by: Darwin Rambo
Reviewed-by: Steve Rae
Reviewed-by: Tim Kryger
---
arch/arm/cpu/armv7/bcm281xx/Makefile| 11 +
arch/arm/cpu/armv7/bcm281xx/clk-bcm281xx.c | 523 +++
arch/arm/cpu/armv7/bcm281xx/clk-bsc.c | 52 +++
arch/arm/cpu/armv7/bcm281xx/clk-core.c | 513 ++
arch/arm/cpu/armv7/bcm281xx/clk-core.h | 495 +
arch/arm/cpu/armv7/bcm281xx/clk-sdio.c | 73
arch/arm/cpu/armv7/bcm281xx/reset.c | 27 ++
arch/arm/include/asm/arch-bcm281xx/gpio.h | 15 +
arch/arm/include/asm/arch-bcm281xx/sysmap.h | 25 ++
include/bitfield.h | 56 +++
10 files changed, 1790 insertions(+)
create mode 100644 arch/arm/cpu/armv7/bcm281xx/Makefile
create mode 100644 arch/arm/cpu/armv7/bcm281xx/clk-bcm281xx.c
create mode 100644 arch/arm/cpu/armv7/bcm281xx/clk-bsc.c
create mode 100644 arch/arm/cpu/armv7/bcm281xx/clk-core.c
create mode 100644 arch/arm/cpu/armv7/bcm281xx/clk-core.h
create mode 100644 arch/arm/cpu/armv7/bcm281xx/clk-sdio.c
create mode 100644 arch/arm/cpu/armv7/bcm281xx/reset.c
create mode 100644 arch/arm/include/asm/arch-bcm281xx/gpio.h
create mode 100644 arch/arm/include/asm/arch-bcm281xx/sysmap.h
create mode 100644 include/bitfield.h
diff --git a/arch/arm/cpu/armv7/bcm281xx/Makefile
b/arch/arm/cpu/armv7/bcm281xx/Makefile
new file mode 100644
index 000..46c4943
--- /dev/null
+++ b/arch/arm/cpu/armv7/bcm281xx/Makefile
@@ -0,0 +1,11 @@
+#
+# Copyright 2013 Broadcom Corporation. All rights reserved.
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y += reset.o
+obj-y += clk-core.o
+obj-y += clk-bcm281xx.o
+obj-y += clk-sdio.o
+obj-y += clk-bsc.o
diff --git a/arch/arm/cpu/armv7/bcm281xx/clk-bcm281xx.c
b/arch/arm/cpu/armv7/bcm281xx/clk-bcm281xx.c
new file mode 100644
index 000..58cff55
--- /dev/null
+++ b/arch/arm/cpu/armv7/bcm281xx/clk-bcm281xx.c
@@ -0,0 +1,523 @@
+/*
+ * Copyright 2013 Broadcom Corporation. All rights reserved.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+/*
+ *
+ * bcm281xx-specific clock tables
+ *
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include "clk-core.h"
+
+#define CLOCK_1K 1000
+#define CLOCK_1M (CLOCK_1K * 1000)
+
+/* declare a reference clock */
+#define DECLARE_REF_CLK(clk_name, clk_parent, clk_rate, clk_div) \
+static struct refclk clk_name = { \
+ .clk= { \
+ .name = #clk_name, \
+ .parent = clk_parent, \
+ .rate = clk_rate, \
+ .div= clk_div, \
+ .ops= &ref_clk_ops, \
+ }, \
+}
+
+/*
+ * Reference clocks
+ */
+
+/* Declare a list of reference clocks */
+DECLARE_REF_CLK(ref_crystal, 0, 26 * CLOCK_1M, 1);
+DECLARE_REF_CLK(var_96m, 0, 96 * CLOCK_1M, 1);
+DECLARE_REF_CLK(ref_96m, 0, 96 * CLOCK_1M, 1);
+DECLARE_REF_CLK(ref_312m, 0, 312 * CLOCK_1M, 0);
+DECLARE_REF_CLK(ref_104m, &ref_312m.clk, 104 * CLOCK_1M, 3);
+DECLARE_REF_CLK(ref_52m, &ref_104m.clk, 52 * CLOCK_1M, 2);
+DECLARE_REF_CLK(ref_13m, &ref_52m.clk, 13 * CLOCK_1M, 4);
+DECLARE_REF_CLK(var_312m, 0, 312 * CLOCK_1M, 0);
+DECLARE_REF_CLK(var_104m, &var_312m.clk, 104 * CLOCK_1M, 3);
+DECLARE_REF_CLK(var_52m, &var_104m.clk, 52 * CLOCK_1M, 2);
+DECLARE_REF_CLK(var_13m, &var_52m.clk, 13 * CLOCK_1M, 4);
+
+struct refclk_lkup {
+ struct refclk *procclk;
+ const char *name;
+};
+
+/* Lookup table for string to clk tranlation */
+#define MKSTR(x) {&x, #x}
+static struct refclk_lkup refclk_str_tbl[] = {
+ MKSTR(ref_crystal), MKSTR(var_96m), MKSTR(ref_96m),
+ MKSTR(ref_312m), MKSTR(ref_104m), MKSTR(ref_52m),
+ MKSTR(ref_13m), MKSTR(var_312m), MKSTR(var_104m),
+ MKSTR(var_52m), MKSTR(var_13m),
+};
+
+int refclk_entries = sizeof(refclk_str_tbl)/sizeof(refclk_str_tbl[0]);
+
+/* convert ref clock string to clock structure pointer */
+struct refclk *refclk_str_to_clk(const char *name)
+{
+ int i;
+ struct refclk_lkup *tblp = refclk_str_tbl;
+ for (i = 0; i < refclk_entries; i++, tblp++) {
+ if (!(strcmp(name, tblp->name)))
+ return tblp->procclk;
+ }
+ return NULL;
+}
+
+/* frequency tables indexed by freq_id */
+unsigned long master_axi_freq_tbl[8] = {
+ 26 * CLOCK_1M,
+ 52 * CLOCK_1M,
+ 104 * CLOCK_1M,
+ 156 * CLOCK_1M,
+ 156 * CLOCK_1M,
+ 208 * CLOCK_1M,
+ 312 * CLOCK_1M,
+ 312 * CLOCK_1M
+};
+
+unsigned long master_ahb_freq_tbl[8] = {
+ 26 * CLOCK_1M
[U-Boot] [PATCH v1 3/6] gpio: kona: Add Kona gpio driver
Add support for the Kona GPIO controller found on Broadcom mobile SoCs.
Signed-off-by: Darwin Rambo
Reviewed-by: Steve Rae
Reviewed-by: Markus Mayer
Reviewed-by: Tim Kryger
---
drivers/gpio/Makefile|1 +
drivers/gpio/kona_gpio.c | 141 ++
2 files changed, 142 insertions(+)
create mode 100644 drivers/gpio/kona_gpio.c
diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
index b903c45..ed2c0c7 100644
--- a/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile
@@ -8,6 +8,7 @@
obj-$(CONFIG_AT91_GPIO)+= at91_gpio.o
obj-$(CONFIG_INTEL_ICH6_GPIO) += intel_ich6_gpio.o
obj-$(CONFIG_KIRKWOOD_GPIO)+= kw_gpio.o
+obj-$(CONFIG_KONA_GPIO)+= kona_gpio.o
obj-$(CONFIG_MARVELL_GPIO) += mvgpio.o
obj-$(CONFIG_MARVELL_MFP) += mvmfp.o
obj-$(CONFIG_MXC_GPIO) += mxc_gpio.o
diff --git a/drivers/gpio/kona_gpio.c b/drivers/gpio/kona_gpio.c
new file mode 100644
index 000..ce0e499
--- /dev/null
+++ b/drivers/gpio/kona_gpio.c
@@ -0,0 +1,141 @@
+/*
+ * Copyright 2013 Broadcom Corporation. All rights reserved.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include
+#include
+#include
+
+#define GPIO_BASE (void *)GPIO2_BASE_ADDR
+
+#define GPIO_PASSWD0x00a5a501
+#define GPIO_PER_BANK 32
+#define GPIO_MAX_BANK_NUM 8
+
+#define GPIO_BANK(gpio)((gpio) >> 5)
+#define GPIO_BITMASK(gpio) \
+ (1UL << ((gpio) & (GPIO_PER_BANK - 1)))
+
+#define GPIO_OUT_STATUS(bank) (0x + ((bank) << 2))
+#define GPIO_IN_STATUS(bank) (0x0020 + ((bank) << 2))
+#define GPIO_OUT_SET(bank) (0x0040 + ((bank) << 2))
+#define GPIO_OUT_CLEAR(bank) (0x0060 + ((bank) << 2))
+#define GPIO_INT_STATUS(bank) (0x0080 + ((bank) << 2))
+#define GPIO_INT_MASK(bank)(0x00a0 + ((bank) << 2))
+#define GPIO_INT_MSKCLR(bank) (0x00c0 + ((bank) << 2))
+#define GPIO_CONTROL(bank) (0x0100 + ((bank) << 2))
+#define GPIO_PWD_STATUS(bank) (0x0500 + ((bank) << 2))
+
+#define GPIO_GPPWR_OFFSET 0x0520
+
+#define GPIO_GPCTR0_DBR_SHIFT 5
+#define GPIO_GPCTR0_DBR_MASK 0x01e0
+
+#define GPIO_GPCTR0_ITR_SHIFT 3
+#define GPIO_GPCTR0_ITR_MASK 0x0018
+#define GPIO_GPCTR0_ITR_CMD_RISING_EDGE0x0001
+#define GPIO_GPCTR0_ITR_CMD_FALLING_EDGE 0x0002
+#define GPIO_GPCTR0_ITR_CMD_BOTH_EDGE 0x0003
+
+#define GPIO_GPCTR0_IOTR_MASK 0x0001
+#define GPIO_GPCTR0_IOTR_CMD_0UTPUT0x
+#define GPIO_GPCTR0_IOTR_CMD_INPUT 0x0001
+
+int gpio_request(unsigned gpio, const char *label)
+{
+ unsigned int value, off;
+
+ writel(GPIO_PASSWD, GPIO_BASE + GPIO_GPPWR_OFFSET);
+ off = GPIO_PWD_STATUS(GPIO_BANK(gpio));
+ value = readl(GPIO_BASE + off) & ~GPIO_BITMASK(gpio);
+ writel(value, GPIO_BASE + off);
+
+ return 0;
+}
+
+int gpio_free(unsigned gpio)
+{
+ unsigned int value, off;
+
+ writel(GPIO_PASSWD, GPIO_BASE + GPIO_GPPWR_OFFSET);
+ off = GPIO_PWD_STATUS(GPIO_BANK(gpio));
+ value = readl(GPIO_BASE + off) | GPIO_BITMASK(gpio);
+ writel(value, GPIO_BASE + off);
+
+ return 0;
+}
+
+int gpio_direction_input(unsigned gpio)
+{
+ u32 val;
+
+ val = readl(GPIO_BASE + GPIO_CONTROL(gpio));
+ val &= ~GPIO_GPCTR0_IOTR_MASK;
+ val |= GPIO_GPCTR0_IOTR_CMD_INPUT;
+ writel(val, GPIO_BASE + GPIO_CONTROL(gpio));
+
+ return 0;
+}
+
+int gpio_direction_output(unsigned gpio, int value)
+{
+ int bank_id = GPIO_BANK(gpio);
+ int bitmask = GPIO_BITMASK(gpio);
+ u32 val, off;
+
+ val = readl(GPIO_BASE + GPIO_CONTROL(gpio));
+ val &= ~GPIO_GPCTR0_IOTR_MASK;
+ val |= GPIO_GPCTR0_IOTR_CMD_0UTPUT;
+ writel(val, GPIO_BASE + GPIO_CONTROL(gpio));
+ off = value ? GPIO_OUT_SET(bank_id) : GPIO_OUT_CLEAR(bank_id);
+
+ val = readl(GPIO_BASE + off);
+ val |= bitmask;
+ writel(val, GPIO_BASE + off);
+
+ return 0;
+}
+
+int gpio_get_value(unsigned gpio)
+{
+ int bank_id = GPIO_BANK(gpio);
+ int bitmask = GPIO_BITMASK(gpio);
+ u32 val, off;
+
+ /* determine the GPIO pin direction */
+ val = readl(GPIO_BASE + GPIO_CONTROL(gpio));
+ val &= GPIO_GPCTR0_IOTR_MASK;
+
+ /* read the GPIO bank status */
+ off = (GPIO_GPCTR0_IOTR_CMD_INPUT == val) ?
+ GPIO_IN_STATUS(bank_id) : GPIO_OUT_STATUS(bank_id);
+ val = readl(GPIO_BASE + off);
+
+ /* return the specified bit status */
+ return !!(val & bitmask);
+}
+
+void gpio_set_value(unsigned gpio, int value)
+{
+ int bank_
[U-Boot] [PATCH v1 4/6] i2c: kona: Add Kona I2C driver
Add support for the Kona I2C controller found on Broadcom mobile SoCs.
Signed-off-by: Darwin Rambo
Reviewed-by: Steve Rae
Reviewed-by: Tim Kryger
---
drivers/i2c/Makefile |1 +
drivers/i2c/kona_i2c.c | 730
2 files changed, 731 insertions(+)
create mode 100644 drivers/i2c/kona_i2c.c
diff --git a/drivers/i2c/Makefile b/drivers/i2c/Makefile
index fa3a875..36d5e5f 100644
--- a/drivers/i2c/Makefile
+++ b/drivers/i2c/Makefile
@@ -18,6 +18,7 @@ obj-$(CONFIG_SH_SH7734_I2C) += sh_sh7734_i2c.o
obj-$(CONFIG_SYS_I2C) += i2c_core.o
obj-$(CONFIG_SYS_I2C_FSL) += fsl_i2c.o
obj-$(CONFIG_SYS_I2C_FTI2C010) += fti2c010.o
+obj-$(CONFIG_SYS_I2C_KONA) += kona_i2c.o
obj-$(CONFIG_SYS_I2C_MXC) += mxc_i2c.o
obj-$(CONFIG_SYS_I2C_OMAP24XX) += omap24xx_i2c.o
obj-$(CONFIG_SYS_I2C_OMAP34XX) += omap24xx_i2c.o
diff --git a/drivers/i2c/kona_i2c.c b/drivers/i2c/kona_i2c.c
new file mode 100644
index 000..9f18b74
--- /dev/null
+++ b/drivers/i2c/kona_i2c.c
@@ -0,0 +1,730 @@
+/*
+ * Copyright 2013 Broadcom Corporation. All rights reserved.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+
+/* Hardware register offsets and field defintions */
+#define CS_OFFSET 0x0020
+#define CS_ACK_SHIFT 3
+#define CS_ACK_MASK0x0008
+#define CS_ACK_CMD_GEN_START 0x
+#define CS_ACK_CMD_GEN_RESTART 0x0001
+#define CS_CMD_SHIFT 1
+#define CS_CMD_CMD_NO_ACTION 0x
+#define CS_CMD_CMD_START_RESTART 0x0001
+#define CS_CMD_CMD_STOP0x0002
+#define CS_EN_SHIFT0
+#define CS_EN_CMD_ENABLE_BSC 0x0001
+
+#define TIM_OFFSET 0x0024
+#define TIM_PRESCALE_SHIFT 6
+#define TIM_P_SHIFT3
+#define TIM_NO_DIV_SHIFT 2
+#define TIM_DIV_SHIFT 0
+
+#define DAT_OFFSET 0x0028
+
+#define TOUT_OFFSET0x002c
+
+#define TXFCR_OFFSET 0x003c
+#define TXFCR_FIFO_FLUSH_MASK 0x0080
+#define TXFCR_FIFO_EN_MASK 0x0040
+
+#define IER_OFFSET 0x0044
+#define IER_READ_COMPLETE_INT_MASK 0x0010
+#define IER_I2C_INT_EN_MASK0x0008
+#define IER_FIFO_INT_EN_MASK 0x0002
+#define IER_NOACK_EN_MASK 0x0001
+
+#define ISR_OFFSET 0x0048
+#define ISR_RESERVED_MASK 0xff60
+#define ISR_CMDBUSY_MASK 0x0080
+#define ISR_READ_COMPLETE_MASK 0x0010
+#define ISR_SES_DONE_MASK 0x0008
+#define ISR_ERR_MASK 0x0004
+#define ISR_TXFIFOEMPTY_MASK 0x0002
+#define ISR_NOACK_MASK 0x0001
+
+#define CLKEN_OFFSET 0x004c
+#define CLKEN_AUTOSENSE_OFF_MASK 0x0080
+#define CLKEN_M_SHIFT 4
+#define CLKEN_N_SHIFT 1
+#define CLKEN_CLKEN_MASK 0x0001
+
+#define FIFO_STATUS_OFFSET 0x0054
+#define FIFO_STATUS_RXFIFO_EMPTY_MASK 0x0004
+#define FIFO_STATUS_TXFIFO_EMPTY_MASK 0x0010
+
+#define HSTIM_OFFSET 0x0058
+#define HSTIM_HS_MODE_MASK 0x8000
+#define HSTIM_HS_HOLD_SHIFT10
+#define HSTIM_HS_HIGH_PHASE_SHIFT 5
+#define HSTIM_HS_SETUP_SHIFT 0
+
+#define PADCTL_OFFSET 0x005c
+#define PADCTL_PAD_OUT_EN_MASK 0x0004
+
+#define RXFCR_OFFSET 0x0068
+#define RXFCR_NACK_EN_SHIFT7
+#define RXFCR_READ_COUNT_SHIFT 0
+#define RXFIFORDOUT_OFFSET 0x006c
+
+/* Locally used constants */
+#define MAX_RX_FIFO_SIZE 64U /* bytes */
+#define MAX_TX_FIFO_SIZE 64U /* bytes */
+
+#define I2C_TIMEOUT10 /* usecs */
+
+#define WAIT_INT_CHK 100 /* usecs */
+#if I2C_TIMEOUT % WAIT_INT_CHK
+#error I2C_TIMEOUT must be a multiple of WAIT_INT_CHK
+#endif
+
+/* Operations that can be commanded to the controller */
+enum bcm_kona_cmd_t {
+ BCM_CMD_NOACTION = 0,
+ BCM_CMD_START,
+ BCM_CMD_RESTART,
+ BCM_CMD_STOP,
+};
+
+enum bus_speed_index {
+ BCM_SPD_100K = 0,
+ BCM_SPD_400K,
+ BCM_SPD_1MHZ,
+};
+
+/* Internal divider settings for standa
[U-Boot] [PATCH v1 5/6] mmc: kona: Add Kona mmc driver
Add support for the Kona SDHCI found on Broadcom mobile SoCs.
Signed-off-by: Darwin Rambo
Reviewed-by: Steve Rae
Reviewed-by: Tim Kryger
---
drivers/mmc/Makefile |1 +
drivers/mmc/kona_sdhci.c | 125 ++
2 files changed, 126 insertions(+)
create mode 100644 drivers/mmc/kona_sdhci.c
diff --git a/drivers/mmc/Makefile b/drivers/mmc/Makefile
index e793ed9..931922b 100644
--- a/drivers/mmc/Makefile
+++ b/drivers/mmc/Makefile
@@ -21,6 +21,7 @@ obj-$(CONFIG_OMAP_HSMMC) += omap_hsmmc.o
obj-$(CONFIG_PXA_MMC_GENERIC) += pxa_mmc_gen.o
obj-$(CONFIG_SDHCI) += sdhci.o
obj-$(CONFIG_BCM2835_SDHCI) += bcm2835_sdhci.o
+obj-$(CONFIG_KONA_SDHCI) += kona_sdhci.o
obj-$(CONFIG_S5P_SDHCI) += s5p_sdhci.o
obj-$(CONFIG_SH_MMCIF) += sh_mmcif.o
obj-$(CONFIG_SPEAR_SDHCI) += spear_sdhci.o
diff --git a/drivers/mmc/kona_sdhci.c b/drivers/mmc/kona_sdhci.c
new file mode 100644
index 000..69e6f17
--- /dev/null
+++ b/drivers/mmc/kona_sdhci.c
@@ -0,0 +1,125 @@
+/*
+ * Copyright 2013 Broadcom Corporation. All rights reserved.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include
+#include
+#include
+#include
+#include
+
+#define SDHCI_CORECTRL_OFFSET 0x8000
+#define SDHCI_CORECTRL_EN 0x01
+#define SDHCI_CORECTRL_RESET 0x02
+
+#define SDHCI_CORESTAT_OFFSET 0x8004
+#define SDHCI_CORESTAT_CD_SW 0x01
+
+#define SDHCI_COREIMR_OFFSET 0x8008
+#define SDHCI_COREIMR_IP 0x01
+
+static int init_mmc_core(struct sdhci_host *host)
+{
+ unsigned int mask;
+ unsigned int timeout;
+
+ if (sdhci_readb(host, SDHCI_SOFTWARE_RESET) & SDHCI_RESET_ALL) {
+ printf("%s: sd host controller reset error\n", __func__);
+ return 1;
+ }
+
+ /* For kona a hardware reset before anything else. */
+ mask = sdhci_readl(host, SDHCI_CORECTRL_OFFSET) | SDHCI_CORECTRL_RESET;
+ sdhci_writel(host, mask, SDHCI_CORECTRL_OFFSET);
+
+ /* Wait max 100 ms */
+ timeout = 1000;
+ do {
+ if (timeout == 0) {
+ printf("%s: reset timeout error\n", __func__);
+ return 1;
+ }
+ timeout--;
+ udelay(100);
+ } while (0 ==
+(sdhci_readl(host, SDHCI_CORECTRL_OFFSET) &
+ SDHCI_CORECTRL_RESET));
+
+ /* Clear the reset bit. */
+ mask = mask & ~SDHCI_CORECTRL_RESET;
+ sdhci_writel(host, mask, SDHCI_CORECTRL_OFFSET);
+ udelay(10);
+
+ /* Enable AHB clock */
+ mask = sdhci_readl(host, SDHCI_CORECTRL_OFFSET);
+ sdhci_writel(host, mask | SDHCI_CORECTRL_EN, SDHCI_CORECTRL_OFFSET);
+
+ /* Enable interrupts */
+ sdhci_writel(host, SDHCI_COREIMR_IP, SDHCI_COREIMR_OFFSET);
+
+ /* Make sure Card is detected in controller */
+ mask = sdhci_readl(host, SDHCI_CORESTAT_OFFSET);
+ sdhci_writel(host, mask | SDHCI_CORESTAT_CD_SW, SDHCI_CORESTAT_OFFSET);
+
+ return 0;
+}
+
+int kona_sdhci_init(int dev_index, u32 min_clk, u32 quirks)
+{
+ int ret = 0;
+ u32 max_clk;
+ void *reg_base;
+ struct sdhci_host *host = NULL;
+
+ host = (struct sdhci_host *)malloc(sizeof(struct sdhci_host));
+ if (!host) {
+ printf("%s: sdhci host malloc fail!\n", __func__);
+ return -ENOMEM;
+ }
+ switch (dev_index) {
+ case 0:
+ reg_base = (void *)CONFIG_SYS_SDIO_BASE0;
+ ret = clk_sdio_enable(reg_base, CONFIG_SYS_SDIO0_MAX_CLK,
+ &max_clk);
+ break;
+ case 1:
+ reg_base = (void *)CONFIG_SYS_SDIO_BASE1;
+ ret = clk_sdio_enable(reg_base, CONFIG_SYS_SDIO1_MAX_CLK,
+ &max_clk);
+ break;
+ case 2:
+ reg_base = (void *)CONFIG_SYS_SDIO_BASE2;
+ ret = clk_sdio_enable(reg_base, CONFIG_SYS_SDIO2_MAX_CLK,
+ &max_clk);
+ break;
+ case 3:
+ reg_base = (void *)CONFIG_SYS_SDIO_BASE3;
+ ret = clk_sdio_enable(reg_base, CONFIG_SYS_SDIO3_MAX_CLK,
+ &max_clk);
+ break;
+ default:
+ printf("%s: sdio dev index %d not supported\n",
+ __func__, dev_index);
+ ret = -EINVAL;
+ }
+ if (ret)
+ return ret;
+
+ host->name = "kona-sdhci";
+ host->ioaddr = reg_base;
+ host->quirks = quirks;
+ host->host_caps = MMC_MODE_HC;
+
+ if (init_mmc_core(host))
+ return -EINVAL;
+
+ if (quirks & SDHCI_QUIRK_REG32_RW)
+ host->version = sdhci_readl(host, SDHCI_HOST_VERSION - 2) >> 16;
+ else
+ host->version = sdhci_readw(host, SDHCI_HOST_VERSION);
+
+
[U-Boot] [PATCH v1 6/6] board: bcm28155_ap: Add board files
Add support for the bcm28155_ap reference board.
Signed-off-by: Darwin Rambo
Reviewed-by: Steve Rae
Reviewed-by: Tim Kryger
---
board/broadcom/bcm28155_ap/Makefile |7 ++
board/broadcom/bcm28155_ap/bcm28155_ap.c | 87 +++
boards.cfg |1 +
include/configs/bcm28155_ap.h| 140 ++
4 files changed, 235 insertions(+)
create mode 100644 board/broadcom/bcm28155_ap/Makefile
create mode 100644 board/broadcom/bcm28155_ap/bcm28155_ap.c
create mode 100644 include/configs/bcm28155_ap.h
diff --git a/board/broadcom/bcm28155_ap/Makefile
b/board/broadcom/bcm28155_ap/Makefile
new file mode 100644
index 000..b6159dc
--- /dev/null
+++ b/board/broadcom/bcm28155_ap/Makefile
@@ -0,0 +1,7 @@
+#
+# Copyright 2013 Broadcom Corporation. All rights reserved.
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y += $(BOARD).o
diff --git a/board/broadcom/bcm28155_ap/bcm28155_ap.c
b/board/broadcom/bcm28155_ap/bcm28155_ap.c
new file mode 100644
index 000..814e6b4
--- /dev/null
+++ b/board/broadcom/bcm28155_ap/bcm28155_ap.c
@@ -0,0 +1,87 @@
+/*
+ * Copyright 2013 Broadcom Corporation. All rights reserved.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#define SECWATCHDOG_SDOGCR_OFFSET 0x
+#define SECWATCHDOG_SDOGCR_EN_SHIFT27
+#define SECWATCHDOG_SDOGCR_SRSTEN_SHIFT26
+#define SECWATCHDOG_SDOGCR_CLKS_SHIFT 20
+#define SECWATCHDOG_SDOGCR_LD_SHIFT0
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/*
+ * board_init - early hardware init
+ */
+int board_init(void)
+{
+ printf("Relocation Offset is: %08lx\n", gd->reloc_off);
+
+ /* adress of boot parameters */
+ gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
+
+ clk_init();
+
+ return 0;
+}
+
+/*
+ * misc_init_r - miscellaneous platform dependent initializations
+ */
+int misc_init_r(void)
+{
+ /* Disable watchdog reset - watchdog unused */
+ writel((0 << SECWATCHDOG_SDOGCR_EN_SHIFT) |
+ (0 << SECWATCHDOG_SDOGCR_SRSTEN_SHIFT) |
+ (4 << SECWATCHDOG_SDOGCR_CLKS_SHIFT) |
+ (0x5a0 << SECWATCHDOG_SDOGCR_LD_SHIFT),
+ (SECWD_BASE_ADDR + SECWATCHDOG_SDOGCR_OFFSET));
+
+ return 0;
+}
+
+/*
+ * dram_init - sets uboots idea of sdram size
+ */
+int dram_init(void)
+{
+ gd->ram_size = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE,
+ CONFIG_SYS_SDRAM_SIZE);
+ return 0;
+}
+
+/* This is called after dram_init() so use get_ram_size result */
+void dram_init_banksize(void)
+{
+ gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
+ gd->bd->bi_dram[0].size = gd->ram_size;
+}
+
+#ifdef CONFIG_KONA_SDHCI
+/*
+ * mmc_init - Initializes mmc
+ */
+int board_mmc_init(bd_t *bis)
+{
+ int ret = 0;
+
+ /* Register eMMC - SDIO2 */
+ ret = kona_sdhci_init(1, 40, 0);
+ if (ret)
+ return ret;
+
+ /* Register SD Card - SDIO4 kona_mmc_init assumes 0 based index */
+ ret = kona_sdhci_init(3, 40, 0);
+ return ret;
+}
+#endif
diff --git a/boards.cfg b/boards.cfg
index 2dfd2b4..e4ab8ac 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -272,6 +272,7 @@ Active arm armv7 am33xx ti
ti816x
Active arm armv7 at91atmel sama5d3xek
sama5d3xek_mmc sama5d3xek:SAMA5D3,SYS_USE_MMC
Bo Shen
Active arm armv7 at91atmel sama5d3xek
sama5d3xek_nandflash sama5d3xek:SAMA5D3,SYS_USE_NANDFLASH
Bo Shen
Active arm armv7 at91atmel sama5d3xek
sama5d3xek_spiflash sama5d3xek:SAMA5D3,SYS_USE_SERIALFLASH
Bo Shen
+Active arm armv7 bcm281xxbroadcombcm28155_ap
bcm28155_ap bcm28155_ap
Tim Kryger
Active arm armv7 exynos samsung arndale
arndale -
Inderpal Singh
Active arm armv7 exynos samsung origen
origen -
Chander Kashyap
Active a
Re: [U-Boot] [PATCH 3/4] ARM: tegra: fix NV_PA_CSITE_BASE for Tegra124
Nice catch, fortunately I don't see this base addr used anywhere (yet) in T124. > -Original Message- > From: Stephen Warren [mailto:swar...@wwwdotorg.org] > Sent: Monday, February 03, 2014 2:03 PM > To: u-boot@lists.denx.de; Simon Glass; Tom Warren; Stephen Warren > Subject: [PATCH 3/4] ARM: tegra: fix NV_PA_CSITE_BASE for Tegra124 > > From: Stephen Warren > > Tegra124 moved the CSITE block's base address. Fix U-Boot to use the correct > address. > > Signed-off-by: Stephen Warren > --- > arch/arm/include/asm/arch-tegra/tegra.h | 5 + > 1 file changed, 5 insertions(+) > > diff --git a/arch/arm/include/asm/arch-tegra/tegra.h > b/arch/arm/include/asm/arch-tegra/tegra.h > index 5fe19ae1ac13..d63af0e5fd9c 100644 > --- a/arch/arm/include/asm/arch-tegra/tegra.h > +++ b/arch/arm/include/asm/arch-tegra/tegra.h > @@ -34,7 +34,12 @@ > #define NV_PA_PMC_BASE (NV_PA_APB_MISC_BASE + 0xE400) > #define NV_PA_EMC_BASE (NV_PA_APB_MISC_BASE + 0xF400) > #define NV_PA_FUSE_BASE (NV_PA_APB_MISC_BASE + 0xF800) > +#if defined(CONFIG_TEGRA20) || defined(CONFIG_TEGRA30) || \ > + defined(CONFIG_TEGRA114) > #define NV_PA_CSITE_BASE 0x7004 > +#else > +#define NV_PA_CSITE_BASE 0x7080 > +#endif > #define TEGRA_USB_ADDR_MASK 0xC000 > > #define NV_PA_SDRC_CS0 NV_PA_SDRAM_BASE > -- > 1.8.1.5 -- nvpublic ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/2] cmd_pxe.c add any option for filesystem with sysboot uses generic load
On 01/24/2014 06:59 AM, Tom Rini wrote: > On 01/24/2014 08:49 AM, Wolfgang Denk wrote: >> Dear Dennis Gilmore, > >> In message <1390501358-4564-2-git-send-email-den...@ausil.us> you wrote: >>> Signed-off-by: Dennis Gilmore > >> "add any option for filesystem with sysboot uses generic load" ? > >> I'm sorry, but I cannot understand what this is supposed to mean. > >>> +#ifdef CONFIG_CMD_FS_GENERIC > >> Can you please add some documentation to the README what this (so far >> undocumented) option means? > > For the record, this is another (relatively) long-standing undocumented > option. Just so this thread is up-to-date, I have sent patch "README: document CONFIG_CMD_FS_GENERIC" to resolve this objection. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] README: document CONFIG_CMD_FS_GENERIC
On 01/24/2014 08:46 PM, Stephen Warren wrote: > From: Stephen Warren > > This enables generic filesystem commands such as load and ls, which > automatically work with multiple filesystem types, without having to > be told which is present, unlike e.g. ext2load, fatls. Are there any comments on this patch? ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 2/2] config: add config_distro_defaults.h
On 01/24/2014 07:58 AM, Dennis Gilmore wrote: > Hi Wolfgang, > > > El Fri, 24 Jan 2014 14:50:10 +0100 > Wolfgang Denk escribió: >> Dear Dennis Gilmore, >> >> In message <1390501358-4564-3-git-send-email-den...@ausil.us> you >> wrote: >>> describe a set of default features that distros can rely on being >>> available. having this common definition means that distros can >>> easily support systems implementing them. >>> >>> Signed-off-by: Dennis Gilmore >>> --- >>> include/config_distro_defaults.h | 55 >>> 1 file changed, 55 >>> insertions(+) create mode 100644 include/config_distro_defaults.h >> >> For this patch set this adds dead code. Please resubmit as part of a >> series that actually uses this. > > in the cover email i put > """ > I have left out any implementations in this set of patches. I am > working to redo all the implementations based on the work done by > Stephen Warren in his recent set to base on top of these and his exists > work. > """ > > Stephen has submitted patches that use this code. and I will be > submitting further patches that use it in the next few days. Wolfgang, is this OK (Dennis submitting patches that adds a feature, and my submitting a separate series that uses it, all sent to the mailing list at the same time and applied together)? Or, do I need to physically send Dennis's patches in the same series as my patches? > I will be submitting a V2 that fixes Stephens comment Dennis, I don't think I saw V2 of this series? ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 3/4] ARM: tegra: fix NV_PA_CSITE_BASE for Tegra124
On 02/03/2014 02:18 PM, Tom Warren wrote: > Nice catch, fortunately I don't see this base addr used anywhere (yet) in > T124. It's used to define CSITE_CPU_DBG*_LAR, and those are used in code. (The internal Tegra simulator I'm running complains about the incorrect register accesses when booting U-boot) > >> -Original Message- >> From: Stephen Warren [mailto:swar...@wwwdotorg.org] >> Sent: Monday, February 03, 2014 2:03 PM >> To: u-boot@lists.denx.de; Simon Glass; Tom Warren; Stephen Warren >> Subject: [PATCH 3/4] ARM: tegra: fix NV_PA_CSITE_BASE for Tegra124 >> >> From: Stephen Warren >> >> Tegra124 moved the CSITE block's base address. Fix U-Boot to use the correct >> address. >> >> Signed-off-by: Stephen Warren >> --- >> arch/arm/include/asm/arch-tegra/tegra.h | 5 + >> 1 file changed, 5 insertions(+) >> >> diff --git a/arch/arm/include/asm/arch-tegra/tegra.h >> b/arch/arm/include/asm/arch-tegra/tegra.h >> index 5fe19ae1ac13..d63af0e5fd9c 100644 >> --- a/arch/arm/include/asm/arch-tegra/tegra.h >> +++ b/arch/arm/include/asm/arch-tegra/tegra.h >> @@ -34,7 +34,12 @@ >> #define NV_PA_PMC_BASE (NV_PA_APB_MISC_BASE + 0xE400) >> #define NV_PA_EMC_BASE (NV_PA_APB_MISC_BASE + 0xF400) >> #define NV_PA_FUSE_BASE (NV_PA_APB_MISC_BASE + 0xF800) >> +#if defined(CONFIG_TEGRA20) || defined(CONFIG_TEGRA30) || \ >> +defined(CONFIG_TEGRA114) >> #define NV_PA_CSITE_BASE0x7004 >> +#else >> +#define NV_PA_CSITE_BASE0x7080 >> +#endif >> #define TEGRA_USB_ADDR_MASK 0xC000 >> >> #define NV_PA_SDRC_CS0 NV_PA_SDRAM_BASE >> -- >> 1.8.1.5 > -- > nvpublic > ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
