From: Stephen Warren <swar...@nvidia.com>

In order to completely halt the AVP processor, we should simply write
FLOW_MODE_STOP without any extra options that allow wakeup. Amend the
code to do this.

I believe that enabling FIQ_1 and IRQ_1 allow the CPU to be awoken by
interrupts. We don't want this; if later SW wishes to use the AVP, it
should be reset and booted from scratch.

Related, the bits that were previously IRQ_1 and FIQ_1 have a slightly
different definition starting with Tegra114, so the values we're
writing don't entirely make sense there anyway.

Signed-off-by: Stephen Warren <swar...@nvidia.com>
---
 arch/arm/cpu/arm720t/tegra-common/cpu.c | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/arch/arm/cpu/arm720t/tegra-common/cpu.c 
b/arch/arm/cpu/arm720t/tegra-common/cpu.c
index 2c5cd63917d3..168f525ec7c8 100644
--- a/arch/arm/cpu/arm720t/tegra-common/cpu.c
+++ b/arch/arm/cpu/arm720t/tegra-common/cpu.c
@@ -378,8 +378,7 @@ void clock_enable_coresight(int enable)
 void halt_avp(void)
 {
        for (;;) {
-               writel((HALT_COP_EVENT_JTAG | HALT_COP_EVENT_IRQ_1 \
-                       | HALT_COP_EVENT_FIQ_1 | (FLOW_MODE_STOP<<29)),
-                       FLOW_CTLR_HALT_COP_EVENTS);
+               writel(HALT_COP_EVENT_JTAG | (FLOW_MODE_STOP << 29),
+                      FLOW_CTLR_HALT_COP_EVENTS);
        }
 }
-- 
1.8.1.5

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