Re: [U-Boot] [PATCH 3/4 v3] s5pc1xx: support serial driver
Dear Tom
2009/9/23 Tom :
> Minkyu Kang wrote:
>> This patch includes the serial driver for s5pc1xx
>>
>> Signed-off-by: Minkyu Kang
>
> Add a better commit log.
> Explain why a special serial driver is needed instead
> of using the generic serial driver.
ok.
>
>> ---
>> Changes since v1:
>> - use serial multi API
>> - use writel/readl function
>> - remove duplicate code
>>
>> Changes since v2:
>> - use sizeof() instead of the constant
>>
>> common/serial.c | 18 +++
>> drivers/serial/Makefile | 1 +
>> drivers/serial/serial_s5pc1xx.c | 307
>> +++
>> include/serial.h | 7 +
>> 4 files changed, 333 insertions(+), 0 deletions(-)
>> create mode 100644 drivers/serial/serial_s5pc1xx.c
>>
>> diff --git a/common/serial.c b/common/serial.c
>> index 41a24c2..e5ce9fd 100644
>> --- a/common/serial.c
>> +++ b/common/serial.c
>> @@ -69,6 +69,18 @@ struct serial_device *__default_serial_console (void)
>> #else
>> #error "CONFIG_SERIAL? missing."
>> #endif
>> +#elif defined(CONFIG_S5PC1XX)
>> +#if defined(CONFIG_SERIAL0)
>> + return &s5pc1xx_serial0_device;
>> +#elif defined(CONFIG_SERIAL1)
>> + return &s5pc1xx_serial1_device;
>> +#elif defined(CONFIG_SERIAL2)
>> + return &s5pc1xx_serial2_device;
>> +#elif defined(CONFIG_SERIAL3)
>> + return &s5pc1xx_serial3_device;
>
> This can be condensed down to
>
> return S5PC1XX_DEFAULT_SERIAL_DEVICE
>
> S5PC1XX_DEFAULT_SERIAL_DEVICE to be defined the board file.
>
>
>
>> +#else
>> +#error "CONFIG_SERIAL? missing."
>> +#endif
>> #elif defined(CONFIG_OMAP3_ZOOM2)
>> return ZOOM2_DEFAULT_SERIAL_DEVICE;
>> #else
>> @@ -139,6 +151,12 @@ void serial_initialize (void)
>> serial_register(&s3c24xx_serial1_device);
>> serial_register(&s3c24xx_serial2_device);
>> #endif
>> +#if defined(CONFIG_S5PC1XX)
>> + serial_register(&s5pc1xx_serial0_device);
>> + serial_register(&s5pc1xx_serial1_device);
>> + serial_register(&s5pc1xx_serial2_device);
>> + serial_register(&s5pc1xx_serial3_device);
>> +#endif
>> serial_assign (default_serial_console ()->name);
>> }
>>
>> diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile
>> index 64882a2..3c77a7c 100644
>> --- a/drivers/serial/Makefile
>> +++ b/drivers/serial/Makefile
>> @@ -33,6 +33,7 @@ COBJS-$(CONFIG_NS9750_UART) += ns9750_serial.o
>> COBJS-$(CONFIG_SYS_NS16550) += ns16550.o
>> COBJS-$(CONFIG_DRIVER_S3C4510_UART) += s3c4510b_uart.o
>> COBJS-$(CONFIG_S3C64XX) += s3c64xx.o
>> +COBJS-$(CONFIG_S5PC1XX) += serial_s5pc1xx.o
>> COBJS-$(CONFIG_SYS_NS16550_SERIAL) += serial.o
>> COBJS-$(CONFIG_CLPS7111_SERIAL) += serial_clps7111.o
>> COBJS-$(CONFIG_IMX_SERIAL) += serial_imx.o
>> diff --git a/drivers/serial/serial_s5pc1xx.c
>> b/drivers/serial/serial_s5pc1xx.c
>> new file mode 100644
>> index 000..48feb4e
>> --- /dev/null
>> +++ b/drivers/serial/serial_s5pc1xx.c
>> @@ -0,0 +1,307 @@
>> +/*
>> + * (C) Copyright 2009 SAMSUNG Electronics
>> + * Minkyu Kang
>> + * Heungjun Kim
>> + *
>> + * based on drivers/serial/s3c64xx.c
>> + *
>> + * This program is free software; you can redistribute it and/or modify
>> + * it under the terms of the GNU General Public License as published by
>> + * the Free Software Foundation; either version 2 of the License, or
>> + * (at your option) any later version.
>> + *
>> + * This program is distributed in the hope that it will be useful,
>> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
>> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
>> + * GNU General Public License for more details.
>> + *
>> + * You should have received a copy of the GNU General Public License
>> + * along with this program; if not, write to the Free Software
>> + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
>> + *
>> + */
>> +
>> +#include
>> +#include
>> +#include
>> +#include
>> +
>> +#if defined(CONFIG_SERIAL_MULTI)
>> +#include
>> +
>> +/* Multi serial device functions */
>> +#define DECLARE_S5P_SERIAL_FUNCTIONS(port) \
>> + int s5p_serial##port##_init(void) { \
>> + return serial_init_dev(port); } \
>> + void s5p_serial##port##_setbrg(void) { \
>> + serial_setbrg_dev(port); } \
>> + int s5p_serial##port##_getc(void) { \
>> + return serial_getc_dev(port); } \
>> + int s5p_serial##port##_tstc(void) { \
>> + return serial_tstc_dev(port); } \
>> + void s5p_serial##port##_putc(const char c) { \
>> + serial_putc_dev(port, c); } \
>> + void s5p_serial##port##_puts(const char *s) { \
>> + serial_puts_dev(port, s); }
>
> Mixing whitespace blanks and tabs.
> Please convert to tabs.
ok, i'll fix it
>
>> +
>> +#define INIT_S5P_SERIAL_STRUCTURE(port, name, bus) { \
>> + name, \
>> + bus, \
>> + s5p_serial##port##_init, \
>> + s5p_serial##port##_setbrg, \
>> + s5p_serial##port##_getc, \
>> + s5p_serial##port##_tstc, \
>> + s5p_serial##por
Re: [U-Boot] smc911x runtime detection
Dirk Behme wrote:
> Olof Johansson wrote:
>> Add setup for ethernet on Tobi, allowing kernel/ramdisk to be loaded
>> over tftp.
>>
>> Based on the omap3 evm code. I added a new highlevel define for Tobi
>> to avoid having it dependent on CMD_NET (which would seem backward in
>> this case).
>
> First: This is only a request for comment for possible future
> improvement. It doesn't ask for any changes in this patch or is any
> nack. Now to the content ;)
>
> It seems that Steve found a way for runtime detection of smc911x
> making CONFIG_OMAP3_OVERO_TOBI more or less obsolete (from [1]) :
>
> -- cut --
> --- git/include/configs/omap3_overo.h-orig2009-09-17
> 13:06:08.0 -0700
> +++ git/include/configs/omap3_overo.h 2009-09-17 13:06:49.0 -0700
> @@ -29,7 +29,7 @@
> #define CONFIG_OMAP34XX 1 /* which is a 34XX */
> #define CONFIG_OMAP3430 1 /* which is in a 3430 */
> #define CONFIG_OMAP3_OVERO 1 /* working with overo */
> -//#define CONFIG_OMAP3_OVERO_TOBI1 /* overo mounted on tobi */
> +#define CONFIG_OMAP3_OVERO_TOBI 1 /* overo mounted on tobi */
>
> #include/* get chip and board defs */
> #include
> --- git/drivers/net/smc911x.c-orig2009-09-21 13:28:25.0 -0700
> +++ git/drivers/net/smc911x.c 2009-09-21 13:29:53.0 -0700
> @@ -253,6 +253,12 @@ int smc911x_initialize(u8 dev_num, int b
>
> dev->iobase = base_addr;
>
> + /* test to see if chip is present (-1 if not) */
> + if (smc911x_reg_read(dev, MAC_CSR_CMD) == -1) {
> + free(dev);
> + return 0;
> + }
> +
How are the mux and f/i clock setup handled?
Or will this change only help if the mux setup happens as a default?
Tom
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[U-Boot] [PATCH-ARM 4/4, v2] Clean-up of s3c24x0 nand driver]
Changes since v1:
- re-formatted patch to remove line wrapping
Note that patch 2/4 of this series has not changed.
This patch re-formats the arm920t s3c24x0 nand driver in preparation for changes
to add support for the Embest SBC2440-II Board.
The changes are as follows:
- re-indent the code using Lindent
- make sure register layouts are defined using a C struct
- replace the upper-case typedef'ed C struct names with lower case
non-typedef'ed ones
- make sure registers are accessed using the proper accessor functions
- run checkpatch.pl and fix any error reports
It assumes the following patch has been applied first:
- [U-Boot][PATCH-ARM] CONFIG_SYS_HZ fix for ARM902T S3C24X0 Boards, 05/09/2009
- patches 1/4, 2/4 and 3/4 of this series
Tested on an Embest SBC2440-II Board with local u-boot patches as I don't have
any s3c2400 or s3c2410 boards but need this patch applying before I can submit
patches for the SBC2440-II Board. Also, temporarily modified sbc2410x, smdk2400,
smdk2410 and trab configs to use the mtd nand driver (which isn't used by any
board at the moment), ran MAKEALL for all ARM9 targets and no new warnings or
errors were found.
Signed-off-by: Kevin Morfitt
---
drivers/mtd/nand/s3c2410_nand.c | 62 +++---
1 files changed, 25 insertions(+), 37 deletions(-)
diff --git a/drivers/mtd/nand/s3c2410_nand.c b/drivers/mtd/nand/s3c2410_nand.c
index d27a625..f2f3e72 100644
--- a/drivers/mtd/nand/s3c2410_nand.c
+++ b/drivers/mtd/nand/s3c2410_nand.c
@@ -20,29 +20,10 @@
#include
-#if 0
-#define DEBUGN printf
-#else
-#define DEBUGN(x, args ...) {}
-#endif
-
#include
#include
#include
-#define __REGb(x) (*(volatile unsigned char *)(x))
-#define __REGi(x) (*(volatile unsigned int *)(x))
-
-#defineNF_BASE 0x4e00
-#defineNFCONF __REGi(NF_BASE + 0x0)
-#defineNFCMD __REGb(NF_BASE + 0x4)
-#defineNFADDR __REGb(NF_BASE + 0x8)
-#defineNFDATA __REGb(NF_BASE + 0xc)
-#defineNFSTAT __REGb(NF_BASE + 0x10)
-#define NFECC0 __REGb(NF_BASE + 0x14)
-#define NFECC1 __REGb(NF_BASE + 0x15)
-#define NFECC2 __REGb(NF_BASE + 0x16)
-
#define S3C2410_NFCONF_EN (1<<15)
#define S3C2410_NFCONF_512BYTE (1<<14)
#define S3C2410_NFCONF_4STEP (1<<13)
@@ -58,11 +39,12 @@
static void s3c2410_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int ctrl)
{
struct nand_chip *chip = mtd->priv;
+ struct s3c2410_nand *nand = s3c2410_get_base_nand();
- DEBUGN("hwcontrol(): 0x%02x 0x%02x\n", cmd, ctrl);
+ debugX(1, "hwcontrol(): 0x%02x 0x%02x\n", cmd, ctrl);
if (ctrl & NAND_CTRL_CHANGE) {
- ulong IO_ADDR_W = NF_BASE;
+ ulong IO_ADDR_W = (ulong)nand;
if (!(ctrl & NAND_CLE))
IO_ADDR_W |= S3C2410_ADDR_NCLE;
@@ -72,9 +54,11 @@ static void s3c2410_hwcontrol(struct mtd_info *mtd, int cmd,
unsigned int ctrl)
chip->IO_ADDR_W = (void *)IO_ADDR_W;
if (ctrl & NAND_NCE)
- NFCONF &= ~S3C2410_NFCONF_nFCE;
+ writel(readl(&nand->NFCONF) & ~S3C2410_NFCONF_nFCE,
+ &nand->NFCONF);
else
- NFCONF |= S3C2410_NFCONF_nFCE;
+ writel(readl(&nand->NFCONF) | S3C2410_NFCONF_nFCE,
+ &nand->NFCONF);
}
if (cmd != NAND_CMD_NONE)
@@ -83,15 +67,17 @@ static void s3c2410_hwcontrol(struct mtd_info *mtd, int
cmd, unsigned int ctrl)
static int s3c2410_dev_ready(struct mtd_info *mtd)
{
- DEBUGN("dev_ready\n");
- return (NFSTAT & 0x01);
+ struct s3c2410_nand *nand = s3c2410_get_base_nand();
+ debugX(1, "dev_ready\n");
+ return readl(&nand->NFSTAT) & 0x01;
}
#ifdef CONFIG_S3C2410_NAND_HWECC
void s3c2410_nand_enable_hwecc(struct mtd_info *mtd, int mode)
{
- DEBUGN("s3c2410_nand_enable_hwecc(%p, %d)\n", mtd, mode);
- NFCONF |= S3C2410_NFCONF_INITECC;
+ struct s3c2410_nand *nand = s3c2410_get_base_nand();
+ debugX(1, "s3c2410_nand_enable_hwecc(%p, %d)\n", mtd, mode);
+ writel(readl(&nand->NFCONF) | S3C2410_NFCONF_INITECC, &nand->NFCONF);
}
static int s3c2410_nand_calculate_ecc(struct mtd_info *mtd, const u_char *dat,
@@ -100,8 +86,8 @@ static int s3c2410_nand_calculate_ecc(struct mtd_info *mtd,
const u_char *dat,
ecc_code[0] = NFECC0;
ecc_code[1] = NFECC1;
ecc_code[2] = NFECC2;
- DEBUGN("s3c2410_nand_calculate_hwecc(%p,): 0x%02x 0x%02x 0x%02x\n",
- mtd , ecc_code[0], ecc_code[1], ecc_code[2]);
+ debugX(1, "s3c2410_nand_calculate_hwecc(%p,): 0x%02x 0x%02x 0x%02x\n",
+ mtd , ecc_code[0], ecc_code[1], ecc_code[2]);
return 0;
}
@@ -123,24 +109,26 @@ int board_nand_init(struct nand_chip *nand)
{
u_int32_t cfg;
Re: [U-Boot] [PATCH] OMAP3: Update Overo and Beagle environment
On Fri, Sep 25, 2009 at 1:47 PM, Tom wrote:
> Dirk Behme wrote:
>> From: Steve Sakoman
>>
>> Update default environment to support new kernel DSS2 subsystem and
>> simplify rootfs type and location changes.
>>
>> Signed-off-by: Steve Sakoman
>> Signed-off-by: Dirk Behme
>>
>> ---
>> include/configs/omap3_beagle.h | 27 +++
>> include/configs/omap3_overo.h | 27 +++
>> 2 files changed, 38 insertions(+), 16 deletions(-)
>>
>> Index: u-boot-ti/include/configs/omap3_overo.h
>> ===
>> --- u-boot-ti.orig/include/configs/omap3_overo.h
>> +++ u-boot-ti/include/configs/omap3_overo.h
>> @@ -155,16 +155,27 @@
>> #define CONFIG_EXTRA_ENV_SETTINGS \
>> "loadaddr=0x8200\0" \
>> "console=ttyS2,115200n8\0" \
>> - "videomode=1024x...@60,vxres=1024,vyres=768\0" \
>> - "videospec=omapfb:vram:2M,vram:4M\0" \
>> + "vram=12M\0" \
>> + "dvimode=1024x768mr...@60\0" \
>> + "defaultdisplay=dvi\0" \
>> + "mmcroot=/dev/mmcblk0p2 rw\0" \
>> + "mmcrootfstype=ext3 rootwait\0" \
>> + "nandroot=/dev/mtdblock4 rw\0" \
>> + "nandrootfstype=jffs2\0" \
>> "mmcargs=setenv bootargs console=${console} " \
>> - "video=${videospec},mode:${videomode} " \
>> - "root=/dev/mmcblk0p2 rw " \
>> - "rootfstype=ext3 rootwait\0" \
>> + "vram=${vram} " \
>> + "omapfb.mode=dvi:${dvimode} " \
>> + "omapfb.debug=y " \
>
> Is setting the debug option needed ?
> This would seem useful (from the name) only to developers
DSS2 is still under active development. This setting makes user
support easier since boot logs contain needed debug info.
>
>> + "omapdss.def_disp=${defaultdisplay} " \
>> + "root=${mmcroot} " \
>> + "rootfstype=${mmcrootfstype}\0" \
>> "nandargs=setenv bootargs console=${console} " \
>> - "video=${videospec},mode:${videomode} " \
>> - "root=/dev/mtdblock4 rw " \
>> - "rootfstype=jffs2\0" \
>> + "vram=${vram} " \
>> + "omapfb.mode=dvi:${dvimode} " \
>> + "omapfb.debug=y " \
>> + "omapdss.def_disp=${defaultdisplay} " \
>
> From vram to omapdss.def_disp are common for nand and mmc.
> These should be changed to something like
>
> "videoargs= "
>
> Similar for beagle.
I'm not sure exactly what you are suggesting. The current setup is
tailored to make user support easier.
If someone wants to use the 4.3" LCD display option, you tell them to
simply type:
setenv defaultdisplay=lcd43
saveenv
Or if they want to change the DVI resolution to 640 x 480:
dvimode=640x480mr...@60
saveenv
Perhaps I'm jut not understanding your suggestion. Could you give more detail?
Steve
>
> Tom
> ___
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[U-Boot] [RFC][PATCH 6/8] Reorder source objects in lib_i386 Makefile
--- lib_i386/Makefile |8 1 files changed, 4 insertions(+), 4 deletions(-) diff --git a/lib_i386/Makefile b/lib_i386/Makefile index bb9b330..9838506 100644 --- a/lib_i386/Makefile +++ b/lib_i386/Makefile @@ -32,16 +32,16 @@ SOBJS-y += realmode_switch.o COBJS-y+= bios_setup.o COBJS-y+= board.o COBJS-y+= bootm.o +COBJS-y+= interrupts.o +COBJS-$(CONFIG_SYS_PCAT_INTERRUPTS) += pcat_interrupts.o +COBJS-$(CONFIG_SYS_GENERIC_TIMER) += pcat_timer.o COBJS-$(CONFIG_PCI) += pci.o COBJS-$(CONFIG_PCI) += pci_type1.o COBJS-y+= realmode.o +COBJS-y+= timer.o COBJS-y+= video_bios.o COBJS-y+= video.o COBJS-y+= zimage.o -COBJS-y+= interrupts.o -COBJS-y+= timer.o -COBJS-$(CONFIG_SYS_PCAT_INTERRUPTS) += pcat_interrupts.o -COBJS-$(CONFIG_SYS_GENERIC_TIMER) += pcat_timer.o SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c) OBJS := $(addprefix $(obj),$(SOBJS-y) $(COBJS-y)) -- 1.6.4.1.174.g32f4c ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [RFC][PATCH 2/8] Add low-level progress indications
--- board/eNET/eNET_start16.S | 66 +- board/eNET/hardware.h | 16 ++ include/asm-i386/ic/sc520.h |6 3 files changed, 86 insertions(+), 2 deletions(-) diff --git a/board/eNET/eNET_start16.S b/board/eNET/eNET_start16.S index 48e4d83..2d7929b 100644 --- a/board/eNET/eNET_start16.S +++ b/board/eNET/eNET_start16.S @@ -27,8 +27,7 @@ * that is used by U-boot to its final destination. */ -/* #include */ - +#include #include "hardware.h" .text @@ -60,6 +59,69 @@ board_init16: xorw%ax, %ax movb%al, (%di) + /* Enable UART 1 */ + movl$SC520_ADDDECCTL, %edi + movb$0x02, %al + movb%al, (%di) + + /* Configure UART 1 - 9600 Baud 8N1 */ + movl$SC520_UART1CTL, %edi + movb$0x07, %al + movb%al, (%di) + + /* Set DLAB bit */ + movw$(UART0_BASE + UART_LCR), %dx + movb$0x80, %al + outb%al, %dx + + /* Set baudrate divisor (LSB) */ + movw$(UART0_BASE + UART_DLL), %dx + movb$0x0c, %al + outb%al, %dx + + /* Set baudrate divisor (MSB) */ + movw$(UART0_BASE + UART_DLM), %dx + movb$0x00, %al + outb%al, %dx + + /* clear DLAB; set 8 bits, no parity */ + movw$(UART0_BASE + UART_LCR), %dx + movb$0x03, %al + outb%al, %dx + + /* enable FIFO */ + movw$(UART0_BASE + UART_FCR), %dx + movb$0x01, %al + outb%al, %dx + + /* Set DTR and RTS active */ + movw$(UART0_BASE + UART_MCR), %dx + movb$0x0b, %al + outb%al, %dx + + /* clear line status */ + movw$(UART0_BASE + UART_LSR), %dx + inb %dx, %al + + /* read receive buffer */ + movw$(UART0_BASE + UART_RBR), %dx + inb %dx, %al + + /* set scratchpad */ + movw$(UART0_BASE + UART_SCR), %dx + movb$0x00, %al + outb%al, %dx + + /* Disable Interrupts */ + movw$(UART0_BASE + UART_IER), %dx + movb$0x00, %al + outb%al, %dx + + /* wait for the UART clock to settle */ + movl$0x1,%ecx +uartdelay: + loopuartdelay + /* Disabe MMCR alias */ movw$0xfffc, %dx movl$0x00cb, %eax diff --git a/board/eNET/hardware.h b/board/eNET/hardware.h index 42474a6..d85fde0 100644 --- a/board/eNET/hardware.h +++ b/board/eNET/hardware.h @@ -32,4 +32,20 @@ #define LED_TX_BITMASK 0x10 #define LED_ERR_BITMASK0x20 +/* Serial Port Definitions */ +#define UART0_BASE 0x3f8 + +#define UART_RBR 0x00 +#define UART_THR 0x00 +#define UART_IER 0x01 +#define UART_IIR 0x02 +#define UART_FCR 0x02 +#define UART_LCR 0x03 +#define UART_MCR 0x04 +#define UART_LSR 0x05 +#define UART_MSR 0x06 +#define UART_SCR 0x07 +#define UART_DLL 0x00 +#define UART_DLM 0x01 + #endif /* HARDWARE_H_ */ diff --git a/include/asm-i386/ic/sc520.h b/include/asm-i386/ic/sc520.h index 57c9904..72e5d5d 100644 --- a/include/asm-i386/ic/sc520.h +++ b/include/asm-i386/ic/sc520.h @@ -257,10 +257,16 @@ extern volatile sc520_mmcr_t *sc520_mmcr; /* MMCR Offsets (required for assembler code */ #define SC520_DBCTL0x0040 /* SDRAM Buffer Control Register */ +#define SC520_ADDDECCTL0x0080 #define SC520_PAR140x00c0 /* Programmable Address Region 14 Register */ #define SC520_PAR150x00c4 /* Programmable Address Region 15 Register */ #define SC520_SWTMRMILLI 0x0c60 /* Software Timer Millisecond Count */ #define SC520_SWTMRMICRO 0x0c62 /* Software Timer Microsecond Count */ +#define SC520_UART1CTL 0x0cc0 /* UART 1 Control */ + + /* MMCR Register bits (not all of them :) ) */ + + /* MMCR Register bits (not all of them :) ) */ -- 1.6.4.1.174.g32f4c ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [RFC][PATCH 1/8] Fix gcc 4.4.1 compiler warning
--- common/Makefile |4 1 files changed, 4 insertions(+), 0 deletions(-) diff --git a/common/Makefile b/common/Makefile index 3781738..7ea6e93 100644 --- a/common/Makefile +++ b/common/Makefile @@ -178,6 +178,10 @@ $(obj)env_embedded.o: $(src)env_embedded.c $(obj)../tools/envcrc -DENV_CRC=$(shell $(obj)../tools/envcrc) \ -c -o $@ $(src)env_embedded.c +$(obj)dlmalloc.o: $(src)dlmalloc.c $(obj)dlmalloc.o + $(CC) $(CFLAGS) -Wa,--no-warn -fno-strict-aliasing \ + -c -o $@ $(src)dlmalloc.c + $(obj)../tools/envcrc: $(MAKE) -C ../tools -- 1.6.4.1.174.g32f4c ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [RFC][PATCH 7/8] Fix global label in inline asm compile error
---
include/configs/eNET.h |4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/include/configs/eNET.h b/include/configs/eNET.h
index 54c34fa..0a86550 100644
--- a/include/configs/eNET.h
+++ b/include/configs/eNET.h
@@ -234,8 +234,8 @@
#ifndef __ASSEMBLER__
extern unsigned long ip;
-#define PRINTIPasm ("call next_line\n" \
- "next_line:\n" \
+#define PRINTIPasm ("call 0\n" \
+ "0:\n" \
"pop %%eax\n" \
"movl %%eax, %0\n" \
:"=r"(ip) \
--
1.6.4.1.174.g32f4c
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Re: [U-Boot] [PATCH] mpc83xx: retain POR values of non-configured ACR, SPCR, SCCR, and LCRR bitfields
Hello Kim,
Kim Phillips wrote:
> On Tue, 15 Sep 2009 23:51:31 -0500
> Kumar Gala wrote:
>
>> On Aug 27, 2009, at 3:53 PM, Kim Phillips wrote:
>>> Heiko - let's go with the SCCR approach of setting bits in the LCRR,
>>> and have board config files only specify values for fields they're
>>> modifying from the reset value for their processor (this can be
>>> extended to 85xx-world).
>> Did you guys ever come to resolution on this? Realizing we have same
>> issue on 85xx & 86xx (we dont actually set LCRR at all in cpu/ code
>> for 85xx or 86xx.)
>
> this should probably be extended to SICRH, SICRL, etc., but how's this:?
>
>>From 15d01649e403ec7da20f5fdd25b8d2c1bccb6a8d Mon Sep 17 00:00:00 2001
> From: Kim Phillips
> Date: Fri, 25 Sep 2009 18:07:29 -0500
> Subject: [PATCH] mpc83xx: retain POR values of non-configured ACR, SPCR,
> SCCR, and LCRR bitfields
>
> some LCRR bits are not documented throughout the 83xx family RMs.
> New board porters copying similar board configurations might omit
> setting e.g., DBYP since it was not documented in their SoC's RM.
>
> Prevent them bricking their board by retaining power on reset values
> in bit fields that the board porter doesn't explicitly configure
> via CONFIG_SYS__ assignments in the board
> config file.
>
> also start to use i/o accessors.
>
> Signed-off-by: Kim Phillips
> ---
> cpu/mpc83xx/cpu_init.c| 255
> -
> include/configs/MPC8313ERDB.h |3 +-
> include/configs/MPC8315ERDB.h |3 +-
> include/configs/MPC8323ERDB.h |3 +-
> include/configs/MPC832XEMDS.h |3 +-
> include/configs/MPC8349EMDS.h |3 +-
> include/configs/MPC8349ITX.h |3 +-
> include/configs/MPC8360EMDS.h |3 +-
> include/configs/MPC8360ERDK.h |3 +-
> include/configs/MPC837XEMDS.h |3 +-
> include/configs/MPC837XERDB.h |3 +-
> include/configs/MVBLM7.h |3 +-
> include/configs/SIMPC8313.h |4 +-
> include/configs/TQM834x.h |3 +-
> include/configs/kmeter1.h |4 +-
> include/configs/sbc8349.h |3 +-
> include/configs/vme8349.h |3 +-
> 17 files changed, 183 insertions(+), 122 deletions(-)
>
> diff --git a/cpu/mpc83xx/cpu_init.c b/cpu/mpc83xx/cpu_init.c
> index 5c930d3..95dbc76 100644
> --- a/cpu/mpc83xx/cpu_init.c
> +++ b/cpu/mpc83xx/cpu_init.c
> @@ -23,8 +23,8 @@
> #include
> #include
> #include
> -#ifdef CONFIG_USB_EHCI_FSL
> #include
> +#ifdef CONFIG_USB_EHCI_FSL
> #include
> #endif
>
> @@ -63,149 +63,192 @@ static void config_qe_ioports(void)
> */
> void cpu_init_f (volatile immap_t * im)
> {
> - /* Pointer is writable since we allocated a register for it */
[...]
>
> - /* LCRR - Clock Ratio Register (10.3.1.16) */
> - im->lbus.lcrr = CONFIG_SYS_LCRR;
> + /* LCRR - Clock Ratio Register (10.3.1.16)
> + * write, read, and isync per MPC8379ERM rev.1 CLKDEV field description
> + */
> + clrsetbits_be32(&im->lbus.lcrr, lcrr_mask, lcrr_val);
> + __raw_readl(&im->lbus.lcrr);
> + isync();
Hmm.. shouldn;t this be done when running from RAM, as DaveLiu
suggested?
bye
Heiko
--
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HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
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[U-Boot] [RFC][PATCH 4/8] Rearrange i386 Interupt Handling
In preperation for full relocation
---
cpu/i386/Makefile |2 +-
cpu/i386/cpu.c |1 -
cpu/i386/exceptions.c | 229 -
cpu/i386/interrupts.c | 428 ++--
include/asm-i386/interrupt.h | 27 ---
include/asm-i386/u-boot-i386.h |3 -
lib_i386/interrupts.c |4 +-
lib_i386/pcat_interrupts.c | 33 ---
8 files changed, 417 insertions(+), 310 deletions(-)
delete mode 100644 cpu/i386/exceptions.c
diff --git a/cpu/i386/Makefile b/cpu/i386/Makefile
index e98bd3d..c658c6e 100644
--- a/cpu/i386/Makefile
+++ b/cpu/i386/Makefile
@@ -29,7 +29,7 @@ include $(TOPDIR)/config.mk
LIB= $(obj)lib$(CPU).a
START = start.o start16.o resetvec.o
-COBJS = serial.o interrupts.o exceptions.o cpu.o
+COBJS = serial.o interrupts.o cpu.o
SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
diff --git a/cpu/i386/cpu.c b/cpu/i386/cpu.c
index d91e33b..8baf37d 100644
--- a/cpu/i386/cpu.c
+++ b/cpu/i386/cpu.c
@@ -48,7 +48,6 @@ int cpu_init(void)
/* Initialize core interrupt and exception functionality of CPU */
cpu_init_interrupts ();
- cpu_init_exceptions ();
return 0;
}
diff --git a/cpu/i386/exceptions.c b/cpu/i386/exceptions.c
deleted file mode 100644
index bc3d434..000
--- a/cpu/i386/exceptions.c
+++ /dev/null
@@ -1,229 +0,0 @@
-/*
- * (C) Copyright 2002
- * Daniel Engström, Omicron Ceti AB, dan...@omicron.se.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include
-#include
-
-asm (".globl exp_return\n"
- "exp_return:\n"
- " addl $12, %esp\n"
- " pop %esp\n"
- " popa\n"
- " iret\n");
-
-char exception_stack[4096];
-
-/*
- * For detailed description of each exception, refer to:
- * Intel® 64 and IA-32 Architectures Software Developer's Manual
- * Volume 1: Basic Architecture
- * Order Number: 253665-029US, November 2008
- * Table 6-1. Exceptions and Interrupts
- */
-DECLARE_EXCEPTION(0, divide_error_entry);
-DECLARE_EXCEPTION(1, debug_entry);
-DECLARE_EXCEPTION(2, nmi_interrupt_entry);
-DECLARE_EXCEPTION(3, breakpoint_entry);
-DECLARE_EXCEPTION(4, overflow_entry);
-DECLARE_EXCEPTION(5, bound_range_exceeded_entry);
-DECLARE_EXCEPTION(6, invalid_opcode_entry);
-DECLARE_EXCEPTION(7, device_not_available_entry);
-DECLARE_EXCEPTION(8, double_fault_entry);
-DECLARE_EXCEPTION(9, coprocessor_segment_overrun_entry);
-DECLARE_EXCEPTION(10, invalid_tss_entry);
-DECLARE_EXCEPTION(11, segment_not_present_entry);
-DECLARE_EXCEPTION(12, stack_segment_fault_entry);
-DECLARE_EXCEPTION(13, general_protection_entry);
-DECLARE_EXCEPTION(14, page_fault_entry);
-DECLARE_EXCEPTION(15, reserved_exception_entry);
-DECLARE_EXCEPTION(16, floating_point_error_entry);
-DECLARE_EXCEPTION(17, alignment_check_entry);
-DECLARE_EXCEPTION(18, machine_check_entry);
-DECLARE_EXCEPTION(19, simd_floating_point_exception_entry);
-DECLARE_EXCEPTION(20, reserved_exception_entry);
-DECLARE_EXCEPTION(21, reserved_exception_entry);
-DECLARE_EXCEPTION(22, reserved_exception_entry);
-DECLARE_EXCEPTION(23, reserved_exception_entry);
-DECLARE_EXCEPTION(24, reserved_exception_entry);
-DECLARE_EXCEPTION(25, reserved_exception_entry);
-DECLARE_EXCEPTION(26, reserved_exception_entry);
-DECLARE_EXCEPTION(27, reserved_exception_entry);
-DECLARE_EXCEPTION(28, reserved_exception_entry);
-DECLARE_EXCEPTION(29, reserved_exception_entry);
-DECLARE_EXCEPTION(30, reserved_exception_entry);
-DECLARE_EXCEPTION(31, reserved_exception_entry);
-
-__isr__ reserved_exception_entry(int cause, int ip, int seg)
-{
- printf("Reserved Exception %d at %04x:%08x\n", cause, seg, ip);
-}
-
-__isr__ divide_error_entry(int cause, int ip, int seg)
-{
- printf("Divide Error (Division by zero) at %04x:%08x\n", seg, ip);
- while(1);
-}
-
-__isr__ debug_entry(int cause, int ip, int seg)
-{
- printf("Debug Interrupt (Single step) at %04x:%08x\n", seg, ip);
-}
-
-__isr__ nmi_interrupt_entry(int cause, int ip, int seg)
-{
- printf("NMI Interrupt at %04x:%08x\n", seg, ip);
-}
-
-__isr__ breakpoint_entry(int cause, int ip, int seg)
-{
- printf("Breakpoint at
Re: [U-Boot] [PATCH v2] OMAP3 MMC: Fix warning dereferencing type-punned pointer
Dirk Behme wrote:
> Tom wrote:
>> Dirk Behme wrote:
>>> Fix warning
>>>
>>> dereferencing type-punned pointer will break strict-aliasing rules
>>>
>>> Signed-off-by: Dirk Behme
>>> CC: Steve Sakoman
>>>
>>
>> This may be improved by consolidating the unions into the omap3 mmc.h
>> file
>> and using a pointer to union in the mmc_send_cmd.
>
> Hmmh, I'm not so familiar with unions ;) But moving
>
> union {
> unsigned int resp[4];
> mmc_resp_r3 r3;
> mmc_resp_r6 r6;
> } mmc_resp;
>
> and
>
> union {
> unsigned int resp[4];
> mmc_csd_reg_t Card_CSD;
> } mmc_resp;
>
> into the omap3 mmc.h would mean to make them global and to permanently
> allocate the space for resp[4]? That is, make local variables allocated
> locally (on stack?) move to global variables using (wasting?) some
> additional memory? If so, I'd like to keep stuff local as done by the
> original version. Sorry if I missed something ;)
>
I ment just the declaration like
union mmc_resp_t {
unsigned int resp[4];
mmc_resp_r3 r3;
mmc_resp_r6 r6;
mmc_csd_reg_t Card_CSD;
};
variables would still be defined in the C file.
Tom
> Best regards
>
> Dirk
>
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[U-Boot] [RFC][PATCH 3/8] Fix i386 malloc initialisation
---
board/eNET/u-boot.lds |5 -
common/dlmalloc.c |6 --
include/configs/eNET.h|2 +-
include/configs/sc520_cdp.h |2 +-
include/configs/sc520_spunk.h |2 +-
lib_i386/board.c | 15 +++
6 files changed, 14 insertions(+), 18 deletions(-)
diff --git a/board/eNET/u-boot.lds b/board/eNET/u-boot.lds
index 4ea424d..832d101 100644
--- a/board/eNET/u-boot.lds
+++ b/board/eNET/u-boot.lds
@@ -32,12 +32,15 @@ SECTIONS
. = ALIGN(4);
.rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) }
+
+ .eh_frame : { *(.eh_frame) }
_i386boot_text_size = SIZEOF(.text) + SIZEOF(.rodata);
. = 0x03FF; /* Ram data segment to use */
_i386boot_romdata_dest = ABSOLUTE(.);
- .data : AT ( LOADADDR(.rodata) + SIZEOF(.rodata) ) { *(.data) }
+ .data : AT ( LOADADDR(.eh_frame) + SIZEOF(.eh_frame) ) { *(.data) }
+/* .data : { *(.data) } */
_i386boot_romdata_start = LOADADDR(.data);
. = ALIGN(4);
diff --git a/common/dlmalloc.c b/common/dlmalloc.c
index 241db8c..f980430 100644
--- a/common/dlmalloc.c
+++ b/common/dlmalloc.c
@@ -1520,11 +1520,6 @@ void *sbrk(ptrdiff_t increment)
return (void *)old;
}
-#ifndef CONFIG_X86
-/*
- * x86 boards use a slightly different init sequence thus they implement
- * their own version of mem_malloc_init()
- */
void mem_malloc_init(ulong start, ulong size)
{
mem_malloc_start = start;
@@ -1533,7 +1528,6 @@ void mem_malloc_init(ulong start, ulong size)
memset((void *)mem_malloc_start, 0, size);
}
-#endif
/* field-extraction macros */
diff --git a/include/configs/eNET.h b/include/configs/eNET.h
index 243a554..54c34fa 100644
--- a/include/configs/eNET.h
+++ b/include/configs/eNET.h
@@ -61,7 +61,7 @@
/*
* Size of malloc() pool
*/
-#define CONFIG_MALLOC_SIZE (CONFIG_SYS_ENV_SIZE + 128*1024)
+#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024)
#define CONFIG_BAUDRATE9600
diff --git a/include/configs/sc520_cdp.h b/include/configs/sc520_cdp.h
index 214a9af..2f1dae7 100644
--- a/include/configs/sc520_cdp.h
+++ b/include/configs/sc520_cdp.h
@@ -65,7 +65,7 @@
/*
* Size of malloc() pool
*/
-#define CONFIG_MALLOC_SIZE (CONFIG_ENV_SIZE + 128*1024)
+#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024)
#define CONFIG_BAUDRATE9600
diff --git a/include/configs/sc520_spunk.h b/include/configs/sc520_spunk.h
index f3fc960..cf5633c 100644
--- a/include/configs/sc520_spunk.h
+++ b/include/configs/sc520_spunk.h
@@ -63,7 +63,7 @@
/*
* Size of malloc() pool
*/
-#define CONFIG_MALLOC_SIZE (CONFIG_ENV_SIZE + 128*1024)
+#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024)
#define CONFIG_BAUDRATE9600
diff --git a/lib_i386/board.c b/lib_i386/board.c
index 0262b5e..39a3099 100644
--- a/lib_i386/board.c
+++ b/lib_i386/board.c
@@ -73,17 +73,16 @@ ulong i386boot_bios_size = (ulong)&_i386boot_bios_size;
/* size of BIOS
const char version_string[] =
U_BOOT_VERSION" (" U_BOOT_DATE " - " U_BOOT_TIME ")";
-static int mem_malloc_init(void)
+static int heap_init(void)
{
/* start malloc area right after the stack */
- mem_malloc_start = i386boot_bss_start +
- i386boot_bss_size + CONFIG_SYS_STACK_SIZE;
- mem_malloc_start = (mem_malloc_start+3)&~3;
+ ulong start = i386boot_bss_start + i386boot_bss_size +
+ CONFIG_SYS_STACK_SIZE;
- /* Use all available RAM for malloc() */
- mem_malloc_end = gd->ram_size;
+ /* 4-byte aligned */
+ start = (start+3)&~3;
- mem_malloc_brk = mem_malloc_start;
+ mem_malloc_init(start, CONFIG_SYS_MALLOC_LEN);
return 0;
}
@@ -180,7 +179,7 @@ init_fnc_t *init_sequence[] = {
cpu_init, /* basic cpu dependent setup */
board_init, /* basic board dependent setup */
dram_init, /* configure available RAM banks */
- mem_malloc_init,/* dependant on dram_init */
+ heap_init, /* dependant on dram_init */
interrupt_init, /* set up exceptions */
timer_init,
serial_init,
--
1.6.4.1.174.g32f4c
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[U-Boot] [RFC][PATCH 8/8] Final i386 Relocation
---
board/eNET/config.mk |2 +
board/eNET/eNET.c | 17 --
board/eNET/u-boot.lds | 49 +++
cpu/i386/cpu.c | 12 ++-
cpu/i386/interrupts.c |4 +-
cpu/i386/start.S | 125 +++-
include/asm-i386/u-boot-i386.h | 10 +++-
lib_i386/Makefile |1 +
lib_i386/board.c | 108 ---
lib_i386/elf_reloc.c | 139
lib_i386/interrupts.c |4 +-
lib_i386/realmode.c|4 +-
lib_i386/timer.c |2 +-
13 files changed, 279 insertions(+), 198 deletions(-)
create mode 100644 lib_i386/elf_reloc.c
diff --git a/board/eNET/config.mk b/board/eNET/config.mk
index a763841..cbec0a8 100644
--- a/board/eNET/config.mk
+++ b/board/eNET/config.mk
@@ -22,3 +22,5 @@
#
TEXT_BASE = 0x3804
+PLATFORM_RELFLAGS += -fpic
+PLATFORM_LDFLAGS += -pic
diff --git a/board/eNET/eNET.c b/board/eNET/eNET.c
index 29cf295..baf7c95 100644
--- a/board/eNET/eNET.c
+++ b/board/eNET/eNET.c
@@ -47,7 +47,6 @@ void init_sc520_enet (void)
{
/* Set CPU Speed to 100MHz */
sc520_mmcr->cpuctl = 0x01;
- gd->cpu_clk = 1;
/* wait at least one millisecond */
asm("movl $0x2000,%%ecx\n"
@@ -67,7 +66,7 @@ void init_sc520_enet (void)
/*
* Miscellaneous platform dependent initializations
*/
-int board_init(void)
+int board_early_init_f(void)
{
init_sc520_enet();
@@ -117,12 +116,20 @@ int board_init(void)
sc520_mmcr->sysarbctl = 0x06;
sc520_mmcr->sysarbmenb = 0x0003;
- /* Crystal is 33.000MHz */
- gd->bus_clk = 3300;
-
return 0;
}
+int board_early_init_r(void)
+{
+ /* CPU Speed to 100MHz */
+ gd->cpu_clk = 1;
+
+ /* Crystal is 33.000MHz */
+ gd->bus_clk = 3300;
+
+ return 0;
+}
+
int dram_init(void)
{
init_sc520_dram();
diff --git a/board/eNET/u-boot.lds b/board/eNET/u-boot.lds
index 832d101..1cd6056 100644
--- a/board/eNET/u-boot.lds
+++ b/board/eNET/u-boot.lds
@@ -28,39 +28,64 @@ ENTRY(_start)
SECTIONS
{
. = 0x3804; /* Location of bootcode in flash */
+ _i386boot_rom_copy_start = .;
.text : { *(.text); }
. = ALIGN(4);
.rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) }
+ . = ALIGN(4);
.eh_frame : { *(.eh_frame) }
+ . = ALIGN(4);
- _i386boot_text_size = SIZEOF(.text) + SIZEOF(.rodata);
-
- . = 0x03FF; /* Ram data segment to use */
- _i386boot_romdata_dest = ABSOLUTE(.);
- .data : AT ( LOADADDR(.eh_frame) + SIZEOF(.eh_frame) ) { *(.data) }
-/* .data : { *(.data) } */
- _i386boot_romdata_start = LOADADDR(.data);
+ .data : { *(.data) }
+ . = ALIGN(4);
+
+ .got : { *(.got) }
+ . = ALIGN(4);
+ _i386boot_got_start = LOADADDR(.got);
+ _i386boot_got_end = LOADADDR(.got) + SIZEOF(.got) - 1;
+ .got.plt : { *(.got.plt) }
. = ALIGN(4);
- .got : AT ( LOADADDR(.data) + SIZEOF(.data) ) { *(.got) }
-
+ _i386boot_got_plt_start = LOADADDR(.got.plt);
+ _i386boot_got_plt_end = LOADADDR(.got.plt) + SIZEOF(.got.plt) - 1;
+
+ .rel.got : { *(.rel.got) }
. = ALIGN(4);
+ _i386boot_rel_got_start = LOADADDR(.rel.got);
+ _i386boot_rel_got_end = LOADADDR(.rel.got) + SIZEOF(.rel.got) - 1;
+
+ .rel.dyn : { *(.rel.dyn) }
+ . = ALIGN(4);
+ _i386boot_rel_dyn_start = LOADADDR(.rel.dyn);
+ _i386boot_rel_dyn_end = LOADADDR(.rel.dyn) + SIZEOF(.rel.dyn) - 1;
+
+ .dynsym : { *(.dynsym) }
+ . = ALIGN(4);
+ _i386boot_dynsym_start = LOADADDR(.dynsym);
+ _i386boot_dynsym_end = LOADADDR(.dynsym) + SIZEOF(.dynsym) - 1;
+
+ .dynamic : { *(.dynamic) }
+ . = ALIGN(4);
+ _i386boot_dynamic_start = LOADADDR(.dynamic);
+ _i386boot_dynamic_end = LOADADDR(.dynamic) + SIZEOF(.dynamic) - 1;
+
__u_boot_cmd_start = .;
.u_boot_cmd : { *(.u_boot_cmd) }
__u_boot_cmd_end = .;
_i386boot_cmd_start = LOADADDR(.u_boot_cmd);
+ . = ALIGN(4);
- _i386boot_romdata_size = SIZEOF(.data) + SIZEOF(.got) +
SIZEOF(.u_boot_cmd);
+ _i386boot_rom_copy_end = .;
- . = ALIGN(4);
_i386boot_bss_start = ABSOLUTE(.);
.bss (NOLOAD) : { *(.bss) }
+ . = ALIGN(4);
_i386boot_bss_size = SIZEOF(.bss);
/* 16bit realmode trampoline code */
- .realmode 0x7c0 : AT ( LOADADDR(.got) + SIZEOF(.got) +
SIZEOF(.u_boot_cmd)) { *(.realmode) }
+ .realmode 0x7c0 : AT ( LOADADDR(.u_boot_cmd) + SIZEOF(.u_boot_cmd) ) {
*(.realmode) }
_i386boot_realmode = LOADADDR(.realmode);
_i386boot_realmode_size = SIZEOF(.realmode);
diff --git a/cpu/i386/cpu.c b/cpu/i386/cpu.c
index 8baf37d..685f6c1 100644
[U-Boot] [RFC][PATCH 5/8] Fix race condition when using SC520 timers
---
cpu/i386/sc520/sc520_timer.c | 11 ++-
1 files changed, 6 insertions(+), 5 deletions(-)
diff --git a/cpu/i386/sc520/sc520_timer.c b/cpu/i386/sc520/sc520_timer.c
index 23de14b..25c9a24 100644
--- a/cpu/i386/sc520/sc520_timer.c
+++ b/cpu/i386/sc520/sc520_timer.c
@@ -35,6 +35,12 @@ void sc520_timer_isr(void)
int timer_init(void)
{
+ /* Register the SC520 specific timer interrupt handler */
+ register_timer_isr (sc520_timer_isr);
+
+ /* Install interrupt handler for GP Timer 1 */
+ irq_install_handler (0, timer_isr, NULL);
+
/* Map GP Timer 1 to Master PIC IR0 */
sc520_mmcr->gp_tmr_int_map[1] = 0x01;
@@ -54,11 +60,6 @@ int timer_init(void)
sc520_mmcr->gptmr1maxcmpa = 100;
sc520_mmcr->gptmr1ctl = 0xe009;
- /* Register the SC520 specific timer interrupt handler */
- register_timer_isr (sc520_timer_isr);
-
- /* Install interrupt handler for GP Timer 1 */
- irq_install_handler (0, timer_isr, NULL);
unmask_irq (0);
/* Clear the GP Timer 1 status register to get the show rolling*/
--
1.6.4.1.174.g32f4c
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Re: [U-Boot] smc911x runtime detection (was: TI: OMAP3: Overo Tobi ethernet support)
On Saturday 26 September 2009 02:13:52 Dirk Behme wrote:
> Olof Johansson wrote:
> > Add setup for ethernet on Tobi, allowing kernel/ramdisk to be loaded
> > over tftp.
> >
> > Based on the omap3 evm code. I added a new highlevel define for Tobi
> > to avoid having it dependent on CMD_NET (which would seem backward in
> > this case).
>
> First: This is only a request for comment for possible future
> improvement. It doesn't ask for any changes in this patch or is any
> nack. Now to the content ;)
>
> It seems that Steve found a way for runtime detection of smc911x
> making CONFIG_OMAP3_OVERO_TOBI more or less obsolete (from [1]) :
>
> -- cut --
> --- git/include/configs/omap3_overo.h-orig2009-09-17
> 13:06:08.0 -0700
> +++ git/include/configs/omap3_overo.h 2009-09-17 13:06:49.0 -0700
> @@ -29,7 +29,7 @@
> #define CONFIG_OMAP34XX 1 /* which is a 34XX */
> #define CONFIG_OMAP3430 1 /* which is in a 3430 */
> #define CONFIG_OMAP3_OVERO 1 /* working with overo */
> -//#define CONFIG_OMAP3_OVERO_TOBI1 /* overo mounted on tobi */
> +#define CONFIG_OMAP3_OVERO_TOBI 1 /* overo mounted on tobi */
>
> #include/* get chip and board defs */
> #include
> --- git/drivers/net/smc911x.c-orig2009-09-21 13:28:25.0 -0700
> +++ git/drivers/net/smc911x.c 2009-09-21 13:29:53.0 -0700
> @@ -253,6 +253,12 @@ int smc911x_initialize(u8 dev_num, int b
>
> dev->iobase = base_addr;
>
> + /* test to see if chip is present (-1 if not) */
> + if (smc911x_reg_read(dev, MAC_CSR_CMD) == -1) {
> + free(dev);
> + return 0;
> + }
i dont think returning 0 is correct. let the higher layers (i.e. your board)
handle the error dynamically.
-mike
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Re: [U-Boot] smc911x runtime detection (was: TI: OMAP3: Overo Tobi ethernet support)
Hi Olof, On Sat, Sep 26, 2009 at 8:53 AM, Olof Johansson wrote: > > On Sep 26, 2009, at 1:13 AM, Dirk Behme wrote: > > Olof Johansson wrote: >> >>> Add setup for ethernet on Tobi, allowing kernel/ramdisk to be loaded >>> over tftp. >>> Based on the omap3 evm code. I added a new highlevel define for Tobi >>> to avoid having it dependent on CMD_NET (which would seem backward in >>> this case). >>> >> >> First: This is only a request for comment for possible future improvement. >> It doesn't ask for any changes in this patch or is any nack. Now to the >> content ;) >> >> It seems that Steve found a way for runtime detection of smc911x making >> CONFIG_OMAP3_OVERO_TOBI more or less obsolete (from [1]) : >> > > Looks like a good idea. I guess the risk is if there's ever another carrier > board with something on the same chip select that happens to return > something at that address, thus causing false detection. Is that a valid > concern? > > It is a good idea in principle, but just reading and expecting *something* is a fatal flaw. I don't know about these ones in particular, but memory-mapped chips often have ID registers that are RO and have well-documented contents. If somebody can find something like that here, let's do it. > > -Olof > > regards, Ben ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] smc911x runtime detection (was: TI: OMAP3: Overo Tobi ethernet support)
On Sep 26, 2009, at 1:13 AM, Dirk Behme wrote: > Olof Johansson wrote: >> Add setup for ethernet on Tobi, allowing kernel/ramdisk to be loaded >> over tftp. >> Based on the omap3 evm code. I added a new highlevel define for Tobi >> to avoid having it dependent on CMD_NET (which would seem backward in >> this case). > > First: This is only a request for comment for possible future > improvement. It doesn't ask for any changes in this patch or is any > nack. Now to the content ;) > > It seems that Steve found a way for runtime detection of smc911x > making CONFIG_OMAP3_OVERO_TOBI more or less obsolete (from [1]) : Looks like a good idea. I guess the risk is if there's ever another carrier board with something on the same chip select that happens to return something at that address, thus causing false detection. Is that a valid concern? -Olof ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] divulgue sua empresa no portal www.tvgloboonline.com
Divulgue sua empresa conosco entre em contato: Vendas: cont...@tvgloboonline.com.br Suporte / MSN: contato.evan...@hotmail.com Skype: "AGENCIA GLOBO" Cel: (66)8114-6665 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [RFC][PATCH 0/8] i386 Full Relocation
This patch series implements full relocation of the i386 port. The series itself needs a lot of tidying up. The "Fix-gcc-4.4.1-compiler-warning" patch, for example, needs to be submitted as a stand-alone patch. In the meantime, I would appreciate any comments on this series Thanks G ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH-ARM 3/4, v2] Clean-up of s3c24x0 drivers excluding nand driver
Changes since v1:
- re-formatted patch to remove line wrapping
Note that patch 2/4 of this series has not changed.
This patch re-formats the arm920t s3c24x0 driver files, excluding the nand
driver, in preparation for changes to add support for the Embest SBC2440-II
Board.
The changes are as follows:
- re-indent the code using Lindent
- make sure register layouts are defined using a C struct
- replace the upper-case typedef'ed C struct names with lower case
non-typedef'ed ones
- make sure registers are accessed using the proper accessor functions
- run checkpatch.pl and fix any error reports
It assumes the following patch has been applied first:
- [U-Boot][PATCH-ARM] CONFIG_SYS_HZ fix for ARM902T S3C24X0 Boards, 05/09/2009
- patches 1/4 and 2/4 of this series
Tested on an Embest SBC2440-II Board with local u-boot patches as I don't have
any s3c2400 or s3c2410 boards but need this patch applying before I can submit
patches for the SBC2440-II Board. Also, temporarily modified sbc2410x, smdk2400,
smdk2410 and trab configs to use the mtd nand driver (which isn't used by any
board at the moment), ran MAKEALL for all ARM9 targets and no new warnings or
errors were found.
Signed-off-by: Kevin Morfitt
---
board/mpl/vcma9/vcma9.c | 13 +-
board/mpl/vcma9/vcma9.h | 20 ++--
board/samsung/smdk2400/smdk2400.c |5 +-
board/samsung/smdk2410/smdk2410.c |5 +-
board/sbc2410x/sbc2410x.c |7 +-
board/trab/cmd_trab.c | 12 +-
board/trab/rs485.c| 12 +-
board/trab/trab.c | 17 ++-
board/trab/trab_fkt.c | 26 ++--
board/trab/tsc2000.c | 17 ++-
board/trab/tsc2000.h |4 +-
board/trab/vfd.c | 12 +-
drivers/i2c/s3c24x0_i2c.c | 273 +++--
drivers/rtc/s3c24x0_rtc.c | 130 +-
drivers/serial/serial_s3c24x0.c | 160 --
15 files changed, 374 insertions(+), 339 deletions(-)
diff --git a/board/mpl/vcma9/vcma9.c b/board/mpl/vcma9/vcma9.c
index 3216d63..ed4df17 100644
--- a/board/mpl/vcma9/vcma9.c
+++ b/board/mpl/vcma9/vcma9.c
@@ -73,8 +73,9 @@ static inline void delay(unsigned long loops)
int board_init(void)
{
- S3C24X0_CLOCK_POWER * const clk_power = S3C24X0_GetBase_CLOCK_POWER();
- S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
+ struct s3c24x0_clock_power * const clk_power =
+ s3c24x0_get_base_clock_power();
+ struct s3c24x0_gpio * const gpio = s3c24x0_get_base_gpio();
/* to reduce PLL lock time, adjust the LOCKTIME register */
clk_power->LOCKTIME = 0xFF;
@@ -174,7 +175,7 @@ static inline void NF_Init(void)
void
nand_init(void)
{
- S3C2410_NAND * const nand = S3C2410_GetBase_NAND();
+ struct s3c2410_nand * const nand = s3c2410_get_base_nand();
NF_Init();
#ifdef DEBUG
@@ -190,21 +191,21 @@ nand_init(void)
static u8 Get_PLD_ID(void)
{
- VCMA9_PLD * const pld = VCMA9_GetBase_PLD();
+ VCMA9_PLD * const pld = VCMA9_get_base_PLD();
return(pld->ID);
}
static u8 Get_PLD_BOARD(void)
{
- VCMA9_PLD * const pld = VCMA9_GetBase_PLD();
+ VCMA9_PLD * const pld = VCMA9_get_base_PLD();
return(pld->BOARD);
}
static u8 Get_PLD_SDRAM(void)
{
- VCMA9_PLD * const pld = VCMA9_GetBase_PLD();
+ VCMA9_PLD * const pld = VCMA9_get_base_PLD();
return(pld->SDRAM);
}
diff --git a/board/mpl/vcma9/vcma9.h b/board/mpl/vcma9/vcma9.h
index 220b705..566448f 100644
--- a/board/mpl/vcma9/vcma9.h
+++ b/board/mpl/vcma9/vcma9.h
@@ -39,14 +39,14 @@ typedef enum {
static inline void NF_Conf(u16 conf)
{
- S3C2410_NAND * const nand = S3C2410_GetBase_NAND();
+ struct s3c2410_nand * const nand = s3c2410_get_base_nand();
nand->NFCONF = conf;
}
static inline void NF_Cmd(u8 cmd)
{
- S3C2410_NAND * const nand = S3C2410_GetBase_NAND();
+ struct s3c2410_nand * const nand = s3c2410_get_base_nand();
nand->NFCMD = cmd;
}
@@ -59,14 +59,14 @@ static inline void NF_CmdW(u8 cmd)
static inline void NF_Addr(u8 addr)
{
- S3C2410_NAND * const nand = S3C2410_GetBase_NAND();
+ struct s3c2410_nand * const nand = s3c2410_get_base_nand();
nand->NFADDR = addr;
}
static inline void NF_SetCE(NFCE_STATE s)
{
- S3C2410_NAND * const nand = S3C2410_GetBase_NAND();
+ struct s3c2410_nand * const nand = s3c2410_get_base_nand();
switch (s) {
case NFCE_LOW:
@@ -81,35 +81,35 @@ static inline void NF_SetCE(NFCE_STATE s)
static inline void NF_WaitRB(void)
{
- S3C2410_NAND * const nand = S3C2410_GetBase_NAND();
+ struct s3c2410_nand * const nand = s3c2410_get_base_nand();
while (!(nand->NFSTAT & (1<<0)));
}
static inline void NF_Write(u8 data)
{
- S3C2410_NAND * const nand = S3C2410_GetBase_NAND();
+ stru
Re: [U-Boot] smc911x runtime detection (was: TI: OMAP3: Overo Tobi ethernet support)
Steve, Please keep list C-C'd, On Sat, Sep 26, 2009 at 12:13 PM, Steve Sakoman wrote: > On Sat, Sep 26, 2009 at 9:02 AM, Ben Warren > wrote: > > Hi Olof, > > On Sat, Sep 26, 2009 at 8:53 AM, Olof Johansson wrote: > >> > >> On Sep 26, 2009, at 1:13 AM, Dirk Behme wrote: > >> > >>> Olof Johansson wrote: > > Add setup for ethernet on Tobi, allowing kernel/ramdisk to be loaded > over tftp. > Based on the omap3 evm code. I added a new highlevel define for Tobi > to avoid having it dependent on CMD_NET (which would seem backward in > this case). > >>> > >>> First: This is only a request for comment for possible future > >>> improvement. It doesn't ask for any changes in this patch or is any > nack. > >>> Now to the content ;) > >>> > >>> It seems that Steve found a way for runtime detection of smc911x making > >>> CONFIG_OMAP3_OVERO_TOBI more or less obsolete (from [1]) : > >> > >> Looks like a good idea. I guess the risk is if there's ever another > >> carrier board with something on the same chip select that happens to > return > >> something at that address, thus causing false detection. Is that a valid > >> concern? > >> > > It is a good idea in principle, but just reading and expecting > *something* > > is a fatal flaw. I don't know about these ones in particular, but > > memory-mapped chips often have ID registers that are RO and have > > well-documented contents. If somebody can find something like that here, > > let's do it. > > Agreed, I didn't have a spec at hand to investigate this, so that's > why I didn't think that this was a good patch for all systems with > smc911x. I know it to work on Overo because reads to non-existent > GPMC locations give all ones (hence the test for -1). > > I would definitely prefer a register with known contents. > > There was a question as to whether the code returned the proper value. > Returning a 0 from this routine when no chip is found results in a > reasonable error message: > > Net: No ethernet found. > > Yes, returning 0 is the correct value. The undocumented API is that Ethernet initialize() functions return the number of interfaces added, or -1 on error. I wouldn't consider this an error condition. regards, Ben ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [RFC][PATCH 1/8] Fix gcc 4.4.1 compiler warning
On Saturday 26 September 2009 08:57:31 Graeme Russ wrote: > --- > common/Makefile |4 > 1 files changed, 4 insertions(+), 0 deletions(-) > > diff --git a/common/Makefile b/common/Makefile > index 3781738..7ea6e93 100644 > --- a/common/Makefile > +++ b/common/Makefile > @@ -178,6 +178,10 @@ $(obj)env_embedded.o: $(src)env_embedded.c > $(obj)../tools/envcrc -DENV_CRC=$(shell $(obj)../tools/envcrc) \ > -c -o $@ $(src)env_embedded.c > > +$(obj)dlmalloc.o: $(src)dlmalloc.c $(obj)dlmalloc.o > + $(CC) $(CFLAGS) -Wa,--no-warn -fno-strict-aliasing \ > + -c -o $@ $(src)dlmalloc.c there's already patches floating around to fix this at the source level but if your only goal is to add custom compiler flags, please use the per- object CFLAGS support. this should work: CFLAGS_dlmalloc.o += -Wa,--no-warn -fno-strict-aliasing -mike signature.asc Description: This is a digitally signed message part. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] smc911x runtime detection (was: TI: OMAP3: Overo Tobi ethernet support)
On Saturday 26 September 2009 15:19:01 Ben Warren wrote: > Ethernet initialize() functions return the number of interfaces added, or > -1 on error. I wouldn't consider this an error condition. should be added to the README.drivers.eth. have you merged that yet ? if not, i'll send an updated version. -mike signature.asc Description: This is a digitally signed message part. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] smc911x runtime detection (was: TI: OMAP3: Overo Tobi ethernet support)
On Sat, Sep 26, 2009 at 09:02:33AM -0700, Ben Warren wrote: > It is a good idea in principle, but just reading and expecting *something* > is a fatal flaw. I don't know about these ones in particular, but > memory-mapped chips often have ID registers that are RO and have > well-documented contents. If somebody can find something like that here, > let's do it. Register at offset 0x50 should contain the Chip ID and revision (0x9211 << 16 | ). It should be a better base for auto-probe. Actually, the driver already does check it (and verifies it against a table of known chip revs). By moving that call sooner we can essentially accomplish the same thing. It also makes sense to move some of the printouts around to not mess up he probing printouts. I will post a v3 patch for this separately (it also contains the GPIO changes). I do find the whole "one firmware config for all overo carriers" to be a little hard to accomplish, since the OMAP gumstix + carrier really is what is normally considered the "board". On the other hand, having one firmware that boots on all possible versions is probably preferrably on some level. For future carrier boards, having an I2C ID EEPROM or similar on there might not be a bad idea. However, I can't figure out how to contact anyone at Gumstix without posting on their web forum. See patch separately. -Olof ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v3] TI: OMAP3: Overo Tobi ethernet support
Add setup for ethernet on Tobi, allowing kernel/ramdisk to be loaded
over tftp.
This also refactors the smc911x driver to allow for detecting when the
chip is missing. I.e. the detect_chip() function is called earlier and
will abort gracefully when the Chip ID read returns all 1's.
Signed-off-by: Olof Johansson
---
Changes since last version:
* Incorporated auto-detect based on email discussion
* Refactored some smc911x probe to deal with the above
* Incorporated the GPIO library changes
* Removed the TOBI-specific config option due to the new auto-probe
Testing on non-Tobi carrier boards would be appreciated, since I don't
have any.
board/overo/overo.c | 59 ++
board/overo/overo.h | 63 +
drivers/net/smc911x.c | 14 +
drivers/net/smc911x.h |7 +++-
include/configs/omap3_overo.h | 17 ++-
5 files changed, 119 insertions(+), 41 deletions(-)
diff --git a/board/overo/overo.c b/board/overo/overo.c
index dd6d286..d42dc13 100644
--- a/board/overo/overo.c
+++ b/board/overo/overo.c
@@ -29,13 +29,20 @@
* MA 02111-1307 USA
*/
#include
+#include
#include
#include
#include
+#include
#include
+#include
#include
#include "overo.h"
+#if defined(CONFIG_CMD_NET)
+static void setup_net_chip(void);
+#endif
+
/*
* Routine: board_init
* Description: Early hardware init.
@@ -62,6 +69,10 @@ int misc_init_r(void)
twl4030_power_init();
twl4030_led_init();
+#if defined(CONFIG_CMD_NET)
+ setup_net_chip();
+#endif
+
dieid_num_r();
return 0;
@@ -77,3 +88,51 @@ void set_muxconf_regs(void)
{
MUX_OVERO();
}
+
+#if defined(CONFIG_CMD_NET)
+/*
+ * Routine: setup_net_chip
+ * Description: Setting up the configuration GPMC registers specific to the
+ * Ethernet hardware.
+ */
+static void setup_net_chip(void)
+{
+ struct ctrl *ctrl_base = (struct ctrl *)OMAP34XX_CTRL_BASE;
+
+ /* Configure GPMC registers */
+ writel(NET_GPMC_CONFIG1, &gpmc_cfg->cs[5].config1);
+ writel(NET_GPMC_CONFIG2, &gpmc_cfg->cs[5].config2);
+ writel(NET_GPMC_CONFIG3, &gpmc_cfg->cs[5].config3);
+ writel(NET_GPMC_CONFIG4, &gpmc_cfg->cs[5].config4);
+ writel(NET_GPMC_CONFIG5, &gpmc_cfg->cs[5].config5);
+ writel(NET_GPMC_CONFIG6, &gpmc_cfg->cs[5].config6);
+ writel(NET_GPMC_CONFIG7, &gpmc_cfg->cs[5].config7);
+
+ /* Enable off mode for NWE in PADCONF_GPMC_NWE register */
+ writew(readw(&ctrl_base ->gpmc_nwe) | 0x0E00, &ctrl_base->gpmc_nwe);
+ /* Enable off mode for NOE in PADCONF_GPMC_NADV_ALE register */
+ writew(readw(&ctrl_base->gpmc_noe) | 0x0E00, &ctrl_base->gpmc_noe);
+ /* Enable off mode for ALE in PADCONF_GPMC_NADV_ALE register */
+ writew(readw(&ctrl_base->gpmc_nadv_ale) | 0x0E00,
+ &ctrl_base->gpmc_nadv_ale);
+
+ /* Make GPIO 64 as output pin and send a magic pulse through it */
+ if (!omap_request_gpio(64)) {
+ omap_set_gpio_direction(64, 0);
+ omap_set_gpio_dataout(64, 1);
+ udelay(1);
+ omap_set_gpio_dataout(64, 0);
+ udelay(1);
+ omap_set_gpio_dataout(64, 1);
+ }
+}
+#endif
+
+int board_eth_init(bd_t *bis)
+{
+ int rc = 0;
+#ifdef CONFIG_SMC911X
+ rc = smc911x_initialize(0, CONFIG_SMC911X_BASE);
+#endif
+ return rc;
+}
diff --git a/board/overo/overo.h b/board/overo/overo.h
index d9fe74e..4c7ac27 100644
--- a/board/overo/overo.h
+++ b/board/overo/overo.h
@@ -83,43 +83,43 @@ const omap3_sysinfo sysinfo = {
MUX_VAL(CP(SDRC_DQS2), (IEN | PTD | DIS | M0)) /*SDRC_DQS2*/\
MUX_VAL(CP(SDRC_DQS3), (IEN | PTD | DIS | M0)) /*SDRC_DQS3*/\
/*GPMC*/\
- MUX_VAL(CP(GPMC_A1),(IDIS | PTD | DIS | M0)) /*GPMC_A1*/\
- MUX_VAL(CP(GPMC_A2),(IDIS | PTD | DIS | M0)) /*GPMC_A2*/\
- MUX_VAL(CP(GPMC_A3),(IDIS | PTD | DIS | M0)) /*GPMC_A3*/\
- MUX_VAL(CP(GPMC_A4),(IDIS | PTD | DIS | M0)) /*GPMC_A4*/\
- MUX_VAL(CP(GPMC_A5),(IDIS | PTD | DIS | M0)) /*GPMC_A5*/\
- MUX_VAL(CP(GPMC_A6),(IDIS | PTD | DIS | M0)) /*GPMC_A6*/\
- MUX_VAL(CP(GPMC_A7),(IDIS | PTD | DIS | M0)) /*GPMC_A7*/\
- MUX_VAL(CP(GPMC_A8),(IDIS | PTD | DIS | M0)) /*GPMC_A8*/\
- MUX_VAL(CP(GPMC_A9),(IDIS | PTD | DIS | M0)) /*GPMC_A9*/\
- MUX_VAL(CP(GPMC_A10), (IDIS | PTD | DIS | M0)) /*GPMC_A10*/\
- MUX_VAL(CP(GPMC_D0),(IEN | PTD | DIS | M0)) /*GPMC_D0*/\
- MUX_VAL(CP(GPMC_D1),(IEN | PTD | DIS | M0)) /*GPMC_D1*/\
- MUX_VAL(CP(GPMC_D2),(IEN | PTD | DIS | M0)) /*GPMC_D2*/\
- MUX_VAL(CP(GPMC_D3),(IEN | PTD | DIS | M0)) /*GPMC_D3*/\
- MUX_VAL(CP(GPMC_D4),(IEN | PTD | DIS |
Re: [U-Boot] [PATCH] OMAP3: Clean up whitespace in mux configs
Olof Johansson wrote: > Switch from space-based indentation to tab-based in mux configs, as pointed > out by WD at: > > http://lists.denx.de/pipermail/u-boot/2009-September/061241.html > > Nothing but whitespace changes in this patch (diff -w gives no output). > > Signed-off-by: Olof Johansson > Whitespace change of unusual size visually verified for all targets. Ack Tom ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] mpc83xx: retain POR values of non-configured ACR, SPCR, SCCR, and LCRR bitfields
On Sat, 26 Sep 2009 12:37:40 +0200
Heiko Schocher wrote:
> Kim Phillips wrote:
> > - /* LCRR - Clock Ratio Register (10.3.1.16) */
> > - im->lbus.lcrr = CONFIG_SYS_LCRR;
> > + /* LCRR - Clock Ratio Register (10.3.1.16)
> > +* write, read, and isync per MPC8379ERM rev.1 CLKDEV field description
> > +*/
> > + clrsetbits_be32(&im->lbus.lcrr, lcrr_mask, lcrr_val);
> > + __raw_readl(&im->lbus.lcrr);
> > + isync();
>
> Hmm.. shouldn;t this be done when running from RAM, as DaveLiu
> suggested?
oh, I suppose so ;). here's v2:
From: Kim Phillips
Date: Fri, 25 Sep 2009 18:19:44 -0500
Subject: [PATCH] mpc83xx: retain POR values of non-configured ACR, SPCR, SCCR,
and LCRR bitfields
some LCRR bits are not documented throughout the 83xx family RMs.
New board porters copying similar board configurations might omit
setting e.g., DBYP since it was not documented in their SoC's RM.
Prevent them bricking their board by retaining power on reset values
in bit fields that the board porter doesn't explicitly configure
via CONFIG_SYS__ assignments in the board
config file.
also move LCRR assignment to cpu_init_r[am] to help ensure no
transactions are being executed via the local bus while CLKDIV is being
modified.
also start to use i/o accessors.
Signed-off-by: Kim Phillips
---
cpu/mpc83xx/cpu_init.c| 262 -
include/configs/MPC8313ERDB.h |3 +-
include/configs/MPC8315ERDB.h |3 +-
include/configs/MPC8323ERDB.h |3 +-
include/configs/MPC832XEMDS.h |3 +-
include/configs/MPC8349EMDS.h |3 +-
include/configs/MPC8349ITX.h |3 +-
include/configs/MPC8360EMDS.h |3 +-
include/configs/MPC8360ERDK.h |3 +-
include/configs/MPC837XEMDS.h |3 +-
include/configs/MPC837XERDB.h |3 +-
include/configs/MVBLM7.h |3 +-
include/configs/SIMPC8313.h |4 +-
include/configs/TQM834x.h |3 +-
include/configs/kmeter1.h |4 +-
include/configs/sbc8349.h |3 +-
include/configs/vme8349.h |3 +-
17 files changed, 189 insertions(+), 123 deletions(-)
diff --git a/cpu/mpc83xx/cpu_init.c b/cpu/mpc83xx/cpu_init.c
index 5c930d3..cd69773 100644
--- a/cpu/mpc83xx/cpu_init.c
+++ b/cpu/mpc83xx/cpu_init.c
@@ -23,8 +23,8 @@
#include
#include
#include
-#ifdef CONFIG_USB_EHCI_FSL
#include
+#ifdef CONFIG_USB_EHCI_FSL
#include
#endif
@@ -63,149 +63,163 @@ static void config_qe_ioports(void)
*/
void cpu_init_f (volatile immap_t * im)
{
- /* Pointer is writable since we allocated a register for it */
- gd = (gd_t *) (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET);
-
- /* Clear initial global data */
- memset ((void *) gd, 0, sizeof (gd_t));
-
- /* system performance tweaking */
-
-#ifdef CONFIG_SYS_ACR_PIPE_DEP
- /* Arbiter pipeline depth */
- im->arbiter.acr = (im->arbiter.acr & ~ACR_PIPE_DEP) |
- (CONFIG_SYS_ACR_PIPE_DEP << ACR_PIPE_DEP_SHIFT);
+ __be32 acr_mask =
+#ifdef CONFIG_SYS_ACR_PIPE_DEP /* Arbiter pipeline depth */
+ (ACR_PIPE_DEP << ACR_PIPE_DEP_SHIFT) |
#endif
-
-#ifdef CONFIG_SYS_ACR_RPTCNT
- /* Arbiter repeat count */
- im->arbiter.acr = (im->arbiter.acr & ~(ACR_RPTCNT)) |
- (CONFIG_SYS_ACR_RPTCNT << ACR_RPTCNT_SHIFT);
+#ifdef CONFIG_SYS_ACR_RPTCNT /* Arbiter repeat count */
+ (ACR_RPTCNT << ACR_RPTCNT_SHIFT) |
#endif
-
+ 0;
+ __be32 acr_val =
+#ifdef CONFIG_SYS_ACR_PIPE_DEP /* Arbiter pipeline depth */
+ (CONFIG_SYS_ACR_PIPE_DEP << ACR_PIPE_DEP_SHIFT) |
+#endif
+#ifdef CONFIG_SYS_ACR_RPTCNT /* Arbiter repeat count */
+ (CONFIG_SYS_ACR_RPTCNT << ACR_RPTCNT_SHIFT) |
+#endif
+ 0;
+ __be32 spcr_mask =
+#ifdef CONFIG_SYS_SPCR_OPT /* Optimize transactions between CSB and other dev
*/
+ (SPCR_OPT << SPCR_OPT_SHIFT) |
+#endif
+#ifdef CONFIG_SYS_SPCR_TSECEP /* all eTSEC's Emergency priority */
+ (SPCR_TSECEP << SPCR_TSECEP_SHIFT) |
+#endif
+#ifdef CONFIG_SYS_SPCR_TSEC1EP /* TSEC1 Emergency priority */
+ (SPCR_TSEC1EP << SPCR_TSEC1EP_SHIFT) |
+#endif
+#ifdef CONFIG_SYS_SPCR_TSEC2EP /* TSEC2 Emergency priority */
+ (SPCR_TSEC2EP << SPCR_TSEC2EP_SHIFT) |
+#endif
+ 0;
+ __be32 spcr_val =
#ifdef CONFIG_SYS_SPCR_OPT
- /* Optimize transactions between CSB and other devices */
- im->sysconf.spcr = (im->sysconf.spcr & ~SPCR_OPT) |
- (CONFIG_SYS_SPCR_OPT << SPCR_OPT_SHIFT);
+ (CONFIG_SYS_SPCR_OPT << SPCR_OPT_SHIFT) |
#endif
-
-#ifdef CONFIG_SYS_SPCR_TSECEP
- /* all eTSEC's Emergency priority */
- im->sysconf.spcr = (im->sysconf.spcr & ~SPCR_TSECEP) |
- (CONFIG_SYS_SPCR_TSECEP << SPCR_TSECEP_SHIFT);
+#ifdef CONFIG_SYS_SPCR_TSECEP /* all eTSEC's Emergency priority */
+ (CONFIG_SYS_SPCR_TSECEP << SPCR_TSECEP_
Re: [U-Boot] [PATCH] mpc83xx: retain POR values of non-configured ACR, SPCR, SCCR, and LCRR bitfields
On Sat, 26 Sep 2009 20:46:42 -0500
Kim Phillips wrote:
> On Sat, 26 Sep 2009 12:37:40 +0200
> Heiko Schocher wrote:
>
> > Kim Phillips wrote:
> > > - /* LCRR - Clock Ratio Register (10.3.1.16) */
> > > - im->lbus.lcrr = CONFIG_SYS_LCRR;
> > > + /* LCRR - Clock Ratio Register (10.3.1.16)
> > > + * write, read, and isync per MPC8379ERM rev.1 CLKDEV field description
> > > + */
> > > + clrsetbits_be32(&im->lbus.lcrr, lcrr_mask, lcrr_val);
> > > + __raw_readl(&im->lbus.lcrr);
> > > + isync();
> >
> > Hmm.. shouldn;t this be done when running from RAM, as DaveLiu
> > suggested?
>
> oh, I suppose so ;). here's v2:
and now v3 (I had left a qe_base redefinition in v2):
>From f852b9638cc3f6d52ea0fe42adc277850e0ca359 Mon Sep 17 00:00:00 2001
From: Kim Phillips
Date: Fri, 25 Sep 2009 18:19:44 -0500
Subject: [PATCH] mpc83xx: retain POR values of non-configured ACR, SPCR, SCCR,
and LCRR bitfields
some LCRR bits are not documented throughout the 83xx family RMs.
New board porters copying similar board configurations might omit
setting e.g., DBYP since it was not documented in their SoC's RM.
Prevent them bricking their board by retaining power on reset values
in bit fields that the board porter doesn't explicitly configure
via CONFIG_SYS__ assignments in the board
config file.
also move LCRR assignment to cpu_init_r[am] to help ensure no
transactions are being executed via the local bus while CLKDIV is being
modified.
also start to use i/o accessors.
Signed-off-by: Kim Phillips
---
cpu/mpc83xx/cpu_init.c| 262 -
include/configs/MPC8313ERDB.h |3 +-
include/configs/MPC8315ERDB.h |3 +-
include/configs/MPC8323ERDB.h |3 +-
include/configs/MPC832XEMDS.h |3 +-
include/configs/MPC8349EMDS.h |3 +-
include/configs/MPC8349ITX.h |3 +-
include/configs/MPC8360EMDS.h |3 +-
include/configs/MPC8360ERDK.h |3 +-
include/configs/MPC837XEMDS.h |3 +-
include/configs/MPC837XERDB.h |3 +-
include/configs/MVBLM7.h |3 +-
include/configs/SIMPC8313.h |4 +-
include/configs/TQM834x.h |3 +-
include/configs/kmeter1.h |4 +-
include/configs/sbc8349.h |3 +-
include/configs/vme8349.h |3 +-
17 files changed, 189 insertions(+), 123 deletions(-)
diff --git a/cpu/mpc83xx/cpu_init.c b/cpu/mpc83xx/cpu_init.c
index 5c930d3..cd69773 100644
--- a/cpu/mpc83xx/cpu_init.c
+++ b/cpu/mpc83xx/cpu_init.c
@@ -23,8 +23,8 @@
#include
#include
#include
-#ifdef CONFIG_USB_EHCI_FSL
#include
+#ifdef CONFIG_USB_EHCI_FSL
#include
#endif
@@ -63,149 +63,163 @@ static void config_qe_ioports(void)
*/
void cpu_init_f (volatile immap_t * im)
{
- /* Pointer is writable since we allocated a register for it */
- gd = (gd_t *) (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET);
-
- /* Clear initial global data */
- memset ((void *) gd, 0, sizeof (gd_t));
-
- /* system performance tweaking */
-
-#ifdef CONFIG_SYS_ACR_PIPE_DEP
- /* Arbiter pipeline depth */
- im->arbiter.acr = (im->arbiter.acr & ~ACR_PIPE_DEP) |
- (CONFIG_SYS_ACR_PIPE_DEP << ACR_PIPE_DEP_SHIFT);
+ __be32 acr_mask =
+#ifdef CONFIG_SYS_ACR_PIPE_DEP /* Arbiter pipeline depth */
+ (ACR_PIPE_DEP << ACR_PIPE_DEP_SHIFT) |
#endif
-
-#ifdef CONFIG_SYS_ACR_RPTCNT
- /* Arbiter repeat count */
- im->arbiter.acr = (im->arbiter.acr & ~(ACR_RPTCNT)) |
- (CONFIG_SYS_ACR_RPTCNT << ACR_RPTCNT_SHIFT);
+#ifdef CONFIG_SYS_ACR_RPTCNT /* Arbiter repeat count */
+ (ACR_RPTCNT << ACR_RPTCNT_SHIFT) |
#endif
-
+ 0;
+ __be32 acr_val =
+#ifdef CONFIG_SYS_ACR_PIPE_DEP /* Arbiter pipeline depth */
+ (CONFIG_SYS_ACR_PIPE_DEP << ACR_PIPE_DEP_SHIFT) |
+#endif
+#ifdef CONFIG_SYS_ACR_RPTCNT /* Arbiter repeat count */
+ (CONFIG_SYS_ACR_RPTCNT << ACR_RPTCNT_SHIFT) |
+#endif
+ 0;
+ __be32 spcr_mask =
+#ifdef CONFIG_SYS_SPCR_OPT /* Optimize transactions between CSB and other dev
*/
+ (SPCR_OPT << SPCR_OPT_SHIFT) |
+#endif
+#ifdef CONFIG_SYS_SPCR_TSECEP /* all eTSEC's Emergency priority */
+ (SPCR_TSECEP << SPCR_TSECEP_SHIFT) |
+#endif
+#ifdef CONFIG_SYS_SPCR_TSEC1EP /* TSEC1 Emergency priority */
+ (SPCR_TSEC1EP << SPCR_TSEC1EP_SHIFT) |
+#endif
+#ifdef CONFIG_SYS_SPCR_TSEC2EP /* TSEC2 Emergency priority */
+ (SPCR_TSEC2EP << SPCR_TSEC2EP_SHIFT) |
+#endif
+ 0;
+ __be32 spcr_val =
#ifdef CONFIG_SYS_SPCR_OPT
- /* Optimize transactions between CSB and other devices */
- im->sysconf.spcr = (im->sysconf.spcr & ~SPCR_OPT) |
- (CONFIG_SYS_SPCR_OPT << SPCR_OPT_SHIFT);
+ (CONFIG_SYS_SPCR_OPT << SPCR_OPT_SHIFT) |
#endif
-
-#ifdef CONFIG_SYS_SPCR_TSECEP
- /* all eTSEC's Emergency priority */
- im->sysconf.spcr = (im->sysconf.spcr & ~SPCR_TSECE
Re: [U-Boot] Please pull u-boot-mpc83xx.git
On Fri, 25 Sep 2009 18:39:46 -0500 Kim Phillips wrote: > I might just ask you to pull the "retain POR values" patch, but it's > too close to the window, and I want to give the opportunity for a good > review cycle on it. At least Heiko commented on it, and I fixed and tested it ok, so please now pull: The following changes since commit 984f10baac8ef6032df52f135943d6b0bc96f724: Wolfgang Denk (1): mpc5121ads: fix breakage introduced when reordering elpida_mddrc_config[] are available in the git repository at: git://git.denx.de/u-boot-mpc83xx.git master Anton Vorontsov (5): net: uec_phy: Implement TXID and RXID RGMII modes for Marvell PHYs net: uec: Fix uccf.h and uec.h headers to include headers they depend on mpc83xx: mpc8360emds: Don't use LBC SDRAM when DDR is available mpc83xx: mpc8360emds: Use RGMII-ID mode, add workarounds for rev. 2.1 CPUs mpc83xx: mpc8360emds: Add QE USB device tree fixups Kim Phillips (1): mpc83xx: retain POR values of non-configured ACR, SPCR, SCCR, and LCRR bitfields Paul Gortmaker (1): sbc8349: tidy up Makefile to use new configuration script. Makefile | 15 +-- board/freescale/mpc8360emds/mpc8360emds.c | 73 - cpu/mpc83xx/cpu_init.c| 261 + drivers/qe/uccf.h |1 + drivers/qe/uec.h |4 + drivers/qe/uec_phy.c | 15 ++- include/configs/MPC8313ERDB.h |3 +- include/configs/MPC8315ERDB.h |3 +- include/configs/MPC8323ERDB.h |3 +- include/configs/MPC832XEMDS.h |3 +- include/configs/MPC8349EMDS.h |3 +- include/configs/MPC8349ITX.h |3 +- include/configs/MPC8360EMDS.h |9 +- include/configs/MPC8360ERDK.h |3 +- include/configs/MPC837XEMDS.h |3 +- include/configs/MPC837XERDB.h |3 +- include/configs/MVBLM7.h |3 +- include/configs/SIMPC8313.h |4 +- include/configs/TQM834x.h |3 +- include/configs/kmeter1.h |4 +- include/configs/sbc8349.h | 18 ++- include/configs/vme8349.h |3 +- 22 files changed, 292 insertions(+), 148 deletions(-) Thanks, Kim ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
