Hello Kim,
Kim Phillips wrote:
> On Tue, 15 Sep 2009 23:51:31 -0500
> Kumar Gala <ga...@kernel.crashing.org> wrote:
>
>> On Aug 27, 2009, at 3:53 PM, Kim Phillips wrote:
>>> Heiko - let's go with the SCCR approach of setting bits in the LCRR,
>>> and have board config files only specify values for fields they're
>>> modifying from the reset value for their processor (this can be
>>> extended to 85xx-world).
>> Did you guys ever come to resolution on this? Realizing we have same
>> issue on 85xx & 86xx (we dont actually set LCRR at all in cpu/ code
>> for 85xx or 86xx.)
>
> this should probably be extended to SICRH, SICRL, etc., but how's this:?
>
>>From 15d01649e403ec7da20f5fdd25b8d2c1bccb6a8d Mon Sep 17 00:00:00 2001
> From: Kim Phillips <kim.phill...@freescale.com>
> Date: Fri, 25 Sep 2009 18:07:29 -0500
> Subject: [PATCH] mpc83xx: retain POR values of non-configured ACR, SPCR,
> SCCR, and LCRR bitfields
>
> some LCRR bits are not documented throughout the 83xx family RMs.
> New board porters copying similar board configurations might omit
> setting e.g., DBYP since it was not documented in their SoC's RM.
>
> Prevent them bricking their board by retaining power on reset values
> in bit fields that the board porter doesn't explicitly configure
> via CONFIG_SYS_<registername>_<bitfield> assignments in the board
> config file.
>
> also start to use i/o accessors.
>
> Signed-off-by: Kim Phillips <kim.phill...@freescale.com>
> ---
> cpu/mpc83xx/cpu_init.c | 255
> ++++++++++++++++++++++++-----------------
> include/configs/MPC8313ERDB.h | 3 +-
> include/configs/MPC8315ERDB.h | 3 +-
> include/configs/MPC8323ERDB.h | 3 +-
> include/configs/MPC832XEMDS.h | 3 +-
> include/configs/MPC8349EMDS.h | 3 +-
> include/configs/MPC8349ITX.h | 3 +-
> include/configs/MPC8360EMDS.h | 3 +-
> include/configs/MPC8360ERDK.h | 3 +-
> include/configs/MPC837XEMDS.h | 3 +-
> include/configs/MPC837XERDB.h | 3 +-
> include/configs/MVBLM7.h | 3 +-
> include/configs/SIMPC8313.h | 4 +-
> include/configs/TQM834x.h | 3 +-
> include/configs/kmeter1.h | 4 +-
> include/configs/sbc8349.h | 3 +-
> include/configs/vme8349.h | 3 +-
> 17 files changed, 183 insertions(+), 122 deletions(-)
>
> diff --git a/cpu/mpc83xx/cpu_init.c b/cpu/mpc83xx/cpu_init.c
> index 5c930d3..95dbc76 100644
> --- a/cpu/mpc83xx/cpu_init.c
> +++ b/cpu/mpc83xx/cpu_init.c
> @@ -23,8 +23,8 @@
> #include <common.h>
> #include <mpc83xx.h>
> #include <ioports.h>
> -#ifdef CONFIG_USB_EHCI_FSL
> #include <asm/io.h>
> +#ifdef CONFIG_USB_EHCI_FSL
> #include <usb/ehci-fsl.h>
> #endif
>
> @@ -63,149 +63,192 @@ static void config_qe_ioports(void)
> */
> void cpu_init_f (volatile immap_t * im)
> {
> - /* Pointer is writable since we allocated a register for it */
[...]
>
> - /* LCRR - Clock Ratio Register (10.3.1.16) */
> - im->lbus.lcrr = CONFIG_SYS_LCRR;
> + /* LCRR - Clock Ratio Register (10.3.1.16)
> + * write, read, and isync per MPC8379ERM rev.1 CLKDEV field description
> + */
> + clrsetbits_be32(&im->lbus.lcrr, lcrr_mask, lcrr_val);
> + __raw_readl(&im->lbus.lcrr);
> + isync();
Hmm.. shouldn;t this be done when running from RAM, as DaveLiu
suggested?
bye
Heiko
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HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
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