---
board/eNET/eNET_start16.S | 66 +++++++++++++++++++++++++++++++++++++++++-
board/eNET/hardware.h | 16 ++++++++++
include/asm-i386/ic/sc520.h | 6 ++++
3 files changed, 86 insertions(+), 2 deletions(-)
diff --git a/board/eNET/eNET_start16.S b/board/eNET/eNET_start16.S
index 48e4d83..2d7929b 100644
--- a/board/eNET/eNET_start16.S
+++ b/board/eNET/eNET_start16.S
@@ -27,8 +27,7 @@
* that is used by U-boot to its final destination.
*/
-/* #include <asm/ic/sc520_defs.h> */
-
+#include <asm/ic/sc520.h>
#include "hardware.h"
.text
@@ -60,6 +59,69 @@ board_init16:
xorw %ax, %ax
movb %al, (%di)
+ /* Enable UART 1 */
+ movl $SC520_ADDDECCTL, %edi
+ movb $0x02, %al
+ movb %al, (%di)
+
+ /* Configure UART 1 - 9600 Baud 8N1 */
+ movl $SC520_UART1CTL, %edi
+ movb $0x07, %al
+ movb %al, (%di)
+
+ /* Set DLAB bit */
+ movw $(UART0_BASE + UART_LCR), %dx
+ movb $0x80, %al
+ outb %al, %dx
+
+ /* Set baudrate divisor (LSB) */
+ movw $(UART0_BASE + UART_DLL), %dx
+ movb $0x0c, %al
+ outb %al, %dx
+
+ /* Set baudrate divisor (MSB) */
+ movw $(UART0_BASE + UART_DLM), %dx
+ movb $0x00, %al
+ outb %al, %dx
+
+ /* clear DLAB; set 8 bits, no parity */
+ movw $(UART0_BASE + UART_LCR), %dx
+ movb $0x03, %al
+ outb %al, %dx
+
+ /* enable FIFO */
+ movw $(UART0_BASE + UART_FCR), %dx
+ movb $0x01, %al
+ outb %al, %dx
+
+ /* Set DTR and RTS active */
+ movw $(UART0_BASE + UART_MCR), %dx
+ movb $0x0b, %al
+ outb %al, %dx
+
+ /* clear line status */
+ movw $(UART0_BASE + UART_LSR), %dx
+ inb %dx, %al
+
+ /* read receive buffer */
+ movw $(UART0_BASE + UART_RBR), %dx
+ inb %dx, %al
+
+ /* set scratchpad */
+ movw $(UART0_BASE + UART_SCR), %dx
+ movb $0x00, %al
+ outb %al, %dx
+
+ /* Disable Interrupts */
+ movw $(UART0_BASE + UART_IER), %dx
+ movb $0x00, %al
+ outb %al, %dx
+
+ /* wait for the UART clock to settle */
+ movl $0x10000,%ecx
+uartdelay:
+ loop uartdelay
+
/* Disabe MMCR alias */
movw $0xfffc, %dx
movl $0x000000cb, %eax
diff --git a/board/eNET/hardware.h b/board/eNET/hardware.h
index 42474a6..d85fde0 100644
--- a/board/eNET/hardware.h
+++ b/board/eNET/hardware.h
@@ -32,4 +32,20 @@
#define LED_TX_BITMASK 0x10
#define LED_ERR_BITMASK 0x20
+/* Serial Port Definitions */
+#define UART0_BASE 0x3f8
+
+#define UART_RBR 0x00
+#define UART_THR 0x00
+#define UART_IER 0x01
+#define UART_IIR 0x02
+#define UART_FCR 0x02
+#define UART_LCR 0x03
+#define UART_MCR 0x04
+#define UART_LSR 0x05
+#define UART_MSR 0x06
+#define UART_SCR 0x07
+#define UART_DLL 0x00
+#define UART_DLM 0x01
+
#endif /* HARDWARE_H_ */
diff --git a/include/asm-i386/ic/sc520.h b/include/asm-i386/ic/sc520.h
index 57c9904..72e5d5d 100644
--- a/include/asm-i386/ic/sc520.h
+++ b/include/asm-i386/ic/sc520.h
@@ -257,10 +257,16 @@ extern volatile sc520_mmcr_t *sc520_mmcr;
/* MMCR Offsets (required for assembler code */
#define SC520_DBCTL 0x0040 /* SDRAM Buffer Control Register */
+#define SC520_ADDDECCTL 0x0080
#define SC520_PAR14 0x00c0 /* Programmable Address Region 14
Register */
#define SC520_PAR15 0x00c4 /* Programmable Address Region 15
Register */
#define SC520_SWTMRMILLI 0x0c60 /* Software Timer Millisecond Count */
#define SC520_SWTMRMICRO 0x0c62 /* Software Timer Microsecond Count */
+#define SC520_UART1CTL 0x0cc0 /* UART 1 Control */
+
+ /* MMCR Register bits (not all of them :) ) */
+
+
/* MMCR Register bits (not all of them :) ) */
--
1.6.4.1.174.g32f4c
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