Re: [U-Boot] Hangs at relocation on 460EX Target

2008-10-23 Thread Stefan Roese
Felix,

On Thursday 23 October 2008, Felix Radensky wrote:
> I had the same problem with u-boot-1.3.4 on custom 460EX board with
> registered SODIMM. The SPD code in 4xx_spd_ddr2.c (program_copt1())
> checks two  SPD fields to decide whether DIMM is registered: DDRII DIMM
> type (offset 20) and SDRAM module attributes (offset 21).
>
> In my case, the values in these fields do not match what code is looking
> for.
> See http://www.micron.com/products/spddetail.aspx?part=MT9HTF6472RHY-667F1
> I had to modify the following peice in program_copt1() to make it work:
>
> if (dimm_num == 0) {
> if (dimm_populated[dimm_num] == SDRAM_DDR1) /* DDR1 type */
> mcopt1 |= SDRAM_MCOPT1_DDR1_TYPE;
> if (dimm_populated[dimm_num] == SDRAM_DDR2) /* DDR2 type */
> mcopt1 |= SDRAM_MCOPT1_DDR2_TYPE;
> if (registered == 1) { /* DDR2 always buffered */
> /* TODO: what about above  comments ? */
> mcopt1 |= SDRAM_MCOPT1_RDEN;
> buf0 = TRUE;
> } else {
> /* TODO: the mask 0x02 doesn't match Samsung def for
> byte 21. */

So it seems already to be know that here is a problem.

> if ((attribute & 0x02) == 0x00) {
> /* buffered not supported */
> buf0 = FALSE;
> } else {
> mcopt1 |= SDRAM_MCOPT1_RDEN;
> buf0 = TRUE;
> }
> }
> }
>
> I've changed
>
> if ((attribute & 0x02) == 0x00)
>
> to be
>
> if (((attribute & 0x02) == 0x00) && (attribute != 0x04))

Why did you change it this way? Which DDR2 module are you using? And what's 
the value of SPD register 21?

> I'm not sure this is generic enough to go into mainline, but if yes,
> I can try to submit a patch.

We should try to provide a generic fix now. Unfortunately I don't have the 
time right now to dig into the DDR2 SPD definitions and the different 
implementation for different brands (Micron, Samsung...). Perhaps somebody 
else could check what the correct check for registered DIMM is.

Thanks.

Best regards,
Stefan

=
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[U-Boot] [PATCH 03/10] 86xx: Enable 64-bit PCI resources on all Freescale boards

2008-10-23 Thread Kumar Gala
Signed-off-by: Kumar Gala <[EMAIL PROTECTED]>
---
 include/configs/MPC8610HPCD.h |1 +
 include/configs/MPC8641HPCN.h |1 +
 2 files changed, 2 insertions(+), 0 deletions(-)

diff --git a/include/configs/MPC8610HPCD.h b/include/configs/MPC8610HPCD.h
index 678e1e1..0492274 100644
--- a/include/configs/MPC8610HPCD.h
+++ b/include/configs/MPC8610HPCD.h
@@ -41,6 +41,7 @@
 #define CONFIG_PCIE1   1   /* PCIe 1 connected to ULI bridge */
 #define CONFIG_PCIE2   1   /* PCIe 2 connected to slot */
 #define CONFIG_FSL_PCI_INIT1   /* Use common FSL init code */
+#define CONFIG_SYS_PCI_64BIT   1   /* enable 64-bit PCI resources */
 #define CONFIG_FSL_LAW 1   /* Use common FSL init code */
 
 #define CONFIG_ENV_OVERWRITE
diff --git a/include/configs/MPC8641HPCN.h b/include/configs/MPC8641HPCN.h
index e5710c0..ceb2c69 100644
--- a/include/configs/MPC8641HPCN.h
+++ b/include/configs/MPC8641HPCN.h
@@ -49,6 +49,7 @@
 #define CONFIG_PCI11   /* PCIE controler 1 (ULI bridge) */
 #define CONFIG_PCI21   /* PCIE controler 2 (slot) */
 #define CONFIG_FSL_PCI_INIT1   /* Use common FSL init code */
+#define CONFIG_SYS_PCI_64BIT   1   /* enable 64-bit PCI resources */
 #define CONFIG_FSL_LAW 1   /* Use common FSL law init code */
 
 #define CONFIG_TSEC_ENET   /* tsec ethernet support */
-- 
1.5.5.1

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Re: [U-Boot] Hangs at relocation on 460EX Target

2008-10-23 Thread Felix Radensky
Hi, Stefan

Stefan Roese wrote:
> Felix,
>
> On Thursday 23 October 2008, Felix Radensky wrote:
>   
>> I had the same problem with u-boot-1.3.4 on custom 460EX board with
>> registered SODIMM. The SPD code in 4xx_spd_ddr2.c (program_copt1())
>> checks two  SPD fields to decide whether DIMM is registered: DDRII DIMM
>> type (offset 20) and SDRAM module attributes (offset 21).
>>
>> In my case, the values in these fields do not match what code is looking
>> for.
>> See http://www.micron.com/products/spddetail.aspx?part=MT9HTF6472RHY-667F1
>> I had to modify the following peice in program_copt1() to make it work:
>>
>> if (dimm_num == 0) {
>> if (dimm_populated[dimm_num] == SDRAM_DDR1) /* DDR1 type */
>> mcopt1 |= SDRAM_MCOPT1_DDR1_TYPE;
>> if (dimm_populated[dimm_num] == SDRAM_DDR2) /* DDR2 type */
>> mcopt1 |= SDRAM_MCOPT1_DDR2_TYPE;
>> if (registered == 1) { /* DDR2 always buffered */
>> /* TODO: what about above  comments ? */
>> mcopt1 |= SDRAM_MCOPT1_RDEN;
>> buf0 = TRUE;
>> } else {
>> /* TODO: the mask 0x02 doesn't match Samsung def for
>> byte 21. */
>> 
>
> So it seems already to be know that here is a problem.
>
>   
>> if ((attribute & 0x02) == 0x00) {
>> /* buffered not supported */
>> buf0 = FALSE;
>> } else {
>> mcopt1 |= SDRAM_MCOPT1_RDEN;
>> buf0 = TRUE;
>> }
>> }
>> }
>>
>> I've changed
>>
>> if ((attribute & 0x02) == 0x00)
>>
>> to be
>>
>> if (((attribute & 0x02) == 0x00) && (attribute != 0x04))
>> 
>
> Why did you change it this way? Which DDR2 module are you using? And what's 
> the value of SPD register 21?
>
>   
My change causes the code to go into else branch and set SDRAM_MCOPT1_RDEN
(registered) bit. I'm using Micron 512M registered SODIMM. The value of 
SPD register
21 is 0x4. The full SPD spec is here:
http://www.micron.com/products/spddetail.aspx?part=MT9HTF6472RHY-667F1

Felix.

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Re: [U-Boot] [PATCH] [ARM] Move machine specific code to board at s3c64xx

2008-10-23 Thread Guennadi Liakhovetski
On Wed, 22 Oct 2008, Kyungmin Park wrote:

> Move machine specific code to smdk6400.
> Some board use OneNAND instead of NAND.
> 
> Signed-off-by: Kyungmin Park <[EMAIL PROTECTED]>
> ---
> diff --git a/board/samsung/smdk6400/lowlevel_init.S 
> b/board/samsung/smdk6400/lowlevel_init.S
> index e0119a7..53d9125 100644
> --- a/board/samsung/smdk6400/lowlevel_init.S
> +++ b/board/samsung/smdk6400/lowlevel_init.S
> @@ -104,6 +104,13 @@ lowlevel_init:
>   bl nand_asm_init
>  #endif
>  
> + /* Memory subsystem address 0x7e00f120 */
> + ldr r0, =ELFIN_MEM_SYS_CFG
> +
> + /* Xm0CSn2 = NFCON CS0, Xm0CSn3 = NFCON CS1 */
> + mov r1, #0xd
> + str r1, [r0]
> +

Hm, no, I don't quite agree. In principle, yes, this configuration can be 
considered platform-specific and moving it this way of course works. But:

1. The patch comment is not correct. This code doesn't select between NAND 
   and OneNAND. It selects between (one of) NANDs and SROMs.

2. While at it, we could fix the value being written to the MEM_SYS_CFG 
   register too. Currently it writes 0xd = 

  (1 << 0) - ignored, default 0, so, better set it to 0
| (0 << 1) - set Xm0CSn[2] to OneNANDC CS0 or NFCON CS0
| (1 << 2) - ignored, default 0, so, better set it to 0
| (1 << 3) - set Xm0CSn[3] to SROMC CS3

So, we should just write an 8 in it:

+   mov r1, #0x8
+   str r1, [r0]

3. The comment in the code doesn't look right. According to the above it 
   should read

+   /* Xm0CSn[2] = OneNANDC CS0 or NFCON CS0, Xm0CSn[3] = SROMC CS3 */

The only thing that confuses me, is why the author, belonging to the 
manufacturer of the chip, hasn't done this. Maybe the documentation is 
wrong?

I tested it with the "8" - it works. So, once the issues are fixed, you 
get my "Tested-by", although, I guess, you can test it just as well:-)

Thanks
Guennadi

>   bl  mem_ctrl_asm_init
>  
>  /* Wakeup support. Don't know if it's going to be used, untested. */
> diff --git a/cpu/arm1176/s3c64xx/cpu_init.S b/cpu/arm1176/s3c64xx/cpu_init.S
> index 08bda99..32bb467 100644
> --- a/cpu/arm1176/s3c64xx/cpu_init.S
> +++ b/cpu/arm1176/s3c64xx/cpu_init.S
> @@ -28,13 +28,6 @@
>  
>   .globl mem_ctrl_asm_init
>  mem_ctrl_asm_init:
> - /* Memory subsystem address 0x7e00f120 */
> - ldr r0, =ELFIN_MEM_SYS_CFG
> -
> - /* Xm0CSn2 = NFCON CS0, Xm0CSn3 = NFCON CS1 */
> - mov r1, #0xd
> - str r1, [r0]
> -
>   /* DMC1 base address 0x7e001000 */
>   ldr r0, =ELFIN_DMC1_BASE
>  
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---
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[U-Boot] [PATCH 00/10] 85xx/85xx pci cleanup

2008-10-23 Thread Kumar Gala
This patch series adds the ability to support 64-bit PCI addresses as well
as refactors the fsl_pci_init code and cleans up its users.

Finally it adds some help functions that the board code calls to set
dma-ranges in device trees.

If the particular maintainers could ack the patches that would be great
(Andy, Jon, Jerry).

- k
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[U-Boot] [PATCH 08/10] pci/fsl_pci_init: Added fdt helper for setting up bus-ranges & dma-ranges

2008-10-23 Thread Kumar Gala
Signed-off-by: Kumar Gala <[EMAIL PROTECTED]>
---
 drivers/pci/fsl_pci_init.c |   20 
 1 files changed, 20 insertions(+), 0 deletions(-)

diff --git a/drivers/pci/fsl_pci_init.c b/drivers/pci/fsl_pci_init.c
index 564459c..b5d868f 100644
--- a/drivers/pci/fsl_pci_init.c
+++ b/drivers/pci/fsl_pci_init.c
@@ -299,3 +299,23 @@ void fsl_pci_init(struct pci_controller *hose)
pci_hose_write_config_word(hose, dev, PCI_SEC_STATUS, 0x);
}
 }
+
+#ifdef CONFIG_OF_BOARD_SETUP
+#include 
+#include 
+
+void ft_fsl_pci_setup(void *blob, const char *pci_alias,
+   struct pci_controller *hose)
+{
+   int off = fdt_path_offset(blob, pci_alias);
+
+   if (off >= 0) {
+   u32 bus_range[2];
+
+   bus_range[0] = 0;
+   bus_range[1] = hose->last_busno - hose->first_busno;
+   fdt_setprop(blob, off, "bus-range", &bus_range[0], 2*4);
+   fdt_pci_dma_ranges(blob, off, hose);
+   }
+}
+#endif
-- 
1.5.5.1

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[U-Boot] [PATCH 09/10] 85xx: Convert all fsl_pci_init users to new APIs

2008-10-23 Thread Kumar Gala
Converted ATUM8548, MPC8536DS, MPC8544DS, MPC8548CDS, MPC8568MDS,
MPC8572DS, TQM85xx, and SBC8548 to use fsl_pci_setup_inbound_windows()
and ft_fsl_pci_setup().

With these changes the board code is a bit smaller and we get dma-ranges
set in the device tree for these boards.

Signed-off-by: Kumar Gala <[EMAIL PROTECTED]>
---
 board/atum8548/atum8548.c   |   77 +++---
 board/freescale/mpc8536ds/mpc8536ds.c   |  110 ++
 board/freescale/mpc8544ds/mpc8544ds.c   |  109 ++
 board/freescale/mpc8548cds/mpc8548cds.c |   57 +---
 board/freescale/mpc8568mds/mpc8568mds.c |   56 +--
 board/freescale/mpc8572ds/mpc8572ds.c   |   72 +++-
 board/sbc8548/sbc8548.c |   66 ++-
 board/tqc/tqm85xx/tqm85xx.c |   58 ++---
 include/configs/ATUM8548.h  |5 --
 include/configs/MPC8536DS.h |5 --
 include/configs/MPC8544DS.h |5 --
 include/configs/MPC8548CDS.h|5 --
 include/configs/MPC8568MDS.h|5 --
 include/configs/MPC8572DS.h |5 --
 include/configs/TQM85xx.h   |5 --
 include/configs/sbc8548.h   |5 --
 16 files changed, 200 insertions(+), 445 deletions(-)

diff --git a/board/atum8548/atum8548.c b/board/atum8548/atum8548.c
index 2ef19ce..7b7a968 100644
--- a/board/atum8548/atum8548.c
+++ b/board/atum8548/atum8548.c
@@ -182,6 +182,9 @@ static struct pci_controller pcie1_hose;
 
 int first_free_busno=0;
 
+extern int fsl_pci_setup_inbound_windows(struct pci_region *r);
+extern void fsl_pci_init(struct pci_controller *hose);
+
 void
 pci_init_board(void)
 {
@@ -211,10 +214,10 @@ pci_init_board(void)
 #ifdef CONFIG_PCIE1
  {
volatile ccsr_fsl_pci_t *pci = (ccsr_fsl_pci_t *) CONFIG_SYS_PCIE1_ADDR;
-   extern void fsl_pci_init(struct pci_controller *hose);
struct pci_controller *hose = &pcie1_hose;
int pcie_ep = (host_agent == 5);
int pcie_configured  = io_sel & 6;
+   struct pci_region *r = hose->regions;
 
if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)){
printf ("\nPCIE1 connected to slot as %s (base address %x)",
@@ -227,36 +230,31 @@ pci_init_board(void)
printf ("\n");
 
/* inbound */
-   pci_set_region(hose->regions + 0,
-  CONFIG_SYS_PCI_MEMORY_BUS,
-  CONFIG_SYS_PCI_MEMORY_PHYS,
-  CONFIG_SYS_PCI_MEMORY_SIZE,
-  PCI_REGION_MEM | PCI_REGION_MEMORY);
+   r += fsl_pci_setup_inbound_windows(r);
 
/* outbound memory */
-   pci_set_region(hose->regions + 1,
+   pci_set_region(r++,
   CONFIG_SYS_PCIE1_MEM_BASE,
   CONFIG_SYS_PCIE1_MEM_PHYS,
   CONFIG_SYS_PCIE1_MEM_SIZE,
   PCI_REGION_MEM);
 
/* outbound io */
-   pci_set_region(hose->regions + 2,
+   pci_set_region(r++,
   CONFIG_SYS_PCIE1_IO_BASE,
   CONFIG_SYS_PCIE1_IO_PHYS,
   CONFIG_SYS_PCIE1_IO_SIZE,
   PCI_REGION_IO);
 
-   hose->region_count = 3;
 #ifdef CONFIG_SYS_PCIE1_MEM_BASE2
/* outbound memory */
-   pci_set_region(hose->regions + 3,
+   pci_set_region(r++,
   CONFIG_SYS_PCIE1_MEM_BASE2,
   CONFIG_SYS_PCIE1_MEM_PHYS2,
   CONFIG_SYS_PCIE1_MEM_SIZE2,
   PCI_REGION_MEM);
-   hose->region_count++;
 #endif
+   hose->region_count = r - hose->regions;
hose->first_busno=first_free_busno;
 
pci_setup_indirect(hose, (int) &pci->cfg_addr, (int) 
&pci->cfg_data);
@@ -279,8 +277,8 @@ pci_init_board(void)
 #ifdef CONFIG_PCI1
 {
volatile ccsr_fsl_pci_t *pci = (ccsr_fsl_pci_t *) CONFIG_SYS_PCI1_ADDR;
-   extern void fsl_pci_init(struct pci_controller *hose);
struct pci_controller *hose = &pci1_hose;
+   struct pci_region *r = hose->regions;
 
uint pci_agent = (host_agent == 6);
uint pci_speed = 3000; /*get_clock_freq (); PCI PSPEED in [4:5] */
@@ -300,26 +298,22 @@ pci_init_board(void)
);
 
/* inbound */
-   pci_set_region(hose->regions + 0,
-  CONFIG_SYS_PCI_MEMORY_BUS,
-  CONFIG_SYS_PCI_MEMORY_PHYS,
-  CONFIG_SYS_PCI_MEMORY_SIZE,
-  PCI_REGION_MEM | PCI_REGION_MEMORY);
+   r += fsl_pci_setup_inbound_windows(r);
 
  

Re: [U-Boot] [PATCH] [ARM] Move machine specific code to board at s3c64xx

2008-10-23 Thread Kyungmin Park
On Thu, Oct 23, 2008 at 4:39 PM, Guennadi Liakhovetski <[EMAIL PROTECTED]> 
wrote:
> On Wed, 22 Oct 2008, Kyungmin Park wrote:
>
>> Move machine specific code to smdk6400.
>> Some board use OneNAND instead of NAND.
>>
>> Signed-off-by: Kyungmin Park <[EMAIL PROTECTED]>
>> ---
>> diff --git a/board/samsung/smdk6400/lowlevel_init.S 
>> b/board/samsung/smdk6400/lowlevel_init.S
>> index e0119a7..53d9125 100644
>> --- a/board/samsung/smdk6400/lowlevel_init.S
>> +++ b/board/samsung/smdk6400/lowlevel_init.S
>> @@ -104,6 +104,13 @@ lowlevel_init:
>>   bl nand_asm_init
>>  #endif
>>
>> + /* Memory subsystem address 0x7e00f120 */
>> + ldr r0, =ELFIN_MEM_SYS_CFG
>> +
>> + /* Xm0CSn2 = NFCON CS0, Xm0CSn3 = NFCON CS1 */
>> + mov r1, #0xd
>> + str r1, [r0]
>> +
>
> Hm, no, I don't quite agree. In principle, yes, this configuration can be
> considered platform-specific and moving it this way of course works. But:
>
> 1. The patch comment is not correct. This code doesn't select between NAND
>   and OneNAND. It selects between (one of) NANDs and SROMs.

Yes I just move to platform since it's board specific.

>
> 2. While at it, we could fix the value being written to the MEM_SYS_CFG
>   register too. Currently it writes 0xd =
>
>  (1 << 0) - ignored, default 0, so, better set it to 0
> | (0 << 1) - set Xm0CSn[2] to OneNANDC CS0 or NFCON CS0
> | (1 << 2) - ignored, default 0, so, better set it to 0
> | (1 << 3) - set Xm0CSn[3] to SROMC CS3
>
> So, we should just write an 8 in it:
>
> +   mov r1, #0x8
> +   str r1, [r0]
>
> 3. The comment in the code doesn't look right. According to the above it
>   should read
>
> +   /* Xm0CSn[2] = OneNANDC CS0 or NFCON CS0, Xm0CSn[3] = SROMC CS3 */

Right, and also add OneNAND & NFCON is depends on XNANDSEL.

As you know mem_ctrl_asm_init is common code and other boards can use
it without board specific codes.

In OneNAND board, it should be set as 0x1002

>
> The only thing that confuses me, is why the author, belonging to the
> manufacturer of the chip, hasn't done this. Maybe the documentation is
> wrong?
>

Maybe he missed it. Document is right.

Thank you,
Kyungmin Park
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[U-Boot] [PATCH 1/2] i.MX31: Use do_div for some calculations.

2008-10-23 Thread Magnus Lilja
Use do_div in TICK_TO_TIME in order to get the code through the
compiler when CONFIG_MX31_CLK32 is 32768.

Signed-off-by: Magnus Lilja <[EMAIL PROTECTED]>
---

This is a quick patch to get the i.MX31 PDK patch to compile.
If someone has a better solution to this problem please submit a
patch that can replace this one.

 cpu/arm1136/mx31/interrupts.c |9 -
 1 files changed, 8 insertions(+), 1 deletions(-)

diff --git a/cpu/arm1136/mx31/interrupts.c b/cpu/arm1136/mx31/interrupts.c
index b36c58c..31ad4a5 100644
--- a/cpu/arm1136/mx31/interrupts.c
+++ b/cpu/arm1136/mx31/interrupts.c
@@ -22,6 +22,7 @@
  */
 
 #include 
+#include 
 #include 
 
 #define TIMER_BASE 0x53f9 /* General purpose timer 1 */
@@ -49,7 +50,13 @@
 /* ~2% error */
 #define TICK_PER_TIME  ((CONFIG_MX31_CLK32 + CONFIG_SYS_HZ / 2) / 
CONFIG_SYS_HZ)
 #define US_PER_TICK(100 / CONFIG_MX31_CLK32)
-#define TICK_TO_TIME(t)((t) / TICK_PER_TIME)
+static inline ulong TICK_TO_TIME(unsigned long long t)
+{
+   unsigned long long res = t;
+
+   do_div(res, TICK_PER_TIME);
+   return res;
+}
 #define TIME_TO_TICK(t)((unsigned long long)(t) * TICK_PER_TIME)
 #define US_TO_TICK(t)  (((t) + US_PER_TICK - 1) / US_PER_TICK)
 #endif
-- 
1.5.2.4

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[U-Boot] [PATCH 2/2] i.MX31: Add basic support for Freescale's i.MX31 PDK board.

2008-10-23 Thread Magnus Lilja
Add support for the Freescale i.MX31 PDK (a.k.a 3DS) board. Ethernet and
MC13873 RTC support is enabled by this patch.

Booting from NAND is not supported yet so U-boot relies on some other
initial boot loader to set up SDRAM and clocks and copying U-boot to SDRAM.

Signed-off-by: Magnus Lilja <[EMAIL PROTECTED]>
---

Changes from last version:
- Rebased on current arm-master.
- Replaced spaces in u-boot-lds with tabs.

Tested on a PDK board using a JTAG debugger to download U-boot to SDRAM.

 MAKEALL |1 +
 Makefile|3 +
 board/freescale/mx31pdk/Makefile|   53 ++
 board/freescale/mx31pdk/config.mk   |1 +
 board/freescale/mx31pdk/lowlevel_init.S |   30 ++
 board/freescale/mx31pdk/mx31pdk.c   |   76 ++
 board/freescale/mx31pdk/u-boot.lds  |   59 +++
 include/configs/mx31pdk.h   |  163 +++
 8 files changed, 386 insertions(+), 0 deletions(-)

diff --git a/MAKEALL b/MAKEALL
index aa602b7..f877224 100755
--- a/MAKEALL
+++ b/MAKEALL
@@ -525,6 +525,7 @@ LIST_ARM11="\
imx31_litekit   \
imx31_phycore   \
mx31ads \
+   mx31pdk \
smdk6400\
 "
 
diff --git a/Makefile b/Makefile
index fceb8a2..58ceff3 100644
--- a/Makefile
+++ b/Makefile
@@ -2814,6 +2814,9 @@ imx31_phycore_config  : unconfig
 mx31ads_config : unconfig
@$(MKCONFIG) $(@:_config=) arm arm1136 mx31ads freescale mx31
 
+mx31pdk_config : unconfig
+   @$(MKCONFIG) $(@:_config=) arm arm1136 mx31pdk freescale mx31
+
 omap2420h4_config  : unconfig
@$(MKCONFIG) $(@:_config=) arm arm1136 omap2420h4 NULL omap24xx
 
diff --git a/board/freescale/mx31pdk/Makefile b/board/freescale/mx31pdk/Makefile
new file mode 100644
index 000..6ae34ea
--- /dev/null
+++ b/board/freescale/mx31pdk/Makefile
@@ -0,0 +1,53 @@
+#
+# (C) Copyright 2008 Magnus Lilja <[EMAIL PROTECTED]>
+#
+# (C) Copyright 2000-2006
+# Wolfgang Denk, DENX Software Engineering, [EMAIL PROTECTED]
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB= $(obj)lib$(BOARD).a
+
+COBJS  := mx31pdk.o
+SOBJS  := lowlevel_init.o
+
+SRCS   := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS   := $(addprefix $(obj),$(COBJS))
+SOBJS  := $(addprefix $(obj),$(SOBJS))
+
+$(LIB):$(obj).depend $(OBJS) $(SOBJS)
+   $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
+
+clean:
+   rm -f $(SOBJS) $(OBJS)
+
+distclean: clean
+   rm -f $(LIB) core *.bak .depend
+
+#
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#
diff --git a/board/freescale/mx31pdk/config.mk 
b/board/freescale/mx31pdk/config.mk
new file mode 100644
index 000..d34dc02
--- /dev/null
+++ b/board/freescale/mx31pdk/config.mk
@@ -0,0 +1 @@
+TEXT_BASE = 0x87f0
diff --git a/board/freescale/mx31pdk/lowlevel_init.S 
b/board/freescale/mx31pdk/lowlevel_init.S
new file mode 100644
index 000..a94ea7f
--- /dev/null
+++ b/board/freescale/mx31pdk/lowlevel_init.S
@@ -0,0 +1,30 @@
+/*
+ * (C) Copyright 2008 Magnus Lilja <[EMAIL PROTECTED]>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/*
+ * This is just to keep the linker happy.
+ */
+
+.globl lowlevel_init
+lowlevel_init:
+

Re: [U-Boot] [PATCH] [ARM] Move machine specific code to board at s3c64xx

2008-10-23 Thread Guennadi Liakhovetski
On Thu, 23 Oct 2008, Kyungmin Park wrote:

> >   (1 << 0) - ignored, default 0, so, better set it to 0
> > | (0 << 1) - set Xm0CSn[2] to OneNANDC CS0 or NFCON CS0
> > | (1 << 2) - ignored, default 0, so, better set it to 0
> > | (1 << 3) - set Xm0CSn[3] to SROMC CS3
> >
> > So, we should just write an 8 in it:
> >
> > +   mov r1, #0x8
> > +   str r1, [r0]
> >
> > 3. The comment in the code doesn't look right. According to the above it
> >   should read
> >
> > +   /* Xm0CSn[2] = OneNANDC CS0 or NFCON CS0, Xm0CSn[3] = SROMC CS3 */
> 
> Right, and also add OneNAND & NFCON is depends on XNANDSEL.

In the datasheet this signal is called XSELNAND. And I don't think we have 
to quote this in the comment. This is a hardware configuration issue, not 
software, and we are not explaining the complete NAND configuration here, 
otherwise we would have to mention OM signals too, maybe more.

> As you know mem_ctrl_asm_init is common code and other boards can use
> it without board specific codes.
> 
> In OneNAND board, it should be set as 0x1002

Sorry, do not understand what "it." If you mean the MEM_SYS_CFG then I 
also don't understand this. As I quoted from the datasheet above, bit 1 
set to 0 (0 << 1) is for _both_ - NAND or OneNAND. You suggest to set it 
to 1, which is SROMC CS2. And (1 << 12) is the data bus width, which also 
doesn't seem to be directly related to the NAND / OneNAND selection. Or 
did you mean another register?

Thanks
Guennadi
---
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DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-0 Fax: +49-8142-66989-80  Email: [EMAIL PROTECTED]
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Re: [U-Boot] [PATCH 08/19] ColdFire: Remove platforms mii.c file - 1

2008-10-23 Thread Wolfgang Denk
Dear Tsi-Chung Liew,

In message <[EMAIL PROTECTED]> you wrote:
> From: TsiChung Liew <[EMAIL PROTECTED]>
> 
> Will use mcfmii.c driver in drivers/net rather than
> keep creating new mii.c for each future platform.
> Remove EB+MCF-EV123, cobra5272, idmr and M5235EVB's mii.c
> 
> Signed-off-by: TsiChung Liew <[EMAIL PROTECTED]>
> ---
>  board/BuS/EB+MCF-EV123/Makefile   |2 +-
>  board/BuS/EB+MCF-EV123/mii.c  |  304 
>  board/cobra5272/Makefile  |2 +-
>  board/cobra5272/mii.c |  303 
>  board/freescale/m5235evb/Makefile |2 +-
>  board/freescale/m5235evb/mii.c|  307 
> -
>  board/idmr/Makefile   |2 +-
>  board/idmr/mii.c  |  303 
>  8 files changed, 4 insertions(+), 1221 deletions(-)
>  delete mode 100644 board/BuS/EB+MCF-EV123/mii.c
>  delete mode 100644 board/cobra5272/mii.c
>  delete mode 100644 board/freescale/m5235evb/mii.c
>  delete mode 100644 board/idmr/mii.c

This is mostly files removed. WHy don;t you all removals that actually
belong together in a single commit? That would make much more sense to
me.

Best regards,

Wolfgang Denk

-- 
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: [EMAIL PROTECTED]
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Re: [U-Boot] [PATCH] [ONENAND] Reduce OneNAND IPL code size

2008-10-23 Thread Wolfgang Denk
Dear Kyungmin Park,

In message <[EMAIL PROTECTED]> you wrote:
> To give more code at lowlevel_init at each boards

Can you please describe exactly what thgis patch is supposed to do and
what problem it is supposed to fix?

I cannot make heads nor tails from your descritpion, sorry.

Best regards,

Wolfgang Denk

-- 
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: [EMAIL PROTECTED]
Due to lack of disk space, this fortune database has been discontinued.
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Re: [U-Boot] [PATCH 3/3] iMX31: Add support to iMX31PDK board boots from NAND Flash

2008-10-23 Thread Magnus Lilja
> Yes, I confirmed with the schematics. There is a 32768kHz crystal connected 
> to the PMIC that drives the MX31 clock.
>
> Regards,
>
> Fabio Estevam
>
>> I haven't tried my new patch on real hardware yet, but
>> I'll do that
>> tomorrow and post a patch (without the do_div() fix though,
>> perhaps
>> someone else can do that?).

Ok, the patches have been posted now. The first one is a quick
workaround for the div-problem, if someone has a better solution
please use that instead. The second one is my updated basic i.MX31 PDK
patch, now rebased and tested on hardware using a JTAG debugger to
load it.

Regards, Magnus
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Re: [U-Boot] [PATCH] [ARM] Move machine specific code to board at s3c64xx

2008-10-23 Thread Wolfgang Denk
Dear Guennadi Liakhovetski,

In message <[EMAIL PROTECTED]> you wrote:
> 
> 2. While at it, we could fix the value being written to the MEM_SYS_CFG 
>register too. Currently it writes 0xd = 
> 
>   (1 << 0) - ignored, default 0, so, better set it to 0
> | (0 << 1) - set Xm0CSn[2] to OneNANDC CS0 or NFCON CS0
> | (1 << 2) - ignored, default 0, so, better set it to 0
> | (1 << 3) - set Xm0CSn[3] to SROMC CS3
> 
> So, we should just write an 8 in it:
> 
> + mov r1, #0x8
> + str r1, [r0]

No, you should not use magic numbers like 0x08 or 0x0d which nobody
can read but use meaningful preprocessor constants here so we actually
understand the code without looking up the bits in the documentation.

Best regards,

Wolfgang Denk

-- 
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: [EMAIL PROTECTED]
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Re: [U-Boot] [PATCH] [ARM] Move machine specific code to board at s3c64xx

2008-10-23 Thread Kyungmin Park
On Thu, Oct 23, 2008 at 5:00 PM, Guennadi Liakhovetski <[EMAIL PROTECTED]> 
wrote:
> On Thu, 23 Oct 2008, Kyungmin Park wrote:
>
>> >   (1 << 0) - ignored, default 0, so, better set it to 0
>> > | (0 << 1) - set Xm0CSn[2] to OneNANDC CS0 or NFCON CS0
>> > | (1 << 2) - ignored, default 0, so, better set it to 0
>> > | (1 << 3) - set Xm0CSn[3] to SROMC CS3
>> >
>> > So, we should just write an 8 in it:
>> >
>> > +   mov r1, #0x8
>> > +   str r1, [r0]
>> >
>> > 3. The comment in the code doesn't look right. According to the above it
>> >   should read
>> >
>> > +   /* Xm0CSn[2] = OneNANDC CS0 or NFCON CS0, Xm0CSn[3] = SROMC CS3 */
>>
>> Right, and also add OneNAND & NFCON is depends on XNANDSEL.
>
> In the datasheet this signal is called XSELNAND. And I don't think we have
> to quote this in the comment. This is a hardware configuration issue, not
> software, and we are not explaining the complete NAND configuration here,
> otherwise we would have to mention OM signals too, maybe more.
>
>> As you know mem_ctrl_asm_init is common code and other boards can use
>> it without board specific codes.
>>
>> In OneNAND board, it should be set as 0x1002
>
> Sorry, do not understand what "it." If you mean the MEM_SYS_CFG then I
> also don't understand this. As I quoted from the datasheet above, bit 1
> set to 0 (0 << 1) is for _both_ - NAND or OneNAND. You suggest to set it
> to 1, which is SROMC CS2. And (1 << 12) is the data bus width, which also
> doesn't seem to be directly related to the NAND / OneNAND selection. Or
> did you mean another register?
>

Right, I write wrong value, MEM_SYS_CFG has 0x1000. In OneNAND booting
mode, MP0_CS_CFG[1] and MP0_CS_CFG[3] are ignored.

It's not easy to describe since it depends on hardware configuration.
However, there are not too much configurations

S3C64XX_MEM_SYS_CFG_NAND0x0008
S3C64XX_MEM_SYS_CFG_ONENAND 0x1000
S3C64XX_MEM_SYS_CFG_MOVINAND 0x

Is there more?

Thank you,
Kyungmin Park
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Re: [U-Boot] [PATCH 00/10] 85xx/85xx pci cleanup

2008-10-23 Thread Wolfgang Denk
Dear Kumar Gala,

In message <[EMAIL PROTECTED]> you wrote:
> This patch series adds the ability to support 64-bit PCI addresses as well
> as refactors the fsl_pci_init code and cleans up its users.
> 
> Finally it adds some help functions that the board code calls to set
> dma-ranges in device trees.
> 
> If the particular maintainers could ack the patches that would be great
> (Andy, Jon, Jerry).

So who is supposed to apply the patches, then?  Me?

Best regards,

Wolfgang Denk

-- 
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: [EMAIL PROTECTED]
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Re: [U-Boot] Hangs at relocation on 460EX Target

2008-10-23 Thread Stefan Roese
On Thursday 23 October 2008, Felix Radensky wrote:
> >> I've changed
> >>
> >> if ((attribute & 0x02) == 0x00)
> >>
> >> to be
> >>
> >> if (((attribute & 0x02) == 0x00) && (attribute != 0x04))
> >
> > Why did you change it this way? Which DDR2 module are you using? And
> > what's the value of SPD register 21?
>
> My change causes the code to go into else branch and set SDRAM_MCOPT1_RDEN
> (registered) bit. I'm using Micron 512M registered SODIMM. The value of
> SPD register
> 21 is 0x4. The full SPD spec is here:
> http://www.micron.com/products/spddetail.aspx?part=MT9HTF6472RHY-667F1

Thanks.

Ayman, which module are you using and what's your reg 21 value? Does anybody 
have the time to dig into those specs to find a common solution?

Thanks.

Best regards,
Stefan

=
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-0 Fax: +49-8142-66989-80  Email: [EMAIL PROTECTED]
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Re: [U-Boot] [PATCH] [ONENAND] Reduce OneNAND IPL code size

2008-10-23 Thread Kyungmin Park
On Thu, Oct 23, 2008 at 5:09 PM, Wolfgang Denk <[EMAIL PROTECTED]> wrote:
> Dear Kyungmin Park,
>
> In message <[EMAIL PROTECTED]> you wrote:
>> To give more code at lowlevel_init at each boards
>
> Can you please describe exactly what thgis patch is supposed to do and
> what problem it is supposed to fix?
>
> I cannot make heads nor tails from your descritpion, sorry.

OneNAND IPL has common codes for RAM init, load data, and jump to 2nd
bootloader, but it's common code used about 300~400 bytes. So board
specific codes, such as lowlevel_init, can't has enough code. It make
a difficult to implement OneNAND IPL.

This patch make this common code as small as possible. and give
lowlevel_init can have more codes.

Thank you,
Kyungmin Park
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Re: [U-Boot] [PATCH] [ARM] Move machine specific code to board at s3c64xx

2008-10-23 Thread Guennadi Liakhovetski
On Thu, 23 Oct 2008, Kyungmin Park wrote:

> >> In OneNAND board, it should be set as 0x1002
> >
> > Sorry, do not understand what "it." If you mean the MEM_SYS_CFG then I
> > also don't understand this. As I quoted from the datasheet above, bit 1
> > set to 0 (0 << 1) is for _both_ - NAND or OneNAND. You suggest to set it
> > to 1, which is SROMC CS2. And (1 << 12) is the data bus width, which also
> > doesn't seem to be directly related to the NAND / OneNAND selection. Or
> > did you mean another register?
> >
> 
> Right, I write wrong value, MEM_SYS_CFG has 0x1000. In OneNAND booting
> mode, MP0_CS_CFG[1] and MP0_CS_CFG[3] are ignored.
> 
> It's not easy to describe since it depends on hardware configuration.
> However, there are not too much configurations
> 
> S3C64XX_MEM_SYS_CFG_NAND0x0008
> S3C64XX_MEM_SYS_CFG_ONENAND 0x1000

? I asked above what the bus width has to do with OneNAND selection, 
you didn't reply.

> S3C64XX_MEM_SYS_CFG_MOVINAND 0x

Thanks
Guennadi
---
Guennadi Liakhovetski, Ph.D.

DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-0 Fax: +49-8142-66989-80  Email: [EMAIL PROTECTED]
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Re: [U-Boot] [PATCH] [ARM] Move machine specific code to board at s3c64xx

2008-10-23 Thread Kyungmin Park
On Thu, Oct 23, 2008 at 5:42 PM, Guennadi Liakhovetski <[EMAIL PROTECTED]> 
wrote:
> On Thu, 23 Oct 2008, Kyungmin Park wrote:
>
>> >> In OneNAND board, it should be set as 0x1002
>> >
>> > Sorry, do not understand what "it." If you mean the MEM_SYS_CFG then I
>> > also don't understand this. As I quoted from the datasheet above, bit 1
>> > set to 0 (0 << 1) is for _both_ - NAND or OneNAND. You suggest to set it
>> > to 1, which is SROMC CS2. And (1 << 12) is the data bus width, which also
>> > doesn't seem to be directly related to the NAND / OneNAND selection. Or
>> > did you mean another register?
>> >
>>
>> Right, I write wrong value, MEM_SYS_CFG has 0x1000. In OneNAND booting
>> mode, MP0_CS_CFG[1] and MP0_CS_CFG[3] are ignored.
>>
>> It's not easy to describe since it depends on hardware configuration.
>> However, there are not too much configurations
>>
>> S3C64XX_MEM_SYS_CFG_NAND0x0008
>> S3C64XX_MEM_SYS_CFG_ONENAND 0x1000
>
> ? I asked above what the bus width has to do with OneNAND selection,
> you didn't reply.

OneNAND has always 16-bit butwidth. there's no exception.

>
>> S3C64XX_MEM_SYS_CFG_MOVINAND 0x

I don't tested boot from MMC. So I don't know which value is right

Thank you,
Kyungmin Park
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Re: [U-Boot] [PATCH] [ARM] Move machine specific code to board at s3c64xx

2008-10-23 Thread Wolfgang Denk
Dear Guennadi Liakhovetski,

In message <[EMAIL PROTECTED]> you wrote:
> 
> > > +   /* Xm0CSn[2] = OneNANDC CS0 or NFCON CS0, Xm0CSn[3] = SROMC CS3 */
> > 
> > Right, and also add OneNAND & NFCON is depends on XNANDSEL.
> 
> In the datasheet this signal is called XSELNAND. And I don't think we have 
> to quote this in the comment. This is a hardware configuration issue, not 
> software, and we are not explaining the complete NAND configuration here, 
> otherwise we would have to mention OM signals too, maybe more.

Hey, actually I do think that describing which hardware configurations
the software performs is a Good Thing (TM).

I do NOT want to have to look up each and every bit in the reference
manual when reading the source code.

Meaningful names are a good thing, also - much better than cryptic
numbers everywhere.

> > In OneNAND board, it should be set as 0x1002
> 
> Sorry, do not understand what "it." If you mean the MEM_SYS_CFG then I 
> also don't understand this. As I quoted from the datasheet above, bit 1 
> set to 0 (0 << 1) is for _both_ - NAND or OneNAND. You suggest to set it 
> to 1, which is SROMC CS2. And (1 << 12) is the data bus width, which also 
> doesn't seem to be directly related to the NAND / OneNAND selection. Or 
> did you mean another register?

Get rid of these magic numbers. Use readable constants everywhere!

Best regards,

Wolfgang Denk

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HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
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Re: [U-Boot] [PATCH] [ARM] Move machine specific code to board at s3c64xx

2008-10-23 Thread Guennadi Liakhovetski
On Thu, 23 Oct 2008, Kyungmin Park wrote:

> >> S3C64XX_MEM_SYS_CFG_NAND0x0008
> >> S3C64XX_MEM_SYS_CFG_ONENAND 0x1000
> >
> > ? I asked above what the bus width has to do with OneNAND selection,
> > you didn't reply.
> 
> OneNAND has always 16-bit butwidth. there's no exception.

Ok, thanks, but I wouldn't call the macro ONENAND, but rather 16BIT, but 
that's just IMHO.

Thanks
Guennadi
---
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DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
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Re: [U-Boot] [PATCH] [ARM] Move machine specific code to board at s3c64xx

2008-10-23 Thread Guennadi Liakhovetski
On Thu, 23 Oct 2008, Wolfgang Denk wrote:

> Dear Guennadi Liakhovetski,
> 
> In message <[EMAIL PROTECTED]> you wrote:
> > 
> > > > +   /* Xm0CSn[2] = OneNANDC CS0 or NFCON CS0, Xm0CSn[3] = SROMC CS3 
> > > > */
> > > 
> > > Right, and also add OneNAND & NFCON is depends on XNANDSEL.
> > 
> > In the datasheet this signal is called XSELNAND. And I don't think we have 
> > to quote this in the comment. This is a hardware configuration issue, not 
> > software, and we are not explaining the complete NAND configuration here, 
> > otherwise we would have to mention OM signals too, maybe more.
> 
> Hey, actually I do think that describing which hardware configurations
> the software performs is a Good Thing (TM).

Exactly, "which hardware configurations the software performs", XSELNAND 
is not performed in software, this is just a pin you wire high or low on 
your board. That's why I said we might not need to comment upon it. That's 
how I interpreted the datasheet anyway.

Thanks
Guennadi
---
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[U-Boot] Pull request u-boot-blackfin.git

2008-10-23 Thread Mike Frysinger
The following changes since commit d9d8c7c696dec370ca714c03beb6e79d4c90bd5e:
  Wolfgang Denk (1):
Fix strmhz(): avoid printing negative fractions

are available in the git repository at:

  git://www.denx.de/git/u-boot-blackfin.git master

Ben Maan (1):
  Blackfin: fix port mux defines for BF54x

Mike Frysinger (25):
  Blackfin: unify DSPID/DBGSTAT MMR definitions
  Blackfin: update anomaly lists
  Blackfin: fix typo in boot mode comment and add NAND define
  Blackfin: delete unused page_descriptor_table_size define
  Blackfin: punt old unused mem_init.h header
  Blackfin: only enable hardware error irq by default
  Blackfin: document some of the blackfin directories
  Blackfin: build with -fomit-frame-pointer
  Blackfin: fix SWRST register definition
  Blackfin: only initialize the RTC when actually used
  Blackfin: unify cache handling code
  Blackfin: drop unused cache flush code
  Blackfin: check cache bits, not cplb bits
  Blackfin: init NAND before relocating env
  Blackfin: enable support for nested interrupts
  Blackfin: don't bother displaying reboot msg when crashing
  Blackfin: fix register dump messages
  Blackfin: decode hwerrcause/excause when crashing
  Blackfin: make baud calculation more accurate
  Blackfin: set initial stack correctly according to Blackfin ABI
  Blackfin: small cpu init optimization while setting interrupt mask
  Blackfin: linker scripts: force start.o and set initcode boundaries
  Blackfin: bf561-ezkit: drop pointless USB code
  Blackfin: bf561-ezkit: drop redundant code
  Blackfin: fix up UART status bit handling

 README |2 +
 blackfin_config.mk |2 +-
 board/bf533-ezkit/u-boot.lds.S |7 +-
 board/bf533-stamp/bf533-stamp.c|1 -
 board/bf533-stamp/u-boot.lds.S |7 +-
 board/bf537-stamp/u-boot.lds.S |7 +-
 board/bf561-ezkit/bf561-ezkit.c|   21 +--
 board/bf561-ezkit/u-boot.lds.S |7 +-
 cpu/blackfin/Makefile  |2 +-
 cpu/blackfin/cpu.c |   40 +---
 cpu/blackfin/flush.S   |  230 --
 cpu/blackfin/serial.c  |   72 -
 cpu/blackfin/serial.h  |8 +-
 cpu/blackfin/start.S   |   27 +-
 cpu/blackfin/traps.c   |   54 +++-
 drivers/rtc/bfin_rtc.c |   19 +-
 include/asm-blackfin/blackfin-config-pre.h |3 +-
 include/asm-blackfin/cplb.h|5 -
 include/asm-blackfin/mach-bf527/BF522_cdef.h   |3 -
 include/asm-blackfin/mach-bf527/BF522_def.h|1 -
 include/asm-blackfin/mach-bf527/BF523_cdef.h   |3 -
 include/asm-blackfin/mach-bf527/BF523_def.h|1 -
 include/asm-blackfin/mach-bf527/BF524_cdef.h   |3 -
 include/asm-blackfin/mach-bf527/BF524_def.h|1 -
 include/asm-blackfin/mach-bf527/BF525_cdef.h   |3 -
 include/asm-blackfin/mach-bf527/BF525_def.h|1 -
 include/asm-blackfin/mach-bf527/BF526_cdef.h   |3 -
 include/asm-blackfin/mach-bf527/BF526_def.h|1 -
 include/asm-blackfin/mach-bf527/BF527_cdef.h   |3 -
 include/asm-blackfin/mach-bf527/BF527_def.h|1 -
 include/asm-blackfin/mach-bf527/anomaly.h  |   63 -
 include/asm-blackfin/mach-bf533/anomaly.h  |   28 ++-
 .../mach-bf537/ADSP-EDN-BF534-extended_cdef.h  |3 -
 .../mach-bf537/ADSP-EDN-BF534-extended_def.h   |1 -
 include/asm-blackfin/mach-bf537/anomaly.h  |   16 +-
 include/asm-blackfin/mach-bf548/BF541_cdef.h   |3 -
 include/asm-blackfin/mach-bf548/BF541_def.h|1 -
 include/asm-blackfin/mach-bf548/BF542_cdef.h   |3 -
 include/asm-blackfin/mach-bf548/BF542_def.h|1 -
 include/asm-blackfin/mach-bf548/BF544_cdef.h   |3 -
 include/asm-blackfin/mach-bf548/BF544_def.h|1 -
 include/asm-blackfin/mach-bf548/BF547_cdef.h   |3 -
 include/asm-blackfin/mach-bf548/BF547_def.h|1 -
 include/asm-blackfin/mach-bf548/BF548_cdef.h   |3 -
 include/asm-blackfin/mach-bf548/BF548_def.h|1 -
 include/asm-blackfin/mach-bf548/BF549_cdef.h   |3 -
 include/asm-blackfin/mach-bf548/BF549_def.h|1 -
 include/asm-blackfin/mach-bf548/anomaly.h  |   78 +-
 include/asm-blackfin/mach-bf548/ports.h|   64 ++--
 include/asm-blackfin/mach-bf561/BF561_cdef.h   |   18 +-
 include/asm-blackfin/mach-bf561/BF561_def.h|2 -
 include/asm-blackfin/mach-bf561/anomaly.h  |9 +-
 .../asm-blackfin/mach-common/ADSP-EDN-core_cdef.h  |6 +
 .../asm-blackfin/mach-co

Re: [U-Boot] [PATCH] [ONENAND] Reduce OneNAND IPL code size

2008-10-23 Thread Wolfgang Denk
Dear "Kyungmin Park",

In message <[EMAIL PROTECTED]> you wrote:
> On Thu, Oct 23, 2008 at 5:09 PM, Wolfgang Denk <[EMAIL PROTECTED]> wrote:
> > Dear Kyungmin Park,
> >
> > In message <[EMAIL PROTECTED]> you wrote:
> >> To give more code at lowlevel_init at each boards
> >
> > Can you please describe exactly what thgis patch is supposed to do and
> > what problem it is supposed to fix?
> >
> > I cannot make heads nor tails from your descritpion, sorry.
> 
> OneNAND IPL has common codes for RAM init, load data, and jump to 2nd
> bootloader, but it's common code used about 300~400 bytes. So board
> specific codes, such as lowlevel_init, can't has enough code. It make
> a difficult to implement OneNAND IPL.
> 
> This patch make this common code as small as possible. and give
> lowlevel_init can have more codes.

Please add this explanation to the commit message, then. Otherwise it
is not possible to understand the rationale for the change.

Best regards,

Wolfgang Denk

-- 
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: [EMAIL PROTECTED]
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Re: [U-Boot] [PATCH] [ARM] Move machine specific code to board at s3c64xx

2008-10-23 Thread Wolfgang Denk
Dear Guennadi Liakhovetski,

In message <[EMAIL PROTECTED]> you wrote:
> 
> > Hey, actually I do think that describing which hardware configurations
> > the software performs is a Good Thing (TM).
> 
> Exactly, "which hardware configurations the software performs", XSELNAND 
> is not performed in software, this is just a pin you wire high or low on 
> your board. That's why I said we might not need to comment upon it. That's 
> how I interpreted the datasheet anyway.

I don;t think how this would make a difference. Even if the signal is
defined by the hardware dsign - the very moment I am referencing this
signal in any piece of software I should explain it so the reader of
the code understands what I'm doing.

Using meaningful names instead of magic numbers is a minimum to do.

Best regards,

Wolfgang Denk

-- 
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: [EMAIL PROTECTED]
"It ain't so much the things we don't know that get  us  in  trouble.
It's  the  things  we know that ain't so." - Artemus Ward aka Charles
Farrar Brown
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Re: [U-Boot] [PATCH] [ARM] Move machine specific code to board at s3c64xx

2008-10-23 Thread Guennadi Liakhovetski
On Thu, 23 Oct 2008, Wolfgang Denk wrote:

> Dear Guennadi Liakhovetski,
> 
> In message <[EMAIL PROTECTED]> you wrote:
> > 
> > > Hey, actually I do think that describing which hardware configurations
> > > the software performs is a Good Thing (TM).
> > 
> > Exactly, "which hardware configurations the software performs", XSELNAND 
> > is not performed in software, this is just a pin you wire high or low on 
> > your board. That's why I said we might not need to comment upon it. That's 
> > how I interpreted the datasheet anyway.
> 
> I don;t think how this would make a difference. Even if the signal is
> defined by the hardware dsign - the very moment I am referencing this
> signal in any piece of software I should explain it so the reader of
> the code understands what I'm doing.

I don't think this pin is referenced in software, at least not in this 
register, AFAICS. The only reason why Kyungmin mentioned it and why it is 
mentioned in the datasheet in the description of this register, is that 
this pin defines the selection between NAND and OneNAND - along with some 
other pins (OM[4:1] or some such). So, you cannot set this pin in 
software, you cannot read this pin in software (I think), maybe you have 
to switch a jumper when selecting another configuration, but that again 
has little to do with software, IMHO.

Thanks
Guennadi
---
Guennadi Liakhovetski, Ph.D.

DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-0 Fax: +49-8142-66989-80  Email: [EMAIL PROTECTED]
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[U-Boot] Problems erasing (and writing) to flash

2008-10-23 Thread ffileppo
Hi guys,

I'm facing problems when I try to erase flash memory on my embedded board (it's 
a custom Mainstone board, based on PXA270 ).
I'm using u-boot 1.1.4 (since it is the only version with patch for Mainstone), 

"Protect off" seems to work ok:

> protect off 1:7
> Un-Protect Flash Sector 7-7 in Bank # 1 (now I see that sector 7 is no longer 
> RO)

But when I try to erase that sector:

> erase 1:7
> Erase Flash Sectors 7-7 in Bank # 1
> fwc addr 0008 cmd 50 0050 16bit x 16 bit
> fwc addr 0008 cmd 20 0020 16bit x 16 bit
> fwc addr 0008 cmd d0 00d0 16bit x 16 bit
> flash_is_busy: 0
>fwc addr 0008 cmd ff 00ff 16bit x 16 bit
>. done

But the sector is not erased (I check with md)

Anyone know what could be the problem here?
I'll post more logs if needed

NOTE (Flash memoy is not bro, I'm able to erase and write it using JTAG and/or 
linux mtd tools)

Thank you,

Francesco


Flinfo output:

Bank # 1: CFI conformant FLASH (16 x 16)  Size: 32 MB in 259 Sectors
 Erase timeout 4096 ms, write timeout 0 ms, buffer write timeout 1024 ms, buffer
 size 64
  Sector Start Addresses:
 (RO) 8000 (RO) 0001 (RO) 00018000 (RO) 0002 (RO)


Bank # 2: CFI conformant FLASH (16 x 16)  Size: 32 MB in 259 Sectors
 Erase timeout 4096 ms, write timeout 0 ms, buffer write timeout 1024 ms, buffer
 size 64
  Sector Start Addresses:
 (RO) 8000 (RO) 0001 (RO) 00018000 (RO) 0002 (RO)


Here is the debug info from startup:

U-Boot 1.1.4 (Aug  1 2008 - 09:51:21)

U-Boot code: A308 -> A30B6CA4  BSS: -> A308
RAM Configuration:
Bank #0: a000 128 MB
flash detect cfi
fwc addr  cmd 0 0 8bit x 8 bit
fwc addr 0055 cmd 98 98 8bit x 8 bit
is= cmd 51(Q) addr 0010 is= 14 51
fwc addr  cmd 0  16bit x 8 bit
fwc addr 00aa cmd 98 9898 16bit x 8 bit
is= cmd 51(Q) addr 0020 is= 0051 5151
fwc addr  cmd 0  16bit x 16 bit
fwc addr 00aa cmd 98 0098 16bit x 16 bit
is= cmd 51(Q) addr 0020 is= 0051 0051
is= cmd 52(R) addr 0022 is= 0052 0052
is= cmd 59(Y) addr 0024 is= 0059 0059
retval = 0x1
device interface is 1
found port 2 chip 2 port 16 bits chip 16 bits
retval = 0x1
manufacturer is 1
size_ratio 1 port 16 bits chip 16 bits
found 2 erase regions
erase_region_count = 4 erase_region_size = 32768
erase_region_count = 255 erase_region_size = 131072
retval = 0x6
fwc addr  cmd ff 00ff 16bit x 16 bit
flash detect cfi
fwc addr  cmd 0 0 8bit x 8 bit
fwc addr 0055 cmd 98 98 8bit x 8 bit
is= cmd 51(Q) addr 0010 is= 14 51
fwc addr  cmd 0  16bit x 8 bit
fwc addr 00aa cmd 98 9898 16bit x 8 bit
is= cmd 51(Q) addr 0020 is= 0051 5151
fwc addr  cmd 0  16bit x 16 bit
fwc addr 00aa cmd 98 0098 16bit x 16 bit
is= cmd 51(Q) addr 0020 is= 0051 0051
is= cmd 52(R) addr 0022 is= 0052 0052
is= cmd 59(Y) addr 0024 is= 0059 0059
retval = 0x1
device interface is 1
found port 2 chip 2 port 16 bits chip 16 bits
retval = 0x1
manufacturer is 1
size_ratio 1 port 16 bits chip 16 bits
found 2 erase regions
erase_region_count = 4 erase_region_size = 32768
erase_region_count = 255 erase_region_size = 131072
retval = 0x6
fwc addr  cmd ff 00ff 16bit x 16 bit
Flash: 64 MB
In:serial
Out:   serial
Err:   serial
### main_loop entered: bootdelay=1
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[U-Boot] amcc kilauea odd crashes

2008-10-23 Thread Markus Klotzbücher
Hi List,

Just updated my kilauea to top of git (2008.10-00092-gd9d8c7c) and am
seeing odd crashes:

 - sometimes u-boot comes up normally, but printenv displays random
   crap.

 - sometimes I get machine checks such as here [1].

 - sometimes it resets without any message at all.

The major visible change since the last update is the "DRAM: auto
calibration" eye candy.

Does anyone see any similar problems? To me this smells like a faulty
DRAM configuration.

Best regards
Markus 

P.S.: I'll go back and test some prior version, but unfortunaltely the
board is bricked and I first need to find a BDI.


[1]:


U-Boot 2008.10-00092-gd9d8c7c (Oct 23 2008 - 10:59:45)
CPU:   AMCC PowerPC 405EX Rev. A at 400 MHz (PLB=200, OPB=100, EBC=100
MHz)
   Security support
   Bootstrap Option H - Boot ROM Location I2C (Addr 0x52)
   16 kB I-Cache 16 kB D-Cache
Board: Kilauea - AMCC PPC405EX Evaluation Board
I2C:   ready
DTT1:  44 C
DRAM:  256 MB
FLASH: NIP: 0FFADE30 XER:  LR: 0FFADEC8 REGS: 0fea0d20 TRAP:
0700 DEAR: 
MSR: 00021000 EE: 0 PR: 0 FP: 0 ME: 1 IR/DR: 00

GPR00: 0FEA0020 0FEA0E10 0FEA0F44 0FFF8DFC 00F0 0FEA0E2F 00F0
5D396680
GPR08: 0FEA0E1C 0FEA0E1C   2FAF  0FFF1800
10005000
GPR16: 0FFE6A14 0FFEC8E8   0001  

GPR24:  FC00   0FFF8DFC 00F0 0FEAAA00
17D7FFE8
** Illegal Instruction **
Call backtrace:
17D78400 0FFADEB4 0FFAED50 0FFAF398 0FFA8DC8 0FFA76A4
Program Check Exception

-- 
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-0 Fax: +49-8142-66989-80  Email: [EMAIL PROTECTED]")
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Re: [U-Boot] Problems erasing (and writing) to flash

2008-10-23 Thread Wolfgang Denk
Dear Francesco,

In message <[EMAIL PROTECTED]> you wrote:
> 
> I'm facing problems when I try to erase flash memory on my embedded
> board (it's a custom Mainstone board, based on PXA270 ).
> I'm using u-boot 1.1.4 (since it is the only version with patch for
> Mainstone), 

You are using a very old software version  with  unknown  out-of-tree
patches  and  probably  additional  (unknown to us) modifications for
your custom (unknown to us) board.

This is not a good base to halp you.

Since 1.1.4, *many* changes have gone into the CFI flash driver (and
into many other areas, too).

You may want to port a more recent version of U-Boot to your hardware.

Best regards,

Wolfgang Denk

-- 
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: [EMAIL PROTECTED]
Is not that the nature of men and women -- that the  pleasure  is  in
the learning of each other?
-- Natira, the High Priestess of Yonada, "For the World is
   Hollow and I Have Touched the Sky", stardate 5476.3.
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[U-Boot] [PATCH PPC_4xx] Print simple row of dots instead of spinning wheel

2008-10-23 Thread Wolfgang Denk
Replease the "spinning wheel" eye candy by printing a simple  row  of
dots. This avoids problems with control charactersin log files etc.

Also, it saves a few bytes.

Signed-off-by: Wolfgang Denk <[EMAIL PROTECTED]>
---
 board/esd/common/cmd_loadpci.c  |4 +---
 board/esd/pci405/cmd_pci405.c   |4 +---
 board/esd/pmc440/cmd_pmc440.c   |4 +---
 cpu/ppc4xx/44x_spd_ddr2.c   |   12 
 cpu/ppc4xx/4xx_ibm_ddr2_autocalib.c |   13 -
 5 files changed, 11 insertions(+), 26 deletions(-)

diff --git a/board/esd/common/cmd_loadpci.c b/board/esd/common/cmd_loadpci.c
index d88b387..31d45b1 100644
--- a/board/esd/common/cmd_loadpci.c
+++ b/board/esd/common/cmd_loadpci.c
@@ -40,7 +40,6 @@ int do_loadpci(cmd_tbl_t *cmdtp, int flag, int argc, char 
*argv[])
int count = 0;
int count2 = 0;
char addr[16];
-   char str[] = "\\|/-";
char *local_args[2];
 
while(1) {
@@ -60,8 +59,7 @@ int do_loadpci(cmd_tbl_t *cmdtp, int flag, int argc, char 
*argv[])
count++;
if (!(count % 100)) {
count2++;
-   putc(0x08); /* backspace */
-   putc(str[count2 % 4]);
+   putc('.');
}
 
/* Abort if ctrl-c was pressed */
diff --git a/board/esd/pci405/cmd_pci405.c b/board/esd/pci405/cmd_pci405.c
index 5c717e2..670bc19 100644
--- a/board/esd/pci405/cmd_pci405.c
+++ b/board/esd/pci405/cmd_pci405.c
@@ -51,7 +51,6 @@ int do_loadpci(cmd_tbl_t *cmdtp, int flag, int argc, char 
*argv[])
int status;
int i;
char addr[16];
-   char str[] = "\\|/-";
char *local_args[2];
 
/*
@@ -68,8 +67,7 @@ int do_loadpci(cmd_tbl_t *cmdtp, int flag, int argc, char 
*argv[])
count++;
if (!(count % 100)) {
count2++;
-   putc(0x08); /* backspace */
-   putc(str[count2 % 4]);
+   putc('.');
}
 
/* Abort if ctrl-c was pressed */
diff --git a/board/esd/pmc440/cmd_pmc440.c b/board/esd/pmc440/cmd_pmc440.c
index 38ee74e..7108263 100644
--- a/board/esd/pmc440/cmd_pmc440.c
+++ b/board/esd/pmc440/cmd_pmc440.c
@@ -121,7 +121,6 @@ int do_fifo(cmd_tbl_t *cmdtp, int flag, int argc, char 
*argv[])
int i;
int n = 0;
u32 ctrl, data, f;
-   char str[] = "\\|/-";
int abort = 0;
int count = 0;
int count2 = 0;
@@ -175,8 +174,7 @@ int do_fifo(cmd_tbl_t *cmdtp, int flag, int argc, char 
*argv[])
count++;
if (!(count % 100)) {
count2++;
-   putc(0x08); /* backspace */
-   putc(str[count2 % 4]);
+   putc('.');
}
 
/* Abort if ctrl-c was pressed */
diff --git a/cpu/ppc4xx/44x_spd_ddr2.c b/cpu/ppc4xx/44x_spd_ddr2.c
index b40e4b1..9587896 100644
--- a/cpu/ppc4xx/44x_spd_ddr2.c
+++ b/cpu/ppc4xx/44x_spd_ddr2.c
@@ -2362,8 +2362,7 @@ static void program_ecc_addr(unsigned long start_address,
unsigned long end_address;
unsigned long address_increment;
unsigned long mcopt1;
-   char str[] = "ECC generation -";
-   char slash[] = "\\|/-\\|/-";
+   char str[] = "ECC generation: ";
int loop = 0;
int loopi = 0;
 
@@ -2390,8 +2389,7 @@ static void program_ecc_addr(unsigned long start_address,
current_address += address_increment;
 
if ((loop++ % (2 << 20)) == 0) {
-   putc('\b');
-   putc(slash[loopi++ % 8]);
+   putc('.');
}
}
 
@@ -2572,8 +2570,7 @@ static void DQS_calibration_process(void)
u32 rqfd_start;
u32 rqfd_average;
int loopi = 0;
-   char str[] = "Auto calibration -";
-   char slash[] = "\\|/-\\|/-";
+   char str[] = "Auto calibration: ";
 
/*--
 * Test to determine the best read clock delay tuning bits.
@@ -2760,8 +2757,7 @@ calibration_loop:
 *-*/
if (window_found == FALSE) {
if (rqfd_start < SDRAM_RQDC_RQFD_MAX) {
-   putc('\b');
-   putc(slash[loopi++ % 8]);
+   putc('.');
 
/* try again from with a different RQFD start value */
rqfd_star

[U-Boot] [PATCH]v2: Fixed lineendings in tools/img2brec.sh

2008-10-23 Thread Niklaus Giger
This time I took a closer look at img2brec.sh. My conclusions are
img2brec.sh was done for development under Windows (probably cygwin), as
it uses a command filesize which is not available as such under Unix. Therefore
I replaced with a functional equivalent (wc --bytes) which should also work 
under
cygwin (not tested).
I modified the script to git also rid of extra \M (LF) caracters in the output. 
Now
the outputfile on my Debian system after calling 
tools/img2brec.sh u-boot.bin [u-boot.brec]
looks fine.


Signed-off-by: Niklaus Giger <[EMAIL PROTECTED]>
---
 tools/img2brec.sh |  580 ++--
 1 files changed, 290 insertions(+), 290 deletions(-)

diff --git a/tools/img2brec.sh b/tools/img2brec.sh
index 0fcdba2..7848773 100755
--- a/tools/img2brec.sh
+++ b/tools/img2brec.sh
@@ -61,318 +61,318 @@ if [ ! -f $INFILE ] ; then
 exit 1
 fi

-FILESIZE=`filesize $INFILE`
+FILESIZE=`(wc --bytes <$INFILE)`

 output_init()
 {
 echo "\
-
-* Initialize I/O Pad Driving Strength  *
-
-0021B80CC403AB
-
-* Initialize SDRAM *
-
-00221000C492120200   ; pre-charge command
-0820E4   ; special read
-
-00221000C4A2120200   ; auto-refresh command
-0800E4   ; 8 special read
-0800E4   ; 8 special read
-0800E4   ; 8 special read
-0800E4   ; 8 special read
-0800E4   ; 8 special read
-0800E4   ; 8 special read
-0800E4   ; 8 special read
-0800E4   ; 8 special read
-
-00221000C4B2120200   ; set mode register
-08111800E4   ; special read
-
-00221000C482124200   ; set normal mode
-
"
+
+* Initialize I/O Pad Driving Strength  *
+
+0021B80CC403AB
+
+* Initialize SDRAM *
+
+00221000C492120200   ; pre-charge command
+0820E4   ; special read
+
+00221000C4A2120200   ; auto-refresh command
+0800E4   ; 8 special read
+0800E4   ; 8 special read
+0800E4   ; 8 special read
+0800E4   ; 8 special read
+0800E4   ; 8 special read
+0800E4   ; 8 special read
+0800E4   ; 8 special read
+0800E4   ; 8 special read
+
+00221000C4B2120200   ; set mode register
+08111800E4   ; special read
+
+00221000C482124200   ; set normal mode
+"
 }

 output_uboot()
 {
 echo "\
-
-* U-Boot image as bootstrap records*
-*   will be stored in SDRAM at 0x0A00  *
-
-
"
+
+* U-Boot image as bootstrap records*
+*   will be stored in SDRAM at 0x0A00  *
+"

 cat $INFILE | \
-hexdump -v -e "\"0A0%05.5_ax10\" 16/1 \"%02x\"\"\r\n\"" | \
+hexdump -v -e "\"0A0%05.5_ax10\" 16/1 \"%02x\"\"\n\"" | \
 tr [:lower:] [:upper:]
 }

 output_flashprog()
 {
 echo "\
-
-* Address of arguments to flashProg*
-*  *
-* Source  : 0x0A00 *
-* Destination : 0x0C00 *
"
+
+* Address of arguments to flashProg*
+*  *
+* Source  : 0x0A00 *
+* Destination : 0x0C00 *
+"

 # get the real size of the U-Boot image
-printf "* Size: 0x%08X *\r\n" $FILESIZE
-printf "\r\n"
-printf "0AFECC0A000C00%08X\r\n" $FILESIZE
+printf "* Size: 0x%08X *\n" $FILESIZE
+printf "\n"
+printf "0AFECC0A000C00%08X\n" $FILESIZE

-#;0AFECC0A000C006000
+#;0AFECC0A000C006000

 echo "\
-
-* Flash Program*
-
-0AFE10001008D09FE5ACEA00F0A0E1A42DFE0A
-0AFE1010100080FE0A0DC0A0E100D82DE904B04CE2
-0AFE1020109820A0E318309FE5003093E5033082E0
-0AFE103010003093E5013003E2FF3003E20300A0E1
-0AFE10401000A81BE9A01DFE0A0DC0A0E100D82DE9
-0AFE10501004B04CE204D04DE20030A0E10D304BE5
-0AFE1060109820A0E330309FE5003093E5033082E0
-0AFE107010003093E5013903E253E3F70A
-0AFE1080104020A0E310309FE5003093E5032082E0
-0AFE1090100D305BE5003082E500A81BE9A01DFE0A
-0AFE10A0100DC0A0E100D82DE904B04CE2A0E1
-0AFE10B010D7EB0030A0E1FF3003E253E3
-0AFE10C010FA0A10309FE5003093E5003093E5
-0AFE10D010FF3003E20300A0E100A81BE9A01DFE0A
-0AFE10E0100DC0A0E100D82DE904B04CE204D04DE2
-0AFE10F0100030A0E10D304BE50D305BE52332A0E1
-0AFE1100100E304BE50E305BE5090053E3039A
-0AFE1110100E

Re: [U-Boot] amcc kilauea odd crashes

2008-10-23 Thread Stefan Roese
Hi Markus,

On Thursday 23 October 2008, Markus Klotzbücher wrote:
> Just updated my kilauea to top of git (2008.10-00092-gd9d8c7c) and am
> seeing odd crashes:

Is this a 600MHz Kilauea? This is a known issue, that the new autocalibration 
code has a problem here. I reported this problem a few weeks ago. AMCC is 
currently working on a fix for this.

>  - sometimes u-boot comes up normally, but printenv displays random
>crap.
>
>  - sometimes I get machine checks such as here [1].
>
>  - sometimes it resets without any message at all.
>
> The major visible change since the last update is the "DRAM: auto
> calibration" eye candy.
>
> Does anyone see any similar problems? To me this smells like a faulty
> DRAM configuration.

Yes.

> Best regards
> Markus
>
> P.S.: I'll go back and test some prior version, but unfortunaltely the
> board is bricked and I first need to find a BDI.

:-(

Best regards,
Stefan

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[U-Boot] [PATCH PPC_4XX V2] Print simple row of dots instead of spinning wheel

2008-10-23 Thread Wolfgang Denk
Replace the "spinning wheel" eye candy by printing a simple  row  of
dots. This avoids problems with control charactersin log files etc.

Also, it saves a few bytes.

Signed-off-by: Wolfgang Denk <[EMAIL PROTECTED]>
---
This patch version fixes a few typos and also gets rid of a few now
unused variables.

 board/esd/common/cmd_loadpci.c  |4 +---
 board/esd/pci405/cmd_pci405.c   |4 +---
 board/esd/pmc440/cmd_pmc440.c   |4 +---
 cpu/ppc4xx/44x_spd_ddr2.c   |   14 --
 cpu/ppc4xx/4xx_ibm_ddr2_autocalib.c |   16 
 5 files changed, 11 insertions(+), 31 deletions(-)

diff --git a/board/esd/common/cmd_loadpci.c b/board/esd/common/cmd_loadpci.c
index d88b387..31d45b1 100644
--- a/board/esd/common/cmd_loadpci.c
+++ b/board/esd/common/cmd_loadpci.c
@@ -40,7 +40,6 @@ int do_loadpci(cmd_tbl_t *cmdtp, int flag, int argc, char 
*argv[])
int count = 0;
int count2 = 0;
char addr[16];
-   char str[] = "\\|/-";
char *local_args[2];
 
while(1) {
@@ -60,8 +59,7 @@ int do_loadpci(cmd_tbl_t *cmdtp, int flag, int argc, char 
*argv[])
count++;
if (!(count % 100)) {
count2++;
-   putc(0x08); /* backspace */
-   putc(str[count2 % 4]);
+   putc('.');
}
 
/* Abort if ctrl-c was pressed */
diff --git a/board/esd/pci405/cmd_pci405.c b/board/esd/pci405/cmd_pci405.c
index 5c717e2..670bc19 100644
--- a/board/esd/pci405/cmd_pci405.c
+++ b/board/esd/pci405/cmd_pci405.c
@@ -51,7 +51,6 @@ int do_loadpci(cmd_tbl_t *cmdtp, int flag, int argc, char 
*argv[])
int status;
int i;
char addr[16];
-   char str[] = "\\|/-";
char *local_args[2];
 
/*
@@ -68,8 +67,7 @@ int do_loadpci(cmd_tbl_t *cmdtp, int flag, int argc, char 
*argv[])
count++;
if (!(count % 100)) {
count2++;
-   putc(0x08); /* backspace */
-   putc(str[count2 % 4]);
+   putc('.');
}
 
/* Abort if ctrl-c was pressed */
diff --git a/board/esd/pmc440/cmd_pmc440.c b/board/esd/pmc440/cmd_pmc440.c
index 38ee74e..7108263 100644
--- a/board/esd/pmc440/cmd_pmc440.c
+++ b/board/esd/pmc440/cmd_pmc440.c
@@ -121,7 +121,6 @@ int do_fifo(cmd_tbl_t *cmdtp, int flag, int argc, char 
*argv[])
int i;
int n = 0;
u32 ctrl, data, f;
-   char str[] = "\\|/-";
int abort = 0;
int count = 0;
int count2 = 0;
@@ -175,8 +174,7 @@ int do_fifo(cmd_tbl_t *cmdtp, int flag, int argc, char 
*argv[])
count++;
if (!(count % 100)) {
count2++;
-   putc(0x08); /* backspace */
-   putc(str[count2 % 4]);
+   putc('.');
}
 
/* Abort if ctrl-c was pressed */
diff --git a/cpu/ppc4xx/44x_spd_ddr2.c b/cpu/ppc4xx/44x_spd_ddr2.c
index b40e4b1..586fa74 100644
--- a/cpu/ppc4xx/44x_spd_ddr2.c
+++ b/cpu/ppc4xx/44x_spd_ddr2.c
@@ -2362,10 +2362,8 @@ static void program_ecc_addr(unsigned long start_address,
unsigned long end_address;
unsigned long address_increment;
unsigned long mcopt1;
-   char str[] = "ECC generation -";
-   char slash[] = "\\|/-\\|/-";
+   char str[] = "ECC generation: ";
int loop = 0;
-   int loopi = 0;
 
current_address = start_address;
mfsdram(SDRAM_MCOPT1, mcopt1);
@@ -2390,8 +2388,7 @@ static void program_ecc_addr(unsigned long start_address,
current_address += address_increment;
 
if ((loop++ % (2 << 20)) == 0) {
-   putc('\b');
-   putc(slash[loopi++ % 8]);
+   putc('.');
}
}
 
@@ -2571,9 +2568,7 @@ static void DQS_calibration_process(void)
u32 rqfd;
u32 rqfd_start;
u32 rqfd_average;
-   int loopi = 0;
-   char str[] = "Auto calibration -";
-   char slash[] = "\\|/-\\|/-";
+   char str[] = "Auto calibration: ";
 
/*--
 * Test to determine the best read clock delay tuning bits.
@@ -2760,8 +2755,7 @@ calibration_loop:
 *-*/
if (window_found == FALSE) {
if (rqfd_start < SDRAM_RQDC_RQFD_MAX) {
-   putc('\b');
-

[U-Boot] [PATCH PPC_4xx V3] Print simple row of dots instead of spinning wheel

2008-10-23 Thread Wolfgang Denk
Replace the "spinning wheel" eye candy by printing a simple  row  of
dots. This avoids problems with control charactersin log files etc.

Also, it saves a few bytes.

Signed-off-by: Wolfgang Denk <[EMAIL PROTECTED]>
---
Hey, seems I'm heading for the record of submitting the maximum
number of patch versions in the shorted time :-(

This patch version fixes a few typos in the first version, and gets
rid of a few variables no longer needed because of the changes.

 board/esd/common/cmd_loadpci.c  |6 +-
 board/esd/pci405/cmd_pci405.c   |6 +-
 board/esd/pmc440/cmd_pmc440.c   |6 +-
 cpu/ppc4xx/44x_spd_ddr2.c   |   14 --
 cpu/ppc4xx/4xx_ibm_ddr2_autocalib.c |   16 
 5 files changed, 11 insertions(+), 37 deletions(-)

diff --git a/board/esd/common/cmd_loadpci.c b/board/esd/common/cmd_loadpci.c
index d88b387..aaf8b0c 100644
--- a/board/esd/common/cmd_loadpci.c
+++ b/board/esd/common/cmd_loadpci.c
@@ -38,9 +38,7 @@ int do_loadpci(cmd_tbl_t *cmdtp, int flag, int argc, char 
*argv[])
 {
unsigned int *ptr = 0;
int count = 0;
-   int count2 = 0;
char addr[16];
-   char str[] = "\\|/-";
char *local_args[2];
 
while(1) {
@@ -59,9 +57,7 @@ int do_loadpci(cmd_tbl_t *cmdtp, int flag, int argc, char 
*argv[])
while (*ptr == 0x) {
count++;
if (!(count % 100)) {
-   count2++;
-   putc(0x08); /* backspace */
-   putc(str[count2 % 4]);
+   putc('.');
}
 
/* Abort if ctrl-c was pressed */
diff --git a/board/esd/pci405/cmd_pci405.c b/board/esd/pci405/cmd_pci405.c
index 5c717e2..9ffe686 100644
--- a/board/esd/pci405/cmd_pci405.c
+++ b/board/esd/pci405/cmd_pci405.c
@@ -47,11 +47,9 @@ int do_loadpci(cmd_tbl_t *cmdtp, int flag, int argc, char 
*argv[])
 {
unsigned int *ptr = 0;
int count = 0;
-   int count2 = 0;
int status;
int i;
char addr[16];
-   char str[] = "\\|/-";
char *local_args[2];
 
/*
@@ -67,9 +65,7 @@ int do_loadpci(cmd_tbl_t *cmdtp, int flag, int argc, char 
*argv[])
while (*ptr == 0x) {
count++;
if (!(count % 100)) {
-   count2++;
-   putc(0x08); /* backspace */
-   putc(str[count2 % 4]);
+   putc('.');
}
 
/* Abort if ctrl-c was pressed */
diff --git a/board/esd/pmc440/cmd_pmc440.c b/board/esd/pmc440/cmd_pmc440.c
index 38ee74e..42d2fe6 100644
--- a/board/esd/pmc440/cmd_pmc440.c
+++ b/board/esd/pmc440/cmd_pmc440.c
@@ -121,10 +121,8 @@ int do_fifo(cmd_tbl_t *cmdtp, int flag, int argc, char 
*argv[])
int i;
int n = 0;
u32 ctrl, data, f;
-   char str[] = "\\|/-";
int abort = 0;
int count = 0;
-   int count2 = 0;
 
switch (argc) {
case 1:
@@ -174,9 +172,7 @@ int do_fifo(cmd_tbl_t *cmdtp, int flag, int argc, char 
*argv[])
while (!got_fifoirq) {
count++;
if (!(count % 100)) {
-   count2++;
-   putc(0x08); /* backspace */
-   putc(str[count2 % 4]);
+   putc('.');
}
 
/* Abort if ctrl-c was pressed */
diff --git a/cpu/ppc4xx/44x_spd_ddr2.c b/cpu/ppc4xx/44x_spd_ddr2.c
index b40e4b1..586fa74 100644
--- a/cpu/ppc4xx/44x_spd_ddr2.c
+++ b/cpu/ppc4xx/44x_spd_ddr2.c
@@ -2362,10 +2362,8 @@ static void program_ecc_addr(unsigned long start_address,
unsigned long end_address;
unsigned long address_increment;
unsigned long mcopt1;
-   char str[] = "ECC generation -";
-   char slash[] = "\\|/-\\|/-";
+   char str[] = "ECC generation: ";
int loop = 0;
-   int loopi = 0;
 
current_address = start_address;
mfsdram(SDRAM_MCOPT1, mcopt1);
@@ -2390,8 +2388,7 @@ static void program_ecc_addr(unsigned long start_address,
current_address += address_increment;
 
if ((loop++ % (2 << 20)) == 0) {
-   putc('\b');
-   putc(slash[loopi++ % 8]);
+   putc('.');
}
}
 
@@ -2571,9 +2568,7 @@ static void DQS_calibration_process(void)
u32 rqfd;
u32 rqfd_start;
u32 rqfd_average;
-   int loopi = 0;
-   char str[] = "Auto calibration -";
-   char slash[] 

Re: [U-Boot] amcc kilauea odd crashes

2008-10-23 Thread Wolfgang Denk
Dear Stefan,

In message <[EMAIL PROTECTED]> you wrote:
> 
> Is this a 600MHz Kilauea? This is a known issue, that the new autocalibration

No, this is a CPU Rev. A board at 400 Mhz.

> code has a problem here. I reported this problem a few weeks ago. AMCC is
> currently working on a fix for this.

Should we not backout the autocalib patches that cause the problem
until a stable working solution is found?

Best regards,

Wolfgang Denk

-- 
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: [EMAIL PROTECTED]
miracle:  an  extremely  outstanding  or  unusual  event,  thing,  or
accomplishment.- Webster's Dictionary
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Re: [U-Boot] [PATCH PPC_4xx V3] Print simple row of dots instead of spinning wheel

2008-10-23 Thread Stefan Roese
Hi Wolfgang,

On Thursday 23 October 2008, Wolfgang Denk wrote:
> Replace the "spinning wheel" eye candy by printing a simple  row  of
> dots. This avoids problems with control charactersin log files etc.
>
> Also, it saves a few bytes.
>
> Signed-off-by: Wolfgang Denk <[EMAIL PROTECTED]>
> ---
> Hey, seems I'm heading for the record of submitting the maximum
> number of patch versions in the shorted time :-(

;)

> This patch version fixes a few typos in the first version, and gets
> rid of a few variables no longer needed because of the changes.
>
>  board/esd/common/cmd_loadpci.c  |6 +-
>  board/esd/pci405/cmd_pci405.c   |6 +-
>  board/esd/pmc440/cmd_pmc440.c   |6 +-

We need the ACK from esd (Matthias) for this esd specific change. He is on 
vacation right now. I suggest that you split this patch so that we can apply 
the ppc4xx specific part directly.

Thanks.

Best regards,
Stefan

=
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HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-0 Fax: +49-8142-66989-80  Email: [EMAIL PROTECTED]
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Re: [U-Boot] amcc kilauea odd crashes

2008-10-23 Thread Stefan Roese
Hi Wolfgang,

On Thursday 23 October 2008, Wolfgang Denk wrote:
> In message <[EMAIL PROTECTED]> you wrote:
> > Is this a 600MHz Kilauea? This is a known issue, that the new
> > autocalibration
>
> No, this is a CPU Rev. A board at 400 Mhz.

Probably with the same DDR2 frequency.

> > code has a problem here. I reported this problem a few weeks ago. AMCC is
> > currently working on a fix for this.
>
> Should we not backout the autocalib patches that cause the problem
> until a stable working solution is found?

Not sure. My hope is that AMCC find a solution quickly. They should receive 
the failing board this week.

And they already did send a "fix" (more a workaround) for this problem:

[PATCH v2] ppc4xx: Fix DDR2 auto calibration on Kilauea 600MHz

which you rejected. So I suggest to wait for a few days.

Victor, Adam, did you already receive my board?

Best regards,
Stefan

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HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-0 Fax: +49-8142-66989-80  Email: [EMAIL PROTECTED]
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Re: [U-Boot] [PATCH PPC_4xx V3] Print simple row of dots instead of spinning wheel

2008-10-23 Thread Wolfgang Denk
Dear Stefan,

In message <[EMAIL PROTECTED]> you wrote:
> 
> We need the ACK from esd (Matthias) for this esd specific change. He is on 
> vacation right now. I suggest that you split this patch so that we can apply 
> the ppc4xx specific part directly.

Let's just wait until he's back from vacation. It seems useful to  me
to keep this in a single commit.

Best regards,

Wolfgang Denk

-- 
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HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: [EMAIL PROTECTED]
I can't understand it. I can't even understand  the  people  who  can
understand it.- Queen Juliana of the Netherlands.
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Re: [U-Boot] amcc kilauea odd crashes

2008-10-23 Thread Wolfgang Denk
Dear Stefan,

In message <[EMAIL PROTECTED]> you wrote:
> 
> > Should we not backout the autocalib patches that cause the problem
> > until a stable working solution is found?
> 
> Not sure. My hope is that AMCC find a solution quickly. They should receive 
> the failing board this week.
> 
> And they already did send a "fix" (more a workaround) for this problem:
> 
> [PATCH v2] ppc4xx: Fix DDR2 auto calibration on Kilauea 600MHz
> 
> which you rejected. So I suggest to wait for a few days.

Well, that was one full month ago, and nothing happened since.1s

I see people running into problems with the current code, so I vote
to back out the culprit until a real fix has been found.

Best regards,

Wolfgang Denk

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HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: [EMAIL PROTECTED]
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of the people some of the time, but You can't fool mom.
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[U-Boot] FIT image documentation

2008-10-23 Thread Bernhard Weirich
Hello,

I'd like to switch to the new FIT image format, but I am at a loss at
how to use it.
Is there a documentation available somewhere or could someone tell me
the steps necessary?

I got as far as compiling a .its and got a .itb file but I do not know
what to do with it, how to append data or load it in u-boot.

Thanks,
Bernhard Weirich


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[U-Boot] IXP43X and Ethernet NPE

2008-10-23 Thread Mirko D.
Hello,

I want to use Uboot on a Gateworks Cambria Board. This board includes an 
IXP430 CPU. Uboot is already running, but I have some problems getting 
Ethernet to work. All the NPE stuff, in Uboot,  is based on IXP400 SW 
Release version 2.0 which doesn't support the IXP43X MCU NPEs. So what 
do you think, should I have to use the IXP400 SW Release 2.4, which 
offer support for IXP43X MCU NPEs? Or is there somethings else I can do?

Thanks!

Best regards
Mirko




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Re: [U-Boot] FIT image documentation

2008-10-23 Thread Bartlomiej Sieka
Bernhard Weirich wrote:
> Hello,
> 
> I'd like to switch to the new FIT image format, but I am at a loss at
> how to use it.
> Is there a documentation available somewhere or could someone tell me
> the steps necessary?

Hello Bernhard,

FIT image format usage is documented in the doc/uImage.FIT/ directory of
U-Boot sources.

Regards,
Bartlomiej Sieka
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Re: [U-Boot] [PATCH 04/10] fdt: Add fdt_sizecell & fdt_addrcell helpers

2008-10-23 Thread Jerry Van Baren
Kumar Gala wrote:
> Add helper functions to return top level #size-cell and #address-cell info
> 
> Signed-off-by: Kumar Gala <[EMAIL PROTECTED]>
> ---
>  include/fdt_support.h |   18 ++
>  1 files changed, 18 insertions(+), 0 deletions(-)
> 
> diff --git a/include/fdt_support.h b/include/fdt_support.h
> index ceaadc2..aa9d86b 100644
> --- a/include/fdt_support.h
> +++ b/include/fdt_support.h
> @@ -28,6 +28,24 @@
>  
>  #include 
>  
> +static inline int fdt_addrcell(void *blob) {
> + const u32 *addrcell = fdt_getprop(blob, 0, "#address-cells", NULL);
> +
> + if (addrcell)
> + return *addrcell;
> + else
> + return 1;
> +}
> +
> +static inline int fdt_sizecell(void *blob) {
> + const u32 *sizecell = fdt_getprop(blob, 0, "#size-cells", NULL);
> +
> + if (sizecell)
> + return *sizecell;
> + else
> + return 1;
> +}
> +
>  int fdt_chosen(void *fdt, int force);
>  int fdt_initrd(void *fdt, ulong initrd_start, ulong initrd_end, int force);
>  void do_fixup_by_path(void *fdt, const char *path, const char *prop,

Hi Kumar,

What about collapsing the two above into a common function?

fdt_addrcell(blob);
becomes
fdt_get_prop_u32(blob, "/", "#address-cells", 1);
and
fdt_sizecell(blob);
becomes
fdt_get_prop_u32(blob, "/", "#size-cells", 1);

WARNING, UNTESTED CODE:
/**
  * fdt_get_prop_u32: Find a node and return it's property or a default
  *
  * @fdt: ptr to device tree
  * @node: path of node
  * @prop: property name
  * @defalt: default value if the property isn't found
  *
  * Convenience function to find a node and return it's property or a
  * default value if it doesn't exist.
  */
u32 fdt_get_prop_u32(void *fdt, const char *node, const char *prop,
 const u32 default)
{
const u32 *addrcell = fdt_getprop(fdt, node, prop, NULL);

if (addrcell)
return *addrcell;
else
return default;
}
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Re: [U-Boot] [PATCH 00/10] 85xx/85xx pci cleanup

2008-10-23 Thread Kumar Gala

On Oct 23, 2008, at 3:35 AM, Wolfgang Denk wrote:

> Dear Kumar Gala,
>
> In message <[EMAIL PROTECTED] 
> > you wrote:
>> This patch series adds the ability to support 64-bit PCI addresses  
>> as well
>> as refactors the fsl_pci_init code and cleans up its users.
>>
>> Finally it adds some help functions that the board code calls to set
>> dma-ranges in device trees.
>>
>> If the particular maintainers could ack the patches that would be  
>> great
>> (Andy, Jon, Jerry).
>
> So who is supposed to apply the patches, then?  Me?

yes :)

I practice Andy can apply them to u-boot-85xx if you ack the first  
patch and Jerry ack's the fdt patches.

- k
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Re: [U-Boot] amcc kilauea odd crashes

2008-10-23 Thread Stefan Roese
Hi Wolfgang,

On Thursday 23 October 2008, Wolfgang Denk wrote:
> > > Should we not backout the autocalib patches that cause the problem
> > > until a stable working solution is found?
> >
> > Not sure. My hope is that AMCC find a solution quickly. They should
> > receive the failing board this week.
> >
> > And they already did send a "fix" (more a workaround) for this problem:
> >
> > [PATCH v2] ppc4xx: Fix DDR2 auto calibration on Kilauea 600MHz
> >
> > which you rejected. So I suggest to wait for a few days.
>
> Well, that was one full month ago, and nothing happened since.1s

That's not correct. One patch got checked in which definitely made the 
situation better:

f8a00dea841d5d75de1f8e8107e90ee1beeddf5f

ppc4xx: Reset and relock memory DLL after SDRAM_CLKTR change

After changing SDRAM_CLKTR phase value rerun the memory preload
initialization sequence (INITPLR) to reset and relock the memory
DLL. Changing the SDRAM_CLKTR memory clock phase coarse timing
adjustment effects the phase relationship of the internal, to the
PPC chip, and external, to the PPC chip, versions of MEMCLK_OUT.

Signed-off-by: Adam Graham <[EMAIL PROTECTED]>
Signed-off-by: Victor Gallardo <[EMAIL PROTECTED]>
Signed-off-by: Stefan Roese <[EMAIL PROTECTED]>

Unfortunately it didn't fix all problems. AMCC already provided another patch 
for testing purposes. Not to the list but to me (and you) directly. Please 
find it attached again. Would be great if Markus could test it on the failing 
Kilauea.

> I see people running into problems with the current code, so I vote
> to back out the culprit until a real fix has been found.

Hmmm, "people" have been running into this problem before too. That we me.

Again, let's please wait at least for Adam and/or Victor to comment on this 
issue. It should only be a few hours until they read their mails.

Best regards,
Stefan

=
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-0 Fax: +49-8142-66989-80  Email: [EMAIL PROTECTED]
=
--- Begin Message ---

Signed-off-by: Adam Graham <[EMAIL PROTECTED]>
---
 cpu/ppc4xx/4xx_ibm_ddr2_autocalib.c |   27 +++
 1 files changed, 27 insertions(+), 0 deletions(-)

diff --git a/cpu/ppc4xx/4xx_ibm_ddr2_autocalib.c 
b/cpu/ppc4xx/4xx_ibm_ddr2_autocalib.c
index 47ab39b..c63315b 100644
--- a/cpu/ppc4xx/4xx_ibm_ddr2_autocalib.c
+++ b/cpu/ppc4xx/4xx_ibm_ddr2_autocalib.c
@@ -174,6 +174,22 @@ static inline void ecc_clear_status_reg(void)
 #endif
 }
 
+#define SDRAM_FCSR_RxMOS   0x8000  /* rank missed oversample */
+#define SDRAM_FCSR_CMOS_MASK   0x0030  /* hit/missed oversample */
+#define SDRAM_FCSR_CMOS_MISSED 0x0010  /* hit/missed oversample */
+
+static inline int check_fcsr_oversample_miss(int membank)
+{
+   u32 fcsr;
+
+   mfsdram(SDRAM_FCSR, fcsr);
+   if (fcsr & (SDRAM_FCSR_RxMOS >> membank))
+   if (fcsr & SDRAM_FCSR_CMOS_MISSED)
+   return 0;   /* don't count this pass */
+
+   return 1;
+}
+
 /*
  * Reset and relock memory DLL after SDRAM_CLKTR change
  */
@@ -783,10 +799,20 @@ static u32 DQS_calibration_methodB(struct ddrautocal *cal)
in_window = 1;
curr_win_min = curr_win_max = rffd;
mfsdram(SDRAM_RDCC, rdcc);  /* record this value */
+
+   if (!(check_fcsr_oversample_miss(bxcr_num)))
+   pass = 0;
} else if (!pass && in_window) {/* end passing window */
in_window = 0;
+   break;  /* exit end of window */
} else if (pass && in_window) { /* within the passing window */
curr_win_max = rffd;
+
+   if (!(check_fcsr_oversample_miss(bxcr_num))) {
+   pass = 0;
+   in_window = 0;
+   break;  /* exit end of window */
+   }
}
 
if (in_window) {
@@ -849,6 +875,7 @@ static u32 DQS_calibration_methodB(struct ddrautocal *cal)
curr_win_min = curr_win_max = rqfd;
} else if (!pass && in_window) {
in_window = 0;
+   break;  /* exit end of window */
} else if (pass && in_window) {
curr_win_max = rqfd;
}
-- 
1.5.5


--- End Message ---
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Re: [U-Boot] [PATCH 04/10] fdt: Add fdt_sizecell & fdt_addrcell helpers

2008-10-23 Thread Kumar Gala

On Oct 23, 2008, at 6:55 AM, Jerry Van Baren wrote:

> Kumar Gala wrote:
>> Add helper functions to return top level #size-cell and #address- 
>> cell info
>> Signed-off-by: Kumar Gala <[EMAIL PROTECTED]>
>> ---
>> include/fdt_support.h |   18 ++
>> 1 files changed, 18 insertions(+), 0 deletions(-)
>> diff --git a/include/fdt_support.h b/include/fdt_support.h
>> index ceaadc2..aa9d86b 100644
>> --- a/include/fdt_support.h
>> +++ b/include/fdt_support.h
>> @@ -28,6 +28,24 @@
>>  #include 
>> +static inline int fdt_addrcell(void *blob) {
>> +const u32 *addrcell = fdt_getprop(blob, 0, "#address-cells", NULL);
>> +
>> +if (addrcell)
>> +return *addrcell;
>> +else
>> +return 1;
>> +}
>> +
>> +static inline int fdt_sizecell(void *blob) {
>> +const u32 *sizecell = fdt_getprop(blob, 0, "#size-cells", NULL);
>> +
>> +if (sizecell)
>> +return *sizecell;
>> +else
>> +return 1;
>> +}
>> +
>> int fdt_chosen(void *fdt, int force);
>> int fdt_initrd(void *fdt, ulong initrd_start, ulong initrd_end, int  
>> force);
>> void do_fixup_by_path(void *fdt, const char *path, const char *prop,
>
> Hi Kumar,
>
> What about collapsing the two above into a common function?
>
>   fdt_addrcell(blob);
> becomes
>   fdt_get_prop_u32(blob, "/", "#address-cells", 1);
> and
>   fdt_sizecell(blob);
> becomes
>   fdt_get_prop_u32(blob, "/", "#size-cells", 1);
>
> WARNING, UNTESTED CODE:
> /**
> * fdt_get_prop_u32: Find a node and return it's property or a default
> *
> * @fdt: ptr to device tree
> * @node: path of node
> * @prop: property name
> * @defalt: default value if the property isn't found
> *
> * Convenience function to find a node and return it's property or a
> * default value if it doesn't exist.
> */
> u32 fdt_get_prop_u32(void *fdt, const char *node, const char *prop,
>const u32 default)
> {
>   const u32 *addrcell = fdt_getprop(fdt, node, prop, NULL);
>
>   if (addrcell)
>   return *addrcell;
>   else
>   return default;
> }

I'd prefer we call it fdt_getprop_u32_default().  If you are good with  
the name I'll change my patchset.

- k
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Re: [U-Boot] [PATCH 04/10] fdt: Add fdt_sizecell & fdt_addrcell helpers

2008-10-23 Thread Jerry Van Baren
Kumar Gala wrote:
> 
> On Oct 23, 2008, at 6:55 AM, Jerry Van Baren wrote:
> 
>> Kumar Gala wrote:
>>> Add helper functions to return top level #size-cell and #address-cell 
>>> info
>>> Signed-off-by: Kumar Gala <[EMAIL PROTECTED]>
>>> ---
>>> include/fdt_support.h |   18 ++
>>> 1 files changed, 18 insertions(+), 0 deletions(-)
>>> diff --git a/include/fdt_support.h b/include/fdt_support.h
>>> index ceaadc2..aa9d86b 100644
>>> --- a/include/fdt_support.h
>>> +++ b/include/fdt_support.h
>>> @@ -28,6 +28,24 @@
>>>  #include 
>>> +static inline int fdt_addrcell(void *blob) {
>>> +const u32 *addrcell = fdt_getprop(blob, 0, "#address-cells", NULL);
>>> +
>>> +if (addrcell)
>>> +return *addrcell;
>>> +else
>>> +return 1;
>>> +}
>>> +
>>> +static inline int fdt_sizecell(void *blob) {
>>> +const u32 *sizecell = fdt_getprop(blob, 0, "#size-cells", NULL);
>>> +
>>> +if (sizecell)
>>> +return *sizecell;
>>> +else
>>> +return 1;
>>> +}
>>> +
>>> int fdt_chosen(void *fdt, int force);
>>> int fdt_initrd(void *fdt, ulong initrd_start, ulong initrd_end, int 
>>> force);
>>> void do_fixup_by_path(void *fdt, const char *path, const char *prop,
>>
>> Hi Kumar,
>>
>> What about collapsing the two above into a common function?
>>
>> fdt_addrcell(blob);
>> becomes
>> fdt_get_prop_u32(blob, "/", "#address-cells", 1);
>> and
>> fdt_sizecell(blob);
>> becomes
>> fdt_get_prop_u32(blob, "/", "#size-cells", 1);
>>
>> WARNING, UNTESTED CODE:
>> /**
>> * fdt_get_prop_u32: Find a node and return it's property or a default
>> *
>> * @fdt: ptr to device tree
>> * @node: path of node
>> * @prop: property name
>> * @defalt: default value if the property isn't found
>> *
>> * Convenience function to find a node and return it's property or a
>> * default value if it doesn't exist.
>> */
>> u32 fdt_get_prop_u32(void *fdt, const char *node, const char *prop,
>>  const u32 default)
>> {
>> const u32 *addrcell = fdt_getprop(fdt, node, prop, NULL);
>>
>> if (addrcell)
>> return *addrcell;
>> else
>> return default;
>> }
> 
> I'd prefer we call it fdt_getprop_u32_default().  If you are good with 
> the name I'll change my patchset.
> 
> - k

That was my second choice.  I figured Dennis Richie would call me up and 
complain the name was too long. ;-)

I'm find with the change.

Acked-by: Gerald Van Baren <[EMAIL PROTECTED]>

Thanks,
gvb
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Re: [U-Boot] IXP43X and Ethernet NPE

2008-10-23 Thread Jean-Christophe PLAGNIOL-VILLARD
On 13:42 Thu 23 Oct , Mirko D. wrote:
> Hello,
> 
> I want to use Uboot on a Gateworks Cambria Board. This board includes an 
> IXP430 CPU. Uboot is already running, but I have some problems getting 
> Ethernet to work. All the NPE stuff, in Uboot,  is based on IXP400 SW 
> Release version 2.0 which doesn't support the IXP43X MCU NPEs. So what 
> do you think, should I have to use the IXP400 SW Release 2.4, which 
> offer support for IXP43X MCU NPEs? Or is there somethings else I can do?
I've plan but not find time to switch to Linux drivers

If you plan to add IXP430 support it will be nice to do it

Best Regards,
J.
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Re: [U-Boot] amcc kilauea odd crashes

2008-10-23 Thread Markus Klotzbücher
On Thu, Oct 23, 2008 at 01:30:08PM +0200, Stefan Roese wrote:
> Hi Wolfgang,
> 
> On Thursday 23 October 2008, Wolfgang Denk wrote:
> > > > Should we not backout the autocalib patches that cause the problem
> > > > until a stable working solution is found?
> > >
> > > Not sure. My hope is that AMCC find a solution quickly. They should
> > > receive the failing board this week.
> > >
> > > And they already did send a "fix" (more a workaround) for this problem:
> > >
> > > [PATCH v2] ppc4xx: Fix DDR2 auto calibration on Kilauea 600MHz
> > >
> > > which you rejected. So I suggest to wait for a few days.
> >
> > Well, that was one full month ago, and nothing happened since.1s
> 
> That's not correct. One patch got checked in which definitely made the 
> situation better:
> 
> f8a00dea841d5d75de1f8e8107e90ee1beeddf5f
> 
> ppc4xx: Reset and relock memory DLL after SDRAM_CLKTR change
> 
> After changing SDRAM_CLKTR phase value rerun the memory preload
> initialization sequence (INITPLR) to reset and relock the memory
> DLL. Changing the SDRAM_CLKTR memory clock phase coarse timing
> adjustment effects the phase relationship of the internal, to the
> PPC chip, and external, to the PPC chip, versions of MEMCLK_OUT.
> 
> Signed-off-by: Adam Graham <[EMAIL PROTECTED]>
> Signed-off-by: Victor Gallardo <[EMAIL PROTECTED]>
> Signed-off-by: Stefan Roese <[EMAIL PROTECTED]>
> 
> Unfortunately it didn't fix all problems. AMCC already provided another patch 
> for testing purposes. Not to the list but to me (and you) directly. Please 
> find it attached again. Would be great if Markus could test it on the failing 
> Kilauea.

I tested it and it's still failing. I dare say the patch makes things
worse. After about 20 hard resets the board didn't reach the u-boot
console a single time.

:-(

Thanks
Markus


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[U-Boot] [PATCH 0/3] iMX31: Add iMX31 support to boots from NAND

2008-10-23 Thread Alan Carvalho de Assis
Hi,

This serie of patches was rebased to adds support to iMX31PDK board to
boot directly from NAND.
Notice these patches don't add support to MTD NAND Flash support to U-Boot
(like reading and saving environment parameters in Flash because MTD NAND Flash
driver still needs further revision).
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[U-Boot] [PATCH 1/3] iMX31: Reducing start.S size to let boot from NAND

2008-10-23 Thread Alan Carvalho de Assis
iMX31 NAND Flash Controller has a 2KB RAM buffer, but the
current start.S file is too much big to let NAND copy routine
to fit in. This patch will reduce the start.S when booting from
NAND Flash.

Signed-off-by: Alan Carvalho de Assis <[EMAIL PROTECTED]>
---
 cpu/arm1136/start.S |   24 ++--
 1 files changed, 22 insertions(+), 2 deletions(-)

diff --git a/cpu/arm1136/start.S b/cpu/arm1136/start.S
index e622338..4f3675d 100644
--- a/cpu/arm1136/start.S
+++ b/cpu/arm1136/start.S
@@ -32,6 +32,15 @@
 #include 
 .globl _start
 _start: b  reset
+#ifdef CONFIG_BOOT_FROM_NAND
+   b   .   /* Undefined Instruction*/
+   b   .   /* Software Interrupt   */
+   b   .   /* Prefetch Abort   */
+   b   .   /* Data Abort   */
+   b   .   /* Reserved */
+   b   .   /* IRQ  */
+   b   .   /* FIQ  */
+#else
 #ifdef CONFIG_ONENAND_IPL
ldr pc, _hang
ldr pc, _hang
@@ -68,6 +77,7 @@ _irq: .word irq
 _fiq:  .word fiq
 _pad:  .word 0x12345678 /* now 16*4=64 */
 #endif /* CONFIG_ONENAND_IPL */
+#endif /* CONFIG_BOOT_FROM_NAND */
 .global _end_vect
 _end_vect:

@@ -151,6 +161,7 @@ next:
bl  cpu_init_crit
 #endif

+_cstartup:
 #ifndef CONFIG_SKIP_RELOCATE_UBOOT
 relocate:  /* relocate U-Boot to RAM   */
adr r0, _start  /* r0 <- current position of code   */
@@ -239,12 +250,18 @@ cpu_init_crit:
 * Jump to board specific initialization... The Mask ROM will have
already initialized
 * basic memory.  Go here to bump up clock rate and handle wake up 
conditions.
 */
+#ifdef CONFIG_BOOT_FROM_NAND
+   ldr sp, =CFG_INTERNAL_SRAM_STACK/* Initial stack point in the 
SRAM  */
+   ldr r0, =_cstartup  /* load the return address  */
+   mov lr, r0  /* set the return address after remap   */
+   b   lowlevel_init   /* relative branch enables remap*/
+#endif
mov ip, lr  /* persevere link reg across call */
bl  lowlevel_init   /* go setup pll,mux,memory */
mov lr, ip  /* restore link */
mov pc, lr  /* back to my caller */

-#ifndef CONFIG_ONENAND_IPL
+#if !defined(CONFIG_ONENAND_IPL) && !defined(CONFIG_BOOT_FROM_NAND)
 /*
  *
  *
@@ -357,11 +374,12 @@ cpu_init_crit:
.macro get_fiq_stack@ setup FIQ stack
ldr sp, FIQ_STACK_START
.endm
-#endif /* CONFIG_ONENAND_IPL */
+#endif /* CONFIG_ONENAND_IPL/CONFIG_BOOT_FROM_NAND */

 /*
  * exception handlers
  */
+#ifndef CONFIG_BOOT_FROM_NAND
 #ifdef CONFIG_ONENAND_IPL
.align  5
 do_hang:
@@ -436,3 +454,5 @@ arm1136_cache_flush:
mcr p15, 0, r1, c7, c5, 0   @ invalidate I cache
mov pc, lr  @ back to caller
 #endif /* CONFIG_ONENAND_IPL */
+#endif /* CONFIG_BOOT_FROM_NAND */
+
-- 
1.5.4.3
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[U-Boot] [PATCH 2/3] iMX31: Add support to copy NAND Flash code to RAM

2008-10-23 Thread Alan Carvalho de Assis
This code is executed from internal 2KB NAND Flash Controller RAM buffer
and will copy the remaining U-Boot code from NAND Flash verifying its
bad blocks (case it exists).

Signed-off-by: Alan Carvalho de Assis <[EMAIL PROTECTED]>
---
 cpu/arm1136/mx31/Makefile |2 +
 cpu/arm1136/mx31/nand_copy.S  |  263 +
 include/asm-arm/arch-mx31/mx31-regs.h |   69 +
 3 files changed, 334 insertions(+), 0 deletions(-)
 create mode 100644 cpu/arm1136/mx31/nand_copy.S

diff --git a/cpu/arm1136/mx31/Makefile b/cpu/arm1136/mx31/Makefile
index b648ffd..0490706 100644
--- a/cpu/arm1136/mx31/Makefile
+++ b/cpu/arm1136/mx31/Makefile
@@ -26,7 +26,9 @@ include $(TOPDIR)/config.mk
 LIB= $(obj)lib$(SOC).a

 COBJS  = interrupts.o serial.o generic.o
+SOBJS-$(CONFIG_BOOT_FROM_NAND) = nand_copy.o

+SOBJS  := $(SOBJS-y)
 SRCS   := $(SOBJS:.o=.S) $(COBJS:.o=.c)
 OBJS   := $(addprefix $(obj),$(SOBJS) $(COBJS))

diff --git a/cpu/arm1136/mx31/nand_copy.S b/cpu/arm1136/mx31/nand_copy.S
new file mode 100644
index 000..7a2460c
--- /dev/null
+++ b/cpu/arm1136/mx31/nand_copy.S
@@ -0,0 +1,263 @@
+/*
+ * Copyright (C) 2008 Freescale Semiconductor, Inc.
+ *
+ * Alan Carvalho de Assis <[EMAIL PROTECTED]>
+ * based on iMX31PDK RedBoot_200814 code.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include 
+#include 
+
+.macro do_addr_input
+   and r3, r3, #0xFF
+   strhr3, [r12, #NFC_FLASH_ADDR_OFF]
+   mov r3, #NAND_FLASH_CONFIG2_FADD_EN
+   strhr3, [r12, #NFC_CONFIG2_OFF]
+   bl  do_wait_op_done
+.endm   /* do_addr_input */
+
+do_wait_op_done:
+1: ldrhr3, [r12, #NFC_CONFIG2_OFF]
+   andsr3, r3, #NAND_FLASH_CONFIG2_INT_DONE
+   beq 1b
+   bx  lr
+
+nfc_data_output:
+   mov r3, #(NAND_FLASH_CONFIG1_INT_MSK | NAND_FLASH_CONFIG1_ECC_EN)
+   strhr3, [r12, #NFC_CONFIG1_OFF]
+   strhr8, [r12, #NFC_BUF_ADDR_OFF]
+   mov r3, #FDO_PAGE_SPARE_VAL
+   strhr3, [r12, #NFC_CONFIG2_OFF]
+   bx  lr
+
+.globl nand_copy
+nand_copy:
+   /* Copy image from flash to SDRAM first */
+   mov r0, #NFC_BASE_ADDR
+   add r2, r0, #0x800  /* 2K window */
+   ldr r1, MXC_UBOOT_ROM_START
+
+1: ldmia   r0!, {r3-r10}
+   stmia   r1!, {r3-r10}
+   cmp r0, r2
+   blo 1b
+   /* Jump to SDRAM */
+   ldr r1, =0x0FFF
+   and r0, pc, r1 /* offset of pc */
+   ldr r1, MXC_UBOOT_ROM_START
+   add r1, r1, #0x10
+   add pc, r0, r1
+   nop
+   nop
+   nop
+   nop
+
+nand_copy_main:
+   /* Check if x16/2kb page */
+   ldr r7, =CCM_BASE
+   ldr r7, [r7, #0xC]
+   andsr7, r7, #(1 << 30)
+
+   mov r0, #NAND_FLASH_BOOT
+   ldr r1, =AVIC_VECTOR0
+   str r0, [r1]
+   mov r0, #MXCFIS_NAND
+   ldr r1, =AVIC_VECTOR1
+   str r0, [r1]
+
+   mov r0, #NFC_BASE_ADDR /* r0: nfc base. Reloaded after each page 
copying */
+   mov r1, #0x800   /* r1: starting flash addr to be copied.
Updated constantly */
+   add r2, r0, #0x800   /* r2: end of 3rd RAM buf. Doesn't change */
+   addeq   r2, r0, #0x200   /* r2: end of 1st RAM buf. Doesn't change
(only set for small page NAND) */
+   add r12, r0, #0xE00  /* r12: NFC register base. Doesn't change */
+   ldr r11, MXC_UBOOT_ROM_START
+   add r13, r11, #0x4 /* r13: end of SDRAM address for copying.
Doesn't change */
+   add r11, r11, r1 /* r11: starting SDRAM address for copying.
Updated constantly */
+
+   /* unlock internal buffer */
+   mov r3, #0x2
+   strhr3, [r12, #0xA]
+
+nfc_read_page:
+   mov r3, #0x0
+   strhr3, [r12, #NFC_FLASH_CMD_OFF]
+   mov r3, #NAND_FLASH_CONFIG2_FCMD_EN
+   strhr3, [r12, #NFC_CONFIG2_OFF]
+   bl  do_wait_op_done
+
+   /* Check if x16/2kb page */
+   ldr r7, =CCM_BASE
+   ldr r7, [r7, #0xC]
+   andsr7, r7, #(1 << 30)
+   bne nfc_addr_ops_2kb
+
+   /* 1st addr cycle */
+   mov r3, r1
+   do_addr_input
+   /* 1st addr cycle */
+   mov r3, r1, lsr #9
+   do_addr_input
+   /* 1st add

[U-Boot] [PATCH 3/3] iMX31: Add support to iMX31PDK board boots from NAND Flash

2008-10-23 Thread Alan Carvalho de Assis
This patch adds support to iMX31PDK board to boot directly from NAND
Flash. In order to it works the previous patches (which reduces start.S
size and copy NAND code to RAM) need be applied first.

Signed-off-by: Alan Carvalho de Assis <[EMAIL PROTECTED]>
---
 board/freescale/mx31pdk/lowlevel_init.S |   95 +-
 board/freescale/mx31pdk/u-boot.lds  |3 +
 include/configs/mx31pdk.h   |   15 +++--
 3 files changed, 104 insertions(+), 9 deletions(-)

diff --git a/board/freescale/mx31pdk/lowlevel_init.S
b/board/freescale/mx31pdk/lowlevel_init.S
index f368d10..58f6d3d 100644
--- a/board/freescale/mx31pdk/lowlevel_init.S
+++ b/board/freescale/mx31pdk/lowlevel_init.S
@@ -20,11 +20,98 @@
  * MA 02111-1307 USA
  */

-/*
- * This is just to keep the linker happy.
- */
+#include 
+
+.macro REG reg, val
+   ldr r2, =\reg
+   ldr r3, =\val
+   str r3, [r2]
+.endm
+
+.macro REG8 reg, val
+   ldr r2, =\reg
+   ldr r3, =\val
+   strb r3, [r2]
+.endm
+
+.macro DELAY loops
+   ldr r2, =\loops
+1:
+   subsr2, r2, #1
+   nop
+   bcs 1b
+.endm

 .globl lowlevel_init
 lowlevel_init:
-   mov pc, lr
+   /* Store return address on the stack since lr is re-used in this file */
+   /* and all other registers are re-used as well */
+   str lr, [sp]
+
+   /* Also setup the Peripheral Port Remap register inside the core */
+   ldr r0, =ARM_PPMRR  /* start from AIPS 2GB region */
+   mcr p15, 0, r0, c15, c2, 4
+
+   REG IPU_CONF, IPU_CONF_DI_EN
+   REG CCM_CCMR, 0x074B0BF5
+
+   DELAY 0x4
+
+   REG CCM_CCMR, 0x074B0BF5 | CCMR_MPE
+   REG CCM_CCMR, (0x074B0BF5 | CCMR_MPE) & ~CCMR_MDS
+
+   /* Set up clock to 532MHz */
+   REG CCM_PDR0, 0xFF871D58
+   REG CCM_MPCTL, 0x0033280C
+   REG CCM_SPCTL, PLL_PD(1) | PLL_MFD(4) | PLL_MFI(12) | PLL_MFN(1)
+
+   /* Set up CPLD on CS5 */
+   REG CSCR_U(5), 0xD843
+   REG CSCR_L(5), 0x22252521
+   REG CSCR_A(5), 0x0A00
+
+   /* Set up MX31 DDR Memory Controller */
+   REG 0x43FAC26C, 0 /* SDCLK */
+   REG 0x43FAC270, 0 /* CAS */
+   REG 0x43FAC274, 0 /* RAS */
+   REG 0x43FAC27C, 0x1000 /* CS2   CSD0) */
+   REG 0x43FAC284, 0 /* DQM3 */
+   REG 0x43FAC288, 0 /* DQM2, DQM1, DQM0, SD31-SD0, A25-A0, MA10   
0x288..0x2DC) */
+   REG 0x43FAC28C, 0
+   REG 0x43FAC290, 0
+   REG 0x43FAC294, 0
+   REG 0x43FAC298, 0
+   REG 0x43FAC29C, 0
+   REG 0x43FAC2A0, 0
+   REG 0x43FAC2A4, 0
+   REG 0x43FAC2A8, 0
+   REG 0x43FAC2AC, 0
+   REG 0x43FAC2B0, 0
+   REG 0x43FAC2B4, 0
+   REG 0x43FAC2B8, 0
+   REG 0x43FAC2BC, 0
+   REG 0x43FAC2C0, 0
+   REG 0x43FAC2C4, 0
+   REG 0x43FAC2C8, 0
+   REG 0x43FAC2CC, 0
+   REG 0x43FAC2D0, 0
+   REG 0x43FAC2D4, 0
+   REG 0x43FAC2D8, 0
+   REG 0x43FAC2DC, 0
+   REG 0xB8001010, 0x0004
+   REG 0xB8001004, 0x006ac73a
+   REG 0xB8001000, 0x9210
+   REG 0x8f00, 0x12344321
+   REG 0xB8001000, 0xa210
+   REG 0x8000, 0x12344321
+   REG 0x8000, 0x12344321
+   REG 0xB8001000, 0xb210
+   REG80x8033, 0xda
+   REG80x8100, 0xff
+   REG 0xB8001000, 0x82226080
+   REG 0x8000, 0xDEADBEEF
+   REG 0xB8001010, 0x000c
+
+   /* Copy from NAND to RAM */
+   b nand_copy

diff --git a/board/freescale/mx31pdk/u-boot.lds
b/board/freescale/mx31pdk/u-boot.lds
index 04a8f77..1cfa3ca 100644
--- a/board/freescale/mx31pdk/u-boot.lds
+++ b/board/freescale/mx31pdk/u-boot.lds
@@ -35,6 +35,9 @@ SECTIONS
.text  :
{
cpu/arm1136/start.o (.text)
+   board/freescale/mx31pdk/lowlevel_init.o (.text)
+   cpu/arm1136/mx31/nand_copy.o(.text)
+   . = 2K; /* lowlevel NAND needs to fit in 2KB of NFC buffer */
*(.text)
}

diff --git a/include/configs/mx31pdk.h b/include/configs/mx31pdk.h
index 5752856..183b0f3 100644
--- a/include/configs/mx31pdk.h
+++ b/include/configs/mx31pdk.h
@@ -38,6 +38,9 @@
 #define CONFIG_MX31_HCLK_FREQ  2600
 #define CONFIG_MX31_CLK32  32768

+/* We are booting from NAND. Used to shrink start.S */
+#define CONFIG_BOOT_FROM_NAND  1
+
 #define CONFIG_DISPLAY_CPUINFO
 #define CONFIG_DISPLAY_BOARDINFO

@@ -45,11 +48,6 @@
 #define CONFIG_SETUP_MEMORY_TAGS   1
 #define CONFIG_INITRD_TAG  1

-/* No support for NAND boot for i.MX31 PDK yet, so we rely on some other
- * program to initialize the SDRAM.
- */
-#define CONFIG_SKIP_LOWLEVEL_INIT
-
 /*
  * Size of malloc() pool
  */
@@ -136,6 +134,13 @@
 #define CONFIG_CMDLINE_EDITING 1

 /*---

Re: [U-Boot] [PATCH 09/10] AVR32: CPU support for AT32UC3A0xxx CPUs

2008-10-23 Thread Haavard Skinnemoen
"Ben Warren" <[EMAIL PROTECTED]> wrote:
> > Oh. I was kind of planning to apply this to the avr32 tree after people
> > has had some time to look at it.
> >
> > But thanks for taking the two net patches.  
> 
> 
> Git should figure this out right?  If not, I can back them off and add a
> SOB.

I don't think so if we apply the patches independently. If I pull your
tree, it will work, but I'm not sure if I want your whole testing
branch in my avr32 tree :-)

Haavard
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Re: [U-Boot] amcc kilauea odd crashes

2008-10-23 Thread Stefan Roese
On Thursday 23 October 2008, Markus Klotzbücher wrote:
> > Unfortunately it didn't fix all problems. AMCC already provided another
> > patch for testing purposes. Not to the list but to me (and you) directly.
> > Please find it attached again. Would be great if Markus could test it on
> > the failing Kilauea.
>
> I tested it and it's still failing. I dare say the patch makes things 
> worse. After about 20 hard resets the board didn't reach the u-boot
> console a single time.
>
> :-(

Too bad. Thanks for testing though.

Adam & Victor, any ideas? If you don't see a "quick" solution, please provide 
a temporary fix for this problem.

Thanks.

Best regards,
Stefan

=
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-0 Fax: +49-8142-66989-80  Email: [EMAIL PROTECTED]
=
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[U-Boot] [PATCH v2 04/10] fdt: Add fdt_getprop_u32_default helpers

2008-10-23 Thread Kumar Gala
Add helper functions to return find a node and return it's property
or a default value.

Signed-off-by: Kumar Gala <[EMAIL PROTECTED]>
---
 common/fdt_support.c  |   27 +++
 include/fdt_support.h |2 ++
 2 files changed, 29 insertions(+), 0 deletions(-)

diff --git a/common/fdt_support.c b/common/fdt_support.c
index 8ceeb0f..f430777 100644
--- a/common/fdt_support.c
+++ b/common/fdt_support.c
@@ -35,6 +35,33 @@
  */
 DECLARE_GLOBAL_DATA_PTR;
 
+/**
+ * fdt_getprop_u32_default - Find a node and return it's property or a default
+ *
+ * @fdt: ptr to device tree
+ * @path: path of node
+ * @prop: property name
+ * @dflt: default value if the property isn't found
+ *
+ * Convenience function to find a node and return it's property or a
+ * default value if it doesn't exist.
+ */
+u32 fdt_getprop_u32_default(void *fdt, const char *path, const char *prop,
+   const u32 dflt)
+{
+   const u32 *val;
+   int off;
+
+   off = fdt_path_offset(fdt, path);
+   if (off < 0)
+   return dflt;
+
+   val = fdt_getprop(fdt, off, prop, NULL);
+   if (val)
+   return *val;
+   else
+   return dflt;
+}
 
 /**
  * fdt_find_and_setprop: Find a node and set it's property
diff --git a/include/fdt_support.h b/include/fdt_support.h
index ceaadc2..816c9d0 100644
--- a/include/fdt_support.h
+++ b/include/fdt_support.h
@@ -28,6 +28,8 @@
 
 #include 
 
+u32 fdt_getprop_u32_default(void *fdt, const char *path, const char *prop,
+   const u32 dflt);
 int fdt_chosen(void *fdt, int force);
 int fdt_initrd(void *fdt, ulong initrd_start, ulong initrd_end, int force);
 void do_fixup_by_path(void *fdt, const char *path, const char *prop,
-- 
1.5.5.1

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[U-Boot] [PATCH v2 05/10] fdt: Added helper to set PCI dma-ranges property

2008-10-23 Thread Kumar Gala
Added fdt_pci_dma_ranges() that parses the pci_region info from the
struct pci_controller and populates the dma-ranges based on it.

The max # of windws/dma-ranges we support is 3 since on embedded
PowerPC based systems this is the max number of windows.

Signed-off-by: Kumar Gala <[EMAIL PROTECTED]>
---

move to using fdt_getprop_u32_default

- k

 common/fdt_support.c  |   69 +
 include/fdt_support.h |5 +++
 2 files changed, 74 insertions(+), 0 deletions(-)

diff --git a/common/fdt_support.c b/common/fdt_support.c
index f430777..d483d66 100644
--- a/common/fdt_support.c
+++ b/common/fdt_support.c
@@ -620,3 +620,72 @@ int fdt_resize(void *blob)
 
return actualsize;
 }
+
+#ifdef CONFIG_PCI
+#define CONFIG_SYS_PCI_NR_INBOUND_WIN 3
+
+#define FDT_PCI_PREFETCH   (0x4000)
+#define FDT_PCI_MEM32  (0x0200)
+#define FDT_PCI_IO (0x0100)
+#define FDT_PCI_MEM64  (0x0300)
+
+int fdt_pci_dma_ranges(void *blob, int phb_off, struct pci_controller *hose) {
+
+   int addrcell, sizecell, len, r;
+   u32 *dma_range;
+   /* sized based on pci addr cells, size-cells, & address-cells */
+   u32 dma_ranges[(3 + 2 + 2) * CONFIG_SYS_PCI_NR_INBOUND_WIN];
+
+   addrcell = fdt_getprop_u32_default(blob, "/", "#address-cells", 1);
+   sizecell = fdt_getprop_u32_default(blob, "/", "#size-cells", 1);
+
+   dma_range = &dma_ranges[0];
+   for (r = 0; r < hose->region_count; r++) {
+   u64 bus_start, phys_start, size;
+
+   /* skip if !PCI_REGION_MEMORY */
+   if (!(hose->regions[r].flags & PCI_REGION_MEMORY))
+   continue;
+
+   bus_start = (u64)hose->regions[r].bus_start;
+   phys_start = (u64)hose->regions[r].phys_start;
+   size = (u64)hose->regions[r].size;
+
+   dma_range[0] = 0;
+   if (size > 0x1ull)
+   dma_range[0] |= FDT_PCI_MEM64;
+   else
+   dma_range[0] |= FDT_PCI_MEM32;
+   if (hose->regions[r].flags & PCI_REGION_PREFETCH)
+   dma_range[0] |= FDT_PCI_PREFETCH;
+#ifdef CONFIG_SYS_PCI_64BIT
+   dma_range[1] = bus_start >> 32;
+#else
+   dma_range[1] = 0;
+#endif
+   dma_range[2] = bus_start & 0x;
+
+   if (addrcell == 2) {
+   dma_range[3] = phys_start >> 32;
+   dma_range[4] = phys_start & 0x;
+   } else {
+   dma_range[3] = phys_start & 0x;
+   }
+
+   if (sizecell == 2) {
+   dma_range[3 + addrcell + 0] = size >> 32;
+   dma_range[3 + addrcell + 1] = size & 0x;
+   } else {
+   dma_range[3 + addrcell + 0] = size & 0x;
+   }
+
+   dma_range += (3 + addrcell + sizecell);
+   }
+
+   len = dma_range - &dma_ranges[0];
+   if (len)
+   fdt_setprop(blob, phb_off, "dma-ranges", &dma_ranges[0], len*4);
+
+   return 0;
+}
+#endif
diff --git a/include/fdt_support.h b/include/fdt_support.h
index 816c9d0..6062df9 100644
--- a/include/fdt_support.h
+++ b/include/fdt_support.h
@@ -65,6 +65,11 @@ void fdt_fixup_crypto_node(void *blob, int sec_rev);
 static inline void fdt_fixup_crypto_node(void *blob, int sec_rev) {}
 #endif
 
+#ifdef CONFIG_PCI
+#include 
+int fdt_pci_dma_ranges(void *blob, int phb_off, struct pci_controller *hose);
+#endif
+
 #ifdef CONFIG_OF_BOARD_SETUP
 void ft_board_setup(void *blob, bd_t *bd);
 void ft_cpu_setup(void *blob, bd_t *bd);
-- 
1.5.5.1

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Re: [U-Boot] [PATCH 04/10] fdt: Add fdt_sizecell & fdt_addrcell helpers

2008-10-23 Thread Kumar Gala

>>>
>>> Hi Kumar,
>>>
>>> What about collapsing the two above into a common function?
>>>
>>>fdt_addrcell(blob);
>>> becomes
>>>fdt_get_prop_u32(blob, "/", "#address-cells", 1);
>>> and
>>>fdt_sizecell(blob);
>>> becomes
>>>fdt_get_prop_u32(blob, "/", "#size-cells", 1);
>>>
>>> WARNING, UNTESTED CODE:
>>> /**
>>> * fdt_get_prop_u32: Find a node and return it's property or a  
>>> default
>>> *
>>> * @fdt: ptr to device tree
>>> * @node: path of node
>>> * @prop: property name
>>> * @defalt: default value if the property isn't found
>>> *
>>> * Convenience function to find a node and return it's property or a
>>> * default value if it doesn't exist.
>>> */
>>> u32 fdt_get_prop_u32(void *fdt, const char *node, const char *prop,
>>> const u32 default)
>>> {
>>>const u32 *addrcell = fdt_getprop(fdt, node, prop, NULL);
>>>
>>>if (addrcell)
>>>return *addrcell;
>>>else
>>>return default;
>>> }
>> I'd prefer we call it fdt_getprop_u32_default().  If you are good  
>> with the name I'll change my patchset.
>> - k
>
> That was my second choice.  I figured Dennis Richie would call me up  
> and complain the name was too long. ;-)
>
> I'm find with the change.
>
> Acked-by: Gerald Van Baren <[EMAIL PROTECTED]>
>
> Thanks,
> gvb

sent two new patches for you to ack.

- k
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Re: [U-Boot] [PATCH v2 04/10] fdt: Add fdt_getprop_u32_default helpers

2008-10-23 Thread Jerry Van Baren
Kumar Gala wrote:
> Add helper functions to return find a node and return it's property
> or a default value.
> 
> Signed-off-by: Kumar Gala <[EMAIL PROTECTED]>
> ---
>  common/fdt_support.c  |   27 +++
>  include/fdt_support.h |2 ++
>  2 files changed, 29 insertions(+), 0 deletions(-)
> 
> diff --git a/common/fdt_support.c b/common/fdt_support.c
> index 8ceeb0f..f430777 100644
> --- a/common/fdt_support.c
> +++ b/common/fdt_support.c
> @@ -35,6 +35,33 @@
>   */
>  DECLARE_GLOBAL_DATA_PTR;
>  
> +/**
> + * fdt_getprop_u32_default - Find a node and return it's property or a 
> default
> + *
> + * @fdt: ptr to device tree
> + * @path: path of node
> + * @prop: property name
> + * @dflt: default value if the property isn't found
> + *
> + * Convenience function to find a node and return it's property or a
> + * default value if it doesn't exist.
> + */
> +u32 fdt_getprop_u32_default(void *fdt, const char *path, const char *prop,
> + const u32 dflt)
> +{
> + const u32 *val;
> + int off;
> +
> + off = fdt_path_offset(fdt, path);
> + if (off < 0)
> + return dflt;
> +
> + val = fdt_getprop(fdt, off, prop, NULL);
> + if (val)
> + return *val;
> + else
> + return dflt;
> +}
>  
>  /**
>   * fdt_find_and_setprop: Find a node and set it's property
> diff --git a/include/fdt_support.h b/include/fdt_support.h
> index ceaadc2..816c9d0 100644
> --- a/include/fdt_support.h
> +++ b/include/fdt_support.h
> @@ -28,6 +28,8 @@
>  
>  #include 
>  
> +u32 fdt_getprop_u32_default(void *fdt, const char *path, const char *prop,
> + const u32 dflt);
>  int fdt_chosen(void *fdt, int force);
>  int fdt_initrd(void *fdt, ulong initrd_start, ulong initrd_end, int force);
>  void do_fixup_by_path(void *fdt, const char *path, const char *prop,

Acked-by: Gerald Van Baren <[EMAIL PROTECTED]>

Thanks!
gvb

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[U-Boot] [PATCH] drivers/qe/uec_phy.c: Added PHY-less (fixed PHY) driver.

2008-10-23 Thread Richard Retanubun
Copied over the fixed PHY driver as used in pp4xx/4xx_enet.c.
This adds support for PHY-less MAC connections to the UEC.

Signed-off-by: Richard Retanubun <[EMAIL PROTECTED]>
---
 drivers/qe/uec_phy.c |   79 ++
 1 files changed, 79 insertions(+), 0 deletions(-)

diff --git a/drivers/qe/uec_phy.c b/drivers/qe/uec_phy.c
index 2243d3b..829f082 100644
--- a/drivers/qe/uec_phy.c
+++ b/drivers/qe/uec_phy.c
@@ -44,6 +44,54 @@
 #define ugphy_vdbg(ugeth, fmt, args...) do { } while (0)
 #endif /* UEC_VERBOSE_DEBUG */
 
+/*+
+ * Fixed PHY (PHY-less) support for Ethernet Ports.
+ *
+ * Copied from cpu/ppc4xx/4xx_enet.c
+ **/
+
+/*
+ * Some boards do not have a PHY for each ethernet port. These ports
+ * are known as Fixed PHY (or PHY-less) ports. For such ports, set
+ * the appropriate CONFIG_PHY_ADDR equal to CONFIG_FIXED_PHY and
+ * then define CONFIG_SYS_FIXED_PHY_PORTS to define what the speed and
+ * duplex should be for these ports in the board configuration
+ * file.
+ *
+ * For Example:
+ * #define CONFIG_FIXED_PHY   0x
+ *
+ * #define CONFIG_PHY_ADDRCONFIG_FIXED_PHY
+ * #define CONFIG_PHY1_ADDR   1
+ * #define CONFIG_PHY2_ADDR   CONFIG_FIXED_PHY
+ * #define CONFIG_PHY3_ADDR   3
+ *
+ * #define CONFIG_SYS_FIXED_PHY_PORT(devnum,speed,duplex) \
+ * {devnum, speed, duplex},
+ *
+ * #define CONFIG_SYS_FIXED_PHY_PORTS \
+ * CONFIG_SYS_FIXED_PHY_PORT(0,SPEED_100,DUPLEX_FULL) \
+ * CONFIG_SYS_FIXED_PHY_PORT(2,SPEED_100,DUPLEX_HALF)
+ */
+
+#ifndef CONFIG_FIXED_PHY
+#define CONFIG_FIXED_PHY   0x /* Fixed PHY (PHY-less) */
+#endif
+
+#ifndef CONFIG_SYS_FIXED_PHY_PORTS
+#define CONFIG_SYS_FIXED_PHY_PORTS /* default is an empty array */
+#endif
+
+struct fixed_phy_port {
+   unsigned int devnum;/* ethernet port */
+   unsigned int speed; /* specified speed 10,100 or 1000 */
+   unsigned int duplex;/* specified duplex FULL or HALF */
+};
+
+static const struct fixed_phy_port fixed_phy_port[] = {
+   CONFIG_SYS_FIXED_PHY_PORTS /* defined in board configuration file */
+};
+
 static void config_genmii_advert (struct uec_mii_info *mii_info);
 static void genmii_setup_forced (struct uec_mii_info *mii_info);
 static void genmii_restart_aneg (struct uec_mii_info *mii_info);
@@ -533,6 +581,28 @@ static void dm9161_close (struct uec_mii_info *mii_info)
 {
 }
 
+static int fixed_phy_aneg (struct uec_mii_info *mii_info)
+{
+   mii_info->autoneg = 0; /* Turn off auto negotiation for fixed phy */
+   return 0;
+}
+
+static int fixed_phy_read_status (struct uec_mii_info *mii_info)
+{
+   int i = 0;
+
+   for (i = 0; i < ARRAY_SIZE(fixed_phy_port); i++) {
+   if (mii_info->mii_id == fixed_phy_port[i].devnum) {
+   mii_info->speed = fixed_phy_port[i].speed;
+   mii_info->duplex = fixed_phy_port[i].duplex;
+   mii_info->link = 1; /* Link is always UP */
+   mii_info->pause = 0;
+   break;
+   }
+   }
+   return 0;
+}
+
 static struct phy_info phy_info_dm9161 = {
.phy_id = 0x0181b880,
.phy_id_mask = 0x0ff0,
@@ -577,6 +647,14 @@ static struct phy_info phy_info_bcm5481 = {
.init = bcm_init,
 };
 
+static struct phy_info phy_info_fixedphy = {
+   .phy_id = CONFIG_FIXED_PHY,
+   .phy_id_mask = CONFIG_FIXED_PHY,
+   .name = "Fixed PHY",
+   .config_aneg = fixed_phy_aneg,
+   .read_status = fixed_phy_read_status,
+};
+
 static struct phy_info phy_info_genmii = {
.phy_id = 0x,
.phy_id_mask = 0x,
@@ -591,6 +669,7 @@ static struct phy_info *phy_info[] = {
&phy_info_dm9161a,
&phy_info_marvell,
&phy_info_bcm5481,
+   &phy_info_fixedphy,
&phy_info_genmii,
NULL
 };
-- 
1.5.5.GIT







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Re: [U-Boot] [PATCH v2 05/10] fdt: Added helper to set PCI dma-ranges property

2008-10-23 Thread Jerry Van Baren
Kumar Gala wrote:
> Added fdt_pci_dma_ranges() that parses the pci_region info from the
> struct pci_controller and populates the dma-ranges based on it.
> 
> The max # of windws/dma-ranges we support is 3 since on embedded
> PowerPC based systems this is the max number of windows.
> 
> Signed-off-by: Kumar Gala <[EMAIL PROTECTED]>
> ---
> 
> move to using fdt_getprop_u32_default
> 
> - k
> 
>  common/fdt_support.c  |   69 
> +
>  include/fdt_support.h |5 +++
>  2 files changed, 74 insertions(+), 0 deletions(-)
> 
> diff --git a/common/fdt_support.c b/common/fdt_support.c
> index f430777..d483d66 100644
> --- a/common/fdt_support.c
> +++ b/common/fdt_support.c

[snip]

> diff --git a/include/fdt_support.h b/include/fdt_support.h
> index 816c9d0..6062df9 100644
> --- a/include/fdt_support.h
> +++ b/include/fdt_support.h

[snip]

I'm not really authoritative on the PCI changes, but it looks good to me 
so I'm OK with adding this to fdt_support.[ch].

Acked-by: Gerald Van Baren <[EMAIL PROTECTED]>

Thanks,
gvb

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[U-Boot] [PATCH] 85xx: remove unused config definition

2008-10-23 Thread Dave Liu
Signed-off-by: Dave Liu <[EMAIL PROTECTED]>
---
 include/configs/MPC8536DS.h |8 
 include/configs/MPC8572DS.h |   10 --
 2 files changed, 0 insertions(+), 18 deletions(-)

diff --git a/include/configs/MPC8536DS.h b/include/configs/MPC8536DS.h
index 38be10d..dbddb63 100644
--- a/include/configs/MPC8536DS.h
+++ b/include/configs/MPC8536DS.h
@@ -134,14 +134,6 @@ extern unsigned long get_board_ddr_clk(unsigned long 
dummy);
 #define CONFIG_SYS_DDR_ERR_DIS 0x
 #define CONFIG_SYS_DDR_SBE 0x0001
 
-/* FIXME: Not used in fixed_sdram function */
-#define CONFIG_SYS_DDR_MODE0x0022
-#define CONFIG_SYS_DDR_CS1_BNDS0x
-#define CONFIG_SYS_DDR_CS2_BNDS0x0FFF  /* Not done */
-#define CONFIG_SYS_DDR_CS3_BNDS0x0FFF  /* Not done */
-#define CONFIG_SYS_DDR_CS4_BNDS0x0FFF  /* Not done */
-#define CONFIG_SYS_DDR_CS5_BNDS0x0FFF  /* Not done */
-
 /* Make sure required options are set */
 #ifndef CONFIG_SPD_EEPROM
 #error ("CONFIG_SPD_EEPROM is required")
diff --git a/include/configs/MPC8572DS.h b/include/configs/MPC8572DS.h
index 5688589..66e07eb 100644
--- a/include/configs/MPC8572DS.h
+++ b/include/configs/MPC8572DS.h
@@ -135,16 +135,6 @@ extern unsigned long get_board_ddr_clk(unsigned long 
dummy);
 #define CONFIG_SYS_DDR_SBE 0x0001
 
 /*
- * FIXME: Not used in fixed_sdram function
- */
-#define CONFIG_SYS_DDR_MODE0x0022
-#define CONFIG_SYS_DDR_CS1_BNDS0x
-#define CONFIG_SYS_DDR_CS2_BNDS0x0FFF  /* Not done */
-#define CONFIG_SYS_DDR_CS3_BNDS0x0FFF  /* Not done */
-#define CONFIG_SYS_DDR_CS4_BNDS0x0FFF  /* Not done */
-#define CONFIG_SYS_DDR_CS5_BNDS0x0FFF  /* Not done */
-
-/*
  * Make sure required options are set
  */
 #ifndef CONFIG_SPD_EEPROM
-- 
1.5.4

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[U-Boot] [PATCH] 85xx: Fix the incorrect register used for DDR erratum1

2008-10-23 Thread Dave Liu
The 8572 DDR erratum1:
DDR controller may enter an illegal state when operating
in 32-bit bus mode with 4-beat bursts.

Description:
When operating with a 32-bit bus, it is recommended that
DDR_SDRAM_CFG[8_BE] is cleared when DDR2 memories are used.
This forces the DDR controller to use 4-beat bursts when
communicating to the DRAMs. However, an issue exists that
could lead to data corruption when the DDR controller is
in 32-bit bus mode while using 4-beat bursts.

Projected Impact:
If the DDR controller is operating in 32-bit bus mode with
4-beat bursts, then the controller may enter into a bad state.
All subsequent reads from memory is corrupted.
Four-beat bursts with a 32-bit bus only is used with DDR2 memories.
Therefore, this erratum does not affect DDR3 mode.

Work Arounds:
To work around this issue, software must set DEBUG_1[31] in
DDR memory mapped space (CCSRBAR offset + 0x2f00 for DDR_1
and CCSRBAR offset + 0x6f00 for DDR_2).

Currenlty, the code is using incorrect register DDR_SDRAM_CFG_2
as condition, but it should be DDR_SDRAM_CFG register.

Signed-off-by: Dave Liu <[EMAIL PROTECTED]>
---
 cpu/mpc85xx/ddr-gen3.c |9 ++---
 1 files changed, 6 insertions(+), 3 deletions(-)

diff --git a/cpu/mpc85xx/ddr-gen3.c b/cpu/mpc85xx/ddr-gen3.c
index e0654bb..a2b45c5 100644
--- a/cpu/mpc85xx/ddr-gen3.c
+++ b/cpu/mpc85xx/ddr-gen3.c
@@ -79,15 +79,18 @@ void fsl_ddr_set_memctl_regs(const fsl_ddr_cfg_regs_t *regs,
out_be32(&ddr->ddr_sdram_rcw_2, regs->ddr_sdram_rcw_2);
 
/*
-* 32-bit workaround for DDR2
-* 32_BE
+* For 8572 DDR1 erratum - DDR controller may enter illegal state
+* when operatiing in 32-bit bus mode with 4-beat bursts,
+* This erratum does not affect DDR3 mode, only for DDR2 mode.
 */
+#ifdef CONFIG_MPC8572
if in_be32(&ddr->sdram_cfg) >> 24) & 0x7) == SDRAM_TYPE_DDR2)
-   && in_be32(&ddr->sdram_cfg_2) & 0x8) {
+   && in_be32(&ddr->sdram_cfg) & 0x8) {
/* set DEBUG_1[31] */
u32 temp = in_be32(&ddr->debug_1);
out_be32(&ddr->debug_1, temp | 1);
}
+#endif
 
/*
 * 200 painful micro-seconds must elapse between
-- 
1.5.4

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[U-Boot] [PATCH] 86xx: remove the unused definition

2008-10-23 Thread Dave Liu
Signed-off-by: Dave Liu <[EMAIL PROTECTED]>
---
 include/configs/MPC8610HPCD.h |9 -
 include/configs/MPC8641HPCN.h |   11 ---
 2 files changed, 0 insertions(+), 20 deletions(-)

diff --git a/include/configs/MPC8610HPCD.h b/include/configs/MPC8610HPCD.h
index 678e1e1..d92bed9 100644
--- a/include/configs/MPC8610HPCD.h
+++ b/include/configs/MPC8610HPCD.h
@@ -125,15 +125,6 @@
 #define CONFIG_SYS_DDR_ERR_DIS 0x
 #define CONFIG_SYS_DDR_SBE 0x000f
 
-/*
- * FIXME: Not used in fixed_sdram function
- */
-#define CONFIG_SYS_DDR_MODE0x0022
-#define CONFIG_SYS_DDR_CS1_BNDS0x
-#define CONFIG_SYS_DDR_CS2_BNDS0x0FFF  /* Not done */
-#define CONFIG_SYS_DDR_CS3_BNDS0x0FFF  /* Not done */
-#define CONFIG_SYS_DDR_CS4_BNDS0x0FFF  /* Not done */
-#define CONFIG_SYS_DDR_CS5_BNDS0x0FFF  /* Not done */
 #endif
 
 
diff --git a/include/configs/MPC8641HPCN.h b/include/configs/MPC8641HPCN.h
index e5710c0..0114ada 100644
--- a/include/configs/MPC8641HPCN.h
+++ b/include/configs/MPC8641HPCN.h
@@ -138,17 +138,6 @@ extern unsigned long get_board_sys_clk(unsigned long 
dummy);
 #define CONFIG_SYS_DDR_CONTROL 0xe3008000  /* Type = DDR2 */
 #define CONFIG_SYS_DDR_CONTROL20x0440
 
-/*
- * FIXME: Not used in fixed_sdram function
- */
-#define CONFIG_SYS_DDR_MODE0x0022
-#define CONFIG_SYS_DDR_CS1_BNDS0x
-#define CONFIG_SYS_DDR_CS2_BNDS0x0FFF  /* Not done */
-#define CONFIG_SYS_DDR_CS3_BNDS0x0FFF  /* Not done */
-#define CONFIG_SYS_DDR_CS4_BNDS0x0FFF  /* Not done */
-#define CONFIG_SYS_DDR_CS5_BNDS0x0FFF  /* Not done */
-
-
 #define CONFIG_ID_EEPROM
 #define CONFIG_SYS_I2C_EEPROM_NXID
 #define CONFIG_ID_EEPROM
-- 
1.5.4

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[U-Boot] xilinx_emaclite buffer overrun

2008-10-23 Thread Clive Stubbings
Hi

Looks like there is a buffer allocation error in the packet buffer for the 
xilinx emaclite.


diff --git a/drivers/net/xilinx_emaclite.c b/drivers/net/xilinx_emaclite.c
index 88cd0f9..0e96ef1 100644
--- a/drivers/net/xilinx_emaclite.c
+++ b/drivers/net/xilinx_emaclite.c
@@ -70,7 +70,7 @@ typedef struct {

  static xemaclite emaclite;

-static char etherrxbuff[PKTSIZE_ALIGN/4]; /* Receive buffer */
+static u32 etherrxbuff[PKTSIZE_ALIGN/4]; /* Receive buffer */

  /* hardcoded MAC address for the Xilinx EMAC Core when env is nowhere*/
  #ifdef CONFIG_ENV_IS_NOWHERE

Cheers
Clive
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Re: [U-Boot] [PATCH] drivers/qe/uec_phy.c: Added PHY-less (fixed PHY) driver.

2008-10-23 Thread Richard Retanubun
Copied over the fixed PHY driver as used in pp4xx/4xx_enet.c.
This adds support for PHY-less MAC connections to the UEC.

Signed-off-by: Richard Retanubun <[EMAIL PROTECTED]>
---
Documentation change only:
Same patch as before, now with a board configuration file example that
actually applies to UEC based boards :)

 drivers/qe/uec_phy.c |   78 ++
 1 files changed, 78 insertions(+), 0 deletions(-)

diff --git a/drivers/qe/uec_phy.c b/drivers/qe/uec_phy.c
index 2243d3b..b64748b 100644
--- a/drivers/qe/uec_phy.c
+++ b/drivers/qe/uec_phy.c
@@ -44,6 +44,53 @@
 #define ugphy_vdbg(ugeth, fmt, args...) do { } while (0)
 #endif /* UEC_VERBOSE_DEBUG */
 
+/*+
+ * Fixed PHY (PHY-less) support for Ethernet Ports.
+ *
+ * Adapted from cpu/ppc4xx/4xx_enet.c
+ **/
+
+/*
+ * Some boards do not have a PHY for each ethernet port. These ports
+ * are known as Fixed PHY (or PHY-less) ports. For such ports,
+ * define CONFIG_SYS_FIXED_PHY_PORTS to define what the speed and
+ * duplex should be for these ports in the board configuration file.
+ *
+ * Example board configuration file:
+ *
+ * #define CONFIG_FIXED_PHY   0x
+ *
+ * #define CONFIG_SYS_UEC1_PHY_ADDR 0 <- PHY-less port
+ * #define CONFIG_SYS_UEC2_PHY_ADDR 1
+ * #define CONFIG_SYS_UEC3_PHY_ADDR 2 <- PHY-less port
+ * #define CONFIG_SYS_UEC4_PHY_ADDR 3
+ *
+ * #define CONFIG_SYS_FIXED_PHY_PORT(devnum,speed,duplex) \
+ * {devnum, speed, duplex},
+ *
+ * #define CONFIG_SYS_FIXED_PHY_PORTS \
+ * CONFIG_SYS_FIXED_PHY_PORT(0, SPEED_1000, DUPLEX_FULL) \
+ * CONFIG_SYS_FIXED_PHY_PORT(2, SPEED_100, DUPLEX_HALF)
+ */
+
+#ifndef CONFIG_FIXED_PHY
+#define CONFIG_FIXED_PHY   0x /* Fixed PHY (PHY-less) */
+#endif
+
+#ifndef CONFIG_SYS_FIXED_PHY_PORTS
+#define CONFIG_SYS_FIXED_PHY_PORTS /* default is an empty array */
+#endif
+
+struct fixed_phy_port {
+   unsigned int devnum;/* ethernet port */
+   unsigned int speed; /* specified speed 10,100 or 1000 */
+   unsigned int duplex;/* specified duplex FULL or HALF */
+};
+
+static const struct fixed_phy_port fixed_phy_port[] = {
+   CONFIG_SYS_FIXED_PHY_PORTS /* defined in board configuration file */
+};
+
 static void config_genmii_advert (struct uec_mii_info *mii_info);
 static void genmii_setup_forced (struct uec_mii_info *mii_info);
 static void genmii_restart_aneg (struct uec_mii_info *mii_info);
@@ -533,6 +580,28 @@ static void dm9161_close (struct uec_mii_info *mii_info)
 {
 }
 
+static int fixed_phy_aneg (struct uec_mii_info *mii_info)
+{
+   mii_info->autoneg = 0; /* Turn off auto negotiation for fixed phy */
+   return 0;
+}
+
+static int fixed_phy_read_status (struct uec_mii_info *mii_info)
+{
+   int i = 0;
+
+   for (i = 0; i < ARRAY_SIZE(fixed_phy_port); i++) {
+   if (mii_info->mii_id == fixed_phy_port[i].devnum) {
+   mii_info->speed = fixed_phy_port[i].speed;
+   mii_info->duplex = fixed_phy_port[i].duplex;
+   mii_info->link = 1; /* Link is always UP */
+   mii_info->pause = 0;
+   break;
+   }
+   }
+   return 0;
+}
+
 static struct phy_info phy_info_dm9161 = {
.phy_id = 0x0181b880,
.phy_id_mask = 0x0ff0,
@@ -577,6 +646,14 @@ static struct phy_info phy_info_bcm5481 = {
.init = bcm_init,
 };
 
+static struct phy_info phy_info_fixedphy = {
+   .phy_id = CONFIG_FIXED_PHY,
+   .phy_id_mask = CONFIG_FIXED_PHY,
+   .name = "Fixed PHY",
+   .config_aneg = fixed_phy_aneg,
+   .read_status = fixed_phy_read_status,
+};
+
 static struct phy_info phy_info_genmii = {
.phy_id = 0x,
.phy_id_mask = 0x,
@@ -591,6 +668,7 @@ static struct phy_info *phy_info[] = {
&phy_info_dm9161a,
&phy_info_marvell,
&phy_info_bcm5481,
+   &phy_info_fixedphy,
&phy_info_genmii,
NULL
 };
-- 
1.5.5.GIT





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[U-Boot] [PATCH] 74xx: use r4 instead of r2 in lock_ram_in_cache and unlock_ram_in_cache

2008-10-23 Thread Dave Liu
The patch is following the commit 392438406041415fe64ab8748ec5ab5ad01d1cf7

mpc86xx: use r4 instead of r2 in lock_ram_in_cache and unlock_ram_in_cache

This is needed in unlock_ram_in_cache() because it is called from C and
will corrupt the small data area anchor that is kept in R2.

lock_ram_in_cache() is modified similarly as good coding practice, but
is not called from C.

Signed-off-by: Nick Spence <[EMAIL PROTECTED]>

also, the r2 is used as global data pointer.

Signed-off-by: Dave Liu <[EMAIL PROTECTED]>
---
 cpu/74xx_7xx/start.S |8 
 1 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/cpu/74xx_7xx/start.S b/cpu/74xx_7xx/start.S
index 07bbe01..b5484e3 100644
--- a/cpu/74xx_7xx/start.S
+++ b/cpu/74xx_7xx/start.S
@@ -857,9 +857,9 @@ lock_ram_in_cache:
 */
lis r3, (CONFIG_SYS_INIT_RAM_ADDR & ~31)@h
ori r3, r3, (CONFIG_SYS_INIT_RAM_ADDR & ~31)@l
-   li  r2, ((CONFIG_SYS_INIT_RAM_END & ~31) + \
+   li  r4, ((CONFIG_SYS_INIT_RAM_END & ~31) + \
 (CONFIG_SYS_INIT_RAM_ADDR & 31) + 31) / 32
-   mtctr   r2
+   mtctr   r4
 1:
dcbzr0, r3
addir3, r3, 32
@@ -878,9 +878,9 @@ unlock_ram_in_cache:
/* invalidate the INIT_RAM section */
lis r3, (CONFIG_SYS_INIT_RAM_ADDR & ~31)@h
ori r3, r3, (CONFIG_SYS_INIT_RAM_ADDR & ~31)@l
-   li  r2, ((CONFIG_SYS_INIT_RAM_END & ~31) + \
+   li  r4, ((CONFIG_SYS_INIT_RAM_END & ~31) + \
 (CONFIG_SYS_INIT_RAM_ADDR & 31) + 31) / 32
-   mtctr   r2
+   mtctr   r4
 1: icbir0, r3
addir3, r3, 32
bdnz1b
-- 
1.5.4

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Re: [U-Boot] [PATCH] 74xx: use r4 instead of r2 in lock_ram_in_cache and unlock_ram_in_cache

2008-10-23 Thread Kumar Gala

On Oct 23, 2008, at 8:59 AM, Dave Liu wrote:

> The patch is following the commit  
> 392438406041415fe64ab8748ec5ab5ad01d1cf7
>
> mpc86xx: use r4 instead of r2 in lock_ram_in_cache and  
> unlock_ram_in_cache
>
> This is needed in unlock_ram_in_cache() because it is called from C  
> and
> will corrupt the small data area anchor that is kept in R2.
>
> lock_ram_in_cache() is modified similarly as good coding practice, but
> is not called from C.
>
> Signed-off-by: Nick Spence <[EMAIL PROTECTED]>
>
> also, the r2 is used as global data pointer.
>
> Signed-off-by: Dave Liu <[EMAIL PROTECTED]>
> ---
> cpu/74xx_7xx/start.S |8 
> 1 files changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/cpu/74xx_7xx/start.S b/cpu/74xx_7xx/start.S
> index 07bbe01..b5484e3 100644
> --- a/cpu/74xx_7xx/start.S
> +++ b/cpu/74xx_7xx/start.S
> @@ -857,9 +857,9 @@ lock_ram_in_cache:
>*/
>   lis r3, (CONFIG_SYS_INIT_RAM_ADDR & ~31)@h
>   ori r3, r3, (CONFIG_SYS_INIT_RAM_ADDR & ~31)@l
> - li  r2, ((CONFIG_SYS_INIT_RAM_END & ~31) + \
> + li  r4, ((CONFIG_SYS_INIT_RAM_END & ~31) + \
>(CONFIG_SYS_INIT_RAM_ADDR & 31) + 31) / 32
> - mtctr   r2
> + mtctr   r4
> 1:
>   dcbzr0, r3
>   addir3, r3, 32
> @@ -878,9 +878,9 @@ unlock_ram_in_cache:
>   /* invalidate the INIT_RAM section */
>   lis r3, (CONFIG_SYS_INIT_RAM_ADDR & ~31)@h
>   ori r3, r3, (CONFIG_SYS_INIT_RAM_ADDR & ~31)@l
> - li  r2, ((CONFIG_SYS_INIT_RAM_END & ~31) + \
> + li  r4, ((CONFIG_SYS_INIT_RAM_END & ~31) + \
>(CONFIG_SYS_INIT_RAM_ADDR & 31) + 31) / 32
> - mtctr   r2
> + mtctr   r4
> 1:icbir0, r3
>   addir3, r3, 32
>   bdnz1b

Can we change the 31 to CONFIG_SYS_CACHELINE_SIZE-1

It doesn't matter much for 7xx/74xx/e600 as the cache line size has  
always been 32-bytes, but good to make the code a bit more readable

- k
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Re: [U-Boot] [PATCH] 74xx: use r4 instead of r2 in lock_ram_in_cache and unlock_ram_in_cache

2008-10-23 Thread Liu Dave-R63238
> From: Kumar Gala [mailto:[EMAIL PROTECTED] 
> On Oct 23, 2008, at 8:59 AM, Dave Liu wrote:
> 
> > The patch is following the commit  
> > 392438406041415fe64ab8748ec5ab5ad01d1cf7
> >
> > mpc86xx: use r4 instead of r2 in lock_ram_in_cache and  
> > unlock_ram_in_cache
> >
> > This is needed in unlock_ram_in_cache() because it is 
> called from C  
> > and
> > will corrupt the small data area anchor that is kept in R2.
> >
> > lock_ram_in_cache() is modified similarly as good coding 
> practice, but
> > is not called from C.
> >
> > Signed-off-by: Nick Spence <[EMAIL PROTECTED]>
> >
> > also, the r2 is used as global data pointer.
> >
> > Signed-off-by: Dave Liu <[EMAIL PROTECTED]>
> > ---
> > cpu/74xx_7xx/start.S |8 
> > 1 files changed, 4 insertions(+), 4 deletions(-)
> >
> > diff --git a/cpu/74xx_7xx/start.S b/cpu/74xx_7xx/start.S
> > index 07bbe01..b5484e3 100644
> > --- a/cpu/74xx_7xx/start.S
> > +++ b/cpu/74xx_7xx/start.S
> > @@ -857,9 +857,9 @@ lock_ram_in_cache:
> >  */
> > lis r3, (CONFIG_SYS_INIT_RAM_ADDR & ~31)@h
> > ori r3, r3, (CONFIG_SYS_INIT_RAM_ADDR & ~31)@l
> > -   li  r2, ((CONFIG_SYS_INIT_RAM_END & ~31) + \
> > +   li  r4, ((CONFIG_SYS_INIT_RAM_END & ~31) + \
> >  (CONFIG_SYS_INIT_RAM_ADDR & 31) + 31) / 32
> > -   mtctr   r2
> > +   mtctr   r4
> > 1:
> > dcbzr0, r3
> > addir3, r3, 32
> > @@ -878,9 +878,9 @@ unlock_ram_in_cache:
> > /* invalidate the INIT_RAM section */
> > lis r3, (CONFIG_SYS_INIT_RAM_ADDR & ~31)@h
> > ori r3, r3, (CONFIG_SYS_INIT_RAM_ADDR & ~31)@l
> > -   li  r2, ((CONFIG_SYS_INIT_RAM_END & ~31) + \
> > +   li  r4, ((CONFIG_SYS_INIT_RAM_END & ~31) + \
> >  (CONFIG_SYS_INIT_RAM_ADDR & 31) + 31) / 32
> > -   mtctr   r2
> > +   mtctr   r4
> > 1:  icbir0, r3
> > addir3, r3, 32
> > bdnz1b
> 
> Can we change the 31 to CONFIG_SYS_CACHELINE_SIZE-1
> 
> It doesn't matter much for 7xx/74xx/e600 as the cache line size has  
> always been 32-bytes, but good to make the code a bit more readable

Patch welcomed!

Thanks,
Dave
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Re: [U-Boot] amcc kilauea odd crashes

2008-10-23 Thread Markus Klotzbücher
On Thu, Oct 23, 2008 at 07:51:30AM -0700, prodyut hazarika wrote:
> > I tested it and it's still failing. I dare say the patch makes things
> > worse. After about 20 hard resets the board didn't reach the u-boot
> > console a single time.
> >
> 
> Markus, have you got access to BDI?

I sure do!

Regards
Markus

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Re: [U-Boot] amcc kilauea odd crashes

2008-10-23 Thread prodyut hazarika
> I tested it and it's still failing. I dare say the patch makes things
> worse. After about 20 hard resets the board didn't reach the u-boot
> console a single time.
>

Markus, have you got access to BDI?
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[U-Boot] Splash Screen

2008-10-23 Thread Schmid Alexander
Hello,
i have U-Boot running on MPC5200B! The U-Boot console output is on display!
Now i activated the splash sreen support, and it works!
But now I`m wondering, if I have a problem and have to do something in the
U-Boot console if I get there!
Because when i press a key (between the 3 seconds of autostart) the splash
screen picture stays there, and I don`t see any console output!

Has anyone an idea how I can solve that? I thaught about e.g. pressing ESC
and then I`m on U-Boot console or so?

Thanks





Alexander Schmid
Dipl. Ing. (FH)
-Entwicklung-
Systeme & Steuerungen GmbH
Josef-Buchinger-Strasse 8
DE-94481 Grafenau

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Re: [U-Boot] [PATCH] 74xx: use r4 instead of r2 in lock_ram_in_cache and unlock_ram_in_cache

2008-10-23 Thread Kumar Gala

On Oct 23, 2008, at 9:20 AM, Liu Dave-R63238 wrote:

>> From: Kumar Gala [mailto:[EMAIL PROTECTED]
>> On Oct 23, 2008, at 8:59 AM, Dave Liu wrote:
>>
>>> The patch is following the commit
>>> 392438406041415fe64ab8748ec5ab5ad01d1cf7
>>>
>>> mpc86xx: use r4 instead of r2 in lock_ram_in_cache and
>>> unlock_ram_in_cache
>>>
>>> This is needed in unlock_ram_in_cache() because it is
>> called from C
>>> and
>>> will corrupt the small data area anchor that is kept in R2.
>>>
>>> lock_ram_in_cache() is modified similarly as good coding
>> practice, but
>>> is not called from C.
>>>
>>> Signed-off-by: Nick Spence <[EMAIL PROTECTED]>
>>>
>>> also, the r2 is used as global data pointer.
>>>
>>> Signed-off-by: Dave Liu <[EMAIL PROTECTED]>
>>> ---
>>> cpu/74xx_7xx/start.S |8 
>>> 1 files changed, 4 insertions(+), 4 deletions(-)
>>>
>>> diff --git a/cpu/74xx_7xx/start.S b/cpu/74xx_7xx/start.S
>>> index 07bbe01..b5484e3 100644
>>> --- a/cpu/74xx_7xx/start.S
>>> +++ b/cpu/74xx_7xx/start.S
>>> @@ -857,9 +857,9 @@ lock_ram_in_cache:
>>>  */
>>> lis r3, (CONFIG_SYS_INIT_RAM_ADDR & ~31)@h
>>> ori r3, r3, (CONFIG_SYS_INIT_RAM_ADDR & ~31)@l
>>> -   li  r2, ((CONFIG_SYS_INIT_RAM_END & ~31) + \
>>> +   li  r4, ((CONFIG_SYS_INIT_RAM_END & ~31) + \
>>>  (CONFIG_SYS_INIT_RAM_ADDR & 31) + 31) / 32
>>> -   mtctr   r2
>>> +   mtctr   r4
>>> 1:
>>> dcbzr0, r3
>>> addir3, r3, 32
>>> @@ -878,9 +878,9 @@ unlock_ram_in_cache:
>>> /* invalidate the INIT_RAM section */
>>> lis r3, (CONFIG_SYS_INIT_RAM_ADDR & ~31)@h
>>> ori r3, r3, (CONFIG_SYS_INIT_RAM_ADDR & ~31)@l
>>> -   li  r2, ((CONFIG_SYS_INIT_RAM_END & ~31) + \
>>> +   li  r4, ((CONFIG_SYS_INIT_RAM_END & ~31) + \
>>>  (CONFIG_SYS_INIT_RAM_ADDR & 31) + 31) / 32
>>> -   mtctr   r2
>>> +   mtctr   r4
>>> 1:  icbir0, r3
>>> addir3, r3, 32
>>> bdnz1b
>>
>> Can we change the 31 to CONFIG_SYS_CACHELINE_SIZE-1
>>
>> It doesn't matter much for 7xx/74xx/e600 as the cache line size has
>> always been 32-bytes, but good to make the code a bit more readable
>
> Patch welcomed!

I'm willing to deal with it that way.

Ack on this patch.

- k
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Re: [U-Boot] U-boot 1.3.3: Error: start address not on sector boundary

2008-10-23 Thread Liew Tsi Chung
James,

Please do not use CFG_BOOTSZ for flash size.

Since you have two 32MB flash chips tie to one chip select to use as one
for 32-bit access (addr&data). The sectors listing will become 64KB,
64KB, 64KB, 64KB, 256KB... from 32KB, 32KB, 32KB, 32KB, 128KB... (one
upper 16-bit data for flash 1 and one lower 16-bit data for flash 2)
Based on your information provided, your environment data is assigned to
first sector at offset 0x2000. Your environment data has to assigned to
one of the 64KB sector, last 64KB sector will be the perfect choice.

U-boot 1.3.3:
#define CFG_ENV_OFFSET  0x3 /* must be sector aligned */
#define CFG_ENV_SIZE0x2000
#define CFG_ENV_SECTOR_SIZE 0x1

U-boot v2008.10:
#define CONFIG_ENV_OFFSET   0x3
#define CONFIG_ENV_SIZE 0x2000
#define CONFIG_ENV_SECTOR_SIZE  0x1

> I'm confused. Are you saying I need to apply these 19 patches to
address the problem I'm having?
The 19 patches are for next u-boot release.

Regards,
TsiChung
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Re: [U-Boot] [PATCH 08/19] ColdFire: Remove platforms mii.c file - 1

2008-10-23 Thread Liew Tsi Chung
Wolfgang,

Thanks for bringing up. I will resubmit them (including the
header files and M53017EVB patches) in a single patch.

Regards,
TsiChung

-Original Message-
From: Wolfgang Denk [mailto:[EMAIL PROTECTED] 
Sent: Thursday, October 23, 2008 3:03 AM
To: Liew Tsi Chung-R5AAHP
Cc: U-Boot; Rigby John-R61273
Subject: Re: [U-Boot] [PATCH 08/19] ColdFire: Remove platforms mii.c
file - 1

Dear Tsi-Chung Liew,

In message
<[EMAIL PROTECTED]> you
wrote:
> From: TsiChung Liew <[EMAIL PROTECTED]>
> 
> Will use mcfmii.c driver in drivers/net rather than keep creating new 
> mii.c for each future platform.
> Remove EB+MCF-EV123, cobra5272, idmr and M5235EVB's mii.c
> 
> Signed-off-by: TsiChung Liew <[EMAIL PROTECTED]>
> ---
>  board/BuS/EB+MCF-EV123/Makefile   |2 +-
>  board/BuS/EB+MCF-EV123/mii.c  |  304

>  board/cobra5272/Makefile  |2 +-
>  board/cobra5272/mii.c |  303

>  board/freescale/m5235evb/Makefile |2 +-
>  board/freescale/m5235evb/mii.c|  307
-
>  board/idmr/Makefile   |2 +-
>  board/idmr/mii.c  |  303

>  8 files changed, 4 insertions(+), 1221 deletions(-)  delete mode 
> 100644 board/BuS/EB+MCF-EV123/mii.c  delete mode 100644 
> board/cobra5272/mii.c  delete mode 100644 
> board/freescale/m5235evb/mii.c  delete mode 100644 board/idmr/mii.c

This is mostly files removed. WHy don;t you all removals that actually
belong together in a single commit? That would make much more sense to
me.

Best regards,

Wolfgang Denk

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HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
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Re: [U-Boot] [PATCH 2/3] iMX31: Add support to copy NAND Flash code to RAM

2008-10-23 Thread Guennadi Liakhovetski
On Thu, 23 Oct 2008, Alan Carvalho de Assis wrote:

> This code is executed from internal 2KB NAND Flash Controller RAM buffer
> and will copy the remaining U-Boot code from NAND Flash verifying its
> bad blocks (case it exists).
> 
> Signed-off-by: Alan Carvalho de Assis <[EMAIL PROTECTED]>

Last time Scott Wood suggested to use nand_spl you replied "I think using 
nand_spl is the best approach, but it will needs more effort to complete." 
and "Anyway, right now we can have iMX31PDK booting with this code as an
option for users willing to use U-Boot in this board." So, what's the 
status of this effort? If this your new submission, which still doesn't 
use nand_spl is not really targeted for upstream merge, I think, it would 
be better not to mark these mails "PATCH". Or have I missed anything?

Thanks
Guennadi

> ---
>  cpu/arm1136/mx31/Makefile |2 +
>  cpu/arm1136/mx31/nand_copy.S  |  263 
> +
>  include/asm-arm/arch-mx31/mx31-regs.h |   69 +
>  3 files changed, 334 insertions(+), 0 deletions(-)
>  create mode 100644 cpu/arm1136/mx31/nand_copy.S
> 
> diff --git a/cpu/arm1136/mx31/Makefile b/cpu/arm1136/mx31/Makefile
> index b648ffd..0490706 100644
> --- a/cpu/arm1136/mx31/Makefile
> +++ b/cpu/arm1136/mx31/Makefile
> @@ -26,7 +26,9 @@ include $(TOPDIR)/config.mk
>  LIB  = $(obj)lib$(SOC).a
> 
>  COBJS= interrupts.o serial.o generic.o
> +SOBJS-$(CONFIG_BOOT_FROM_NAND) = nand_copy.o
> 
> +SOBJS:= $(SOBJS-y)
>  SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
>  OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
> 
> diff --git a/cpu/arm1136/mx31/nand_copy.S b/cpu/arm1136/mx31/nand_copy.S
> new file mode 100644
> index 000..7a2460c
> --- /dev/null
> +++ b/cpu/arm1136/mx31/nand_copy.S
> @@ -0,0 +1,263 @@
> +/*
> + * Copyright (C) 2008 Freescale Semiconductor, Inc.
> + *
> + * Alan Carvalho de Assis <[EMAIL PROTECTED]>
> + * based on iMX31PDK RedBoot_200814 code.
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> + * MA 02111-1307 USA
> + */
> +
> +#include 
> +#include 
> +
> +.macro do_addr_input
> + and r3, r3, #0xFF
> + strhr3, [r12, #NFC_FLASH_ADDR_OFF]
> + mov r3, #NAND_FLASH_CONFIG2_FADD_EN
> + strhr3, [r12, #NFC_CONFIG2_OFF]
> + bl  do_wait_op_done
> +.endm   /* do_addr_input */
> +
> +do_wait_op_done:
> +1:   ldrhr3, [r12, #NFC_CONFIG2_OFF]
> + andsr3, r3, #NAND_FLASH_CONFIG2_INT_DONE
> + beq 1b
> + bx  lr
> +
> +nfc_data_output:
> + mov r3, #(NAND_FLASH_CONFIG1_INT_MSK | NAND_FLASH_CONFIG1_ECC_EN)
> + strhr3, [r12, #NFC_CONFIG1_OFF]
> + strhr8, [r12, #NFC_BUF_ADDR_OFF]
> + mov r3, #FDO_PAGE_SPARE_VAL
> + strhr3, [r12, #NFC_CONFIG2_OFF]
> + bx  lr
> +
> +.globl nand_copy
> +nand_copy:
> + /* Copy image from flash to SDRAM first */
> + mov r0, #NFC_BASE_ADDR
> + add r2, r0, #0x800  /* 2K window */
> + ldr r1, MXC_UBOOT_ROM_START
> +
> +1:   ldmia   r0!, {r3-r10}
> + stmia   r1!, {r3-r10}
> + cmp r0, r2
> + blo 1b
> + /* Jump to SDRAM */
> + ldr r1, =0x0FFF
> + and r0, pc, r1 /* offset of pc */
> + ldr r1, MXC_UBOOT_ROM_START
> + add r1, r1, #0x10
> + add pc, r0, r1
> + nop
> + nop
> + nop
> + nop
> +
> +nand_copy_main:
> + /* Check if x16/2kb page */
> + ldr r7, =CCM_BASE
> + ldr r7, [r7, #0xC]
> + andsr7, r7, #(1 << 30)
> +
> + mov r0, #NAND_FLASH_BOOT
> + ldr r1, =AVIC_VECTOR0
> + str r0, [r1]
> + mov r0, #MXCFIS_NAND
> + ldr r1, =AVIC_VECTOR1
> + str r0, [r1]
> +
> + mov r0, #NFC_BASE_ADDR /* r0: nfc base. Reloaded after each page 
> copying */
> + mov r1, #0x800   /* r1: starting flash addr to be copied.
> Updated constantly */
> + add r2, r0, #0x800   /* r2: end of 3rd RAM buf. Doesn't change */
> + addeq   r2, r0, #0x200   /* r2: end of 1st RAM buf. Doesn't change
> (only set for small page NAND) */
> + add r12, r0, #0xE00  /* r12: NFC register base. Doesn't change */
> + ldr r11, MXC_UBOOT_ROM_START
> + add r13, r11, #0x4 /* r13: end of SDRAM address for copying.
> Doesn't change */
> + 

Re: [U-Boot] amcc kilauea odd crashes

2008-10-23 Thread Adam Graham
 

> -Original Message-
> From: Stefan Roese [mailto:[EMAIL PROTECTED] 
> Sent: Thursday, October 23, 2008 4:15 AM
> To: u-boot@lists.denx.de
> Cc: Wolfgang Denk; Markus Klotzbücher; Adam Graham; Victor Gallardo
> Subject: Re: [U-Boot] amcc kilauea odd crashes
> 
> Hi Wolfgang,
> 
> On Thursday 23 October 2008, Wolfgang Denk wrote:
> > In message <[EMAIL PROTECTED]> you wrote:
> > > Is this a 600MHz Kilauea? This is a known issue, that the new 
> > > autocalibration
> >
> > No, this is a CPU Rev. A board at 400 Mhz.
> 
> Probably with the same DDR2 frequency.

Correct, the important clocking is the DDR2 frequency and not the CPU frequency 
(i.e. the PLB of 200MHz set on this board).


> 
> > > code has a problem here. I reported this problem a few weeks ago. 
> > > AMCC is currently working on a fix for this.
> >
> > Should we not backout the autocalib patches that cause the problem 
> > until a stable working solution is found?
> 
> Not sure. My hope is that AMCC find a solution quickly. They 
> should receive the failing board this week.
> 
> And they already did send a "fix" (more a workaround) for 
> this problem:
> 
> [PATCH v2] ppc4xx: Fix DDR2 auto calibration on Kilauea 600MHz
> 
> which you rejected. So I suggest to wait for a few days.
> 
> Victor, Adam, did you already receive my board?

We have not received your board yet.  Do you have a shipping tracking number we 
can check?

Thanks,
Adam

> 
> Best regards,
> Stefan
> 
> =
> DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
> HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
> Phone: +49-8142-66989-0 Fax: +49-8142-66989-80  Email: 
> [EMAIL PROTECTED] 
> =
> 
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Re: [U-Boot] [PATCH] lcd: print custom strings after the logo

2008-10-23 Thread Haavard Skinnemoen
Wolfgang Denk <[EMAIL PROTECTED]> wrote:
> Dear Stelian Pop,
> 
> In message <[EMAIL PROTECTED]> you wrote:
> > > +#ifndef CONFIG_LCD_LOGO_TEXT1
> > > +# define CONFIG_LCD_LOGO_TEXT1 "(C) 2008 ATMEL Corp"
> > > +#endif  
> > 
> > Wouldn't it be better if we move this text into
> > include/configs/at91xxx.h for all the boards ?  
> 
> Yes, please.
> 
> 
> Anatolij, Jean-Christophe - who of you will be taking care of this?

I wish someone would bother looking at

http://lists.denx.de/pipermail/u-boot/2008-September/039837.html

at some point so that we can stop filling common/lcd.c with
board-specific code...

Haavard
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Re: [U-Boot] amcc kilauea odd crashes

2008-10-23 Thread Adam Graham
> 
> Hi Wolfgang,
> 
> On Thursday 23 October 2008, Wolfgang Denk wrote:
> > > > Should we not backout the autocalib patches that cause 
> the problem 
> > > > until a stable working solution is found?
> > >
> > > Not sure. My hope is that AMCC find a solution quickly. 
> They should 
> > > receive the failing board this week.

We have not received this board yet and hope to try out our unreleased patches 
on your Kilauea board.  (That being said, it looks like Markus' Kilauea 
configuration can also be used to test the unreleased patches - CPU 400MHz, PLB 
200MHz.)


> > >
> > > And they already did send a "fix" (more a workaround) for 
> this problem:
> > >
> > > [PATCH v2] ppc4xx: Fix DDR2 auto calibration on Kilauea 600MHz
> > >
> > > which you rejected. So I suggest to wait for a few days.
> >
> > Well, that was one full month ago, and nothing happened since.1s
> 
> That's not correct. One patch got checked in which definitely 
> made the situation better:
> 
> f8a00dea841d5d75de1f8e8107e90ee1beeddf5f
> 
> ppc4xx: Reset and relock memory DLL after SDRAM_CLKTR change
> 
> After changing SDRAM_CLKTR phase value rerun the memory preload
> initialization sequence (INITPLR) to reset and relock the memory
> DLL. Changing the SDRAM_CLKTR memory clock phase coarse timing
> adjustment effects the phase relationship of the internal, to the
> PPC chip, and external, to the PPC chip, versions of MEMCLK_OUT.
> 
> Signed-off-by: Adam Graham <[EMAIL PROTECTED]>
> Signed-off-by: Victor Gallardo <[EMAIL PROTECTED]>
> Signed-off-by: Stefan Roese <[EMAIL PROTECTED]>
> 
> Unfortunately it didn't fix all problems. AMCC already 
> provided another patch for testing purposes. Not to the list 
> but to me (and you) directly. Please find it attached again. 
> Would be great if Markus could test it on the failing Kilauea.

Stefan, thank you for send the test patch to Markus.

Markus, if you like to test out this patch and send us (AMCC) the results, that 
would be appreciated.  To get more DDR autocalibration information, you can set 
the U-Boot environment variable "autocalib" to "loop".  This will display all 
the passing and non-passing write-read-compare memory windows as well as the 
final result that was chosen.

=> setenv autocalib loop
=> saveenv
=> reset

To remove the "autocalib" verbosity, unset this "autocalib" environment 
variable.

Thanks,
Adam Graham
AMCC


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Re: [U-Boot] amcc kilauea odd crashes

2008-10-23 Thread Adam Graham
 

> > Unfortunately it didn't fix all problems. AMCC already provided 
> > another patch for testing purposes. Not to the list but to me (and 
> > you) directly. Please find it attached again. Would be 
> great if Markus 
> > could test it on the failing Kilauea.
> 
> I tested it and it's still failing. I dare say the patch 
> makes things worse. After about 20 hard resets the board 
> didn't reach the u-boot console a single time.
> 
> :-(
> 
> Thanks
> Markus
> 

Markus,

Sorry, ignore my prior request for you to try out those unreleased patches as I 
see that you already tried them out and the patches did not work.

Thanks,
Adam
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Re: [U-Boot] [PATCH] lcd: print custom strings after the logo

2008-10-23 Thread Jean-Christophe PLAGNIOL-VILLARD
On 20:36 Thu 23 Oct , Haavard Skinnemoen wrote:
> Wolfgang Denk <[EMAIL PROTECTED]> wrote:
> > Dear Stelian Pop,
> > 
> > In message <[EMAIL PROTECTED]> you wrote:
> > > > +#ifndef CONFIG_LCD_LOGO_TEXT1
> > > > +# define CONFIG_LCD_LOGO_TEXT1 "(C) 2008 ATMEL Corp"
> > > > +#endif  
> > > 
> > > Wouldn't it be better if we move this text into
> > > include/configs/at91xxx.h for all the boards ?  
> > 
> > Yes, please.
> > 
> > 
> > Anatolij, Jean-Christophe - who of you will be taking care of this?
> 
> I wish someone would bother looking at
> 
> http://lists.denx.de/pipermail/u-boot/2008-September/039837.html
> 

I like It


Just one think it will be nice if we can merge lcd_printf withas an outpout of
the new IOMUX

Best Regards,
J.
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Re: [U-Boot] [PATCH] lcd: print custom strings after the logo

2008-10-23 Thread Haavard Skinnemoen
On Thu, 23 Oct 2008 20:53:37 +0200
Jean-Christophe PLAGNIOL-VILLARD <[EMAIL PROTECTED]> wrote:

> > I wish someone would bother looking at
> > 
> > http://lists.denx.de/pipermail/u-boot/2008-September/039837.html
> >   
> 
> I like It

Great!

> Just one think it will be nice if we can merge lcd_printf withas an outpout of
> the new IOMUX

If lcd_puts() is switched over, lcd_printf() will follow automatically,
won't it?

Haavard
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Re: [U-Boot] Splash Screen

2008-10-23 Thread Wolfgang Denk
Dear Alexander,

In message <[EMAIL PROTECTED]> you wrote:
>
> i have U-Boot running on MPC5200B! The U-Boot console output is on display!
> Now i activated the splash sreen support, and it works!

That's how itiis supposed to be :-)

> But now I`m wondering, if I have a problem and have to do something in the
> U-Boot console if I get there!

You, of course you do. It just depends on how you set your I/O
channels (stdin, stdout and stderr).

> Because when i press a key (between the 3 seconds of autostart) the splash
> screen picture stays there, and I don`t see any console output!

Try typing (blind):

setenv stdout lcd

(followed by ENTER). What happens?

> Has anyone an idea how I can solve that? I thaught about e.g. pressing ESC
> and then I`m on U-Boot console or so?

You have to assign the I/O channels to the devices you want to use,
that's all.

Best regards,

Wolfgang Denk

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Of course there's no reason for it, it's just our policy.
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Re: [U-Boot] [PATCH] lcd: print custom strings after the logo

2008-10-23 Thread Wolfgang Denk
Dear Haavard Skinnemoen,

In message <[EMAIL PROTECTED]> you wrote:
>
> > Anatolij, Jean-Christophe - who of you will be taking care of this?
> 
> I wish someone would bother looking at
> 
> http://lists.denx.de/pipermail/u-boot/2008-September/039837.html
> 
> at some point so that we can stop filling common/lcd.c with
> board-specific code...

Excellent point. Thanks for the reminder.

Anatolij, Jean-Christophe - do you ACK this patch? I would pull it in,
then.

Best regards,

Wolfgang Denk

-- 
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: [EMAIL PROTECTED]
Any sufficiently advanced bug is indistinguishable from a feature.
  - Rich Kulawiec
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Re: [U-Boot] [PATCH] NAND Send RESET before initial READID

2008-10-23 Thread Scott Wood
On Fri, Oct 17, 2008 at 01:01:48PM -0400, David George wrote:
> We had a problem where NAND device ID would be corrupted after a 
> power-cycle.  According to the Micron datasheet it requires a RESET 
> after power-up before any commands may be issued.  Without this patch 
> the manufacturer ID would be correct, but the device ID, cellinfo and 
> extra ID would be incorrect.
> 
> Signed-off-by: David George 

Patch is whitespace damaged.

Applied by hand to u-boot-nand-flash, but try to preserve the whitespace
next time.

-Scott
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Re: [U-Boot] [PATCH] lcd: print custom strings after the logo

2008-10-23 Thread Jean-Christophe PLAGNIOL-VILLARD
On 21:19 Thu 23 Oct , Wolfgang Denk wrote:
> Dear Haavard Skinnemoen,
> 
> In message <[EMAIL PROTECTED]> you wrote:
> >
> > > Anatolij, Jean-Christophe - who of you will be taking care of this?
> > 
> > I wish someone would bother looking at
> > 
> > http://lists.denx.de/pipermail/u-boot/2008-September/039837.html
> > 
> > at some point so that we can stop filling common/lcd.c with
> > board-specific code...
> 
> Excellent point. Thanks for the reminder.
> 
> Anatolij, Jean-Christophe - do you ACK this patch? I would pull it in,
> then.
As I said I like it
So I ACK it

Best Regards,
J.
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Re: [U-Boot] xilinx_emaclite buffer overrun

2008-10-23 Thread Michal Simek
Hi Clive,

yes. but I think that better will be

static uchar etherrxbuff[PKTSIZE_ALIGN]; /* Receive buffer */

Regards,
Michal


> Hi
> 
> Looks like there is a buffer allocation error in the packet buffer for the 
> xilinx emaclite.
> 
> 
> diff --git a/drivers/net/xilinx_emaclite.c b/drivers/net/xilinx_emaclite.c
> index 88cd0f9..0e96ef1 100644
> --- a/drivers/net/xilinx_emaclite.c
> +++ b/drivers/net/xilinx_emaclite.c
> @@ -70,7 +70,7 @@ typedef struct {
> 
>   static xemaclite emaclite;
> 
> -static char etherrxbuff[PKTSIZE_ALIGN/4]; /* Receive buffer */
> +static u32 etherrxbuff[PKTSIZE_ALIGN/4]; /* Receive buffer */
> 
>   /* hardcoded MAC address for the Xilinx EMAC Core when env is nowhere*/
>   #ifdef CONFIG_ENV_IS_NOWHERE
> 
> Cheers
> Clive
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[U-Boot] [PATCH v2 1/9] ColdFire: Remove linker file

2008-10-23 Thread Tsi-Chung Liew
From: TsiChung Liew <[EMAIL PROTECTED]>

Each different build for M54455EVB and M5235EVB will
create a u-boot.lds linker file. It is redundant to
keep the u-boot.lds

Signed-off-by: TsiChung Liew <[EMAIL PROTECTED]>
---
 board/freescale/m5235evb/u-boot.lds  |  144 --
 board/freescale/m54455evb/u-boot.lds |  143 -
 2 files changed, 0 insertions(+), 287 deletions(-)
 delete mode 100644 board/freescale/m5235evb/u-boot.lds
 delete mode 100644 board/freescale/m54455evb/u-boot.lds

diff --git a/board/freescale/m5235evb/u-boot.lds 
b/board/freescale/m5235evb/u-boot.lds
deleted file mode 100644
index c0611b9..000
--- a/board/freescale/m5235evb/u-boot.lds
+++ /dev/null
@@ -1,144 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, [EMAIL PROTECTED]
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(m68k)
-/* Do we need any of these for elf?
-   __DYNAMIC = 0;*/
-SECTIONS
-{
-  /* Read-only sections, merged into text segment: */
-  . = + SIZEOF_HEADERS;
-  .interp : { *(.interp) }
-  .hash  : { *(.hash)  }
-  .dynsym: { *(.dynsym)}
-  .dynstr: { *(.dynstr)}
-  .rel.text  : { *(.rel.text)  }
-  .rela.text : { *(.rela.text) }
-  .rel.data  : { *(.rel.data)  }
-  .rela.data : { *(.rela.data) }
-  .rel.rodata: { *(.rel.rodata)}
-  .rela.rodata   : { *(.rela.rodata)   }
-  .rel.got   : { *(.rel.got)   }
-  .rela.got  : { *(.rela.got)  }
-  .rel.ctors : { *(.rel.ctors) }
-  .rela.ctors: { *(.rela.ctors)}
-  .rel.dtors : { *(.rel.dtors) }
-  .rela.dtors: { *(.rela.dtors)}
-  .rel.bss   : { *(.rel.bss)   }
-  .rela.bss  : { *(.rela.bss)  }
-  .rel.plt   : { *(.rel.plt)   }
-  .rela.plt  : { *(.rela.plt)  }
-  .init  : { *(.init)  }
-  .plt : { *(.plt) }
-  .text  :
-  {
-/* WARNING - the following is hand-optimized to fit within */
-/* the sector layout of our flash chips!   XXX FIXME XXX   */
-
-cpu/mcf523x/start.o(.text)
-cpu/mcf523x/cpu_init.o (.text)
-lib_m68k/traps.o   (.text)
-lib_m68k/interrupts.o  (.text)
-common/dlmalloc.o  (.text)
-lib_generic/zlib.o (.text)
-
-. = DEFINED(env_offset) ? env_offset : .;
-common/env_embedded.o  (.text)
-
-*(.text)
-*(.fixup)
-*(.got1)
-  }
-  _etext = .;
-  PROVIDE (etext = .);
-  .rodata:
-  {
-*(.rodata)
-*(.rodata1)
-  }
-  .fini  : { *(.fini)} =0
-  .ctors : { *(.ctors)   }
-  .dtors : { *(.dtors)   }
-
-  /* Read-write section, merged into data segment: */
-  . = (. + 0x00FF) & 0xFF00;
-  _erotext = .;
-  PROVIDE (erotext = .);
-
-  .reloc   :
-  {
-__got_start = .;
-*(.got)
-__got_end = .;
-_GOT2_TABLE_ = .;
-*(.got2)
-_FIXUP_TABLE_ = .;
-*(.fixup)
-  }
-  __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
-  __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
-  .data:
-  {
-*(.data)
-*(.data1)
-*(.sdata)
-*(.sdata2)
-*(.dynamic)
-CONSTRUCTORS
-  }
-  _edata  =  .;
-  PROVIDE (edata = .);
-
-  . = .;
-  __u_boot_cmd_start = .;
-  .u_boot_cmd : { *(.u_boot_cmd) }
-  __u_boot_cmd_end = .;
-
-
-  . = .;
-  __start___ex_table = .;
-  __ex_table : { *(__ex_table) }
-  __stop___ex_table = .;
-
-  . = ALIGN(256);
-  __init_begin = .;
-  .text.init : { *(.text.init) }
-  .data.init : { *(.data.init) }
-  . = ALIGN(256);
-  __init_end = .;
-
-  __bss_start = .;
-  .bss (NOLOAD)   :
-  {
-   _sbss = .;
-   *(.sbss) *(.scommon)
-   *(.dynbss)
-   *(.bss)
-   *(COMMON)
-   . = ALIGN(4);
-   _ebss = .;
-  }
-  _end = . ;
-  PROVIDE (end = .);
-}
diff --git a/board/freescale/m54455evb/u-boot.lds 
b/board/freescale/m54455evb/u-boot.lds
deleted file mode 100644
index bcf30c3..000
--- a/board/freescale/m54455evb/u-boot.lds
+++ /dev/null
@@ -1,143 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, [EMAIL PROTECTED]
- *
- * See file CREDITS for list of pe

[U-Boot] [PATCH v2 4/9] ColdFire: Relocate FEC's GPIO and mii functions protocols

2008-10-23 Thread Tsi-Chung Liew
From: TsiChung Liew <[EMAIL PROTECTED]>

Place FEC pin assignments in cpu_init.c from platform's
mii.c

Signed-off-by: TsiChung Liew <[EMAIL PROTECTED]>
---
 cpu/mcf523x/cpu_init.c  |   24 +++-
 cpu/mcf52x2/cpu_init.c  |   78 +++
 cpu/mcf532x/cpu_init.c  |   25 -
 cpu/mcf5445x/cpu_init.c |   34 -
 cpu/mcf547x_8x/cpu_init.c   |   27 +
 include/asm-m68k/fec.h  |   12 ++
 include/asm-m68k/fsl_mcdmafec.h |9 
 7 files changed, 197 insertions(+), 12 deletions(-)

diff --git a/cpu/mcf523x/cpu_init.c b/cpu/mcf523x/cpu_init.c
index 6520944..3c04fd4 100644
--- a/cpu/mcf523x/cpu_init.c
+++ b/cpu/mcf523x/cpu_init.c
@@ -27,9 +27,14 @@
 
 #include 
 #include 
-
 #include 
 
+#if defined(CONFIG_CMD_NET)
+#include 
+#include 
+#include 
+#endif
+
 /*
  * Breath some life into the CPU...
  *
@@ -143,3 +148,20 @@ void uart_port_conf(void)
break;
}
 }
+
+#if defined(CONFIG_CMD_NET)
+int fecpin_setclear(struct eth_device *dev, int setclear)
+{
+   volatile gpio_t *gpio = (gpio_t *) MMAP_GPIO;
+
+   if (setclear) {
+   gpio->par_feci2c |=
+   (GPIO_PAR_FECI2C_EMDC_FECEMDC | 
GPIO_PAR_FECI2C_EMDIO_FECEMDIO);
+   } else {
+   gpio->par_feci2c &=
+   ~(GPIO_PAR_FECI2C_EMDC_MASK | GPIO_PAR_FECI2C_EMDIO_MASK);
+   }
+
+   return 0;
+}
+#endif
diff --git a/cpu/mcf52x2/cpu_init.c b/cpu/mcf52x2/cpu_init.c
index 32ad6cd..18308c8 100644
--- a/cpu/mcf52x2/cpu_init.c
+++ b/cpu/mcf52x2/cpu_init.c
@@ -36,6 +36,12 @@
 #include 
 #include 
 
+#if defined(CONFIG_CMD_NET)
+#include 
+#include 
+#include 
+#endif
+
 #ifndef CONFIG_M5272
 /* Only 5272 Flexbus chipselect is different from the rest */
 void init_fbcs(void)
@@ -207,6 +213,19 @@ void uart_port_conf(void)
break;
}
 }
+
+#if defined(CONFIG_CMD_NET)
+int fecpin_setclear(struct eth_device *dev, int setclear)
+{
+   if (setclear) {
+   /* Enable Ethernet pins */
+   mbar_writeByte(MCF_GPIO_PAR_FECI2C, CONFIG_SYS_FECI2C);
+   } else {
+   }
+
+   return 0;
+}
+#endif /* CONFIG_CMD_NET */
 #endif
 
 #if defined(CONFIG_M5272)
@@ -309,6 +328,22 @@ void uart_port_conf(void)
break;
}
 }
+
+#if defined(CONFIG_CMD_NET)
+int fecpin_setclear(struct eth_device *dev, int setclear)
+{
+   volatile gpio_t *gpio = (gpio_t *) MMAP_GPIO;
+
+   if (setclear) {
+   gpio->gpio_pbcnt |= GPIO_PBCNT_E_MDC | GPIO_PBCNT_E_RXER |
+   GPIO_PBCNT_E_RXD1 | GPIO_PBCNT_E_RXD2 |
+   GPIO_PBCNT_E_RXD3 | GPIO_PBCNT_E_TXD1 |
+   GPIO_PBCNT_E_TXD2 | GPIO_PBCNT_E_TXD3;
+   } else {
+   }
+   return 0;
+}
+#endif /* CONFIG_CMD_NET */
 #endif /* #if defined(CONFIG_M5272) */
 
 #if defined(CONFIG_M5275)
@@ -372,6 +407,35 @@ void uart_port_conf(void)
break;
}
 }
+
+#if defined(CONFIG_CMD_NET)
+int fecpin_setclear(struct eth_device *dev, int setclear)
+{
+   struct fec_info_s *info = (struct fec_info_s *) dev->priv;
+   volatile gpio_t *gpio = (gpio_t *)MMAP_GPIO;
+
+   if (setclear) {
+   /* Enable Ethernet pins */
+   if (info->iobase == CONFIG_SYS_FEC0_IOBASE) {
+   gpio->par_feci2c |= 0x0F00;
+   gpio->par_fec0hl |= 0xC0;
+   } else {
+   gpio->par_feci2c |= 0x00A0;
+   gpio->par_fec1hl |= 0xC0;
+   }
+   } else {
+   if (info->iobase == CONFIG_SYS_FEC0_IOBASE) {
+   gpio->par_feci2c &= ~0x0F00;
+   gpio->par_fec0hl &= ~0xC0;
+   } else {
+   gpio->par_feci2c &= ~0x00A0;
+   gpio->par_fec1hl &= ~0xC0;
+   }
+   }
+
+   return 0;
+}
+#endif /* CONFIG_CMD_NET */
 #endif /* #if defined(CONFIG_M5275) */
 
 #if defined(CONFIG_M5282)
@@ -469,6 +533,20 @@ void uart_port_conf(void)
break;
}
 }
+
+#if defined(CONFIG_CMD_NET)
+int fecpin_setclear(struct eth_device *dev, int setclear)
+{
+   if (setclear) {
+   MCFGPIO_PASPAR |= 0x0F00;
+   MCFGPIO_PEHLPAR = CONFIG_SYS_PEHLPAR;
+   } else {
+   MCFGPIO_PASPAR &= 0xF0FF;
+   MCFGPIO_PEHLPAR &= ~CONFIG_SYS_PEHLPAR;
+   }
+   return 0;
+}
+#endif /* CONFIG_CMD_NET */
 #endif
 
 #if defined(CONFIG_M5249)
diff --git a/cpu/mcf532x/cpu_init.c b/cpu/mcf532x/cpu_init.c
index d348e29..39be11f 100644
--- a/cpu/mcf532x/cpu_init.c
+++ b/cpu/mcf532x/cpu_init.c
@@ -27,9 +27,14 @@
 
 #include 
 #include 
-
 #include 
 
+#if defined(CONFIG_CMD_NET)
+

[U-Boot] [PATCH v2 6/9] ColdFire: Use CFI driver for M5272C3

2008-10-23 Thread Tsi-Chung Liew
From: TsiChung Liew <[EMAIL PROTECTED]>

Signed-off-by: TsiChung Liew <[EMAIL PROTECTED]>
---
 board/freescale/m5272c3/Makefile |2 +-
 board/freescale/m5272c3/flash.c  |  378 --
 include/configs/M5272C3.h|   14 +-
 3 files changed, 11 insertions(+), 383 deletions(-)
 delete mode 100644 board/freescale/m5272c3/flash.c

diff --git a/board/freescale/m5272c3/Makefile b/board/freescale/m5272c3/Makefile
index cf07cf4..424ab1c 100644
--- a/board/freescale/m5272c3/Makefile
+++ b/board/freescale/m5272c3/Makefile
@@ -25,7 +25,7 @@ include $(TOPDIR)/config.mk
 
 LIB= $(obj)lib$(BOARD).a
 
-COBJS  = $(BOARD).o flash.o
+COBJS  = $(BOARD).o
 
 SRCS   := $(SOBJS:.o=.S) $(COBJS:.o=.c)
 OBJS   := $(addprefix $(obj),$(COBJS))
diff --git a/board/freescale/m5272c3/flash.c b/board/freescale/m5272c3/flash.c
deleted file mode 100644
index 586a2cf..000
--- a/board/freescale/m5272c3/flash.c
+++ /dev/null
@@ -1,378 +0,0 @@
-/*
- * (C) Copyright 2000-2003
- * Wolfgang Denk, DENX Software Engineering, [EMAIL PROTECTED]
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include 
-
-#define PHYS_FLASH_1 CONFIG_SYS_FLASH_BASE
-#define FLASH_BANK_SIZE 0x20
-
-flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS];
-
-void flash_print_info (flash_info_t * info)
-{
-   int i;
-
-   switch (info->flash_id & FLASH_VENDMASK) {
-   case (AMD_MANUFACT & FLASH_VENDMASK):
-   printf ("AMD: ");
-   break;
-   default:
-   printf ("Unknown Vendor ");
-   break;
-   }
-
-   switch (info->flash_id & FLASH_TYPEMASK) {
-   case (AMD_ID_PL160CB & FLASH_TYPEMASK):
-   printf ("AM29PL160CB (16Mbit)\n");
-   break;
-   default:
-   printf ("Unknown Chip Type\n");
-   goto Done;
-   break;
-   }
-
-   printf ("  Size: %ld MB in %d Sectors\n",
-   info->size >> 20, info->sector_count);
-
-   printf ("  Sector Start Addresses:");
-   for (i = 0; i < info->sector_count; i++) {
-   if ((i % 5) == 0) {
-   printf ("\n   ");
-   }
-   printf (" %08lX%s", info->start[i],
-   info->protect[i] ? " (RO)" : " ");
-   }
-   printf ("\n");
-
-  Done:
-   return;
-}
-
-
-unsigned long flash_init (void)
-{
-   int i, j;
-   ulong size = 0;
-
-   for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) {
-   ulong flashbase = 0;
-
-   flash_info[i].flash_id =
-   (AMD_MANUFACT & FLASH_VENDMASK) |
-   (AMD_ID_PL160CB & FLASH_TYPEMASK);
-   flash_info[i].size = FLASH_BANK_SIZE;
-   flash_info[i].sector_count = CONFIG_SYS_MAX_FLASH_SECT;
-   memset (flash_info[i].protect, 0, CONFIG_SYS_MAX_FLASH_SECT);
-   if (i == 0)
-   flashbase = PHYS_FLASH_1;
-   else
-   panic ("configured to many flash banks!\n");
-
-   for (j = 0; j < flash_info[i].sector_count; j++) {
-   if (j == 0) {
-   /* 1st is 16 KiB */
-   flash_info[i].start[j] = flashbase;
-   }
-   if ((j >= 1) && (j <= 2)) {
-   /* 2nd and 3rd are 8 KiB */
-   flash_info[i].start[j] =
-   flashbase + 0x4000 + 0x2000 * (j - 1);
-   }
-   if (j == 3) {
-   /* 4th is 224 KiB */
-   flash_info[i].start[j] = flashbase + 0x8000;
-   }
-   if ((j >= 4) && (j <= 10)) {
-   /* rest is 256 KiB */
-   flash_info[i].start[j] =
-   flashbase + 0x4 + 0x4 * (j -
-4);
-   }
-   }
-   size += flash_info[i].size;
-   }
-
-   flash_prote

[U-Boot] [PATCH v2 9/9] ColdFire: Fix compilation error

2008-10-23 Thread Tsi-Chung Liew
From: TsiChung Liew <[EMAIL PROTECTED]>

The error was caused by the change for strmhz() in cpu.c.
A few of them were one extra close parenthesis.

Signed-off-by: TsiChung Liew <[EMAIL PROTECTED]>
---
 cpu/mcf5227x/cpu.c |   10 +-
 cpu/mcf523x/cpu.c  |4 ++--
 cpu/mcf532x/cpu.c  |4 ++--
 3 files changed, 9 insertions(+), 9 deletions(-)

diff --git a/cpu/mcf5227x/cpu.c b/cpu/mcf5227x/cpu.c
index 765aec6..d9f5f43 100644
--- a/cpu/mcf5227x/cpu.c
+++ b/cpu/mcf5227x/cpu.c
@@ -65,12 +65,12 @@ int checkcpu(void)
printf("Freescale MCF%d (Mask:%01x Version:%x)\n", id, msk,
   ver);
printf("   CPU CLK %s MHz BUS CLK %s MHz FLB CLK %s MHz\n",
-  strmhz(buf1, gd->cpu_clk)),
-  strmhz(buf2, gd->bus_clk)),
-  strmhz(buf3, gd->flb_clk)));
+  strmhz(buf1, gd->cpu_clk),
+  strmhz(buf2, gd->bus_clk),
+  strmhz(buf3, gd->flb_clk));
printf("   INP CLK %s MHz VCO CLK %s MHz\n",
-  strmhz(buf1, gd->inp_clk)),
-  strmhz(buf2, gd->vco_clk)));
+  strmhz(buf1, gd->inp_clk),
+  strmhz(buf2, gd->vco_clk));
}
 
return 0;
diff --git a/cpu/mcf523x/cpu.c b/cpu/mcf523x/cpu.c
index b9e48aa..a1a5133 100644
--- a/cpu/mcf523x/cpu.c
+++ b/cpu/mcf523x/cpu.c
@@ -65,8 +65,8 @@ int checkcpu(void)
printf("Freescale MCF%d (Mask:%01x Version:%x)\n", id, msk,
   ver);
printf("   CPU CLK %s MHz BUS CLK %s MHz\n",
-  strmhz(buf1, gd->cpu_clk)),
-  strmhz(buf2, gd->bus_clk)));
+  strmhz(buf1, gd->cpu_clk),
+  strmhz(buf2, gd->bus_clk));
}
 
return 0;
diff --git a/cpu/mcf532x/cpu.c b/cpu/mcf532x/cpu.c
index bcb092d..331cc15 100644
--- a/cpu/mcf532x/cpu.c
+++ b/cpu/mcf532x/cpu.c
@@ -104,8 +104,8 @@ int checkcpu(void)
printf("Freescale MCF%d (Mask:%01x Version:%x)\n", id, msk,
   ver);
printf("   CPU CLK %s MHz BUS CLK %s MHz\n",
-  strmhz(buf1, gd->cpu_clk)),
-  strmhz(buf2, gd->bus_clk)));
+  strmhz(buf1, gd->cpu_clk),
+  strmhz(buf2, gd->bus_clk));
}
 
return 0;
-- 
1.5.6.4

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[U-Boot] [PATCH v2 5/9] ColdFire: Add mii driver in drivers/net

2008-10-23 Thread Tsi-Chung Liew
From: TsiChung Liew <[EMAIL PROTECTED]>

All CF platforms' mii.c are consolidated into one

Signed-off-by: TsiChung Liew <[EMAIL PROTECTED]>
---
 drivers/net/Makefile |4 +-
 drivers/net/mcffec.c |   18 +---
 drivers/net/mcfmii.c |  321 ++
 3 files changed, 326 insertions(+), 17 deletions(-)
 create mode 100644 drivers/net/mcfmii.c

diff --git a/drivers/net/Makefile b/drivers/net/Makefile
index 439c354..7e53136 100644
--- a/drivers/net/Makefile
+++ b/drivers/net/Makefile
@@ -35,13 +35,13 @@ COBJS-$(CONFIG_DRIVER_DM9000) += dm9000x.o
 COBJS-$(CONFIG_E1000) += e1000.o
 COBJS-$(CONFIG_EEPRO100) += eepro100.o
 COBJS-$(CONFIG_ENC28J60) += enc28j60.o
-COBJS-$(CONFIG_FSLDMAFEC) += fsl_mcdmafec.o
+COBJS-$(CONFIG_FSLDMAFEC) += fsl_mcdmafec.o mcfmii.o
 COBJS-$(CONFIG_GRETH) += greth.o
 COBJS-$(CONFIG_INCA_IP_SWITCH) += inca-ip_sw.o
 COBJS-$(CONFIG_DRIVER_KS8695ETH) += ks8695eth.o
 COBJS-$(CONFIG_DRIVER_LAN91C96) += lan91c96.o
 COBJS-$(CONFIG_MACB) += macb.o
-COBJS-$(CONFIG_MCFFEC) += mcffec.o
+COBJS-$(CONFIG_MCFFEC) += mcffec.o mcfmii.o
 COBJS-$(CONFIG_MPC5xxx_FEC) += mpc5xxx_fec.o
 COBJS-$(CONFIG_MPC512x_FEC) += mpc512x_fec.o
 COBJS-$(CONFIG_NATSEMI) += natsemi.o
diff --git a/drivers/net/mcffec.c b/drivers/net/mcffec.c
index c00474e..18240a8 100644
--- a/drivers/net/mcffec.c
+++ b/drivers/net/mcffec.c
@@ -27,14 +27,14 @@
 #include 
 #include 
 
-#include 
-#include 
-
 #include 
 #include 
 #include 
 #include 
 
+#include 
+#include 
+
 #undef ET_DEBUG
 #undef MII_DEBUG
 
@@ -101,18 +101,6 @@ int fec_init(struct eth_device *dev, bd_t * bd);
 void fec_halt(struct eth_device *dev);
 void fec_reset(struct eth_device *dev);
 
-extern int fecpin_setclear(struct eth_device *dev, int setclear);
-
-#ifdef CONFIG_SYS_DISCOVER_PHY
-extern void __mii_init(void);
-extern uint mii_send(uint mii_cmd);
-extern int mii_discover_phy(struct eth_device *dev);
-extern int mcffec_miiphy_read(char *devname, unsigned char addr,
- unsigned char reg, unsigned short *value);
-extern int mcffec_miiphy_write(char *devname, unsigned char addr,
-  unsigned char reg, unsigned short value);
-#endif
-
 void setFecDuplexSpeed(volatile fec_t * fecp, bd_t * bd, int dup_spd)
 {
if ((dup_spd >> 16) == FULL) {
diff --git a/drivers/net/mcfmii.c b/drivers/net/mcfmii.c
new file mode 100644
index 000..2b733c6
--- /dev/null
+++ b/drivers/net/mcfmii.c
@@ -0,0 +1,321 @@
+/*
+ * Copyright (C) 2004-2008 Freescale Semiconductor, Inc.
+ * TsiChung Liew ([EMAIL PROTECTED])
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include 
+#include 
+#include 
+#include 
+
+#ifdef CONFIG_MCF547x_8x
+#include 
+#else
+#include 
+#endif
+#include 
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#if defined(CONFIG_CMD_NET) && defined(CONFIG_NET_MULTI)
+#undef MII_DEBUG
+#undef ET_DEBUG
+
+/*extern int fecpin_setclear(struct eth_device *dev, int setclear);*/
+
+#if defined(CONFIG_SYS_DISCOVER_PHY) || defined(CONFIG_CMD_MII)
+#include 
+
+/* Make MII read/write commands for the FEC. */
+#define mk_mii_read(ADDR, REG) (0x6002 | ((ADDR << 23) | \
+(REG & 0x1f) << 18))
+#define mk_mii_write(ADDR, REG, VAL)   (0x5002 | ((ADDR << 23) | \
+(REG & 0x1f) << 18) | (VAL & 0x))
+
+#ifndef CONFIG_SYS_UNSPEC_PHYID
+#  define CONFIG_SYS_UNSPEC_PHYID  0
+#endif
+#ifndef CONFIG_SYS_UNSPEC_STRID
+#  define CONFIG_SYS_UNSPEC_STRID  0
+#endif
+
+#ifdef CONFIG_MCF547x_8x
+typedef struct fec_info_dma FEC_INFO_T;
+#define FEC_T fecdma_t
+#else
+typedef struct fec_info_s FEC_INFO_T;
+#define FEC_T fec_t
+#endif
+
+typedef struct phy_info_struct {
+   u32 phyid;
+   char *strid;
+} phy_info_t;
+
+phy_info_t phyinfo[] = {
+   {0x0022561B, "AMD79C784VC"},/* AMD 79C784VC */
+   {0x00406322, "BCM5222"},/* Broadcom 5222 */
+   {0x02a80150, "Intel82555"}, /* Intel 82555 */
+   {0x0016f870, "LSI80225"},   /* LSI 80225 */
+   {0x0016f880, "LSI80225/B"}, /* LSI 80225/B */
+   {0x7810, "LXT970"}, /* LXT970 */
+   {0x001378e0, "LXT971"}, /* LXT971 and 97

[U-Boot] [PATCH 0/3] Support for XPedite5370 and misc GPIO

2008-10-23 Thread Peter Tyser
Hello,
This patch series adds support for the XPedite5370 SBC.
Its an MPC8572-based VPX card with a PMC/XMC site.  The
XPedite5370 includes a significant number of I2C GPIO devices (5)
which are used for board configuration.  I added support for
2 new I2C gpio devices in a new drivers/gpio directory.  I'm
not sure if this is the preferred location/method, so let me know
if others have have different preferences.  It'd be nice to have a
more generic GPIO framework (like Linux's) at some point, but
figured this was a step in the right direction by providing a
place for generic GPIO devices in drivers/gpio.

Thanks,
Peter

Peter Tyser (3):
  pca953x: Add support for PCA953x I2C gpio devices
  ds4510: Add support for Maxim's DS4510 I2C device
  XPedite5370 board support

 MAINTAINERS |3 +
 MAKEALL |1 +
 Makefile|5 +
 README  |9 +
 board/xes/common/Makefile   |   56 
 board/xes/common/fsl_8572_clk.c |   51 +++
 board/xes/common/fsl_85xx_ddr.c |   93 ++
 board/xes/common/fsl_85xx_pci.c |  287 +
 board/xes/xpedite5370/Makefile  |   45 +++
 board/xes/xpedite5370/config.mk |   35 ++
 board/xes/xpedite5370/ddr.c |  270 
 board/xes/xpedite5370/law.c |   54 
 board/xes/xpedite5370/tlb.c |   91 ++
 board/xes/xpedite5370/u-boot.lds|  145 +
 board/xes/xpedite5370/xpedite5370.c |  125 
 drivers/gpio/Makefile   |   48 +++
 drivers/gpio/ds4510.c   |  344 
 drivers/gpio/pca953x.c  |  186 +++
 include/configs/XPEDITE5370.h   |  590 +++
 include/gpio/ds4510.h   |   75 +
 include/gpio/pca953x.h  |   39 +++
 21 files changed, 2552 insertions(+), 0 deletions(-)
 create mode 100644 board/xes/common/Makefile
 create mode 100644 board/xes/common/fsl_8572_clk.c
 create mode 100644 board/xes/common/fsl_85xx_ddr.c
 create mode 100644 board/xes/common/fsl_85xx_pci.c
 create mode 100644 board/xes/xpedite5370/Makefile
 create mode 100644 board/xes/xpedite5370/config.mk
 create mode 100644 board/xes/xpedite5370/ddr.c
 create mode 100644 board/xes/xpedite5370/law.c
 create mode 100644 board/xes/xpedite5370/tlb.c
 create mode 100644 board/xes/xpedite5370/u-boot.lds
 create mode 100644 board/xes/xpedite5370/xpedite5370.c
 create mode 100644 drivers/gpio/Makefile
 create mode 100644 drivers/gpio/ds4510.c
 create mode 100644 drivers/gpio/pca953x.c
 create mode 100644 include/configs/XPEDITE5370.h
 create mode 100644 include/gpio/ds4510.h
 create mode 100644 include/gpio/pca953x.h

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[U-Boot] [PATCH 1/3] Add support for PCA953x I2C gpio devices

2008-10-23 Thread Peter Tyser
Initial support for NXP's 4 and 8 bit I2C gpio expanders
(eg pca9537, pca9557, etc). The CONFIG_PCA953X define
enables support for the devices while the CONFIG_CMD_PCA953X
define enables the pca953x command.

Signed-off-by: Peter Tyser <[EMAIL PROTECTED]>
---
 Makefile   |2 +
 README |7 ++
 drivers/gpio/Makefile  |   47 
 drivers/gpio/pca953x.c |  186 
 include/gpio/pca953x.h |   39 ++
 5 files changed, 281 insertions(+), 0 deletions(-)
 create mode 100644 drivers/gpio/Makefile
 create mode 100644 drivers/gpio/pca953x.c
 create mode 100644 include/gpio/pca953x.h

diff --git a/Makefile b/Makefile
index fceb8a2..40c08a7 100644
--- a/Makefile
+++ b/Makefile
@@ -221,6 +221,7 @@ LIBS += disk/libdisk.a
 LIBS += drivers/bios_emulator/libatibiosemu.a
 LIBS += drivers/block/libblock.a
 LIBS += drivers/dma/libdma.a
+LIBS += drivers/gpio/libgpio.a
 LIBS += drivers/hwmon/libhwmon.a
 LIBS += drivers/i2c/libi2c.a
 LIBS += drivers/input/libinput.a
@@ -396,6 +397,7 @@ TAG_SUBDIRS += disk
 TAG_SUBDIRS += common
 TAG_SUBDIRS += drivers/bios_emulator
 TAG_SUBDIRS += drivers/block
+TAG_SUBDIRS += drivers/gpio
 TAG_SUBDIRS += drivers/hwmon
 TAG_SUBDIRS += drivers/i2c
 TAG_SUBDIRS += drivers/input
diff --git a/README b/README
index ebee20f..73bed41 100644
--- a/README
+++ b/README
@@ -601,6 +601,7 @@ The following options need to be configured:
CONFIG_CMD_MII  * MII utility commands
CONFIG_CMD_NAND * NAND support
CONFIG_CMD_NETbootp, tftpboot, rarpboot
+   CONFIG_CMD_PCA953X  * PCA953x I2C gpio commands
CONFIG_CMD_PCI  * pciinfo
CONFIG_CMD_PCMCIA   * PCMCIA support
CONFIG_CMD_PING * send ICMP ECHO_REQUEST to network
@@ -678,6 +679,12 @@ The following options need to be configured:
Note that if the RTC uses I2C, then the I2C interface
must also be configured. See I2C Support, below.
 
+- GPIO Support:
+   CONFIG_PCA953X  - use NXP's PCA953X series I2C GPIO
+
+   Note that if the GPIO device uses I2C, then the I2C interface
+   must also be configured. See I2C Support, below.
+
 - Timestamp Support:
 
When CONFIG_TIMESTAMP is selected, the timestamp
diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
new file mode 100644
index 000..dd618ed
--- /dev/null
+++ b/drivers/gpio/Makefile
@@ -0,0 +1,47 @@
+#
+# Copyright 2000-2008
+# Wolfgang Denk, DENX Software Engineering, [EMAIL PROTECTED]
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB:= $(obj)libgpio.a
+
+COBJS-$(CONFIG_PCA953X)+= pca953x.o
+
+COBJS  := $(COBJS-y)
+SRCS   := $(COBJS:.o=.c)
+OBJS   := $(addprefix $(obj),$(COBJS))
+
+all:   $(LIB)
+
+$(LIB):$(obj).depend $(OBJS)
+   $(AR) $(ARFLAGS) $@ $(OBJS)
+
+
+#
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+
diff --git a/drivers/gpio/pca953x.c b/drivers/gpio/pca953x.c
new file mode 100644
index 000..317241a
--- /dev/null
+++ b/drivers/gpio/pca953x.c
@@ -0,0 +1,186 @@
+/*
+ * Copyright 2008 Extreme Engineering Solutions, Inc.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * Version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/*
+ * Driver for NXP's 4 and 8 bit I2C gpio expanders (eg pca9537, pca9557, etc)
+ * TODO: 

[U-Boot] [PATCH 2/3] Add support for Maxim's DS4510 I2C device

2008-10-23 Thread Peter Tyser
Initial support for the DS4510, a CPU supervisor with
integrated EEPROM, SRAM, and 4 programmable non-volatile
GPIO pins. The CONFIG_DS4510 define enables support
for the device while the CONFIG_CMD_DS4510 define
enables the ds4510 command.

Signed-off-by: Peter Tyser <[EMAIL PROTECTED]>
---
 README|2 +
 drivers/gpio/Makefile |1 +
 drivers/gpio/ds4510.c |  344 +
 include/gpio/ds4510.h |   75 +++
 4 files changed, 422 insertions(+), 0 deletions(-)
 create mode 100644 drivers/gpio/ds4510.c
 create mode 100644 include/gpio/ds4510.h

diff --git a/README b/README
index 73bed41..2c0a19f 100644
--- a/README
+++ b/README
@@ -572,6 +572,7 @@ The following options need to be configured:
CONFIG_CMD_DHCP * DHCP support
CONFIG_CMD_DIAG * Diagnostics
CONFIG_CMD_DOC  * Disk-On-Chip Support
+   CONFIG_CMD_DS4510   * ds4510 I2C gpio/memory commands
CONFIG_CMD_DTT  * Digital Therm and Thermostat
CONFIG_CMD_ECHO   echo arguments
CONFIG_CMD_EEPROM   * EEPROM read/write support
@@ -681,6 +682,7 @@ The following options need to be configured:
 
 - GPIO Support:
CONFIG_PCA953X  - use NXP's PCA953X series I2C GPIO
+   CONFIG_DS4510   - use Maxim's DS4510 I2C GPIO/eeprom
 
Note that if the GPIO device uses I2C, then the I2C interface
must also be configured. See I2C Support, below.
diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
index dd618ed..11f0903 100644
--- a/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile
@@ -26,6 +26,7 @@ include $(TOPDIR)/config.mk
 LIB:= $(obj)libgpio.a
 
 COBJS-$(CONFIG_PCA953X)+= pca953x.o
+COBJS-$(CONFIG_DS4510) += ds4510.o
 
 COBJS  := $(COBJS-y)
 SRCS   := $(COBJS:.o=.c)
diff --git a/drivers/gpio/ds4510.c b/drivers/gpio/ds4510.c
new file mode 100644
index 000..8b9a836
--- /dev/null
+++ b/drivers/gpio/ds4510.c
@@ -0,0 +1,344 @@
+/*
+ * Copyright 2008 Extreme Engineering Solutions, Inc.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * Version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/*
+ * Driver for DS4510, a CPU supervisor with integrated EEPROM, SRAM,
+ * and 4 programmable non-volatile GPIO pins.
+ */
+
+#include 
+#include 
+#include 
+#include 
+
+/*
+ * Write to DS4510, taking page boundaries into account
+ */
+int ds4510_mem_write(uint8_t chip, int offset, uint8_t *buf, int count)
+{
+   int wrlen;
+   int i = 0;
+
+   do {
+   wrlen = DS4510_EEPROM_PAGE_SIZE -
+   DS4510_EEPROM_PAGE_OFFSET(offset);
+   if (count < wrlen)
+   wrlen = count;
+   i2c_write(chip, offset, 1, &buf[i], wrlen);
+
+   /* This delay isn't needed for SRAM writes but shouldn't delay
+* things too much, so do it unconditionally for simplicity */
+   udelay(DS4510_EEPROM_PAGE_WRITE_DELAY_MS * 1000);
+   count -= wrlen;
+   offset += wrlen;
+   i += wrlen;
+   } while (count > 0);
+
+   return 0;
+}
+
+/*
+ * General read from DS4510
+ */
+int ds4510_mem_read(uint8_t chip, int offset, uint8_t *buf, int count)
+{
+   return i2c_read(chip, offset, 1, buf, count);
+}
+
+/*
+ * Write SEE bit in config register.
+ * nv = 0 - Writes to SEEPROM registers behave like EEPROM
+ * nv = 1 - Writes to SEEPROM registers behave like SRAM
+ */
+int ds4510_see_write(uint8_t chip, uint8_t nv)
+{
+   uint8_t data;
+
+   if (i2c_read(chip, DS4510_CFG, 1, &data, 1))
+   return -1;
+
+   if (nv) /* Treat SEEPROM bits as EEPROM */
+   data &= ~DS4510_CFG_SEE;
+   else/* Treat SEEPROM bits as SRAM */
+   data |= DS4510_CFG_SEE;
+
+   return ds4510_mem_write(chip, DS4510_CFG, &data, 1);
+}
+
+/*
+ * Write de-assertion of reset signal delay
+ */
+int ds4510_rstdelay_write(uint8_t chip, uint8_t delay)
+{
+   uint8_t data;
+
+   if (i2c_read(chip, DS4510_RSTDELAY, 1, &data, 1))
+   return -1;
+
+   data &= ~DS4510_RSTDELAY_MASK;
+   data |= delay & DS4510_RSTDELAY_MASK;
+
+   return ds4510_mem_write(chip, DS4510_RSTDELAY, &data, 1);
+}
+
+/*
+ * Write pullup characteristics of IO pins
+ */

Re: [U-Boot] CFI Driver Problem: flash not ready

2008-10-23 Thread Wolfgang Denk
Dear Scott,

In message <[EMAIL PROTECTED]> you wrote:
> 
> > Why the heck does flash_is_busy() return 0 when the flashobviously is
> > still busy?
> 
> Does this use the toggle bit detection? I saw the same symptoms
> with Nios II. Basically, the memory controller was reading the
> 16-bit flash twice to obtain a full 32-bit word, then returning just
> the first 16-bits. So, I would never see the toggle bit changing.
> 
> Not sure if this is similar to your situation ... but it was a real
> pain-in-the-butt to finally understand what was happening in my
> situation.

My situation is indeed similar. The 64 bit read (which is supposed to
be implemented by flash_read64()) is in fact broken downinto  two  32
bit reads, with the consequence that flash_toggle() does not work any
more,  because  of  reading the *same* addresses twice we are reading
alternate addresses (addr, addr+4, addr, addr+4).

This patch fixes the problem for me:


diff --git a/drivers/mtd/cfi_flash.c b/drivers/mtd/cfi_flash.c
index c40bf66..24e9b9f 100644
--- a/drivers/mtd/cfi_flash.c
+++ b/drivers/mtd/cfi_flash.c
@@ -596,7 +596,8 @@ static int flash_toggle (flash_info_t * info, flash_sect_t 
sect,
retval = flash_read32(addr) != flash_read32(addr);
break;
case FLASH_CFI_64BIT:
-   retval = flash_read64(addr) != flash_read64(addr);
+   retval = ( (flash_read32( addr ) != flash_read32( addr )) ||
+  (flash_read32(addr+4) != flash_read32(addr+4)) );
break;
default:
retval = 0;

However, I'm not really happy about  this.  Maybe  we  should  really
implement an atomic 64 bit read operation for flash_read64()? But the
only solution I could come up for this would be pretty complex:

save MSR;
set Floating Point enable bit in MSR;
use "lfd" instruction to perform atomic 64 bit read;
use "stfd" to store value to temporary variable on stack;
load u64 from temporary variable;
restore saved MSR;
return u64 value;

Is this worth the trouble?

Is it valid to assume that a processor which has the flashon a 64 bit
bus will also have a FPU?

Would ne need to save/restore the FP register used here?

Best regards,

Wolfgang Denk

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DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: [EMAIL PROTECTED]
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Re: [U-Boot] [PATCH 2/3] iMX31: Add support to copy NAND Flash code to RAM

2008-10-23 Thread Alan Carvalho de Assis
Hi Guennadi,

On Thu, Oct 23, 2008 at 4:10 PM, Guennadi Liakhovetski <[EMAIL PROTECTED]> 
wrote:
>
> Last time Scott Wood suggested to use nand_spl you replied "I think using
> nand_spl is the best approach, but it will needs more effort to complete."
> and "Anyway, right now we can have iMX31PDK booting with this code as an
> option for users willing to use U-Boot in this board." So, what's the
> status of this effort? If this your new submission, which still doesn't
> use nand_spl is not really targeted for upstream merge, I think, it would
> be better not to mark these mails "PATCH". Or have I missed anything?
>

This patch is just a rebase of previous patch, to be merged on
u-boot-arm/master repository.
I don't have nand_spl working until now.

I am new sending patches to u-boot mailing list. So what is the
problem when calling it of "PATCH"? Please, let me know about my
mistake, can you explain about it?

> Thanks
> Guennadi
>

Best Regards,

Alan
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Re: [U-Boot] [PATCH 10/10] 86xx: Convert all fsl_pci_init users to new APIs

2008-10-23 Thread Jon Loeliger
> Converted MPC8610HCPD, MPC8641HPCN, and SBC8641D to use
> fsl_pci_setup_inbound_windows() and ft_fsl_pci_setup().
> 
> With these changes the board code is a bit smaller and we get dma-ranges
> set in the device tree for these boards.
> 
> Signed-off-by: Kumar Gala <[EMAIL PROTECTED]>
> ---

ACK.

jdl
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