Re: [Mesa-dev] big endian: r600g

2015-08-19 Thread Michel Dänzer
On 19.08.2015 15:02, Christian Zigotzky wrote:
> 
> Could you please adapt the r600g driver for the changed PIPE_FORMAT_*
> semantics for big endian machines, please?
> 
> All Power Mac and AMIGA one users can't use AMD Radeon HD7xxx or higher
> for 3D acceleration. The r600g driver needs to be adapted to changes in
> the way the Gallium3D infrastructure deals with big endian hosts.
> 
> Bug report: https://bugs.freedesktop.org/show_bug.cgi?id=72877

I'm afraid this kind of request isn't going to get you anywhere. The
problem is that there's nobody working on Mesa who cares about those
platforms. You'd need to find somebody who cares about those platforms
and who can work on fixing the issues.


-- 
Earthling Michel Dänzer   |   http://www.amd.com
Libre software enthusiast | Mesa and X developer
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[Mesa-dev] big endian: r600g

2015-08-19 Thread Christian Zigotzky

Hi Michel,

Thank you for your answer. I don't have an idea anymore. Could you tell 
me which files we have to modify? Is it possible to port the AMD 
Catalyst driver to the PowerPC platform? If yes do you know how can I in 
touch with AMD? Please help us. We want to release new PowerPC desktop 
systems but without 3D acceleration it wouldn't be so nice.


Cheers,

Christian

On 19 August 2015 at 09:12 AM, Michel Dänzer wrote:

On 19.08.2015 15:02, Christian Zigotzky wrote:

Could you please adapt the r600g driver for the changed PIPE_FORMAT_*
semantics for big endian machines, please?

All Power Mac and AMIGA one users can't use AMD Radeon HD7xxx or higher
for 3D acceleration. The r600g driver needs to be adapted to changes in
the way the Gallium3D infrastructure deals with big endian hosts.

Bug report: https://bugs.freedesktop.org/show_bug.cgi?id=72877

I'm afraid this kind of request isn't going to get you anywhere. The
problem is that there's nobody working on Mesa who cares about those
platforms. You'd need to find somebody who cares about those platforms
and who can work on fixing the issues.




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[Mesa-dev] [PATCH 2/2] r600: Turn 'r600_shader_key' struct into union

2015-08-19 Thread Edward O'Callaghan
From: Edward O'Callaghan 

This struct was getting a bit crowded, following the lead of
radeonsi, mirror the idea of having sub-structures for each
shader type. Turning 'r600_shader_key' into an union saves
some trivial memory and CPU cycles for the shader keys.

Signed-off-by: Edward O'Callaghan 
---
 src/gallium/drivers/r600/r600_pipe.h |  4 ++--
 src/gallium/drivers/r600/r600_shader.c   | 30 ++--
 src/gallium/drivers/r600/r600_shader.h   | 21 +++
 src/gallium/drivers/r600/r600_state_common.c | 26 
 4 files changed, 43 insertions(+), 38 deletions(-)

diff --git a/src/gallium/drivers/r600/r600_pipe.h 
b/src/gallium/drivers/r600/r600_pipe.h
index 9b66105..384ba80 100644
--- a/src/gallium/drivers/r600/r600_pipe.h
+++ b/src/gallium/drivers/r600/r600_pipe.h
@@ -90,7 +90,7 @@
 
 struct r600_context;
 struct r600_bytecode;
-struct r600_shader_key;
+union  r600_shader_key;
 
 /* This is an atom containing GPU commands that never change.
  * This is supposed to be copied directly into the CS. */
@@ -643,7 +643,7 @@ void r600_resource_copy_region(struct pipe_context *ctx,
 /* r600_shader.c */
 int r600_pipe_shader_create(struct pipe_context *ctx,
struct r600_pipe_shader *shader,
-   struct r600_shader_key key);
+   union r600_shader_key key);
 
 void r600_pipe_shader_destroy(struct pipe_context *ctx, struct 
r600_pipe_shader *shader);
 
diff --git a/src/gallium/drivers/r600/r600_shader.c 
b/src/gallium/drivers/r600/r600_shader.c
index 8d1f95a..6cbfd1b 100644
--- a/src/gallium/drivers/r600/r600_shader.c
+++ b/src/gallium/drivers/r600/r600_shader.c
@@ -62,7 +62,7 @@ The compiler must issue the source argument to slots z, y, 
and x
 
 static int r600_shader_from_tgsi(struct r600_context *rctx,
 struct r600_pipe_shader *pipeshader,
-struct r600_shader_key key);
+union r600_shader_key key);
 
 
 static void r600_add_gpr_array(struct r600_shader *ps, int start_gpr,
@@ -133,7 +133,7 @@ static int store_shader(struct pipe_context *ctx,
 
 int r600_pipe_shader_create(struct pipe_context *ctx,
struct r600_pipe_shader *shader,
-   struct r600_shader_key key)
+   union r600_shader_key key)
 {
struct r600_context *rctx = (struct r600_context *)ctx;
struct r600_pipe_shader_selector *sel = shader->selector;
@@ -141,7 +141,7 @@ int r600_pipe_shader_create(struct pipe_context *ctx,
bool dump = r600_can_dump_shader(&rctx->screen->b, sel->tokens);
unsigned use_sb = !(rctx->screen->b.debug_flags & DBG_NO_SB);
unsigned sb_disasm = use_sb || (rctx->screen->b.debug_flags & 
DBG_SB_DISASM);
-   unsigned export_shader = key.vs_as_es;
+   unsigned export_shader = key.vs.as_es;
 
shader->shader.bc.isa = rctx->isa;
 
@@ -1802,7 +1802,7 @@ static int emit_gs_ring_writes(struct r600_shader_ctx 
*ctx, bool ind)
 
 static int r600_shader_from_tgsi(struct r600_context *rctx,
 struct r600_pipe_shader *pipeshader,
-struct r600_shader_key key)
+union r600_shader_key key)
 {
struct r600_screen *rscreen = rctx->screen;
struct r600_shader *shader = &pipeshader->shader;
@@ -1816,7 +1816,7 @@ static int r600_shader_from_tgsi(struct r600_context 
*rctx,
unsigned opcode;
int i, j, k, r = 0;
int next_param_base = 0, next_clip_base;
-   int max_color_exports = MAX2(key.nr_cbufs, 1);
+   int max_color_exports = MAX2(key.ps.nr_cbufs, 1);
/* Declarations used by llvm code */
bool use_llvm = false;
bool indirect_gprs;
@@ -1830,8 +1830,8 @@ static int r600_shader_from_tgsi(struct r600_context 
*rctx,
ctx.shader = shader;
ctx.native_integers = true;
 
-   shader->vs_as_gs_a = key.vs_as_gs_a;
-   shader->vs_as_es = key.vs_as_es;
+   shader->vs_as_gs_a = key.vs.as_gs_a;
+   shader->vs_as_es = key.vs.as_es;
 
r600_bytecode_init(ctx.bc, rscreen->b.chip_class, rscreen->b.family,
   rscreen->has_compressed_msaa_texturing);
@@ -1844,9 +1844,9 @@ static int r600_shader_from_tgsi(struct r600_context 
*rctx,
shader->processor_type = ctx.type;
ctx.bc->type = shader->processor_type;
 
-   ring_outputs = key.vs_as_es || (ctx.type == TGSI_PROCESSOR_GEOMETRY);
+   ring_outputs = key.vs.as_es || (ctx.type == TGSI_PROCESSOR_GEOMETRY);
 
-   if (key.vs_as_es) {
+   if (key.vs.as_es) {
ctx.gs_for_vs = &rctx->gs_shader->current->shader;
} else {
ctx.gs_for_vs = NULL;
@@ -1866,7 +1866,7 @@ static int r600_shader_from_tgsi(struct r600_context 
*rctx,
shader->nr_ps_color_exports = 0;
shader->nr_p

[Mesa-dev] [PATCH 1/2] r600: Rewrite r600_shader_selector_key() to use a switch stmt

2015-08-19 Thread Edward O'Callaghan
From: Edward O'Callaghan 

Signed-off-by: Edward O'Callaghan 
---
 src/gallium/drivers/r600/r600_state_common.c | 24 +---
 1 file changed, 17 insertions(+), 7 deletions(-)

diff --git a/src/gallium/drivers/r600/r600_state_common.c 
b/src/gallium/drivers/r600/r600_state_common.c
index aa4a8d0..c7445b8 100644
--- a/src/gallium/drivers/r600/r600_state_common.c
+++ b/src/gallium/drivers/r600/r600_state_common.c
@@ -709,7 +709,18 @@ static inline struct r600_shader_key 
r600_shader_selector_key(struct pipe_contex
struct r600_shader_key key;
memset(&key, 0, sizeof(key));
 
-   if (sel->type == PIPE_SHADER_FRAGMENT) {
+   switch (sel->type) {
+   case PIPE_SHADER_VERTEX: {
+   key.vs_as_es = (rctx->gs_shader != NULL);
+   if (rctx->ps_shader->current->shader.gs_prim_id_input && 
!rctx->gs_shader) {
+   key.vs_as_gs_a = true;
+   key.vs_prim_id_out = 
rctx->ps_shader->current->shader.input[rctx->ps_shader->current->shader.ps_prim_id_input].spi_sid;
+   }
+   break;
+   }
+   case PIPE_SHADER_GEOMETRY:
+   break;
+   case PIPE_SHADER_FRAGMENT: {
key.color_two_side = rctx->rasterizer && 
rctx->rasterizer->two_side;
key.alpha_to_one = rctx->alpha_to_one &&
   rctx->rasterizer && 
rctx->rasterizer->multisample_enable &&
@@ -718,13 +729,12 @@ static inline struct r600_shader_key 
r600_shader_selector_key(struct pipe_contex
/* Dual-source blending only makes sense with nr_cbufs == 1. */
if (key.nr_cbufs == 1 && rctx->dual_src_blend)
key.nr_cbufs = 2;
-   } else if (sel->type == PIPE_SHADER_VERTEX) {
-   key.vs_as_es = (rctx->gs_shader != NULL);
-   if (rctx->ps_shader->current->shader.gs_prim_id_input && 
!rctx->gs_shader) {
-   key.vs_as_gs_a = true;
-   key.vs_prim_id_out = 
rctx->ps_shader->current->shader.input[rctx->ps_shader->current->shader.ps_prim_id_input].spi_sid;
-   }
+   break;
}
+   default:
+   assert(0);
+   }
+
return key;
 }
 
-- 
2.4.3

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[Mesa-dev] [PATCH 0/2] r600g: minor refactor for tessellation support [V.2]

2015-08-19 Thread Edward O'Callaghan
From: Edward O'Callaghan 

This gets some churn out the way while prepping for r600g tessellation
support that I am trying to work on. Since that will take me some time
this also avoids rebases and the such like while keeping seperate
indirectly related patches to the actual tessellation support.

Edward O'Callaghan (2):
  r600: Rewrite r600_shader_selector_key() to use a switch stmt
  r600: Turn 'r600_shader_key' struct into union

 src/gallium/drivers/r600/r600_pipe.h |  4 +--
 src/gallium/drivers/r600/r600_shader.c   | 30 ++--
 src/gallium/drivers/r600/r600_shader.h   | 21 --
 src/gallium/drivers/r600/r600_state_common.c | 42 +---
 4 files changed, 56 insertions(+), 41 deletions(-)

-- 
2.4.3

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[Mesa-dev] [PATCH] clover: fix llvm 3.5 build error

2015-08-19 Thread Zoltan Gilian
There is no MDOperand in llvm 3.5.

v2: Check if kernel metadata is present to avoid crash (EdB).
v3: Second attempt to avoid crash: switch off metadata query for llvm < 3.6.
---
 .../state_trackers/clover/llvm/invocation.cpp  | 33 ++
 1 file changed, 21 insertions(+), 12 deletions(-)

diff --git a/src/gallium/state_trackers/clover/llvm/invocation.cpp 
b/src/gallium/state_trackers/clover/llvm/invocation.cpp
index 8eb0469..908a296 100644
--- a/src/gallium/state_trackers/clover/llvm/invocation.cpp
+++ b/src/gallium/state_trackers/clover/llvm/invocation.cpp
@@ -346,6 +346,15 @@ namespace {
 
// Kernel metadata
 
+   struct kernel_arg_md {
+  llvm::StringRef type_name;
+  llvm::StringRef access_qual;
+  kernel_arg_md(llvm::StringRef type_name_, llvm::StringRef access_qual_):
+ type_name(type_name_), access_qual(access_qual_) {}
+   };
+
+#if HAVE_LLVM >= 0x0306
+
const llvm::MDNode *
get_kernel_metadata(const llvm::Function *kernel_func) {
   auto mod = kernel_func->getParent();
@@ -356,12 +365,8 @@ namespace {
 
   const llvm::MDNode *kernel_node = nullptr;
   for (unsigned i = 0; i < kernels_node->getNumOperands(); ++i) {
-#if HAVE_LLVM >= 0x0306
  auto func = llvm::mdconst::dyn_extract(
-#else
- auto func = llvm::dyn_cast(
-#endif
-
kernels_node->getOperand(i)->getOperand(0));
+   kernels_node->getOperand(i)->getOperand(0));
  if (func == kernel_func) {
 kernel_node = kernels_node->getOperand(i);
 break;
@@ -387,13 +392,6 @@ namespace {
   return node;
}
 
-   struct kernel_arg_md {
-  llvm::StringRef type_name;
-  llvm::StringRef access_qual;
-  kernel_arg_md(llvm::StringRef type_name_, llvm::StringRef access_qual_):
- type_name(type_name_), access_qual(access_qual_) {}
-   };
-
std::vector
get_kernel_arg_md(const llvm::Function *kernel_func) {
   auto num_args = kernel_func->getArgumentList().size();
@@ -415,6 +413,17 @@ namespace {
   return res;
}
 
+#else
+
+   std::vector
+   get_kernel_arg_md(const llvm::Function *kernel_func) {
+  return std::vector(
+kernel_func->getArgumentList().size(),
+kernel_arg_md("", ""));
+   }
+
+#endif // HAVE_LLVM >= 0x0306
+
std::vector
get_kernel_args(const llvm::Module *mod, const std::string &kernel_name,
const clang::LangAS::Map &address_spaces) {
-- 
2.4.6

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Re: [Mesa-dev] [PATCH v2] i965: Refactor image uniform setup

2015-08-19 Thread Francisco Jerez
Jason Ekstrand  writes:

> Previously, setting up image uniforms relied on being called after
> fs_visitor::uniforms was set and with fs_visitor::uniforms not allocating
> space for it.  This made sense in an ir_visitor world because the visitor
> assigns locations and uploads data as it walks through the variables.  In
> NIR it also happened to work because nir_lower_io assumed zero space for
> images.  In the near future, we will be able to reserve space using
> nir_lower_io and these invariants will be broken.
>
> This commit makes setup_image_uniforms take a pointer to the location in
> the prog_data params array that indicates where the image uniforms should
> be stored.  This way it can be called from anywhere in the shader setup.
>
> v2: Fix nir_setup_uniform to correctly correspond with this change
> (rebase fail)
>
> Cc: Francisco Jerez 
> Cc: Kenneth Graunke 
> ---
>  src/mesa/drivers/dri/i965/brw_fs.cpp | 12 
>  src/mesa/drivers/dri/i965/brw_fs.h   |  3 ---
>  src/mesa/drivers/dri/i965/brw_fs_nir.cpp |  6 --
>  src/mesa/drivers/dri/i965/brw_shader.cpp | 28 +---
>  src/mesa/drivers/dri/i965/brw_shader.h   |  5 ++---
>  5 files changed, 27 insertions(+), 27 deletions(-)
>
> diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp 
> b/src/mesa/drivers/dri/i965/brw_fs.cpp
> index 82cb499..d1550e6 100644
> --- a/src/mesa/drivers/dri/i965/brw_fs.cpp
> +++ b/src/mesa/drivers/dri/i965/brw_fs.cpp
> @@ -942,18 +942,6 @@ fs_visitor::import_uniforms(fs_visitor *v)
> this->param_size = v->param_size;
>  }
>  
> -void
> -fs_visitor::setup_vector_uniform_values(const gl_constant_value *values, 
> unsigned n)
> -{
> -   static const gl_constant_value zero = { 0 };
> -
> -   for (unsigned i = 0; i < n; ++i)
> -  stage_prog_data->param[uniforms++] = &values[i];
> -
> -   for (unsigned i = n; i < 4; ++i)
> -  stage_prog_data->param[uniforms++] = &zero;
> -}
> -
>  fs_reg *
>  fs_visitor::emit_fragcoord_interpolation(bool pixel_center_integer,
>   bool origin_upper_left)
> diff --git a/src/mesa/drivers/dri/i965/brw_fs.h 
> b/src/mesa/drivers/dri/i965/brw_fs.h
> index 975183e..28fcfa3 100644
> --- a/src/mesa/drivers/dri/i965/brw_fs.h
> +++ b/src/mesa/drivers/dri/i965/brw_fs.h
> @@ -291,9 +291,6 @@ public:
>  
> struct brw_reg interp_reg(int location, int channel);
>  
> -   virtual void setup_vector_uniform_values(const gl_constant_value *values,
> -unsigned n);
> -
> int implied_mrf_writes(fs_inst *inst);
>  
> virtual void dump_instructions();
> diff --git a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp 
> b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
> index ce4153d..c8ea649 100644
> --- a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
> +++ b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
> @@ -244,10 +244,12 @@ fs_visitor::nir_setup_uniform(nir_variable *var)
>* space for them here at the end of the parameter array.
>*/
>   var->data.driver_location = uniforms;
> - param_size[uniforms] =
> + unsigned size =
>  BRW_IMAGE_PARAM_SIZE * MAX2(storage->array_elements, 1);
>  
> - setup_image_uniform_values(storage);
> + setup_image_uniform_values(stage_prog_data->param + uniforms, 
> storage);
> + param_size[uniforms] = size;
> + uniforms += size;
>} else {
>   unsigned slots = storage->type->component_slots();
>   if (storage->array_elements)
> diff --git a/src/mesa/drivers/dri/i965/brw_shader.cpp 
> b/src/mesa/drivers/dri/i965/brw_shader.cpp
> index 6b92806..b31ae9b 100644
> --- a/src/mesa/drivers/dri/i965/brw_shader.cpp
> +++ b/src/mesa/drivers/dri/i965/brw_shader.cpp
> @@ -1419,8 +1419,22 @@ 
> backend_shader::assign_common_binding_table_offsets(uint32_t 
> next_binding_table_
> /* prog_data->base.binding_table.size will be set by 
> brw_mark_surface_used. */
>  }
>  
> +static void
> +setup_vector_uniform_values(const gl_constant_value ***dst,
> +const gl_constant_value *values, unsigned n)
> +{
> +   static const gl_constant_value zero = { 0 };
> +
> +   for (unsigned i = 0; i < n; ++i)
> +  *((*dst)++) = &values[i];
> +
> +   for (unsigned i = n; i < 4; ++i)
> +  *((*dst)++) = &zero;
> +}
> +
>  void
> -backend_shader::setup_image_uniform_values(const gl_uniform_storage *storage)
> +backend_shader::setup_image_uniform_values(const gl_constant_value 
> **prog_param,
> +   const gl_uniform_storage *storage)
>  {
> const unsigned stage = _mesa_program_enum_to_shader_stage(prog->Target);
>  
> @@ -1431,17 +1445,17 @@ backend_shader::setup_image_uniform_values(const 
> gl_uniform_storage *storage)
>/* Upload the brw_image_param structure.  The order is expected to 
> match
> * the BRW_IMAGE_PARAM_*_OFFSET defines.
> */
> -  setup_vector_uniform_values(
> +

Re: [Mesa-dev] [PATCH 2/2] r600: Turn 'r600_shader_key' struct into union

2015-08-19 Thread Marek Olšák
For the series:

Reviewed-by: Marek Olšák 

Marek

On Wed, Aug 19, 2015 at 10:58 AM, Edward O'Callaghan
 wrote:
> From: Edward O'Callaghan 
>
> This struct was getting a bit crowded, following the lead of
> radeonsi, mirror the idea of having sub-structures for each
> shader type. Turning 'r600_shader_key' into an union saves
> some trivial memory and CPU cycles for the shader keys.
>
> Signed-off-by: Edward O'Callaghan 
> ---
>  src/gallium/drivers/r600/r600_pipe.h |  4 ++--
>  src/gallium/drivers/r600/r600_shader.c   | 30 
> ++--
>  src/gallium/drivers/r600/r600_shader.h   | 21 +++
>  src/gallium/drivers/r600/r600_state_common.c | 26 
>  4 files changed, 43 insertions(+), 38 deletions(-)
>
> diff --git a/src/gallium/drivers/r600/r600_pipe.h 
> b/src/gallium/drivers/r600/r600_pipe.h
> index 9b66105..384ba80 100644
> --- a/src/gallium/drivers/r600/r600_pipe.h
> +++ b/src/gallium/drivers/r600/r600_pipe.h
> @@ -90,7 +90,7 @@
>
>  struct r600_context;
>  struct r600_bytecode;
> -struct r600_shader_key;
> +union  r600_shader_key;
>
>  /* This is an atom containing GPU commands that never change.
>   * This is supposed to be copied directly into the CS. */
> @@ -643,7 +643,7 @@ void r600_resource_copy_region(struct pipe_context *ctx,
>  /* r600_shader.c */
>  int r600_pipe_shader_create(struct pipe_context *ctx,
> struct r600_pipe_shader *shader,
> -   struct r600_shader_key key);
> +   union r600_shader_key key);
>
>  void r600_pipe_shader_destroy(struct pipe_context *ctx, struct 
> r600_pipe_shader *shader);
>
> diff --git a/src/gallium/drivers/r600/r600_shader.c 
> b/src/gallium/drivers/r600/r600_shader.c
> index 8d1f95a..6cbfd1b 100644
> --- a/src/gallium/drivers/r600/r600_shader.c
> +++ b/src/gallium/drivers/r600/r600_shader.c
> @@ -62,7 +62,7 @@ The compiler must issue the source argument to slots z, y, 
> and x
>
>  static int r600_shader_from_tgsi(struct r600_context *rctx,
>  struct r600_pipe_shader *pipeshader,
> -struct r600_shader_key key);
> +union r600_shader_key key);
>
>
>  static void r600_add_gpr_array(struct r600_shader *ps, int start_gpr,
> @@ -133,7 +133,7 @@ static int store_shader(struct pipe_context *ctx,
>
>  int r600_pipe_shader_create(struct pipe_context *ctx,
> struct r600_pipe_shader *shader,
> -   struct r600_shader_key key)
> +   union r600_shader_key key)
>  {
> struct r600_context *rctx = (struct r600_context *)ctx;
> struct r600_pipe_shader_selector *sel = shader->selector;
> @@ -141,7 +141,7 @@ int r600_pipe_shader_create(struct pipe_context *ctx,
> bool dump = r600_can_dump_shader(&rctx->screen->b, sel->tokens);
> unsigned use_sb = !(rctx->screen->b.debug_flags & DBG_NO_SB);
> unsigned sb_disasm = use_sb || (rctx->screen->b.debug_flags & 
> DBG_SB_DISASM);
> -   unsigned export_shader = key.vs_as_es;
> +   unsigned export_shader = key.vs.as_es;
>
> shader->shader.bc.isa = rctx->isa;
>
> @@ -1802,7 +1802,7 @@ static int emit_gs_ring_writes(struct r600_shader_ctx 
> *ctx, bool ind)
>
>  static int r600_shader_from_tgsi(struct r600_context *rctx,
>  struct r600_pipe_shader *pipeshader,
> -struct r600_shader_key key)
> +union r600_shader_key key)
>  {
> struct r600_screen *rscreen = rctx->screen;
> struct r600_shader *shader = &pipeshader->shader;
> @@ -1816,7 +1816,7 @@ static int r600_shader_from_tgsi(struct r600_context 
> *rctx,
> unsigned opcode;
> int i, j, k, r = 0;
> int next_param_base = 0, next_clip_base;
> -   int max_color_exports = MAX2(key.nr_cbufs, 1);
> +   int max_color_exports = MAX2(key.ps.nr_cbufs, 1);
> /* Declarations used by llvm code */
> bool use_llvm = false;
> bool indirect_gprs;
> @@ -1830,8 +1830,8 @@ static int r600_shader_from_tgsi(struct r600_context 
> *rctx,
> ctx.shader = shader;
> ctx.native_integers = true;
>
> -   shader->vs_as_gs_a = key.vs_as_gs_a;
> -   shader->vs_as_es = key.vs_as_es;
> +   shader->vs_as_gs_a = key.vs.as_gs_a;
> +   shader->vs_as_es = key.vs.as_es;
>
> r600_bytecode_init(ctx.bc, rscreen->b.chip_class, rscreen->b.family,
>rscreen->has_compressed_msaa_texturing);
> @@ -1844,9 +1844,9 @@ static int r600_shader_from_tgsi(struct r600_context 
> *rctx,
> shader->processor_type = ctx.type;
> ctx.bc->type = shader->processor_type;
>
> -   ring_outputs = key.vs_as_es || (ctx.type == TGSI_PROCESSOR_GEOMETRY);
> +   ring_outputs = key.vs.as_es || (ctx.type == TGSI_PROCESSOR_GEOMETRY);
>
> -   if (

Re: [Mesa-dev] Can we use anonymous unions?

2015-08-19 Thread Marek Olšák
On Wed, Aug 19, 2015 at 2:47 AM, Jason Ekstrand  wrote:
> On Tue, Aug 18, 2015 at 5:36 PM, Ian Romanick  wrote:
>> On 08/18/2015 10:08 AM, Connor Abbott wrote:
>>> On Tue, Aug 18, 2015 at 9:56 AM, Kenneth Graunke  
>>> wrote:
 Hey,

 I was thinking about using an anonymous union.  Specifically, something
 like:

 struct shader {
...
union {
   struct geometry_shader_info gs;
   struct tess_eval_shader_info tes;
   ...
};
 };

 Are those acceptable in Mesa?  I don't think we've traditionally used
 them, but I'm not sure why.  Apparently they're part of C11, though not
 part of C99.  However, GCC allows them, presumably Clang, and it looks
 like MSVC 2005 supports them in C:

 https://msdn.microsoft.com/en-us/library/y9zewe0d%28v=vs.80%29.aspx

 We might be able to use these to avoid some of our fun
 thing->base.Base.base.program.Base.base shenanigans...

 --Ken

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>>>
>>> Well, we already use anonymous unions in various places in NIR (for
>>> example, the definition of nir_dest and nir_src), so they should be ok
>>> for core Mesa. IIRC there was a problem with combining anonymous
>>> unions and C99-style initializers, but it doesn't sound like you'll be
>>> too worried about that.
>>
>> Hm... is that why I get thousands of uninitialized field warnings?  Or
>> are NIR_SRC_INIT and NIR_DEST_INIT just missing some things?
>
> That depends on how you look at it.  You could say that they are
> missing things.  However, the correct initialization for either a
> nir_src or a nir_dest is effectively a memset to 0.  Since C (and C++)
> guarantee that missing fields in a structure initializer (or compound
> literal) are initialized to 0 as long as one of them is, we get what
> we want without having to have the entire struct layout full of zeros.
> Also, since there is a union or two in there, it makes everything
> easier.

Yes, using {} (C99 only) or {0} initializers is a common way to
initialize structures to zero. If it causes any warnings, they should
be suppressed.

Marek
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Re: [Mesa-dev] [PATCH 2/2] r600: Turn 'r600_shader_key' struct into union

2015-08-19 Thread Dave Airlie
On 19 August 2015 at 18:58, Edward O'Callaghan
 wrote:
> From: Edward O'Callaghan 
>
> This struct was getting a bit crowded, following the lead of
> radeonsi, mirror the idea of having sub-structures for each
> shader type. Turning 'r600_shader_key' into an union saves
> some trivial memory and CPU cycles for the shader keys.

it will save them later, at this point I don't it does save anything,

since the key is 16-bits now, and is 11-bits after this change, which
means it's probably a 32-bit anyways :-)

Still a nice cleanup.

Dave.
>
> Signed-off-by: Edward O'Callaghan 
> ---
>  src/gallium/drivers/r600/r600_pipe.h |  4 ++--
>  src/gallium/drivers/r600/r600_shader.c   | 30 
> ++--
>  src/gallium/drivers/r600/r600_shader.h   | 21 +++
>  src/gallium/drivers/r600/r600_state_common.c | 26 
>  4 files changed, 43 insertions(+), 38 deletions(-)
>
> diff --git a/src/gallium/drivers/r600/r600_pipe.h 
> b/src/gallium/drivers/r600/r600_pipe.h
> index 9b66105..384ba80 100644
> --- a/src/gallium/drivers/r600/r600_pipe.h
> +++ b/src/gallium/drivers/r600/r600_pipe.h
> @@ -90,7 +90,7 @@
>
>  struct r600_context;
>  struct r600_bytecode;
> -struct r600_shader_key;
> +union  r600_shader_key;
>
>  /* This is an atom containing GPU commands that never change.
>   * This is supposed to be copied directly into the CS. */
> @@ -643,7 +643,7 @@ void r600_resource_copy_region(struct pipe_context *ctx,
>  /* r600_shader.c */
>  int r600_pipe_shader_create(struct pipe_context *ctx,
> struct r600_pipe_shader *shader,
> -   struct r600_shader_key key);
> +   union r600_shader_key key);
>
>  void r600_pipe_shader_destroy(struct pipe_context *ctx, struct 
> r600_pipe_shader *shader);
>
> diff --git a/src/gallium/drivers/r600/r600_shader.c 
> b/src/gallium/drivers/r600/r600_shader.c
> index 8d1f95a..6cbfd1b 100644
> --- a/src/gallium/drivers/r600/r600_shader.c
> +++ b/src/gallium/drivers/r600/r600_shader.c
> @@ -62,7 +62,7 @@ The compiler must issue the source argument to slots z, y, 
> and x
>
>  static int r600_shader_from_tgsi(struct r600_context *rctx,
>  struct r600_pipe_shader *pipeshader,
> -struct r600_shader_key key);
> +union r600_shader_key key);
>
>
>  static void r600_add_gpr_array(struct r600_shader *ps, int start_gpr,
> @@ -133,7 +133,7 @@ static int store_shader(struct pipe_context *ctx,
>
>  int r600_pipe_shader_create(struct pipe_context *ctx,
> struct r600_pipe_shader *shader,
> -   struct r600_shader_key key)
> +   union r600_shader_key key)
>  {
> struct r600_context *rctx = (struct r600_context *)ctx;
> struct r600_pipe_shader_selector *sel = shader->selector;
> @@ -141,7 +141,7 @@ int r600_pipe_shader_create(struct pipe_context *ctx,
> bool dump = r600_can_dump_shader(&rctx->screen->b, sel->tokens);
> unsigned use_sb = !(rctx->screen->b.debug_flags & DBG_NO_SB);
> unsigned sb_disasm = use_sb || (rctx->screen->b.debug_flags & 
> DBG_SB_DISASM);
> -   unsigned export_shader = key.vs_as_es;
> +   unsigned export_shader = key.vs.as_es;
>
> shader->shader.bc.isa = rctx->isa;
>
> @@ -1802,7 +1802,7 @@ static int emit_gs_ring_writes(struct r600_shader_ctx 
> *ctx, bool ind)
>
>  static int r600_shader_from_tgsi(struct r600_context *rctx,
>  struct r600_pipe_shader *pipeshader,
> -struct r600_shader_key key)
> +union r600_shader_key key)
>  {
> struct r600_screen *rscreen = rctx->screen;
> struct r600_shader *shader = &pipeshader->shader;
> @@ -1816,7 +1816,7 @@ static int r600_shader_from_tgsi(struct r600_context 
> *rctx,
> unsigned opcode;
> int i, j, k, r = 0;
> int next_param_base = 0, next_clip_base;
> -   int max_color_exports = MAX2(key.nr_cbufs, 1);
> +   int max_color_exports = MAX2(key.ps.nr_cbufs, 1);
> /* Declarations used by llvm code */
> bool use_llvm = false;
> bool indirect_gprs;
> @@ -1830,8 +1830,8 @@ static int r600_shader_from_tgsi(struct r600_context 
> *rctx,
> ctx.shader = shader;
> ctx.native_integers = true;
>
> -   shader->vs_as_gs_a = key.vs_as_gs_a;
> -   shader->vs_as_es = key.vs_as_es;
> +   shader->vs_as_gs_a = key.vs.as_gs_a;
> +   shader->vs_as_es = key.vs.as_es;
>
> r600_bytecode_init(ctx.bc, rscreen->b.chip_class, rscreen->b.family,
>rscreen->has_compressed_msaa_texturing);
> @@ -1844,9 +1844,9 @@ static int r600_shader_from_tgsi(struct r600_context 
> *rctx,
> shader->processor_type = ctx.type;
> ctx.bc->type = shader->processor_type;
>
> -   ring_outpu

Re: [Mesa-dev] [PATCH 09/25] glsl: Add support for image binding qualifiers.

2015-08-19 Thread Francisco Jerez
Timothy Arceri  writes:

> On Mon, 2015-08-17 at 19:45 +0300, Francisco Jerez wrote:
>> Support for binding an image to an image unit explicitly in the shader
>> source is required by both GLSL 4.2 and GLSL ES 3.1, but not by the
>> original ARB_shader_image_load_store extension.
>> ---
>>  src/glsl/ast_to_hir.cpp| 12 +++-
>>  src/glsl/link_uniform_initializers.cpp | 24 +---
>>  2 files changed, 28 insertions(+), 8 deletions(-)
>> 
>> diff --git a/src/glsl/ast_to_hir.cpp b/src/glsl/ast_to_hir.cpp
>> index 06cd6a5..0bf7a1f 100644
>> --- a/src/glsl/ast_to_hir.cpp
>> +++ b/src/glsl/ast_to_hir.cpp
>> @@ -2181,10 +2181,20 @@ validate_binding_qualifier(struct 
>> _mesa_glsl_parse_state *state,
>>  
>>   return false;
>>}
>> +   } else if (state->is_version(420, 310) &&
>> +  var->type->without_array()->is_image()) {
>> +  assert(ctx->Const.MaxImageUnits <= MAX_IMAGE_UNITS);
>> +  if (max_index >= ctx->Const.MaxImageUnits) {
>> + _mesa_glsl_error(loc, state, "Image binding %d exceeds the "
>> +  " maximum number of image units (%d)", max_index,
>> +  ctx->Const.MaxImageUnits);
>> + return false;
>> +  }
>> +
>> } else {
>>_mesa_glsl_error(loc, state,
>> "the \"binding\" qualifier only applies to uniform "
>> -   "blocks, samplers, atomic counters, or arrays 
>> thereof");
>> +   "blocks, opaque variables, or arrays thereof");
>>return false;
>> }
>>  
>> diff --git a/src/glsl/link_uniform_initializers.cpp 
>> b/src/glsl/link_uniform_initializers.cpp
>> index d61ae91..7c6269b 100644
>> --- a/src/glsl/link_uniform_initializers.cpp
>> +++ b/src/glsl/link_uniform_initializers.cpp
>> @@ -101,7 +101,7 @@ copy_constant_to_storage(union gl_constant_value 
>> *storage,
>>  }
>>  
>>  void
>> -set_sampler_binding(gl_shader_program *prog, const char *name, int binding)
>> +set_opaque_binding(gl_shader_program *prog, const char *name, int binding)
>
> I guess you could add a comment the atomics are handled elsewhere but not a
> big deal.
>
> Reviewed-by: Timothy Arceri 
>

| --- a/src/glsl/link_uniform_initializers.cpp
| +++ b/src/glsl/link_uniform_initializers.cpp
| @@ -100,6 +100,11 @@ copy_constant_to_storage(union gl_constant_value 
*storage,
| }
|  }
| 
| +/**
| + * Initialize an opaque uniform from the value of an explicit binding
| + * qualifier specified in the shader.  Atomic counters are different because
| + * they have no storage and should be handled elsewhere.
| + */
|  void
|  set_opaque_binding(gl_shader_program *prog, const char *name, int binding)
|  {

Does that look okay for you?

Thanks.

>
>>  {
>> struct gl_uniform_storage *const storage =
>>get_storage(prog->UniformStorage, prog->NumUniformStorage, name);
>> @@ -127,11 +127,20 @@ set_sampler_binding(gl_shader_program *prog, const 
>> char *name, int binding)
>> for (int sh = 0; sh < MESA_SHADER_STAGES; sh++) {
>>gl_shader *shader = prog->_LinkedShaders[sh];
>>  
>> -  if (shader && storage->sampler[sh].active) {
>> - for (unsigned i = 0; i < elements; i++) {
>> -unsigned index = storage->sampler[sh].index + i;
>> +  if (shader) {
>> + if (storage->type->base_type == GLSL_TYPE_SAMPLER &&
>> + storage->sampler[sh].active) {
>> +for (unsigned i = 0; i < elements; i++) {
>> +   const unsigned index = storage->sampler[sh].index + i;
>> +   shader->SamplerUnits[index] = storage->storage[i].i;
>> +}
>>  
>> -shader->SamplerUnits[index] = storage->storage[i].i;
>> + } else if (storage->type->base_type == GLSL_TYPE_IMAGE &&
>> +storage->image[sh].active) {
>> +for (unsigned i = 0; i < elements; i++) {
>> +   const unsigned index = storage->image[sh].index + i;
>> +   shader->ImageUnits[index] = storage->storage[i].i;
>> +}
>>   }
>>}
>> }
>> @@ -267,8 +276,9 @@ link_set_uniform_initializers(struct gl_shader_program 
>> *prog,
>>   if (var->data.explicit_binding) {
>>  const glsl_type *const type = var->type;
>>  
>> -if (type->without_array()->is_sampler()) {
>> -   linker::set_sampler_binding(prog, var->name, var
>> ->data.binding);
>> +if (type->without_array()->is_sampler() ||
>> +type->without_array()->is_image()) {
>> +   linker::set_opaque_binding(prog, var->name, var
>> ->data.binding);
>>  } else if (var->is_in_buffer_block()) {
>> const glsl_type *const iface_type = var
>> ->get_interface_type();
>>  


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Re: [Mesa-dev] [PATCH] ABI-check: Use more portable bash invocation.

2015-08-19 Thread Eero Tamminen

Hi,

On 08/18/2015 08:59 PM, Matt Turner wrote:

On Tue, Jul 21, 2015 at 2:08 PM, Vinson Lee  wrote:

Fixes 'make check' on FreeBSD.

Signed-off-by: Vinson Lee 
---


Seems fine to me.

Reviewed-by: Matt Turner 

At the same time, I don't have any idea if the scripts actually rely
on bash itself. I think I've heard that Debian has a tool to detect
bash-dependencies in shell scripts that might be of some use.


Debian "devscripts" package contains "checkbashisms".

I've used it to make my own scripts POSIX / Busybox shell compliant and 
it has worked fine for me.



- Eero

PS. About only Bashism that is hard to do in POSIX shell is array 
accesses.  E.g. most things where string slices are used, can also be 
done with POSIX string operations.  For example:

extension=${str##*\.}
if [ $extension = "gz" ]; then
...

(Diligent shell programmer would have as first check:
if [ "$extension" = "$str" ]; then
# no extension
return
fi

)

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Re: [Mesa-dev] [PATCH 2/2][RFC] docs: Add the 2015 ARB extensions

2015-08-19 Thread Eero Tamminen

Hi,

On 08/19/2015 03:18 AM, Ian Romanick wrote:

On 08/12/2015 02:23 PM, Thomas Helland wrote:

2015-08-12 18:56 GMT+02:00 Kenneth Graunke :

On Wednesday, August 12, 2015 06:32:50 PM Thomas Helland wrote:

2015-08-12 17:48 GMT+02:00 Ilia Mirkin :

On Tue, Aug 11, 2015 at 1:48 PM, Thomas Helland
 wrote:

Signed-off-by: Thomas Helland 
---
This adds a section for the extensions nvidia has chosen to
call the "GL ARB 2015 Extensions" unveiled at SIGGRAPH.


There are ARB extensions released every year (or more often, not
sure)... we don't track all ARB extensions. Why are these so special
vs e.g. the ones released along with GL 4.5 but that weren't included
in the spec? Or any of the other ones...



Well. They're not really special I guess. This just follows from the
discussion that went down on irc between me, glennk, fredrikh, ++.


Should GL3.txt just become extension-implementation-status.txt and
list all non-vendor-specific extensions? So far it has stuck to actual
GL versions (and more recently GLES).



We can keep it GL / GLES versions only. Or we can extend it to a
extension-implementation-status.txt thing. Or we can split it
into two different files. I really don't care to much either way.

If we end up adding these extensions to the file then a rename
and adding other ARB's is probably the way to go. There are
positive and negative sides to both approaches, and its not
my call to decide how, and if, we want this. It gives a nice overview
but at the same time it has PR- and "needs-to-be-kept-updated"-
implications that we may not want. I'm all ears for suggestions.

-Thomas


I like the idea of adding an "ARB Extensions" section and listing all
the ARB extensions that aren't part of a particular GL version - simply
in addition to the existing content, rather than reorganizing it.

GL3.txt has been a misnomer for a while, but I don't care whether we
rename it or not; it doesn't bother me.

--Ken


I've assembled a list of extensions I *think* are not demanded by
any current openGL specs, but I may have missed some.
(I find it weird that I VAO's in any of the specs, for example)
I could add all of them to a separate section to track them,
or I can leave it as is and drop this patch. Up to you guys.

2.  GLX_ARB_get_proc_address
4.  WGL_ARB_buffer_region
8.  WGL_ARB_extensions_string
9.  WGL_ARB_pixel_format
10. WGL_ARB_make_current_read
11. WGL_ARB_pbuffer



15. GL_ARB_vertex_blend
16. GL_ARB_matrix_palette


Ilia sent a list of extensions that are required for 2.1 and 3.0.  There
are a bunch of additional extensions, like the two above and
GL_ARB_compatibility below that should be listed in GL3.txt.  We never
want these extensions ever.  If we add them to that file, someone will
do a bunch of work and submit a bunch of patches.


Maybe at the end of the doc there could be a list of extensions that 
Mesa will never implement? (potentially with short description why: 
"obsolete", "nobody uses", "bad idea" etc)



- Eero


20. WGL_ARB_render_texture
24. GL_ARB_shadow_ambient
36. GL_ARB_fragment_program_shadow
42. GL_ARB_pixel_buffer_object
43. GL_ARB_depth_buffer_float
45. GL_ARB_framebuffer_object
46. GL_ARB_framebuffer_sRGB
 GLX_ARB_framebuffer_sRGB
 WGL_ARB_framebuffer_sRGB
48. GL_ARB_half_float_vertex
50. GL_ARB_map_buffer_range
52. GL_ARB_texture_compression_rgtc
53. GL_ARB_texture_rg
54. GL_ARB_vertex_array_object
55. WGL_ARB_create_context
56. GLX_ARB_create_context
58. GL_ARB_compatibility
60. GL_ARB_shader_texture_lod
74. WGL_ARB_create_context_profile
75. GLX_ARB_create_context_profile
76. GL_ARB_shading_language_include


We can also omit this one.  Nobody ever implemented this extension.
It's one of those things that started as a good idea, but it got really,
really out of hand.


101.GLX_ARB_create_context_robustness
102.WGL_ARB_create_context_robustness
103.GL_ARB_cl_event
104.GL_ARB_debug_output
105.GL_ARB_robustness
106.GL_ARB_shader_stencil_export
118.GL_KHR_texture_compression_astc_hdr
 GL_KHR_texture_compression_astc_ldr


Isn't ASTC LDR required for OpenGL ES 3.2?


126.GL_ARB_robustness_isolation
142.GLX_ARB_robustness_application_isolation
 GLX_ARB_robustness_share_group_isolation
143.WGL_ARB_robustness_application_isolation
 WGL_ARB_robustness_share_group_isolation
152.GL_ARB_bindless_texture
153.GL_ARB_compute_variable_group_size
154.GL_ARB_indirect_parameters
155.GL_ARB_seamless_cubemap_per_texture
156.GL_ARB_shader_draw_parameters
157.GL_ARB_shader_group_vote
158.GL_ARB_sparse_texture
171.GL_ARB_pipeline_statistics_query
172.GL_ARB_sparse_buffer

Re: [Mesa-dev] [PATCH 21/25] mesa: Add extension enable and table entry for OES_shader_image_atomic.

2015-08-19 Thread Francisco Jerez
Ian Romanick  writes:

> On 08/17/2015 09:56 AM, Ilia Mirkin wrote:
>> On Mon, Aug 17, 2015 at 12:46 PM, Francisco Jerez  
>> wrote:
>>> ---
>>>  src/mesa/main/extensions.c | 1 +
>>>  src/mesa/main/mtypes.h | 1 +
>>>  2 files changed, 2 insertions(+)
>>>
>>> diff --git a/src/mesa/main/extensions.c b/src/mesa/main/extensions.c
>>> index d934d19..38c7bc8 100644
>>> --- a/src/mesa/main/extensions.c
>>> +++ b/src/mesa/main/extensions.c
>>> @@ -319,6 +319,7 @@ static const struct extension extension_table[] = {
>>> { "GL_OES_query_matrix",o(dummy_true),  
>>>  ES1,   2003 },
>>> { "GL_OES_read_format", o(dummy_true),  
>>> GL | ES1,   2003 },
>>> { "GL_OES_rgb8_rgba8",  o(dummy_true),  
>>>  ES1 | ES2, 2005 },
>>> +   { "GL_OES_shader_image_atomic", 
>>> o(OES_shader_image_atomic),  ES3,   2015 },
>>> { "GL_OES_single_precision",o(dummy_true),  
>>>  ES1,   2003 },
>>> { "GL_OES_standard_derivatives",
>>> o(OES_standard_derivatives),   ES2, 2005 },
>>> { "GL_OES_stencil1",o(dummy_false), 
>>> DISABLE,2005 },
>>> diff --git a/src/mesa/main/mtypes.h b/src/mesa/main/mtypes.h
>>> index 9964fb4..b489f8c 100644
>>> --- a/src/mesa/main/mtypes.h
>>> +++ b/src/mesa/main/mtypes.h
>>> @@ -3970,6 +3970,7 @@ struct gl_extensions
>>> GLboolean OES_draw_texture;
>>> GLboolean OES_depth_texture_cube_map;
>>> GLboolean OES_EGL_image_external;
>>> +   GLboolean OES_shader_image_atomic;
>> 
>> Does this add any functionality over ARB_shader_image_load_store? I
>> guess extension bools are cheap, but... seems unnecessary.
>
> Yes and no.  In terms of functionality, all desktop hardware that can do
> GL_ARB_shader_image_load_store can do this extension.

Yeah, in principle they should, although it might need non-trivial
driver changes if the hardware doesn't support atomic operations at all
on floating-point surfaces.  You may need to lie to the hardware and
pretend that the surface contains integer data.

If we don't expect to have to deal with hardware that can do image loads
and stores at the GLES 3.1 level but without native support for atomics,
Ilia may be right and the OES_shader_image_atomic extension enable may
be redundant.  I'd be fine with removing it, in which case the
ARB_shader_image_load_store enable would really mean
MESA_shader_image_load_store, largely equivalent to
ARB_shader_image_load_store but with the additional atomic built-in
required for OES_shader_image_atomic support.

> However, this extension has one annoying bit of text:
>
> "OpenGL ES 3.1 and GLSL ES 3.10 are required."
>
> We may need an ES31 tag.  Right now several drivers support OpenGL ES
> 3.0, and they could incorrectly advertise this extension.  This may be a
> transient state, so it may not matter much in the long run.
>
Sounds reasonable to me, I'll add an ES31 tag and squash this into this
commit:
| --- a/src/mesa/main/extensions.c
| +++ b/src/mesa/main/extensions.c
| @@ -319,7 +320,7 @@ static const struct extension extension_table[] = {
| { "GL_OES_query_matrix",o(dummy_true),
   ES1,   2003 },
| { "GL_OES_read_format", o(dummy_true),
  GL | ES1,   2003 },
| { "GL_OES_rgb8_rgba8",  o(dummy_true),
   ES1 | ES2, 2005 },
| -   { "GL_OES_shader_image_atomic", 
o(OES_shader_image_atomic),  ES3,   2015 },
| +   { "GL_OES_shader_image_atomic", 
o(OES_shader_image_atomic),ES31,2015 },
| { "GL_OES_single_precision",o(dummy_true),
   ES1,   2003 },
| { "GL_OES_standard_derivatives",
o(OES_standard_derivatives),   ES2, 2005 },
| { "GL_OES_stencil1",o(dummy_false),   
  DISABLE,2005 },

>>> GLboolean OES_texture_float;
>>> GLboolean OES_texture_float_linear;
>>> GLboolean OES_texture_half_float;
>>> --
>>> 2.4.6
>>>
>>> ___
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>>> mesa-dev@lists.freedesktop.org
>>> http://lists.freedesktop.org/mailman/listinfo/mesa-dev
>> ___
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[Mesa-dev] [PATCH 20.5/25] mesa: Add ES31 API tag for the extension table.

2015-08-19 Thread Francisco Jerez
I'll mark the OES_shader_image_atomic extension entry with this tag to
make sure that we don't expose it on earlier GLES API versions
accidentally, because according to the extension:

 "OpenGL ES 3.1 and GLSL ES 3.10 are required."
---
 src/mesa/main/extensions.c | 7 +++
 1 file changed, 7 insertions(+)

diff --git a/src/mesa/main/extensions.c b/src/mesa/main/extensions.c
index d934d19..017de2d 100644
--- a/src/mesa/main/extensions.c
+++ b/src/mesa/main/extensions.c
@@ -50,6 +50,7 @@ enum {
ES1 = 1 << API_OPENGLES,
ES2 = 1 << API_OPENGLES2,
ES3 = 1 << (API_OPENGL_LAST + 1),
+   ES31 = 1 << (API_OPENGL_LAST + 2),
 };
 
 /**
@@ -773,6 +774,8 @@ _mesa_make_extension_string(struct gl_context *ctx)
unsigned api_set = (1 << ctx->API);
if (_mesa_is_gles3(ctx))
   api_set |= ES3;
+   if (_mesa_is_gles31(ctx))
+  api_set |= ES31;
 
/* Check if the MESA_EXTENSION_MAX_YEAR env var is set */
{
@@ -854,6 +857,8 @@ _mesa_get_extension_count(struct gl_context *ctx)
unsigned api_set = (1 << ctx->API);
if (_mesa_is_gles3(ctx))
   api_set |= ES3;
+   if (_mesa_is_gles31(ctx))
+  api_set |= ES31;
 
/* only count once */
if (ctx->Extensions.Count != 0)
@@ -880,6 +885,8 @@ _mesa_get_enabled_extension(struct gl_context *ctx, GLuint 
index)
unsigned api_set = (1 << ctx->API);
if (_mesa_is_gles3(ctx))
   api_set |= ES3;
+   if (_mesa_is_gles31(ctx))
+  api_set |= ES31;
 
base = (GLboolean*) &ctx->Extensions;
n = 0;
-- 
2.4.6

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Re: [Mesa-dev] big endian: r600g

2015-08-19 Thread Dragomir Ivanov
Best thing to do is to hire some developer to do the work for you. If it
knows Mesa well, this can be cheaper and faster than doing it yourself. I
know Timothy Arceri  ( t_arc...@yahoo.com.au)  was doing some Mesa work for
pay in the past.

On Wed, Aug 19, 2015 at 10:34 AM, Christian Zigotzky  wrote:

> Hi Michel,
>
> Thank you for your answer. I don't have an idea anymore. Could you tell me
> which files we have to modify? Is it possible to port the AMD Catalyst
> driver to the PowerPC platform? If yes do you know how can I in touch with
> AMD? Please help us. We want to release new PowerPC desktop systems but
> without 3D acceleration it wouldn't be so nice.
>
> Cheers,
>
> Christian
>
> On 19 August 2015 at 09:12 AM, Michel Dänzer wrote:
>
>> On 19.08.2015 15:02, Christian Zigotzky wrote:
>>
>>> Could you please adapt the r600g driver for the changed PIPE_FORMAT_*
>>> semantics for big endian machines, please?
>>>
>>> All Power Mac and AMIGA one users can't use AMD Radeon HD7xxx or higher
>>> for 3D acceleration. The r600g driver needs to be adapted to changes in
>>> the way the Gallium3D infrastructure deals with big endian hosts.
>>>
>>> Bug report: https://bugs.freedesktop.org/show_bug.cgi?id=72877
>>>
>> I'm afraid this kind of request isn't going to get you anywhere. The
>> problem is that there's nobody working on Mesa who cares about those
>> platforms. You'd need to find somebody who cares about those platforms
>> and who can work on fixing the issues.
>>
>>
>>
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Re: [Mesa-dev] big endian: r600g

2015-08-19 Thread Martin Peres

On 19/08/15 14:52, Dragomir Ivanov wrote:
Best thing to do is to hire some developer to do the work for you. If 
it knows Mesa well, this can be cheaper and faster than doing it 
yourself. I know Timothy Arceri  ( t_arc...@yahoo.com.au 
)  was doing some Mesa work for pay in 
the past.


I guess Collabora or another open source service company is who you 
should be contacting for such specific task.

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[Mesa-dev] [Bug 91673] Segfault when calling glTexSubImage2D on storage texture to bound FBO

2015-08-19 Thread bugzilla-daemon
https://bugs.freedesktop.org/show_bug.cgi?id=91673

--- Comment #3 from Dongseong Hwang  ---
(In reply to Tapani Pälli from comment #2)
> With a bit of testing it seems things work fine if glTexStorage2D call is
> moved to happen right after first glBindTexture call (this is also how is
> being done in some Piglit tests). Maybe this will help you get forward while
> the bug is being fixed.

That's good hint for chromium.

Mesa crashes on updating immutable texture bound to FBO.
So following code doesn't crash

GLuint tex_;
GLuint fbo_;
glGenTextures(1, &tex_);
glBindTexture(GL_TEXTURE_2D, tex_);

glGenFramebuffers(1, &fbo_);
glBindFramebuffer(GL_FRAMEBUFFER, fbo_);
glFramebufferTexture2D(GL_FRAMEBUFFER,
   GL_COLOR_ATTACHMENT0,
   GL_TEXTURE_2D,
   tex_,
   0);

glBindTexture(GL_TEXTURE_2D, tex_);
glTexStorage2D(GL_TEXTURE_2D, 2, GL_RGBA8, 2, 2);

// hack to prevent crash
glFramebufferTexture2D(GL_FRAMEBUFFER,
   GL_COLOR_ATTACHMENT0,
   GL_TEXTURE_2D,
   0,
   0);

// not SEGFAULT lol
glTexSubImage2D(GL_TEXTURE_2D,
0,
0, 0,
2, 2,
GL_RGBA, GL_UNSIGNED_BYTE,
source_pixels);

glFramebufferTexture2D(GL_FRAMEBUFFER,
   GL_COLOR_ATTACHMENT0,
   GL_TEXTURE_2D,
   tex_,
   0);

-- 
You are receiving this mail because:
You are the QA Contact for the bug.
You are the assignee for the bug.
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[Mesa-dev] [PATCH] mesa/es3.1: Allow GL_COMPUTE_WORK_GROUP_SIZE for OpenGL ES 3.1

2015-08-19 Thread Marta Lofstedt
From: Marta Lofstedt 

According to OpenGL ES specification section 7.12,
GL_COMPUTE_WORK_GROUP_SIZE, is supported by the
glGetProgramiv function.

Signed-off-by: Marta Lofstedt 
---
 src/mesa/main/shaderapi.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/mesa/main/shaderapi.c b/src/mesa/main/shaderapi.c
index b227c17..0e0e0d6 100644
--- a/src/mesa/main/shaderapi.c
+++ b/src/mesa/main/shaderapi.c
@@ -756,7 +756,7 @@ get_programiv(struct gl_context *ctx, GLuint program, 
GLenum pname,
   return;
case GL_COMPUTE_WORK_GROUP_SIZE: {
   int i;
-  if (!_mesa_is_desktop_gl(ctx) || !ctx->Extensions.ARB_compute_shader)
+  if (!_mesa_has_compute_shaders(ctx))
  break;
   if (!shProg->LinkStatus) {
  _mesa_error(ctx, GL_INVALID_OPERATION, "glGetProgramiv(program not "
-- 
1.9.1

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[Mesa-dev] [PATCH] mesa/es3.1: Enable getting MAX_COMPUTE_WORK_GROUP_ values for OpenGL ES 3.1

2015-08-19 Thread Marta Lofstedt
From: Marta Lofstedt 

According to the OpenGL ES 3.1 specification chapter 17, the
MAX_COMPUTE_WORK_GROUP_COUNT and MAX_COMPUTE_WORK_GROUP_SIZE
is available for glGetIntegeri_v.

Signed-off-by: Marta Lofstedt 
---
 src/mesa/main/get.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/src/mesa/main/get.c b/src/mesa/main/get.c
index 307a5ff..c691997 100644
--- a/src/mesa/main/get.c
+++ b/src/mesa/main/get.c
@@ -2049,7 +2049,7 @@ find_value_indexed(const char *func, GLenum pname, GLuint 
index, union value *v)
   return TYPE_INT;
 
case GL_MAX_COMPUTE_WORK_GROUP_COUNT:
-  if (!_mesa_is_desktop_gl(ctx) || !ctx->Extensions.ARB_compute_shader)
+  if (!_mesa_has_compute_shaders(ctx))
  goto invalid_enum;
   if (index >= 3)
  goto invalid_value;
@@ -2057,7 +2057,7 @@ find_value_indexed(const char *func, GLenum pname, GLuint 
index, union value *v)
   return TYPE_INT;
 
case GL_MAX_COMPUTE_WORK_GROUP_SIZE:
-  if (!_mesa_is_desktop_gl(ctx) || !ctx->Extensions.ARB_compute_shader)
+  if (!_mesa_has_compute_shaders(ctx))
  goto invalid_enum;
   if (index >= 3)
  goto invalid_value;
-- 
1.9.1

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Re: [Mesa-dev] [PATCH v3 2/5] glsl: add support for the imageSize builtin

2015-08-19 Thread Francisco Jerez
Martin Peres  writes:

> The code is heavily inspired from Francisco Jerez's code supporting the
> image_load_store extension.
>
> Backends willing to support this builtin should handle
> __intrinsic_image_size.
>
> v2: Based on the review of Ilia Mirkin
> - Enable the extension for GLES 3.1
> - Fix indentation
> - Fix the return type (float to int, number of components for CubeImages)
> - Add a warning related to GLES 3.1
>
> v3: Based on the review of Francisco Jerez
> - Refactor the code to share both add_image_function and _image with the other
>   image-related functions
>
> Signed-off-by: Martin Peres 
> ---
>  src/glsl/builtin_functions.cpp | 109 
> +++--
>  1 file changed, 93 insertions(+), 16 deletions(-)
>
> diff --git a/src/glsl/builtin_functions.cpp b/src/glsl/builtin_functions.cpp
> index 2175c66..5d0a825 100644
> --- a/src/glsl/builtin_functions.cpp
> +++ b/src/glsl/builtin_functions.cpp
> @@ -399,6 +399,13 @@ shader_image_load_store(const _mesa_glsl_parse_state 
> *state)
>  }
>  
>  static bool
> +shader_image_size(const _mesa_glsl_parse_state *state)
> +{
> +   return (state->is_version(430, 310) ||
> +   state->ARB_shader_image_size_enable);
> +}
> +
> +static bool
>  gs_streams(const _mesa_glsl_parse_state *state)
>  {
> return gpu_shader5(state) && gs_only(state);
> @@ -492,6 +499,11 @@ private:
> /** Create a new function and add the given signatures. */
> void add_function(const char *name, ...);
>  
> +   typedef ir_function_signature 
> *(builtin_builder::*image_prototype_ctr)(const glsl_type *image_type,
> +  
> const char *intrinsic_name,
> +  
> unsigned num_arguments,
> +  
> unsigned flags);
> +
> enum image_function_flags {
>IMAGE_FUNCTION_EMIT_STUB = (1 << 0),
>IMAGE_FUNCTION_RETURNS_VOID = (1 << 1),
> @@ -507,6 +519,7 @@ private:
>  */
> void add_image_function(const char *name,
> const char *intrinsic_name,
> +   image_prototype_ctr prototype,
> unsigned num_arguments,
> unsigned flags);
>  
> @@ -708,7 +721,12 @@ private:
> const char *intrinsic_name,
> unsigned num_arguments,
> unsigned flags);
> -   ir_function_signature *_image(const glsl_type *image_type,
> +   ir_function_signature *_image_size_prototype(const glsl_type *image_type,
> +   const char *intrinsic_name,
> +   unsigned num_arguments,
> +   unsigned flags);

The indentation looks weird.  Mixing tabs and spaces?

> +   ir_function_signature *_image(image_prototype_ctr prototype,
> + const glsl_type *image_type,
>   const char *intrinsic_name,
>   unsigned num_arguments,
>   unsigned flags);
> @@ -2552,6 +2570,7 @@ builtin_builder::add_function(const char *name, ...)
>  void
>  builtin_builder::add_image_function(const char *name,
>  const char *intrinsic_name,
> +image_prototype_ctr prototype,
>  unsigned num_arguments,
>  unsigned flags)
>  {
> @@ -2590,12 +2609,13 @@ builtin_builder::add_image_function(const char *name,
>glsl_type::uimage2DMS_type,
>glsl_type::uimage2DMSArray_type
> };
> +
> ir_function *f = new(mem_ctx) ir_function(name);
>  
> for (unsigned i = 0; i < ARRAY_SIZE(types); ++i) {
>if (types[i]->sampler_type != GLSL_TYPE_FLOAT ||
>(flags & IMAGE_FUNCTION_SUPPORTS_FLOAT_DATA_TYPE))
> - f->add_signature(_image(types[i], intrinsic_name,
> + f->add_signature(_image(prototype, types[i], intrinsic_name,
>   num_arguments, flags));
> }
>  
> @@ -2608,43 +2628,57 @@ builtin_builder::add_image_functions(bool glsl)
> const unsigned flags = (glsl ? IMAGE_FUNCTION_EMIT_STUB : 0);
>  
> add_image_function(glsl ? "imageLoad" : "__intrinsic_image_load",
> -  "__intrinsic_image_load", 0,
> -  (flags | IMAGE_FUNCTION_HAS_VECTOR_DATA_TYPE |
> +   "__intrinsic_image_load",
> +   &builtin_builder::_image_prototype, 0,
> +   (flags | IMAGE_FUNCTION_HAS_VECTOR_DATA_TYPE |
> IMAGE_FUNCTION_SUPPORTS_FLOAT_DATA_TYPE |
> IMAGE_FUNCTION_READ_ONLY));
>  

Re: [Mesa-dev] [PATCH v2] i965: Refactor image uniform setup

2015-08-19 Thread Jason Ekstrand
On Aug 19, 2015 2:56 AM, "Francisco Jerez"  wrote:
>
> Jason Ekstrand  writes:
>
> > Previously, setting up image uniforms relied on being called after
> > fs_visitor::uniforms was set and with fs_visitor::uniforms not
allocating
> > space for it.  This made sense in an ir_visitor world because the
visitor
> > assigns locations and uploads data as it walks through the variables.
In
> > NIR it also happened to work because nir_lower_io assumed zero space for
> > images.  In the near future, we will be able to reserve space using
> > nir_lower_io and these invariants will be broken.
> >
> > This commit makes setup_image_uniforms take a pointer to the location in
> > the prog_data params array that indicates where the image uniforms
should
> > be stored.  This way it can be called from anywhere in the shader setup.
> >
> > v2: Fix nir_setup_uniform to correctly correspond with this change
> > (rebase fail)
> >
> > Cc: Francisco Jerez 
> > Cc: Kenneth Graunke 
> > ---
> >  src/mesa/drivers/dri/i965/brw_fs.cpp | 12 
> >  src/mesa/drivers/dri/i965/brw_fs.h   |  3 ---
> >  src/mesa/drivers/dri/i965/brw_fs_nir.cpp |  6 --
> >  src/mesa/drivers/dri/i965/brw_shader.cpp | 28
+---
> >  src/mesa/drivers/dri/i965/brw_shader.h   |  5 ++---
> >  5 files changed, 27 insertions(+), 27 deletions(-)
> >
> > diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp
b/src/mesa/drivers/dri/i965/brw_fs.cpp
> > index 82cb499..d1550e6 100644
> > --- a/src/mesa/drivers/dri/i965/brw_fs.cpp
> > +++ b/src/mesa/drivers/dri/i965/brw_fs.cpp
> > @@ -942,18 +942,6 @@ fs_visitor::import_uniforms(fs_visitor *v)
> > this->param_size = v->param_size;
> >  }
> >
> > -void
> > -fs_visitor::setup_vector_uniform_values(const gl_constant_value
*values, unsigned n)
> > -{
> > -   static const gl_constant_value zero = { 0 };
> > -
> > -   for (unsigned i = 0; i < n; ++i)
> > -  stage_prog_data->param[uniforms++] = &values[i];
> > -
> > -   for (unsigned i = n; i < 4; ++i)
> > -  stage_prog_data->param[uniforms++] = &zero;
> > -}
> > -
> >  fs_reg *
> >  fs_visitor::emit_fragcoord_interpolation(bool pixel_center_integer,
> >   bool origin_upper_left)
> > diff --git a/src/mesa/drivers/dri/i965/brw_fs.h
b/src/mesa/drivers/dri/i965/brw_fs.h
> > index 975183e..28fcfa3 100644
> > --- a/src/mesa/drivers/dri/i965/brw_fs.h
> > +++ b/src/mesa/drivers/dri/i965/brw_fs.h
> > @@ -291,9 +291,6 @@ public:
> >
> > struct brw_reg interp_reg(int location, int channel);
> >
> > -   virtual void setup_vector_uniform_values(const gl_constant_value
*values,
> > -unsigned n);
> > -
> > int implied_mrf_writes(fs_inst *inst);
> >
> > virtual void dump_instructions();
> > diff --git a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
> > index ce4153d..c8ea649 100644
> > --- a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
> > +++ b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
> > @@ -244,10 +244,12 @@ fs_visitor::nir_setup_uniform(nir_variable *var)
> >* space for them here at the end of the parameter array.
> >*/
> >   var->data.driver_location = uniforms;
> > - param_size[uniforms] =
> > + unsigned size =
> >  BRW_IMAGE_PARAM_SIZE * MAX2(storage->array_elements, 1);
> >
> > - setup_image_uniform_values(storage);
> > + setup_image_uniform_values(stage_prog_data->param + uniforms,
storage);
> > + param_size[uniforms] = size;
> > + uniforms += size;
> >} else {
> >   unsigned slots = storage->type->component_slots();
> >   if (storage->array_elements)
> > diff --git a/src/mesa/drivers/dri/i965/brw_shader.cpp
b/src/mesa/drivers/dri/i965/brw_shader.cpp
> > index 6b92806..b31ae9b 100644
> > --- a/src/mesa/drivers/dri/i965/brw_shader.cpp
> > +++ b/src/mesa/drivers/dri/i965/brw_shader.cpp
> > @@ -1419,8 +1419,22 @@
backend_shader::assign_common_binding_table_offsets(uint32_t
next_binding_table_
> > /* prog_data->base.binding_table.size will be set by
brw_mark_surface_used. */
> >  }
> >
> > +static void
> > +setup_vector_uniform_values(const gl_constant_value ***dst,
> > +const gl_constant_value *values, unsigned
n)
> > +{
> > +   static const gl_constant_value zero = { 0 };
> > +
> > +   for (unsigned i = 0; i < n; ++i)
> > +  *((*dst)++) = &values[i];
> > +
> > +   for (unsigned i = n; i < 4; ++i)
> > +  *((*dst)++) = &zero;
> > +}
> > +
> >  void
> > -backend_shader::setup_image_uniform_values(const gl_uniform_storage
*storage)
> > +backend_shader::setup_image_uniform_values(const gl_constant_value
**prog_param,
> > +   const gl_uniform_storage
*storage)
> >  {
> > const unsigned stage =
_mesa_program_enum_to_shader_stage(prog->Target);
> >
> > @@ -1431,17 +1445,17 @@
backend_shader::setup_image_uniform_values(

Re: [Mesa-dev] [PATCH v2] i965: Refactor image uniform setup

2015-08-19 Thread Francisco Jerez
Jason Ekstrand  writes:

> On Aug 19, 2015 2:56 AM, "Francisco Jerez"  wrote:
>>
>> Jason Ekstrand  writes:
>>
>> > Previously, setting up image uniforms relied on being called after
>> > fs_visitor::uniforms was set and with fs_visitor::uniforms not
> allocating
>> > space for it.  This made sense in an ir_visitor world because the
> visitor
>> > assigns locations and uploads data as it walks through the variables.
> In
>> > NIR it also happened to work because nir_lower_io assumed zero space for
>> > images.  In the near future, we will be able to reserve space using
>> > nir_lower_io and these invariants will be broken.
>> >
>> > This commit makes setup_image_uniforms take a pointer to the location in
>> > the prog_data params array that indicates where the image uniforms
> should
>> > be stored.  This way it can be called from anywhere in the shader setup.
>> >
>> > v2: Fix nir_setup_uniform to correctly correspond with this change
>> > (rebase fail)
>> >
>> > Cc: Francisco Jerez 
>> > Cc: Kenneth Graunke 
>> > ---
>> >  src/mesa/drivers/dri/i965/brw_fs.cpp | 12 
>> >  src/mesa/drivers/dri/i965/brw_fs.h   |  3 ---
>> >  src/mesa/drivers/dri/i965/brw_fs_nir.cpp |  6 --
>> >  src/mesa/drivers/dri/i965/brw_shader.cpp | 28
> +---
>> >  src/mesa/drivers/dri/i965/brw_shader.h   |  5 ++---
>> >  5 files changed, 27 insertions(+), 27 deletions(-)
>> >
>> > diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp
> b/src/mesa/drivers/dri/i965/brw_fs.cpp
>> > index 82cb499..d1550e6 100644
>> > --- a/src/mesa/drivers/dri/i965/brw_fs.cpp
>> > +++ b/src/mesa/drivers/dri/i965/brw_fs.cpp
>> > @@ -942,18 +942,6 @@ fs_visitor::import_uniforms(fs_visitor *v)
>> > this->param_size = v->param_size;
>> >  }
>> >
>> > -void
>> > -fs_visitor::setup_vector_uniform_values(const gl_constant_value
> *values, unsigned n)
>> > -{
>> > -   static const gl_constant_value zero = { 0 };
>> > -
>> > -   for (unsigned i = 0; i < n; ++i)
>> > -  stage_prog_data->param[uniforms++] = &values[i];
>> > -
>> > -   for (unsigned i = n; i < 4; ++i)
>> > -  stage_prog_data->param[uniforms++] = &zero;
>> > -}
>> > -
>> >  fs_reg *
>> >  fs_visitor::emit_fragcoord_interpolation(bool pixel_center_integer,
>> >   bool origin_upper_left)
>> > diff --git a/src/mesa/drivers/dri/i965/brw_fs.h
> b/src/mesa/drivers/dri/i965/brw_fs.h
>> > index 975183e..28fcfa3 100644
>> > --- a/src/mesa/drivers/dri/i965/brw_fs.h
>> > +++ b/src/mesa/drivers/dri/i965/brw_fs.h
>> > @@ -291,9 +291,6 @@ public:
>> >
>> > struct brw_reg interp_reg(int location, int channel);
>> >
>> > -   virtual void setup_vector_uniform_values(const gl_constant_value
> *values,
>> > -unsigned n);
>> > -
>> > int implied_mrf_writes(fs_inst *inst);
>> >
>> > virtual void dump_instructions();
>> > diff --git a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
> b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
>> > index ce4153d..c8ea649 100644
>> > --- a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
>> > +++ b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
>> > @@ -244,10 +244,12 @@ fs_visitor::nir_setup_uniform(nir_variable *var)
>> >* space for them here at the end of the parameter array.
>> >*/
>> >   var->data.driver_location = uniforms;
>> > - param_size[uniforms] =
>> > + unsigned size =
>> >  BRW_IMAGE_PARAM_SIZE * MAX2(storage->array_elements, 1);
>> >
>> > - setup_image_uniform_values(storage);
>> > + setup_image_uniform_values(stage_prog_data->param + uniforms,
> storage);
>> > + param_size[uniforms] = size;
>> > + uniforms += size;
>> >} else {
>> >   unsigned slots = storage->type->component_slots();
>> >   if (storage->array_elements)
>> > diff --git a/src/mesa/drivers/dri/i965/brw_shader.cpp
> b/src/mesa/drivers/dri/i965/brw_shader.cpp
>> > index 6b92806..b31ae9b 100644
>> > --- a/src/mesa/drivers/dri/i965/brw_shader.cpp
>> > +++ b/src/mesa/drivers/dri/i965/brw_shader.cpp
>> > @@ -1419,8 +1419,22 @@
> backend_shader::assign_common_binding_table_offsets(uint32_t
> next_binding_table_
>> > /* prog_data->base.binding_table.size will be set by
> brw_mark_surface_used. */
>> >  }
>> >
>> > +static void
>> > +setup_vector_uniform_values(const gl_constant_value ***dst,
>> > +const gl_constant_value *values, unsigned
> n)
>> > +{
>> > +   static const gl_constant_value zero = { 0 };
>> > +
>> > +   for (unsigned i = 0; i < n; ++i)
>> > +  *((*dst)++) = &values[i];
>> > +
>> > +   for (unsigned i = n; i < 4; ++i)
>> > +  *((*dst)++) = &zero;
>> > +}
>> > +
>> >  void
>> > -backend_shader::setup_image_uniform_values(const gl_uniform_storage
> *storage)
>> > +backend_shader::setup_image_uniform_values(const gl_constant_value
> **prog_param,
>> > +   const gl_uniform_storage
>

Re: [Mesa-dev] [PATCH v2] i965: Refactor image uniform setup

2015-08-19 Thread Jason Ekstrand
On Aug 19, 2015 6:45 AM, "Francisco Jerez"  wrote:
>
> Jason Ekstrand  writes:
>
> > On Aug 19, 2015 2:56 AM, "Francisco Jerez" 
wrote:
> >>
> >> Jason Ekstrand  writes:
> >>
> >> > Previously, setting up image uniforms relied on being called after
> >> > fs_visitor::uniforms was set and with fs_visitor::uniforms not
> > allocating
> >> > space for it.  This made sense in an ir_visitor world because the
> > visitor
> >> > assigns locations and uploads data as it walks through the variables.
> > In
> >> > NIR it also happened to work because nir_lower_io assumed zero space
for
> >> > images.  In the near future, we will be able to reserve space using
> >> > nir_lower_io and these invariants will be broken.
> >> >
> >> > This commit makes setup_image_uniforms take a pointer to the
location in
> >> > the prog_data params array that indicates where the image uniforms
> > should
> >> > be stored.  This way it can be called from anywhere in the shader
setup.
> >> >
> >> > v2: Fix nir_setup_uniform to correctly correspond with this change
> >> > (rebase fail)
> >> >
> >> > Cc: Francisco Jerez 
> >> > Cc: Kenneth Graunke 
> >> > ---
> >> >  src/mesa/drivers/dri/i965/brw_fs.cpp | 12 
> >> >  src/mesa/drivers/dri/i965/brw_fs.h   |  3 ---
> >> >  src/mesa/drivers/dri/i965/brw_fs_nir.cpp |  6 --
> >> >  src/mesa/drivers/dri/i965/brw_shader.cpp | 28
> > +---
> >> >  src/mesa/drivers/dri/i965/brw_shader.h   |  5 ++---
> >> >  5 files changed, 27 insertions(+), 27 deletions(-)
> >> >
> >> > diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp
> > b/src/mesa/drivers/dri/i965/brw_fs.cpp
> >> > index 82cb499..d1550e6 100644
> >> > --- a/src/mesa/drivers/dri/i965/brw_fs.cpp
> >> > +++ b/src/mesa/drivers/dri/i965/brw_fs.cpp
> >> > @@ -942,18 +942,6 @@ fs_visitor::import_uniforms(fs_visitor *v)
> >> > this->param_size = v->param_size;
> >> >  }
> >> >
> >> > -void
> >> > -fs_visitor::setup_vector_uniform_values(const gl_constant_value
> > *values, unsigned n)
> >> > -{
> >> > -   static const gl_constant_value zero = { 0 };
> >> > -
> >> > -   for (unsigned i = 0; i < n; ++i)
> >> > -  stage_prog_data->param[uniforms++] = &values[i];
> >> > -
> >> > -   for (unsigned i = n; i < 4; ++i)
> >> > -  stage_prog_data->param[uniforms++] = &zero;
> >> > -}
> >> > -
> >> >  fs_reg *
> >> >  fs_visitor::emit_fragcoord_interpolation(bool pixel_center_integer,
> >> >   bool origin_upper_left)
> >> > diff --git a/src/mesa/drivers/dri/i965/brw_fs.h
> > b/src/mesa/drivers/dri/i965/brw_fs.h
> >> > index 975183e..28fcfa3 100644
> >> > --- a/src/mesa/drivers/dri/i965/brw_fs.h
> >> > +++ b/src/mesa/drivers/dri/i965/brw_fs.h
> >> > @@ -291,9 +291,6 @@ public:
> >> >
> >> > struct brw_reg interp_reg(int location, int channel);
> >> >
> >> > -   virtual void setup_vector_uniform_values(const gl_constant_value
> > *values,
> >> > -unsigned n);
> >> > -
> >> > int implied_mrf_writes(fs_inst *inst);
> >> >
> >> > virtual void dump_instructions();
> >> > diff --git a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
> > b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
> >> > index ce4153d..c8ea649 100644
> >> > --- a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
> >> > +++ b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
> >> > @@ -244,10 +244,12 @@ fs_visitor::nir_setup_uniform(nir_variable
*var)
> >> >* space for them here at the end of the parameter array.
> >> >*/
> >> >   var->data.driver_location = uniforms;
> >> > - param_size[uniforms] =
> >> > + unsigned size =
> >> >  BRW_IMAGE_PARAM_SIZE * MAX2(storage->array_elements, 1);
> >> >
> >> > - setup_image_uniform_values(storage);
> >> > + setup_image_uniform_values(stage_prog_data->param +
uniforms,
> > storage);
> >> > + param_size[uniforms] = size;
> >> > + uniforms += size;
> >> >} else {
> >> >   unsigned slots = storage->type->component_slots();
> >> >   if (storage->array_elements)
> >> > diff --git a/src/mesa/drivers/dri/i965/brw_shader.cpp
> > b/src/mesa/drivers/dri/i965/brw_shader.cpp
> >> > index 6b92806..b31ae9b 100644
> >> > --- a/src/mesa/drivers/dri/i965/brw_shader.cpp
> >> > +++ b/src/mesa/drivers/dri/i965/brw_shader.cpp
> >> > @@ -1419,8 +1419,22 @@
> > backend_shader::assign_common_binding_table_offsets(uint32_t
> > next_binding_table_
> >> > /* prog_data->base.binding_table.size will be set by
> > brw_mark_surface_used. */
> >> >  }
> >> >
> >> > +static void
> >> > +setup_vector_uniform_values(const gl_constant_value ***dst,
> >> > +const gl_constant_value *values,
unsigned
> > n)
> >> > +{
> >> > +   static const gl_constant_value zero = { 0 };
> >> > +
> >> > +   for (unsigned i = 0; i < n; ++i)
> >> > +  *((*dst)++) = &values[i];
> >> > +
> >> > +   for (unsigned i = n; i < 4; ++i)
> >> > +  *

Re: [Mesa-dev] [PATCH v3 3/5] nir: convert the glsl intrinsic image_size to nir_intrinsic_image_size

2015-08-19 Thread Martin Peres

On 19/08/15 16:47, Francisco Jerez wrote:

Martin Peres  writes:


v2, review from Francisco Jerez:
  - make the destination variable as large as what the nir instrinsic
defines (4) instead of the size of the return variable of glsl. This
is still safe for the already existing code because all the intrinsics
affected returned the same amount of components as expected by glsl IR.
In the case of image_size, it is not possible to do so because the
returned number of component depends on the image type and this case
is not well handled by nir.

Signed-off-by: Martin Peres 
---
  src/glsl/nir/glsl_to_nir.cpp  | 21 +++--
  src/glsl/nir/nir_intrinsics.h |  2 ++
  2 files changed, 17 insertions(+), 6 deletions(-)

diff --git a/src/glsl/nir/glsl_to_nir.cpp b/src/glsl/nir/glsl_to_nir.cpp
index 77327b6..3063243 100644
--- a/src/glsl/nir/glsl_to_nir.cpp
+++ b/src/glsl/nir/glsl_to_nir.cpp
@@ -641,6 +641,8 @@ nir_visitor::visit(ir_call *ir)
   op = nir_intrinsic_image_atomic_comp_swap;
} else if (strcmp(ir->callee_name(), "__intrinsic_memory_barrier") == 
0) {
   op = nir_intrinsic_memory_barrier;
+  } else if (strcmp(ir->callee_name(), "__intrinsic_image_size") == 0) {
+ op = nir_intrinsic_image_size;
} else {
   unreachable("not reached");
}
@@ -666,7 +668,8 @@ nir_visitor::visit(ir_call *ir)
case nir_intrinsic_image_atomic_or:
case nir_intrinsic_image_atomic_xor:
case nir_intrinsic_image_atomic_exchange:
-  case nir_intrinsic_image_atomic_comp_swap: {
+  case nir_intrinsic_image_atomic_comp_swap:
+  case nir_intrinsic_image_size: {
   nir_ssa_undef_instr *instr_undef =
  nir_ssa_undef_instr_create(shader, 1);
   nir_instr_insert_after_cf_list(this->cf_node_list,
@@ -681,6 +684,17 @@ nir_visitor::visit(ir_call *ir)
   instr->variables[0] = evaluate_deref(&instr->instr, image);
   param = param->get_next();
  
+ /* Set the intrinsic destination. */

+ if (ir->return_deref) {
+const nir_intrinsic_info *info;
+info = &nir_intrinsic_infos[instr->intrinsic];

I'm a fan of initializing things at the same point where they are
defined.  You only use it once though, you may want to drop the
declaration altogether.


It exceeded the 80-char limit. I guess I can put the assignation on the 
following line.





+nir_ssa_dest_init(&instr->instr, &instr->dest,
+  info->dest_components, NULL);
+ }
+
+ if (op == nir_intrinsic_image_size)
+break;
+
   /* Set the address argument, extending the coordinate vector to four
* components.
*/
@@ -721,11 +735,6 @@ nir_visitor::visit(ir_call *ir)
  instr->src[3] = evaluate_rvalue((ir_dereference *)param);
  param = param->get_next();
   }
-
- /* Set the intrinsic destination. */
- if (ir->return_deref)
-nir_ssa_dest_init(&instr->instr, &instr->dest,
-  ir->return_deref->type->vector_elements, NULL);
   break;
}
case nir_intrinsic_memory_barrier:
diff --git a/src/glsl/nir/nir_intrinsics.h b/src/glsl/nir/nir_intrinsics.h
index bc6e6b8..6c7a61a 100644
--- a/src/glsl/nir/nir_intrinsics.h
+++ b/src/glsl/nir/nir_intrinsics.h
@@ -123,6 +123,8 @@ INTRINSIC(image_atomic_or, 3, ARR(4, 1, 1), true, 1, 1, 0, 
0)
  INTRINSIC(image_atomic_xor, 3, ARR(4, 1, 1), true, 1, 1, 0, 0)
  INTRINSIC(image_atomic_exchange, 3, ARR(4, 1, 1), true, 1, 1, 0, 0)
  INTRINSIC(image_atomic_comp_swap, 4, ARR(4, 1, 1, 1), true, 1, 1, 0, 0)
+INTRINSIC(image_size, 0, ARR(), true, 4, 1, 0,
+  NIR_INTRINSIC_CAN_ELIMINATE | NIR_INTRINSIC_CAN_REORDER)
  

Looks good to me,
Reviewed-by: Francisco Jerez 


Thanks for the review, I will address the comments on the previous patch!




  #define SYSTEM_VALUE(name, components) \
 INTRINSIC(load_##name, 0, ARR(), true, components, 0, 0, \
--
2.5.0

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Re: [Mesa-dev] [PATCH v3 3/5] nir: convert the glsl intrinsic image_size to nir_intrinsic_image_size

2015-08-19 Thread Francisco Jerez
Martin Peres  writes:

> v2, review from Francisco Jerez:
>  - make the destination variable as large as what the nir instrinsic
>defines (4) instead of the size of the return variable of glsl. This
>is still safe for the already existing code because all the intrinsics
>affected returned the same amount of components as expected by glsl IR.
>In the case of image_size, it is not possible to do so because the
>returned number of component depends on the image type and this case
>is not well handled by nir.
>
> Signed-off-by: Martin Peres 
> ---
>  src/glsl/nir/glsl_to_nir.cpp  | 21 +++--
>  src/glsl/nir/nir_intrinsics.h |  2 ++
>  2 files changed, 17 insertions(+), 6 deletions(-)
>
> diff --git a/src/glsl/nir/glsl_to_nir.cpp b/src/glsl/nir/glsl_to_nir.cpp
> index 77327b6..3063243 100644
> --- a/src/glsl/nir/glsl_to_nir.cpp
> +++ b/src/glsl/nir/glsl_to_nir.cpp
> @@ -641,6 +641,8 @@ nir_visitor::visit(ir_call *ir)
>   op = nir_intrinsic_image_atomic_comp_swap;
>} else if (strcmp(ir->callee_name(), "__intrinsic_memory_barrier") == 
> 0) {
>   op = nir_intrinsic_memory_barrier;
> +  } else if (strcmp(ir->callee_name(), "__intrinsic_image_size") == 0) {
> + op = nir_intrinsic_image_size;
>} else {
>   unreachable("not reached");
>}
> @@ -666,7 +668,8 @@ nir_visitor::visit(ir_call *ir)
>case nir_intrinsic_image_atomic_or:
>case nir_intrinsic_image_atomic_xor:
>case nir_intrinsic_image_atomic_exchange:
> -  case nir_intrinsic_image_atomic_comp_swap: {
> +  case nir_intrinsic_image_atomic_comp_swap:
> +  case nir_intrinsic_image_size: {
>   nir_ssa_undef_instr *instr_undef =
>  nir_ssa_undef_instr_create(shader, 1);
>   nir_instr_insert_after_cf_list(this->cf_node_list,
> @@ -681,6 +684,17 @@ nir_visitor::visit(ir_call *ir)
>   instr->variables[0] = evaluate_deref(&instr->instr, image);
>   param = param->get_next();
>  
> + /* Set the intrinsic destination. */
> + if (ir->return_deref) {
> +const nir_intrinsic_info *info;
> +info = &nir_intrinsic_infos[instr->intrinsic];

I'm a fan of initializing things at the same point where they are
defined.  You only use it once though, you may want to drop the
declaration altogether.

> +nir_ssa_dest_init(&instr->instr, &instr->dest,
> +  info->dest_components, NULL);
> + }
> +
> + if (op == nir_intrinsic_image_size)
> +break;
> +
>   /* Set the address argument, extending the coordinate vector to four
>* components.
>*/
> @@ -721,11 +735,6 @@ nir_visitor::visit(ir_call *ir)
>  instr->src[3] = evaluate_rvalue((ir_dereference *)param);
>  param = param->get_next();
>   }
> -
> - /* Set the intrinsic destination. */
> - if (ir->return_deref)
> -nir_ssa_dest_init(&instr->instr, &instr->dest,
> -  ir->return_deref->type->vector_elements, NULL);
>   break;
>}
>case nir_intrinsic_memory_barrier:
> diff --git a/src/glsl/nir/nir_intrinsics.h b/src/glsl/nir/nir_intrinsics.h
> index bc6e6b8..6c7a61a 100644
> --- a/src/glsl/nir/nir_intrinsics.h
> +++ b/src/glsl/nir/nir_intrinsics.h
> @@ -123,6 +123,8 @@ INTRINSIC(image_atomic_or, 3, ARR(4, 1, 1), true, 1, 1, 
> 0, 0)
>  INTRINSIC(image_atomic_xor, 3, ARR(4, 1, 1), true, 1, 1, 0, 0)
>  INTRINSIC(image_atomic_exchange, 3, ARR(4, 1, 1), true, 1, 1, 0, 0)
>  INTRINSIC(image_atomic_comp_swap, 4, ARR(4, 1, 1, 1), true, 1, 1, 0, 0)
> +INTRINSIC(image_size, 0, ARR(), true, 4, 1, 0,
> +  NIR_INTRINSIC_CAN_ELIMINATE | NIR_INTRINSIC_CAN_REORDER)
>  

Looks good to me,
Reviewed-by: Francisco Jerez 

>  #define SYSTEM_VALUE(name, components) \
> INTRINSIC(load_##name, 0, ARR(), true, components, 0, 0, \
> -- 
> 2.5.0
>
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Re: [Mesa-dev] [PATCH v3 2/5] glsl: add support for the imageSize builtin

2015-08-19 Thread Martin Peres

On 19/08/15 16:36, Francisco Jerez wrote:

Martin Peres  writes:


The code is heavily inspired from Francisco Jerez's code supporting the
image_load_store extension.

Backends willing to support this builtin should handle
__intrinsic_image_size.

v2: Based on the review of Ilia Mirkin
- Enable the extension for GLES 3.1
- Fix indentation
- Fix the return type (float to int, number of components for CubeImages)
- Add a warning related to GLES 3.1

v3: Based on the review of Francisco Jerez
- Refactor the code to share both add_image_function and _image with the other
   image-related functions

Signed-off-by: Martin Peres 
---
  src/glsl/builtin_functions.cpp | 109 +++--
  1 file changed, 93 insertions(+), 16 deletions(-)

diff --git a/src/glsl/builtin_functions.cpp b/src/glsl/builtin_functions.cpp
index 2175c66..5d0a825 100644
--- a/src/glsl/builtin_functions.cpp
+++ b/src/glsl/builtin_functions.cpp
@@ -399,6 +399,13 @@ shader_image_load_store(const _mesa_glsl_parse_state 
*state)
  }
  
  static bool

+shader_image_size(const _mesa_glsl_parse_state *state)
+{
+   return (state->is_version(430, 310) ||
+   state->ARB_shader_image_size_enable);
+}
+
+static bool
  gs_streams(const _mesa_glsl_parse_state *state)
  {
 return gpu_shader5(state) && gs_only(state);
@@ -492,6 +499,11 @@ private:
 /** Create a new function and add the given signatures. */
 void add_function(const char *name, ...);
  
+   typedef ir_function_signature *(builtin_builder::*image_prototype_ctr)(const glsl_type *image_type,

+  
const char *intrinsic_name,
+  
unsigned num_arguments,
+  
unsigned flags);
+
 enum image_function_flags {
IMAGE_FUNCTION_EMIT_STUB = (1 << 0),
IMAGE_FUNCTION_RETURNS_VOID = (1 << 1),
@@ -507,6 +519,7 @@ private:
  */
 void add_image_function(const char *name,
 const char *intrinsic_name,
+   image_prototype_ctr prototype,
 unsigned num_arguments,
 unsigned flags);
  
@@ -708,7 +721,12 @@ private:

 const char *intrinsic_name,
 unsigned num_arguments,
 unsigned flags);
-   ir_function_signature *_image(const glsl_type *image_type,
+   ir_function_signature *_image_size_prototype(const glsl_type *image_type,
+   const char *intrinsic_name,
+   unsigned num_arguments,
+   unsigned flags);

The indentation looks weird.  Mixing tabs and spaces?


No, I just forgot to re-align after changing the name. Sorry. It is fixed.



+   ir_function_signature *_image(image_prototype_ctr prototype,
+ const glsl_type *image_type,
   const char *intrinsic_name,
   unsigned num_arguments,
   unsigned flags);
@@ -2552,6 +2570,7 @@ builtin_builder::add_function(const char *name, ...)
  void
  builtin_builder::add_image_function(const char *name,
  const char *intrinsic_name,
+image_prototype_ctr prototype,
  unsigned num_arguments,
  unsigned flags)
  {
@@ -2590,12 +2609,13 @@ builtin_builder::add_image_function(const char *name,
glsl_type::uimage2DMS_type,
glsl_type::uimage2DMSArray_type
 };
+
 ir_function *f = new(mem_ctx) ir_function(name);
  
 for (unsigned i = 0; i < ARRAY_SIZE(types); ++i) {

if (types[i]->sampler_type != GLSL_TYPE_FLOAT ||
(flags & IMAGE_FUNCTION_SUPPORTS_FLOAT_DATA_TYPE))
- f->add_signature(_image(types[i], intrinsic_name,
+ f->add_signature(_image(prototype, types[i], intrinsic_name,
   num_arguments, flags));
 }
  
@@ -2608,43 +2628,57 @@ builtin_builder::add_image_functions(bool glsl)

 const unsigned flags = (glsl ? IMAGE_FUNCTION_EMIT_STUB : 0);
  
 add_image_function(glsl ? "imageLoad" : "__intrinsic_image_load",

-  "__intrinsic_image_load", 0,
-  (flags | IMAGE_FUNCTION_HAS_VECTOR_DATA_TYPE |
+   "__intrinsic_image_load",
+   &builtin_builder::_image_prototype, 0,
+   (flags | IMAGE_FUNCTION_HAS_VECTOR_DATA_TYPE |
 IMAGE_FUNCTION_SUPPORTS_FLOAT_DATA_TYPE |
 IMAGE_FUNCTION_READ_ONLY));
  
 add_image_function(glsl ? "imageStore" 

Re: [Mesa-dev] [PATCH v3 4/5] i965: handle nir_intrinsic_image_size

2015-08-19 Thread Francisco Jerez
Martin Peres  writes:

> v2, Review from Francisco Jerez:
> - avoid the camelCase for the booleans
> - init the booleans using the sampler type
> - force the initialization of all the components of the output register
>
> Signed-off-by: Martin Peres 
> ---
>  src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 48 
> 
>  1 file changed, 48 insertions(+)
>
> diff --git a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp 
> b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
> index ce4153d..cc0a5a6 100644
> --- a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
> +++ b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
> @@ -1406,6 +1406,54 @@ fs_visitor::nir_emit_intrinsic(const fs_builder &bld, 
> nir_intrinsic_instr *instr
>break;
> }
>  
> +   case nir_intrinsic_image_size: {
> +  /* Get the referenced image variable and type. */
> +  const nir_variable *var = instr->variables[0]->var;
> +  const glsl_type *type = var->type->without_array();
> +  const brw_reg_type base_type = get_image_base_type(type);
> +
> +  /* Get the size of the image. */
> +  const fs_reg image = get_nir_image_deref(instr->variables[0]);
> +  const fs_reg size = offset(image, bld, BRW_IMAGE_PARAM_SIZE_OFFSET);
> +
> +  /*
> +   * For 1DArray image types, the array index is stored in the Z 
> component.
> +   * Fix this by swizzling the Z component to the Y component.
> +   */
> +  const bool is_1d_array_image =
> +  (type->sampler_dimensionality == GLSL_SAMPLER_DIM_1D &&
> +   type->sampler_array);
> +
> +  /*
> +   * For CubeMapArray images, we should count the number of cubes instead
> +   * of the number of faces. Fix it by dividing the (Z component) by 6.
> +   */
> +  const bool is_cube_map_array_image =
> +  (type->sampler_dimensionality == GLSL_SAMPLER_DIM_CUBE &&
> +   type->sampler_array);
> +
> +  /* Copy all the components. */
> +  const nir_intrinsic_info *info = 
> &nir_intrinsic_infos[instr->intrinsic];
> +  for (int c = 0; c < info->dest_components; ++c) {
> + if (c > type->coordinate_components()) {

Off by one, "c > type->coordinate_components()" is what you probably
meant to avoid reading past the end of the size array.

> + bld.MOV(offset(retype(dest, base_type), bld, c),

base_type is the base data type of the image, i.e. float for
floating-point or fixed-point normalized image formats.  imageSize
always returns integer results regardless of the image data type, so
BRW_REGISTER_TYPE_D is what you want (feel free to factor out the
offset(retype(dest...)...) expression to a local variable if it gets too
long).  I guess you were only testing imageSize with integer formats?

With these and the comments from other people addressed this patch is:

Reviewed-by: Francisco Jerez 


> + fs_reg(1));
> + } else if (c == 1 && is_1d_array_image) {
> +bld.MOV(offset(retype(dest, base_type), bld, c),
> +offset(size, bld, 2));
> + } else if (c == 2 && is_cube_map_array_image) {
> +bld.emit(SHADER_OPCODE_INT_QUOTIENT,
> + offset(retype(dest, base_type), bld, c),
> + offset(size, bld, c), fs_reg(6));
> + } else {
> +bld.MOV(offset(retype(dest, base_type), bld, c),
> +offset(size, bld, c));
> + }
> +   }
> +
> +  break;
> +   }
> +
> case nir_intrinsic_load_front_face:
>bld.MOV(retype(dest, BRW_REGISTER_TYPE_D),
>*emit_frontfacing_interpolation());
> -- 
> 2.5.0
>
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Re: [Mesa-dev] [PATCH 5/5] i965: enable GL_ARB_shader_image_size

2015-08-19 Thread Francisco Jerez
Martin Peres  writes:

> Signed-off-by: Martin Peres 
> ---
>  docs/GL3.txt | 4 ++--
>  docs/relnotes/11.0.0.html| 1 +
>  src/mesa/drivers/dri/i965/intel_extensions.c | 1 +
>  3 files changed, 4 insertions(+), 2 deletions(-)
>
> diff --git a/docs/GL3.txt b/docs/GL3.txt
> index 54c0c5a..5319e06 100644
> --- a/docs/GL3.txt
> +++ b/docs/GL3.txt
> @@ -163,7 +163,7 @@ GL 4.3, GLSL 4.30:
>GL_ARB_multi_draw_indirect   DONE (i965, nvc0, 
> r600, radeonsi, llvmpipe, softpipe)
>GL_ARB_program_interface_query   DONE (all drivers)
>GL_ARB_robust_buffer_access_behavior not started
> -  GL_ARB_shader_image_size in progress (Martin 
> Peres)
> +  GL_ARB_shader_image_size DONE (i965)
>GL_ARB_shader_storage_buffer_object  in progress (Iago 
> Toral, Samuel Iglesias)
>GL_ARB_stencil_texturing DONE (i965/gen8+, 
> nv50, nvc0, r600, radeonsi, llvmpipe, softpipe)
>GL_ARB_texture_buffer_range  DONE (nv50, nvc0, 
> i965, r600, radeonsi, llvmpipe)
> @@ -211,7 +211,7 @@ GLES3.1, GLSL ES 3.1
>GL_ARB_program_interface_query   DONE (all drivers)
>GL_ARB_shader_atomic_countersDONE (i965)
>GL_ARB_shader_image_load_store   in progress (curro)
> -  GL_ARB_shader_image_size in progress (Martin 
> Peres)
> +  GL_ARB_shader_image_size DONE (i965)
>GL_ARB_shader_storage_buffer_object  in progress (Iago 
> Toral, Samuel Iglesias)
>GL_ARB_shading_language_packing  DONE (all drivers)
>GL_ARB_separate_shader_objects   DONE (all drivers)
> diff --git a/docs/relnotes/11.0.0.html b/docs/relnotes/11.0.0.html
> index 2d80198..45a1689 100644
> --- a/docs/relnotes/11.0.0.html
> +++ b/docs/relnotes/11.0.0.html
> @@ -53,6 +53,7 @@ Note: some of the new features are only available with 
> certain drivers.
>  GL_ARB_gpu_shader5 on radeonsi
>  GL_ARB_gpu_shader_fp64 on llvmpipe, radeonsi
>  GL_ARB_shader_image_load_store on i965
> +GL_ARB_shader_image_size on i965
>  GL_ARB_shader_stencil_export on llvmpipe
>  GL_ARB_shader_subroutine on core profile all drivers
>  GL_ARB_tessellation_shader on nvc0, radeonsi
> diff --git a/src/mesa/drivers/dri/i965/intel_extensions.c 
> b/src/mesa/drivers/dri/i965/intel_extensions.c
> index 0da528b..4365b71 100644
> --- a/src/mesa/drivers/dri/i965/intel_extensions.c
> +++ b/src/mesa/drivers/dri/i965/intel_extensions.c
> @@ -326,6 +326,7 @@ intelInitExtensions(struct gl_context *ctx)
>ctx->Extensions.ARB_gpu_shader5 = true;
>ctx->Extensions.ARB_shader_atomic_counters = true;
>ctx->Extensions.ARB_shader_image_load_store = true;
> +  ctx->Extensions.ARB_shader_image_size = true;
>ctx->Extensions.ARB_texture_compression_bptc = true;
>ctx->Extensions.ARB_texture_view = true;
>  
> -- 
> 2.5.0
>
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Looks good to me,
Reviewed-by: Francisco Jerez 


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Re: [Mesa-dev] [PATCH 01/10] i965: Use constant miptree pointer in tex surface setup

2015-08-19 Thread Francisco Jerez
Topi Pohjolainen  writes:

> as it is only used for reading.
>
> Signed-off-by: Topi Pohjolainen 
> ---
>  src/mesa/drivers/dri/i965/brw_context.h   | 2 +-
>  src/mesa/drivers/dri/i965/gen7_wm_surface_state.c | 2 +-
>  src/mesa/drivers/dri/i965/gen8_surface_state.c| 2 +-
>  3 files changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/src/mesa/drivers/dri/i965/brw_context.h 
> b/src/mesa/drivers/dri/i965/brw_context.h
> index 3553f6e..ae29798 100644
> --- a/src/mesa/drivers/dri/i965/brw_context.h
> +++ b/src/mesa/drivers/dri/i965/brw_context.h
> @@ -990,7 +990,7 @@ struct brw_context
>uint32_t surf_index);
>  
>void (*emit_texture_surface_state)(struct brw_context *brw,
> - struct intel_mipmap_tree *mt,
> + const struct intel_mipmap_tree *mt,
>   GLenum target,
>   unsigned min_layer,
>   unsigned max_layer,
> diff --git a/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c 
> b/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
> index 15ab2b0..494bc22 100644
> --- a/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
> +++ b/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
> @@ -265,7 +265,7 @@ gen7_emit_buffer_surface_state(struct brw_context *brw,
>  
>  static void
>  gen7_emit_texture_surface_state(struct brw_context *brw,
> -struct intel_mipmap_tree *mt,
> +const struct intel_mipmap_tree *mt,
>  GLenum target,
>  unsigned min_layer, unsigned max_layer,
>  unsigned min_level, unsigned max_level,
> diff --git a/src/mesa/drivers/dri/i965/gen8_surface_state.c 
> b/src/mesa/drivers/dri/i965/gen8_surface_state.c
> index b2d1a57..c595ec3 100644
> --- a/src/mesa/drivers/dri/i965/gen8_surface_state.c
> +++ b/src/mesa/drivers/dri/i965/gen8_surface_state.c
> @@ -184,7 +184,7 @@ gen8_emit_buffer_surface_state(struct brw_context *brw,
>  
>  static void
>  gen8_emit_texture_surface_state(struct brw_context *brw,
> -struct intel_mipmap_tree *mt,
> +const struct intel_mipmap_tree *mt,
>  GLenum target,
>  unsigned min_layer, unsigned max_layer,
>  unsigned min_level, unsigned max_level,
> -- 
> 1.9.3
>
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Reviewed-by: Francisco Jerez 



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Re: [Mesa-dev] [PATCH 02/10] i965: Reduce the scope of input in buffer tex setup

2015-08-19 Thread Francisco Jerez
Topi Pohjolainen  writes:

> Signed-off-by: Topi Pohjolainen 

Reviewed-by: Francisco Jerez 

> ---
>  src/mesa/drivers/dri/i965/brw_context.h   | 4 ++--
>  src/mesa/drivers/dri/i965/brw_wm_surface_state.c  | 8 +++-
>  src/mesa/drivers/dri/i965/gen7_wm_surface_state.c | 2 +-
>  src/mesa/drivers/dri/i965/gen8_surface_state.c| 2 +-
>  4 files changed, 7 insertions(+), 9 deletions(-)
>
> diff --git a/src/mesa/drivers/dri/i965/brw_context.h 
> b/src/mesa/drivers/dri/i965/brw_context.h
> index ae29798..da018bf 100644
> --- a/src/mesa/drivers/dri/i965/brw_context.h
> +++ b/src/mesa/drivers/dri/i965/brw_context.h
> @@ -1710,8 +1710,8 @@ void brw_create_constant_surface(struct brw_context 
> *brw,
>   uint32_t size,
>   uint32_t *out_offset,
>   bool dword_pitch);
> -void brw_update_buffer_texture_surface(struct gl_context *ctx,
> -   unsigned unit,
> +void brw_update_buffer_texture_surface(struct brw_context *brw,
> +   struct gl_texture_object *tObj,
> uint32_t *surf_offset);
>  void
>  brw_update_sol_surface(struct brw_context *brw,
> diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c 
> b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
> index 72aad96..73aa719 100644
> --- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
> +++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
> @@ -276,12 +276,10 @@ gen4_emit_buffer_surface_state(struct brw_context *brw,
>  }
>  
>  void
> -brw_update_buffer_texture_surface(struct gl_context *ctx,
> -  unsigned unit,
> +brw_update_buffer_texture_surface(struct brw_context *brw,
> +  struct gl_texture_object *tObj,
>uint32_t *surf_offset)
>  {
> -   struct brw_context *brw = brw_context(ctx);
> -   struct gl_texture_object *tObj = ctx->Texture.Unit[unit]._Current;
> struct intel_buffer_object *intel_obj =
>intel_buffer_object(tObj->BufferObject);
> uint32_t size = tObj->BufferSize;
> @@ -323,7 +321,7 @@ brw_update_texture_surface(struct gl_context *ctx,
>  
> /* BRW_NEW_TEXTURE_BUFFER */
> if (tObj->Target == GL_TEXTURE_BUFFER) {
> -  brw_update_buffer_texture_surface(ctx, unit, surf_offset);
> +  brw_update_buffer_texture_surface(brw, tObj, surf_offset);
>return;
> }
>  
> diff --git a/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c 
> b/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
> index 494bc22..6aa8299 100644
> --- a/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
> +++ b/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
> @@ -357,7 +357,7 @@ gen7_update_texture_surface(struct gl_context *ctx,
> struct gl_texture_object *obj = ctx->Texture.Unit[unit]._Current;
>  
> if (obj->Target == GL_TEXTURE_BUFFER) {
> -  brw_update_buffer_texture_surface(ctx, unit, surf_offset);
> +  brw_update_buffer_texture_surface(brw, obj, surf_offset);
>  
> } else {
>struct intel_texture_object *intel_obj = intel_texture_object(obj);
> diff --git a/src/mesa/drivers/dri/i965/gen8_surface_state.c 
> b/src/mesa/drivers/dri/i965/gen8_surface_state.c
> index c595ec3..11defd1 100644
> --- a/src/mesa/drivers/dri/i965/gen8_surface_state.c
> +++ b/src/mesa/drivers/dri/i965/gen8_surface_state.c
> @@ -308,7 +308,7 @@ gen8_update_texture_surface(struct gl_context *ctx,
> struct gl_texture_object *obj = ctx->Texture.Unit[unit]._Current;
>  
> if (obj->Target == GL_TEXTURE_BUFFER) {
> -  brw_update_buffer_texture_surface(ctx, unit, surf_offset);
> +  brw_update_buffer_texture_surface(brw, obj, surf_offset);
>  
> } else {
>struct gl_texture_image *firstImage = obj->Image[0][obj->BaseLevel];
> -- 
> 1.9.3
>
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[Mesa-dev] [Bug 91687] Crash when creating new context after destroying the old one using indirect rendering

2015-08-19 Thread bugzilla-daemon
https://bugs.freedesktop.org/show_bug.cgi?id=91687

--- Comment #1 from Guilherme  ---
Created attachment 117784
  --> https://bugs.freedesktop.org/attachment.cgi?id=117784&action=edit
gdb stack trace

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Re: [Mesa-dev] [PATCH 03/10] i965: Move tex buffer dispatch into hw independent setup

2015-08-19 Thread Francisco Jerez
Topi Pohjolainen  writes:

> All generations do the same exact dispatch and it could be
> therefore done in the hardware independent stage.
>
> v2: Rebased where there are still duplicate calls in gen7 and gen8
> handlers. These will be dropped in subsequent patches.
>
> Reviewed-by: Matt Turner  (v1)
> Reviewed-by: Kenneth Graunke  (v1)
> Signed-off-by: Topi Pohjolainen 
> ---
>  src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 28 
> ++--
>  1 file changed, 16 insertions(+), 12 deletions(-)
>
> diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c 
> b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
> index 73aa719..dca67e8 100644
> --- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
> +++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
> @@ -319,12 +319,6 @@ brw_update_texture_surface(struct gl_context *ctx,
> struct gl_sampler_object *sampler = _mesa_get_samplerobj(ctx, unit);
> uint32_t *surf;
>  
> -   /* BRW_NEW_TEXTURE_BUFFER */
> -   if (tObj->Target == GL_TEXTURE_BUFFER) {
> -  brw_update_buffer_texture_surface(brw, tObj, surf_offset);
> -  return;
> -   }
> -
> surf = brw_state_batch(brw, AUB_TRACE_SURFACE_STATE,
> 6 * 4, 32, surf_offset);
>  
> @@ -819,14 +813,24 @@ update_stage_texture_surfaces(struct brw_context *brw,
> for (unsigned s = 0; s < num_samplers; s++) {
>surf_offset[s] = 0;
>  
> -  if (prog->SamplersUsed & (1 << s)) {
> - const unsigned unit = prog->SamplerUnits[s];
> +  if (!(prog->SamplersUsed & (1 << s)))
> + continue;
>  
> - /* _NEW_TEXTURE */
> - if (ctx->Texture.Unit[unit]._Current) {
> -brw->vtbl.update_texture_surface(ctx, unit, surf_offset + s, 
> for_gather);
> - }
> +  const unsigned unit = prog->SamplerUnits[s];
> +  struct gl_texture_object *tex = ctx->Texture.Unit[unit]._Current;
> +
> +  if (!tex)
> + continue;
> +
> +  /* BRW_NEW_TEXTURE_BUFFER */
> +  if (tex->Target == GL_TEXTURE_BUFFER) {
> + brw_update_buffer_texture_surface(brw, tex, surf_offset);

You probably didn't mean to always pass the first surface state entry
(missing "+ s"?).

> + continue;
>}
> +
> +  /* _NEW_TEXTURE */
> +  brw->vtbl.update_texture_surface(ctx, unit,
> +   surf_offset + s, for_gather);

I'd keep the control flow structured here instead of adding a jump,
like:

| if (tex->Target == GL_TEXTURE_BUFFER) {
|  // Handle buffer textures.
| } else {
|  // Handle non-buffer textures.
| }

Anyway, just nitpicking.  With these fixed:

Reviewed-by: Francisco Jerez 

> }
>  }
>  
> -- 
> 1.9.3
>
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[Mesa-dev] [Bug 91687] Crash when creating new context after destroying the old one using indirect rendering

2015-08-19 Thread bugzilla-daemon
https://bugs.freedesktop.org/show_bug.cgi?id=91687

--- Comment #3 from Guilherme  ---
As the crash is a seg fault on update_framebuffer_size because surface=NULL, I
tried to just make a check if the surface is NULL. Then it does not crash
anywhere else, but nothing is rendered.

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[Mesa-dev] [Bug 91687] Crash when creating new context after destroying the old one using indirect rendering

2015-08-19 Thread bugzilla-daemon
https://bugs.freedesktop.org/show_bug.cgi?id=91687

--- Comment #2 from Guilherme  ---
Created attachment 117785
  --> https://bugs.freedesktop.org/attachment.cgi?id=117785&action=edit
xtrace with glx commands

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[Mesa-dev] [Bug 91687] Crash when creating new context after destroying the old one using indirect rendering

2015-08-19 Thread bugzilla-daemon
https://bugs.freedesktop.org/show_bug.cgi?id=91687

Bug ID: 91687
   Summary: Crash when creating new context after destroying the
old one using indirect rendering
   Product: Mesa
   Version: 10.5
  Hardware: x86-64 (AMD64)
OS: Linux (All)
Status: NEW
  Severity: critical
  Priority: medium
 Component: Mesa core
  Assignee: mesa-dev@lists.freedesktop.org
  Reporter: gqm...@gmail.com
QA Contact: mesa-dev@lists.freedesktop.org

Created attachment 117783
  --> https://bugs.freedesktop.org/attachment.cgi?id=117783&action=edit
VTK/Qt Python program that crashes

I tested that on mesa Ubuntu 14.04 (mesa 10.3.2) and 15.10 (mesa 10.5.2). I'm
not sure if it is reproducible. The attached traces were gotten on Ubuntu
14.04.

The crash happens when running the attached python program crash_mesa_vtk_qt.py
using indirect rendering (specifically I need to run it inside a chroot that
has a very old mesa version)

It uses vtk and Qt, I'm sorry I could not come up with a more isolated example,
but I'm not very familiar with opengl programming.


In summary, that is what is happening:

1 - A vtk render window is created and rendered the first time (that makes vtk
create a new glx context)

2 - The vtk render window is set to render offscreen (it is not using OSMesa).
That makes vtk destroy the current context and create a new one associated to a
new X offscreen window.

3 - The window is rendered and I could even generate a png file.

4 - The vtk render window is set to render on screen again. That makes vtk
destroy the current glx context and create a new one associated to the first X
window (the on screen window).

5 - When rendering the vtk window again, X server crashes (stack trace
attached).


Looking into vtk code it does not seem it is doing anything wrong. The
offscreen related code can be found on:

https://gitlab.kitware.com/vtk/vtk/blob/v6.2.0/Rendering/OpenGL/vtkXOpenGLRenderWindow.cxx#L800

https://gitlab.kitware.com/vtk/vtk/blob/v6.2.0/Rendering/OpenGL/vtkOpenGLRenderWindow.cxx#L1856

https://gitlab.kitware.com/vtk/vtk/blob/v6.2.0/Rendering/OpenGL/vtkXOpenGLRenderWindow.cxx#L943

https://gitlab.kitware.com/vtk/vtk/blob/v6.2.0/Rendering/OpenGL/vtkOpenGLRenderWindow.cxx#L1856

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Re: [Mesa-dev] [PATCH 04/10] i965/gen4: Use tex object format instead of the miptree format

2015-08-19 Thread Francisco Jerez
Topi Pohjolainen  writes:

> Equivalent logic for newer generations (>= 7) use the tex object
> format instead. This patch prepares for merging the decision
> making for all generations.
>
> Signed-off-by: Topi Pohjolainen 

Reviewed-by: Francisco Jerez 

> ---
>  src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c 
> b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
> index dca67e8..26e9122 100644
> --- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
> +++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
> @@ -322,7 +322,7 @@ brw_update_texture_surface(struct gl_context *ctx,
> surf = brw_state_batch(brw, AUB_TRACE_SURFACE_STATE,
> 6 * 4, 32, surf_offset);
>  
> -   uint32_t tex_format = translate_tex_format(brw, mt->format,
> +   uint32_t tex_format = translate_tex_format(brw, intelObj->_Format,
>sampler->sRGBDecode);
>  
> if (for_gather) {
> -- 
> 1.9.3
>
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Re: [Mesa-dev] [PATCH 05/10] i965: Move tex miptree and format resolving into dispatcher

2015-08-19 Thread Francisco Jerez
Topi Pohjolainen  writes:

> All hardware platforms have this in common, so do it in the
> hardware independent dispatcher.
>
> v2 (Matt): Removed extra whitespace.
> v3: Non-trivial rebase
>
> Reviewed-by: Matt Turner  (v1)
> Reviewed-by: Kenneth Graunke  (v1)
> Signed-off-by: Topi Pohjolainen 

I had already reviewed this patch, not sure why you dropped it, anyway:
Reviewed-by: Francisco Jerez 

> ---
>  src/mesa/drivers/dri/i965/brw_context.h   |  4 +++-
>  src/mesa/drivers/dri/i965/brw_wm_surface_state.c  | 26 
> ---
>  src/mesa/drivers/dri/i965/gen7_wm_surface_state.c | 10 +++--
>  src/mesa/drivers/dri/i965/gen8_surface_state.c| 14 +++-
>  4 files changed, 27 insertions(+), 27 deletions(-)
>
> diff --git a/src/mesa/drivers/dri/i965/brw_context.h 
> b/src/mesa/drivers/dri/i965/brw_context.h
> index da018bf..ef9bb87 100644
> --- a/src/mesa/drivers/dri/i965/brw_context.h
> +++ b/src/mesa/drivers/dri/i965/brw_context.h
> @@ -981,7 +981,9 @@ struct brw_context
> struct
> {
>void (*update_texture_surface)(struct gl_context *ctx,
> - unsigned unit,
> + const struct intel_mipmap_tree *mt,
> + struct gl_texture_object *tex_obj,
> + uint32_t tex_format,
>   uint32_t *surf_offset,
>   bool for_gather);
>uint32_t (*update_renderbuffer_surface)(struct brw_context *brw,
> diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c 
> b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
> index 26e9122..c14f00a 100644
> --- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
> +++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
> @@ -308,23 +308,19 @@ brw_update_buffer_texture_surface(struct brw_context 
> *brw,
>  
>  static void
>  brw_update_texture_surface(struct gl_context *ctx,
> -   unsigned unit,
> +   const struct intel_mipmap_tree *mt,
> +   struct gl_texture_object *tObj,
> +   uint32_t tex_format,
> uint32_t *surf_offset,
> bool for_gather)
>  {
> struct brw_context *brw = brw_context(ctx);
> -   struct gl_texture_object *tObj = ctx->Texture.Unit[unit]._Current;
> struct intel_texture_object *intelObj = intel_texture_object(tObj);
> -   struct intel_mipmap_tree *mt = intelObj->mt;
> -   struct gl_sampler_object *sampler = _mesa_get_samplerobj(ctx, unit);
> uint32_t *surf;
>  
> surf = brw_state_batch(brw, AUB_TRACE_SURFACE_STATE,
> 6 * 4, 32, surf_offset);
>  
> -   uint32_t tex_format = translate_tex_format(brw, intelObj->_Format,
> -  sampler->sRGBDecode);
> -
> if (for_gather) {
>/* Sandybridge's gather4 message is broken for integer formats.
> * To work around this, we pretend the surface is UNORM for
> @@ -828,8 +824,22 @@ update_stage_texture_surfaces(struct brw_context *brw,
>   continue;
>}
>  
> +  const struct gl_texture_image *first_img = 
> tex->Image[0][tex->BaseLevel];
> +  const struct intel_texture_object *itex = intel_texture_object(tex);
> +  const struct intel_mipmap_tree *mt = itex->mt;
> +  const struct gl_sampler_object *sampler = _mesa_get_samplerobj(ctx,
> + unit);
> +  uint32_t format = translate_tex_format(brw, itex->_Format,
> + sampler->sRGBDecode);
> +
> +  if (tex->StencilSampling && first_img->_BaseFormat == 
> GL_DEPTH_STENCIL) {
> + mt = mt->stencil_mt;
> + format = BRW_SURFACEFORMAT_R8_UINT;
> + assert(brw->gen >= 8);
> +  }
> +
>/* _NEW_TEXTURE */
> -  brw->vtbl.update_texture_surface(ctx, unit,
> +  brw->vtbl.update_texture_surface(ctx, mt, tex, format,
> surf_offset + s, for_gather);
> }
>  }
> diff --git a/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c 
> b/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
> index 6aa8299..26d080f 100644
> --- a/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
> +++ b/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
> @@ -349,20 +349,19 @@ gen7_emit_texture_surface_state(struct brw_context *brw,
>  
>  static void
>  gen7_update_texture_surface(struct gl_context *ctx,
> -unsigned unit,
> +const struct intel_mipmap_tree *mt,
> +struct gl_texture_object *obj,
> +uint32_t format,
>  uint32_t *surf_offset,
>  bool for_gather)
>  {
> struct brw_context *brw = brw_context(ctx);
> -   struct gl_textu

Re: [Mesa-dev] [PATCH 06/10] i965/gen7: Move tex gather format override into common dispatcher

2015-08-19 Thread Francisco Jerez
Topi Pohjolainen  writes:

> Signed-off-by: Topi Pohjolainen 

Reviewed-by: Francisco Jerez 

> ---
>  src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 4 
>  1 file changed, 4 insertions(+)
>
> diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c 
> b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
> index c14f00a..b68b136 100644
> --- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
> +++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
> @@ -832,6 +832,10 @@ update_stage_texture_surfaces(struct brw_context *brw,
>uint32_t format = translate_tex_format(brw, itex->_Format,
>   sampler->sRGBDecode);
>  
> +  if (brw->gen == 7 && for_gather &&
> +  format == BRW_SURFACEFORMAT_R32G32_FLOAT)
> + format = BRW_SURFACEFORMAT_R32G32_FLOAT_LD;
> +
>if (tex->StencilSampling && first_img->_BaseFormat == 
> GL_DEPTH_STENCIL) {
>   mt = mt->stencil_mt;
>   format = BRW_SURFACEFORMAT_R8_UINT;
> -- 
> 1.9.3
>
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Re: [Mesa-dev] [PATCH 07/10] i965: Move texture swizzle resolving into dispatcher

2015-08-19 Thread Francisco Jerez
Topi Pohjolainen  writes:

> v2: Non-trivial rebase
>
> Reviewed-by: Matt Turner  (v1)
> Reviewed-by: Kenneth Graunke  (v1)
> Signed-off-by: Topi Pohjolainen 
>
> Signed-off-by: Topi Pohjolainen 

Uhm, and here you dropped my "[ Francisco Jerez: Non-trivial rebase. ]"
and R-b tags and replaced them with a duplicate S-o-b line?  Fine.

> ---
>  src/mesa/drivers/dri/i965/brw_context.h   |  2 +-
>  src/mesa/drivers/dri/i965/brw_wm_surface_state.c  | 14 --
>  src/mesa/drivers/dri/i965/gen7_wm_surface_state.c | 13 +
>  src/mesa/drivers/dri/i965/gen8_surface_state.c| 13 +
>  4 files changed, 15 insertions(+), 27 deletions(-)
>
> diff --git a/src/mesa/drivers/dri/i965/brw_context.h 
> b/src/mesa/drivers/dri/i965/brw_context.h
> index ef9bb87..061600f 100644
> --- a/src/mesa/drivers/dri/i965/brw_context.h
> +++ b/src/mesa/drivers/dri/i965/brw_context.h
> @@ -983,7 +983,7 @@ struct brw_context
>void (*update_texture_surface)(struct gl_context *ctx,
>   const struct intel_mipmap_tree *mt,
>   struct gl_texture_object *tex_obj,
> - uint32_t tex_format,
> + uint32_t tex_format, int swizzle,
>   uint32_t *surf_offset,
>   bool for_gather);
>uint32_t (*update_renderbuffer_surface)(struct brw_context *brw,
> diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c 
> b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
> index b68b136..4afdc23 100644
> --- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
> +++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
> @@ -310,7 +310,7 @@ static void
>  brw_update_texture_surface(struct gl_context *ctx,
> const struct intel_mipmap_tree *mt,
> struct gl_texture_object *tObj,
> -   uint32_t tex_format,
> +   uint32_t tex_format, int swizzle /* unused */,
> uint32_t *surf_offset,
> bool for_gather)
>  {
> @@ -842,8 +842,18 @@ update_stage_texture_surfaces(struct brw_context *brw,
>   assert(brw->gen >= 8);
>}
>  
> +  /* Handling GL_ALPHA as a surface format override breaks 1.30+ style
> +   * texturing functions that return a float, as our code generation 
> always
> +   * selects the .x channel (which would always be 0).
> +   */
> +  const bool alpha_depth = tex->DepthMode == GL_ALPHA &&
> + (first_img->_BaseFormat == GL_DEPTH_COMPONENT ||
> +  first_img->_BaseFormat == GL_DEPTH_STENCIL);
> +  const unsigned swizzle = unlikely(alpha_depth) ?
> + SWIZZLE_XYZW : brw_get_texture_swizzle(ctx, tex);
> +
>/* _NEW_TEXTURE */
> -  brw->vtbl.update_texture_surface(ctx, mt, tex, format,
> +  brw->vtbl.update_texture_surface(ctx, mt, tex, format, swizzle,
> surf_offset + s, for_gather);
> }
>  }
> diff --git a/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c 
> b/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
> index 26d080f..0de43a4 100644
> --- a/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
> +++ b/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
> @@ -351,7 +351,7 @@ static void
>  gen7_update_texture_surface(struct gl_context *ctx,
>  const struct intel_mipmap_tree *mt,
>  struct gl_texture_object *obj,
> -uint32_t format,
> +uint32_t format, int swizzle,
>  uint32_t *surf_offset,
>  bool for_gather)
>  {
> @@ -368,17 +368,6 @@ gen7_update_texture_surface(struct gl_context *ctx,
>const unsigned depth = (obj->Immutable && obj->Target != GL_TEXTURE_3D 
> ?
>obj->NumLayers : mt->logical_depth0);
>  
> -  /* Handling GL_ALPHA as a surface format override breaks 1.30+ style
> -   * texturing functions that return a float, as our code generation 
> always
> -   * selects the .x channel (which would always be 0).
> -   */
> -  struct gl_texture_image *firstImage = obj->Image[0][obj->BaseLevel];
> -  const bool alpha_depth = obj->DepthMode == GL_ALPHA &&
> - (firstImage->_BaseFormat == GL_DEPTH_COMPONENT ||
> -  firstImage->_BaseFormat == GL_DEPTH_STENCIL);
> -  const unsigned swizzle = (unlikely(alpha_depth) ? SWIZZLE_XYZW :
> -brw_get_texture_swizzle(&brw->ctx, obj));
> -
>if (for_gather && format == BRW_SURFACEFORMAT_R32G32_FLOAT)
>   format = BRW_SURFACEFORMAT_R32G32_FLOAT_LD;
>  
> diff --git a/src/mesa/drivers/dri/i965/gen8_surface_state.c 
> b/src/mesa/drivers/dri/i965/gen8_surface_state.c
> index b6766ef..c4eed08 100644
> 

Re: [Mesa-dev] [PATCH v3 4/5] i965: handle nir_intrinsic_image_size

2015-08-19 Thread Francisco Jerez
Francisco Jerez  writes:

> Martin Peres  writes:
>
>> v2, Review from Francisco Jerez:
>> - avoid the camelCase for the booleans
>> - init the booleans using the sampler type
>> - force the initialization of all the components of the output register
>>
>> Signed-off-by: Martin Peres 
>> ---
>>  src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 48 
>> 
>>  1 file changed, 48 insertions(+)
>>
>> diff --git a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp 
>> b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
>> index ce4153d..cc0a5a6 100644
>> --- a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
>> +++ b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
>> @@ -1406,6 +1406,54 @@ fs_visitor::nir_emit_intrinsic(const fs_builder &bld, 
>> nir_intrinsic_instr *instr
>>break;
>> }
>>  
>> +   case nir_intrinsic_image_size: {
>> +  /* Get the referenced image variable and type. */
>> +  const nir_variable *var = instr->variables[0]->var;
>> +  const glsl_type *type = var->type->without_array();
>> +  const brw_reg_type base_type = get_image_base_type(type);
>> +
>> +  /* Get the size of the image. */
>> +  const fs_reg image = get_nir_image_deref(instr->variables[0]);
>> +  const fs_reg size = offset(image, bld, BRW_IMAGE_PARAM_SIZE_OFFSET);
>> +
>> +  /*
>> +   * For 1DArray image types, the array index is stored in the Z 
>> component.
>> +   * Fix this by swizzling the Z component to the Y component.
>> +   */
>> +  const bool is_1d_array_image =
>> +  (type->sampler_dimensionality == GLSL_SAMPLER_DIM_1D &&
>> +   type->sampler_array);
>> +
>> +  /*
>> +   * For CubeMapArray images, we should count the number of cubes 
>> instead
>> +   * of the number of faces. Fix it by dividing the (Z component) by 6.
>> +   */
>> +  const bool is_cube_map_array_image =
>> +  (type->sampler_dimensionality == GLSL_SAMPLER_DIM_CUBE &&
>> +   type->sampler_array);
>> +
>> +  /* Copy all the components. */
>> +  const nir_intrinsic_info *info = 
>> &nir_intrinsic_infos[instr->intrinsic];
>> +  for (int c = 0; c < info->dest_components; ++c) {
>> + if (c > type->coordinate_components()) {
>
> Off by one, "c > type->coordinate_components()" is what you probably

Typo -- ">=" is of course what I meant to write. :P

> meant to avoid reading past the end of the size array.
>
>> + bld.MOV(offset(retype(dest, base_type), bld, c),
>
> base_type is the base data type of the image, i.e. float for
> floating-point or fixed-point normalized image formats.  imageSize
> always returns integer results regardless of the image data type, so
> BRW_REGISTER_TYPE_D is what you want (feel free to factor out the
> offset(retype(dest...)...) expression to a local variable if it gets too
> long).  I guess you were only testing imageSize with integer formats?
>
> With these and the comments from other people addressed this patch is:
>
> Reviewed-by: Francisco Jerez 
>
>
>> + fs_reg(1));
>> + } else if (c == 1 && is_1d_array_image) {
>> +bld.MOV(offset(retype(dest, base_type), bld, c),
>> +offset(size, bld, 2));
>> + } else if (c == 2 && is_cube_map_array_image) {
>> +bld.emit(SHADER_OPCODE_INT_QUOTIENT,
>> + offset(retype(dest, base_type), bld, c),
>> + offset(size, bld, c), fs_reg(6));
>> + } else {
>> +bld.MOV(offset(retype(dest, base_type), bld, c),
>> +offset(size, bld, c));
>> + }
>> +   }
>> +
>> +  break;
>> +   }
>> +
>> case nir_intrinsic_load_front_face:
>>bld.MOV(retype(dest, BRW_REGISTER_TYPE_D),
>>*emit_frontfacing_interpolation());
>> -- 
>> 2.5.0
>>
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Re: [Mesa-dev] [PATCH 20.5/25] mesa: Add ES31 API tag for the extension table.

2015-08-19 Thread Tapani Pälli

Reviewed-by: Tapani Palli 

On 08/19/2015 02:50 PM, Francisco Jerez wrote:

I'll mark the OES_shader_image_atomic extension entry with this tag to
make sure that we don't expose it on earlier GLES API versions
accidentally, because according to the extension:

  "OpenGL ES 3.1 and GLSL ES 3.10 are required."
---
  src/mesa/main/extensions.c | 7 +++
  1 file changed, 7 insertions(+)

diff --git a/src/mesa/main/extensions.c b/src/mesa/main/extensions.c
index d934d19..017de2d 100644
--- a/src/mesa/main/extensions.c
+++ b/src/mesa/main/extensions.c
@@ -50,6 +50,7 @@ enum {
 ES1 = 1 << API_OPENGLES,
 ES2 = 1 << API_OPENGLES2,
 ES3 = 1 << (API_OPENGL_LAST + 1),
+   ES31 = 1 << (API_OPENGL_LAST + 2),
  };
  
  /**

@@ -773,6 +774,8 @@ _mesa_make_extension_string(struct gl_context *ctx)
 unsigned api_set = (1 << ctx->API);
 if (_mesa_is_gles3(ctx))
api_set |= ES3;
+   if (_mesa_is_gles31(ctx))
+  api_set |= ES31;
  
 /* Check if the MESA_EXTENSION_MAX_YEAR env var is set */

 {
@@ -854,6 +857,8 @@ _mesa_get_extension_count(struct gl_context *ctx)
 unsigned api_set = (1 << ctx->API);
 if (_mesa_is_gles3(ctx))
api_set |= ES3;
+   if (_mesa_is_gles31(ctx))
+  api_set |= ES31;
  
 /* only count once */

 if (ctx->Extensions.Count != 0)
@@ -880,6 +885,8 @@ _mesa_get_enabled_extension(struct gl_context *ctx, GLuint 
index)
 unsigned api_set = (1 << ctx->API);
 if (_mesa_is_gles3(ctx))
api_set |= ES3;
+   if (_mesa_is_gles31(ctx))
+  api_set |= ES31;
  
 base = (GLboolean*) &ctx->Extensions;

 n = 0;


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[Mesa-dev] [Bug 91691] Missing "gl.pc" file while using Scons for cross-compiling

2015-08-19 Thread bugzilla-daemon
https://bugs.freedesktop.org/show_bug.cgi?id=91691

Bug ID: 91691
   Summary: Missing "gl.pc" file while using Scons for
cross-compiling
   Product: Mesa
   Version: 9.1
  Hardware: Other
OS: All
Status: NEW
  Severity: normal
  Priority: medium
 Component: Other
  Assignee: mesa-dev@lists.freedesktop.org
  Reporter: yugioh...@1s.fr
QA Contact: mesa-dev@lists.freedesktop.org

Hello,

I remark that when I cross compile mesa (linux -> windows), I do not have the
"gl.pc" file useful for pkg-config.
It is probably because I am using "scons" to build mesa for windows whereas I
am using "autotools" to build mesa for linux.
The building process is not the same in both case.

Is there a way to generate the "gl.pc" file when I use scons to build mesa or I
need to create it manually?

Thank you.
Best regards.

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[Mesa-dev] [Bug 91691] Missing "gl.pc" file while using Scons for cross-compiling

2015-08-19 Thread bugzilla-daemon
https://bugs.freedesktop.org/show_bug.cgi?id=91691

YuGiOhJCJ  changed:

   What|Removed |Added

 CC||yugioh...@1s.fr

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Re: [Mesa-dev] [PATCH 11/25] glsl: Implement GLSL ES restriction on images being either readonly or writeonly.

2015-08-19 Thread Tapani Pälli

Patches 11,12,13:
Reviewed-by: Tapani Pälli 

On 08/17/2015 07:45 PM, Francisco Jerez wrote:

---
  src/glsl/ast_to_hir.cpp | 18 ++
  1 file changed, 18 insertions(+)

diff --git a/src/glsl/ast_to_hir.cpp b/src/glsl/ast_to_hir.cpp
index 4d279f6..ff57ec3 100644
--- a/src/glsl/ast_to_hir.cpp
+++ b/src/glsl/ast_to_hir.cpp
@@ -2469,6 +2469,24 @@ apply_image_qualifier_to_variable(const struct 
ast_type_qualifier *qual,
  
   var->data.image_format = GL_NONE;

}
+
+  /* From page 70 of the GLSL ES 3.1 specification:
+   *
+   * "Except for image variables qualified with the format qualifiers
+   *  r32f, r32i, and r32ui, image variables must specify either memory
+   *  qualifier readonly or the memory qualifier writeonly."
+   */
+  if (state->es_shader &&
+  var->data.image_format != GL_R32F &&
+  var->data.image_format != GL_R32I &&
+  var->data.image_format != GL_R32UI &&
+  !var->data.image_read_only &&
+  !var->data.image_write_only) {
+ _mesa_glsl_error(loc, state, "image variables of format other than "
+  "r32f, r32i or r32ui must be qualified `readonly' or 
"
+  "`writeonly'");
+  }
+
 } else if (qual->flags.q.read_only ||
qual->flags.q.write_only ||
qual->flags.q.coherent ||


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[Mesa-dev] [PATCH] mesa: Allow query of GL_VERTEX_BINDING_BUFFER

2015-08-19 Thread Marta Lofstedt
From: Marta Lofstedt 

According to OpenGL ES 3.1 specification table : 20.2 and
OpenGL specification 4.4 table 23.4. The glGetIntegeri_v
functions should report the name  of the buffer bound
when called with GL_VERTEX_BINDING_BUFFER.

Signed-off-by: Marta Lofstedt 
---
 src/mesa/main/get.c | 8 
 1 file changed, 8 insertions(+)

diff --git a/src/mesa/main/get.c b/src/mesa/main/get.c
index 307a5ff..ae2d0b7 100644
--- a/src/mesa/main/get.c
+++ b/src/mesa/main/get.c
@@ -1989,6 +1989,14 @@ find_value_indexed(const char *func, GLenum pname, 
GLuint index, union value *v)
   v->value_int = 
ctx->Array.VAO->VertexBinding[VERT_ATTRIB_GENERIC(index)].Stride;
   return TYPE_INT;
 
+   case GL_VERTEX_BINDING_BUFFER:
+  if (!_mesa_is_desktop_gl(ctx) && !_mesa_is_gles31(ctx))
+  goto invalid_enum;
+  if (index >= ctx->Const.Program[MESA_SHADER_VERTEX].MaxAttribs)
+  goto invalid_value;
+  v->value_int = 
ctx->Array.VAO->VertexBinding[VERT_ATTRIB_GENERIC(index)].BufferObj->Name;
+  return TYPE_INT;
+
/* ARB_shader_image_load_store */
case GL_IMAGE_BINDING_NAME: {
   struct gl_texture_object *t;
-- 
1.9.1

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[Mesa-dev] [PATCH 0/3] Enable misc. Vertex bindings for OpenGL ES 3.1

2015-08-19 Thread Marta Lofstedt
These patches enable some Vertex Binding functionality for OpenGL ES 3.1,
that is currently limited to desktop GL.

Marta Lofstedt (3):
  mesa/es3.1 : Align OpenGL ES 3.1 glBindVertexBuffer error handling
with OpenGL Core
  mesa/es3.1: Allow query of Vertex bindings for GLES 3.1
  mesa/es3.1: Enable GL_ARB_vertex_attrib_binding functionality for GLES
3.1

 src/mesa/main/bufferobj.c |  2 +-
 src/mesa/main/get.c   |  7 ---
 src/mesa/main/varray.c| 14 +++---
 3 files changed, 12 insertions(+), 11 deletions(-)

-- 
1.9.1

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[Mesa-dev] [PATCH 2/3] mesa/es3.1: Allow query of Vertex bindings for GLES 3.1

2015-08-19 Thread Marta Lofstedt
From: Marta Lofstedt 

Signed-off-by: Marta Lofstedt 
---
 src/mesa/main/get.c | 7 ---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/src/mesa/main/get.c b/src/mesa/main/get.c
index ae2d0b7..b6b7d6c 100644
--- a/src/mesa/main/get.c
+++ b/src/mesa/main/get.c
@@ -1966,7 +1966,8 @@ find_value_indexed(const char *func, GLenum pname, GLuint 
index, union value *v)
   return TYPE_INT64;
 
case GL_VERTEX_BINDING_DIVISOR:
-  if (!_mesa_is_desktop_gl(ctx) || !ctx->Extensions.ARB_instanced_arrays)
+  if ((!_mesa_is_desktop_gl(ctx) || !ctx->Extensions.ARB_instanced_arrays) 
&&
+  !_mesa_is_gles31(ctx))
   goto invalid_enum;
   if (index >= ctx->Const.Program[MESA_SHADER_VERTEX].MaxAttribs)
   goto invalid_value;
@@ -1974,7 +1975,7 @@ find_value_indexed(const char *func, GLenum pname, GLuint 
index, union value *v)
   return TYPE_INT;
 
case GL_VERTEX_BINDING_OFFSET:
-  if (!_mesa_is_desktop_gl(ctx))
+  if (!_mesa_is_desktop_gl(ctx) && !_mesa_is_gles31(ctx))
   goto invalid_enum;
   if (index >= ctx->Const.Program[MESA_SHADER_VERTEX].MaxAttribs)
   goto invalid_value;
@@ -1982,7 +1983,7 @@ find_value_indexed(const char *func, GLenum pname, GLuint 
index, union value *v)
   return TYPE_INT;
 
case GL_VERTEX_BINDING_STRIDE:
-  if (!_mesa_is_desktop_gl(ctx))
+  if (!_mesa_is_desktop_gl(ctx) && !_mesa_is_gles31(ctx))
   goto invalid_enum;
   if (index >= ctx->Const.Program[MESA_SHADER_VERTEX].MaxAttribs)
   goto invalid_value;
-- 
1.9.1

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[Mesa-dev] [PATCH 3/3] mesa/es3.1: Enable GL_ARB_vertex_attrib_binding functionality for GLES 3.1

2015-08-19 Thread Marta Lofstedt
From: Marta Lofstedt 

Signed-off-by: Marta Lofstedt 
---
 src/mesa/main/varray.c | 14 +++---
 1 file changed, 7 insertions(+), 7 deletions(-)

diff --git a/src/mesa/main/varray.c b/src/mesa/main/varray.c
index 3bab985..3ddf795 100644
--- a/src/mesa/main/varray.c
+++ b/src/mesa/main/varray.c
@@ -899,12 +899,12 @@ get_vertex_array_attrib(struct gl_context *ctx,
   }
   goto error;
case GL_VERTEX_ATTRIB_BINDING:
-  if (_mesa_is_desktop_gl(ctx)) {
+  if (_mesa_is_desktop_gl(ctx) || _mesa_is_gles31(ctx)) {
  return array->VertexBinding - VERT_ATTRIB_GENERIC0;
   }
   goto error;
case GL_VERTEX_ATTRIB_RELATIVE_OFFSET:
-  if (_mesa_is_desktop_gl(ctx)) {
+  if (_mesa_is_desktop_gl(ctx) || _mesa_is_gles31(ctx)) {
  return array->RelativeOffset;
   }
   goto error;
@@ -1676,7 +1676,7 @@ vertex_array_vertex_buffer(struct gl_context *ctx, struct 
gl_vertex_array_object
   return;
}
 
-   if (ctx->API == API_OPENGL_CORE && ctx->Version >= 44 &&
+   if (((ctx->API == API_OPENGL_CORE && ctx->Version >= 44) || 
_mesa_is_gles31(ctx)) &&
stride > ctx->Const.MaxVertexAttribStride) {
   _mesa_error(ctx, GL_INVALID_VALUE, "%s(stride=%d > "
   "GL_MAX_VERTEX_ATTRIB_STRIDE)", func, stride);
@@ -1726,7 +1726,7 @@ _mesa_BindVertexBuffer(GLuint bindingIndex, GLuint 
buffer, GLintptr offset,
 *"An INVALID_OPERATION error is generated if no vertex array object
 * is bound."
 */
-   if (ctx->API == API_OPENGL_CORE &&
+   if ((ctx->API == API_OPENGL_CORE || _mesa_is_gles31(ctx)) &&
ctx->Array.VAO == ctx->Array.DefaultVAO) {
   _mesa_error(ctx, GL_INVALID_OPERATION,
   "glBindVertexBuffer(No array object bound)");
@@ -1948,7 +1948,7 @@ vertex_attrib_format(GLuint attribIndex, GLint size, 
GLenum type,
 * is an oversight.  In the OpenGL 4.3 (Core Profile) spec, it applies
 * to all three functions.
 */
-   if (ctx->API == API_OPENGL_CORE &&
+   if ((ctx->API == API_OPENGL_CORE || _mesa_is_gles31(ctx)) &&
ctx->Array.VAO == ctx->Array.DefaultVAO) {
   _mesa_error(ctx, GL_INVALID_OPERATION,
   "%s(No array object bound)", func);
@@ -2136,7 +2136,7 @@ _mesa_VertexAttribBinding(GLuint attribIndex, GLuint 
bindingIndex)
 *"An INVALID_OPERATION error is generated if no vertex array object
 * is bound."
 */
-   if (ctx->API == API_OPENGL_CORE &&
+   if ((ctx->API == API_OPENGL_CORE || _mesa_is_gles31(ctx)) &&
ctx->Array.VAO == ctx->Array.DefaultVAO) {
   _mesa_error(ctx, GL_INVALID_OPERATION,
   "glVertexAttribBinding(No array object bound)");
@@ -2210,7 +2210,7 @@ _mesa_VertexBindingDivisor(GLuint bindingIndex, GLuint 
divisor)
 *"An INVALID_OPERATION error is generated if no vertex array object
 * is bound."
 */
-   if (ctx->API == API_OPENGL_CORE &&
+   if ((ctx->API == API_OPENGL_CORE || _mesa_is_gles31(ctx)) &&
ctx->Array.VAO == ctx->Array.DefaultVAO) {
   _mesa_error(ctx, GL_INVALID_OPERATION,
   "glVertexBindingDivisor(No array object bound)");
-- 
1.9.1

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[Mesa-dev] [PATCH 1/3] mesa/es3.1 : Align OpenGL ES 3.1 glBindVertexBuffer error handling with OpenGL Core

2015-08-19 Thread Marta Lofstedt
From: Marta Lofstedt 

According to OpenGL ES 3.1 specification 10.3.1:
"An INVALID_OPERATION error is generated if buffer is not zero
or a name returned from a previous call to GenBuffers,
or if such a name has since been deleted with DeleteBuffers."
This error check was previously limited to OpenGL Core.

Signed-off-by: Marta Lofstedt 
---
 src/mesa/main/bufferobj.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/mesa/main/bufferobj.c b/src/mesa/main/bufferobj.c
index e17b41c..2ca0064 100644
--- a/src/mesa/main/bufferobj.c
+++ b/src/mesa/main/bufferobj.c
@@ -919,7 +919,7 @@ _mesa_handle_bind_buffer_gen(struct gl_context *ctx,
 {
struct gl_buffer_object *buf = *buf_handle;
 
-   if (!buf && ctx->API == API_OPENGL_CORE) {
+   if (!buf && (ctx->API == API_OPENGL_CORE || _mesa_is_gles31(ctx))) {
   _mesa_error(ctx, GL_INVALID_OPERATION, "%s(non-gen name)", caller);
   return false;
}
-- 
1.9.1

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[Mesa-dev] [PATCH 1/2] mesa/formats: only do type and component lookup for uncompressed formats

2015-08-19 Thread Nanley Chery
From: Nanley Chery 

Only uncompressed formats have a non-void type and actual components per pixel.
Rename _mesa_format_to_type_and_comps to
_mesa_uncompressed_format_to_type_and_comps and require callers to check if
the format is not compressed.

v2. include compressed format cases to avoid gcc warnings.

Signed-off-by: Nanley Chery 
---
 src/mesa/main/format_utils.c |  2 +-
 src/mesa/main/formats.c  | 89 +---
 src/mesa/main/formats.h  |  2 +-
 src/mesa/main/mipmap.c   |  2 +-
 4 files changed, 46 insertions(+), 49 deletions(-)

diff --git a/src/mesa/main/format_utils.c b/src/mesa/main/format_utils.c
index 810bb16..5fdabd5 100644
--- a/src/mesa/main/format_utils.c
+++ b/src/mesa/main/format_utils.c
@@ -602,7 +602,7 @@ _mesa_format_to_array(mesa_format format, GLenum *type, int 
*num_components,
 
*normalized = !_mesa_is_format_integer(format);
 
-   _mesa_format_to_type_and_comps(format, type, &format_components);
+   _mesa_uncompressed_format_to_type_and_comps(format, type, 
&format_components);
 
switch (_mesa_get_format_layout(format)) {
case MESA_FORMAT_LAYOUT_ARRAY:
diff --git a/src/mesa/main/formats.c b/src/mesa/main/formats.c
index baeb1bf..24c16ee 100644
--- a/src/mesa/main/formats.c
+++ b/src/mesa/main/formats.c
@@ -870,9 +870,9 @@ _mesa_format_row_stride(mesa_format format, GLsizei width)
 
 
 /**
- * Debug/test: check that all formats are handled in the
- * _mesa_format_to_type_and_comps() function.  When new pixel formats
- * are added to Mesa, that function needs to be updated.
+ * Debug/test: check that all uncompressed formats are handled in the
+ * _mesa_uncompressed_format_to_type_and_comps() function. When new pixel
+ * formats are added to Mesa, that function needs to be updated.
  * This is a no-op after the first call.
  */
 static void
@@ -886,7 +886,8 @@ check_format_to_type_and_comps(void)
   /* This function will emit a problem/warning if the format is
* not handled.
*/
-  _mesa_format_to_type_and_comps(f, &datatype, &comps);
+  if (!_mesa_is_format_compressed(f))
+ _mesa_uncompressed_format_to_type_and_comps(f, &datatype, &comps);
}
 }
 
@@ -982,11 +983,11 @@ _mesa_test_formats(void)
 
 
 /**
- * Return datatype and number of components per texel for the given 
mesa_format.
- * Only used for mipmap generation code.
+ * Return datatype and number of components per texel for the given
+ * uncompressed mesa_format. Only used for mipmap generation code.
  */
 void
-_mesa_format_to_type_and_comps(mesa_format format,
+_mesa_uncompressed_format_to_type_and_comps(mesa_format format,
GLenum *datatype, GLuint *comps)
 {
switch (format) {
@@ -1220,44 +1221,6 @@ _mesa_format_to_type_and_comps(mesa_format format,
   *comps = 2;
   return;
 
-   case MESA_FORMAT_RGB_FXT1:
-   case MESA_FORMAT_RGBA_FXT1:
-   case MESA_FORMAT_RGB_DXT1:
-   case MESA_FORMAT_RGBA_DXT1:
-   case MESA_FORMAT_RGBA_DXT3:
-   case MESA_FORMAT_RGBA_DXT5:
-   case MESA_FORMAT_SRGB_DXT1:
-   case MESA_FORMAT_SRGBA_DXT1:
-   case MESA_FORMAT_SRGBA_DXT3:
-   case MESA_FORMAT_SRGBA_DXT5:
-   case MESA_FORMAT_R_RGTC1_UNORM:
-   case MESA_FORMAT_R_RGTC1_SNORM:
-   case MESA_FORMAT_RG_RGTC2_UNORM:
-   case MESA_FORMAT_RG_RGTC2_SNORM:
-   case MESA_FORMAT_L_LATC1_UNORM:
-   case MESA_FORMAT_L_LATC1_SNORM:
-   case MESA_FORMAT_LA_LATC2_UNORM:
-   case MESA_FORMAT_LA_LATC2_SNORM:
-   case MESA_FORMAT_ETC1_RGB8:
-   case MESA_FORMAT_ETC2_RGB8:
-   case MESA_FORMAT_ETC2_SRGB8:
-   case MESA_FORMAT_ETC2_RGBA8_EAC:
-   case MESA_FORMAT_ETC2_SRGB8_ALPHA8_EAC:
-   case MESA_FORMAT_ETC2_R11_EAC:
-   case MESA_FORMAT_ETC2_RG11_EAC:
-   case MESA_FORMAT_ETC2_SIGNED_R11_EAC:
-   case MESA_FORMAT_ETC2_SIGNED_RG11_EAC:
-   case MESA_FORMAT_ETC2_RGB8_PUNCHTHROUGH_ALPHA1:
-   case MESA_FORMAT_ETC2_SRGB8_PUNCHTHROUGH_ALPHA1:
-   case MESA_FORMAT_BPTC_RGBA_UNORM:
-   case MESA_FORMAT_BPTC_SRGB_ALPHA_UNORM:
-   case MESA_FORMAT_BPTC_RGB_SIGNED_FLOAT:
-   case MESA_FORMAT_BPTC_RGB_UNSIGNED_FLOAT:
-  /* XXX generate error instead? */
-  *datatype = GL_UNSIGNED_BYTE;
-  *comps = 0;
-  return;
-
case MESA_FORMAT_RGBA_FLOAT32:
   *datatype = GL_FLOAT;
   *comps = 4;
@@ -1556,12 +1519,46 @@ _mesa_format_to_type_and_comps(mesa_format format,
   assert(0);
   return;
 
+   case MESA_FORMAT_RGB_FXT1:
+   case MESA_FORMAT_RGBA_FXT1:
+   case MESA_FORMAT_RGB_DXT1:
+   case MESA_FORMAT_RGBA_DXT1:
+   case MESA_FORMAT_RGBA_DXT3:
+   case MESA_FORMAT_RGBA_DXT5:
+   case MESA_FORMAT_SRGB_DXT1:
+   case MESA_FORMAT_SRGBA_DXT1:
+   case MESA_FORMAT_SRGBA_DXT3:
+   case MESA_FORMAT_SRGBA_DXT5:
+   case MESA_FORMAT_R_RGTC1_UNORM:
+   case MESA_FORMAT_R_RGTC1_SNORM:
+   case MESA_FORMAT_RG_RGTC2_UNORM:
+   case MESA_FORMAT_RG_RGTC2_SNORM:
+   case MESA_FORMAT_L_LATC1_UNORM:
+   case MESA_FORMAT_L_LATC1_SNORM:
+   case MESA_FORMAT_LA_LATC2_UNORM:
+   case MESA_FORMAT_LA_LATC2_SNORM:
+  

[Mesa-dev] [PATCH 2/2] mesa/formats: make format testing a gtest

2015-08-19 Thread Nanley Chery
From: Nanley Chery 

We currently check that our format info table is sane during context
initialization in debug builds. Perform this check during
`make check` instead. This enables format testing in release builds
and removes the requirement of an exhuastive switch for
_mesa_uncompressed_format_to_type_and_comps().

Signed-off-by: Nanley Chery 
---
 src/mesa/main/context.c  |   4 -
 src/mesa/main/formats.c  | 157 ++-
 src/mesa/main/tests/Makefile.am  |   1 +
 src/mesa/main/tests/mesa_formats.cpp | 130 +
 4 files changed, 137 insertions(+), 155 deletions(-)
 create mode 100644 src/mesa/main/tests/mesa_formats.cpp

diff --git a/src/mesa/main/context.c b/src/mesa/main/context.c
index 7451e5a..6a40c0a 100644
--- a/src/mesa/main/context.c
+++ b/src/mesa/main/context.c
@@ -402,10 +402,6 @@ one_time_init( struct gl_context *ctx )
 PACKAGE_VERSION, __DATE__, __TIME__);
   }
 #endif
-
-#ifdef DEBUG
-  _mesa_test_formats();
-#endif
}
 
/* per-API one-time init */
diff --git a/src/mesa/main/formats.c b/src/mesa/main/formats.c
index 24c16ee..e58b917 100644
--- a/src/mesa/main/formats.c
+++ b/src/mesa/main/formats.c
@@ -81,6 +81,7 @@ static const struct gl_format_info *
 _mesa_get_format_info(mesa_format format)
 {
const struct gl_format_info *info = &format_info[format];
+   STATIC_ASSERT(ARRAY_SIZE(format_info) == MESA_FORMAT_COUNT);
assert(info->Name == format);
return info;
 }
@@ -869,118 +870,6 @@ _mesa_format_row_stride(mesa_format format, GLsizei width)
 }
 
 
-/**
- * Debug/test: check that all uncompressed formats are handled in the
- * _mesa_uncompressed_format_to_type_and_comps() function. When new pixel
- * formats are added to Mesa, that function needs to be updated.
- * This is a no-op after the first call.
- */
-static void
-check_format_to_type_and_comps(void)
-{
-   mesa_format f;
-
-   for (f = MESA_FORMAT_NONE + 1; f < MESA_FORMAT_COUNT; f++) {
-  GLenum datatype = 0;
-  GLuint comps = 0;
-  /* This function will emit a problem/warning if the format is
-   * not handled.
-   */
-  if (!_mesa_is_format_compressed(f))
- _mesa_uncompressed_format_to_type_and_comps(f, &datatype, &comps);
-   }
-}
-
-/**
- * Do sanity checking of the format info table.
- */
-void
-_mesa_test_formats(void)
-{
-   GLuint i;
-
-   STATIC_ASSERT(ARRAY_SIZE(format_info) == MESA_FORMAT_COUNT);
-
-   for (i = 0; i < MESA_FORMAT_COUNT; i++) {
-  const struct gl_format_info *info = _mesa_get_format_info(i);
-  assert(info);
-
-  assert(info->Name == i);
-
-  if (info->Name == MESA_FORMAT_NONE)
- continue;
-
-  if (info->BlockWidth == 1 && info->BlockHeight == 1) {
- if (info->RedBits > 0) {
-GLuint t = info->RedBits + info->GreenBits
-   + info->BlueBits + info->AlphaBits;
-assert(t / 8 <= info->BytesPerBlock);
-(void) t;
- }
-  }
-
-  assert(info->DataType == GL_UNSIGNED_NORMALIZED ||
- info->DataType == GL_SIGNED_NORMALIZED ||
- info->DataType == GL_UNSIGNED_INT ||
- info->DataType == GL_INT ||
- info->DataType == GL_FLOAT ||
- /* Z32_FLOAT_X24S8 has DataType of GL_NONE */
- info->DataType == GL_NONE);
-
-  if (info->BaseFormat == GL_RGB) {
- assert(info->RedBits > 0);
- assert(info->GreenBits > 0);
- assert(info->BlueBits > 0);
- assert(info->AlphaBits == 0);
- assert(info->LuminanceBits == 0);
- assert(info->IntensityBits == 0);
-  }
-  else if (info->BaseFormat == GL_RGBA) {
- assert(info->RedBits > 0);
- assert(info->GreenBits > 0);
- assert(info->BlueBits > 0);
- assert(info->AlphaBits > 0);
- assert(info->LuminanceBits == 0);
- assert(info->IntensityBits == 0);
-  }
-  else if (info->BaseFormat == GL_RG) {
- assert(info->RedBits > 0);
- assert(info->GreenBits > 0);
- assert(info->BlueBits == 0);
- assert(info->AlphaBits == 0);
- assert(info->LuminanceBits == 0);
- assert(info->IntensityBits == 0);
-  }
-  else if (info->BaseFormat == GL_RED) {
- assert(info->RedBits > 0);
- assert(info->GreenBits == 0);
- assert(info->BlueBits == 0);
- assert(info->AlphaBits == 0);
- assert(info->LuminanceBits == 0);
- assert(info->IntensityBits == 0);
-  }
-  else if (info->BaseFormat == GL_LUMINANCE) {
- assert(info->RedBits == 0);
- assert(info->GreenBits == 0);
- assert(info->BlueBits == 0);
- assert(info->AlphaBits == 0);
- assert(info->LuminanceBits > 0);
- assert(info->IntensityBits == 0);
-  }
-  else if (info->BaseFormat == GL_INTENSITY) {
- assert(info->RedBits == 0);
- assert(info->GreenBits == 0);

[Mesa-dev] [PATCH v2] mesa/formats: refactor by removing compressed formats

2015-08-19 Thread Nanley Chery
From: Nanley Chery 

All compressed formats return GL_FALSE and there isn't any evidence to
support that this behaviour would change. Remove all switch cases for
compressed formats.

v2. Since the exhaustive switch is removed, add a gtest to ensure
all formats are handled.

Cc: Brian Paul 
Cc: Chad Versace 
Signed-off-by: Nanley Chery 
---
 src/mesa/drivers/dri/i915/intel_pixel_read.c |  2 +-
 src/mesa/drivers/dri/i915/intel_tex_image.c  |  2 +-
 src/mesa/main/formats.c  | 57 ++--
 src/mesa/main/formats.h  |  2 +-
 src/mesa/main/readpix.c  |  2 +-
 src/mesa/main/tests/mesa_formats.cpp |  7 +++-
 src/mesa/main/texgetimage.c  |  2 +-
 src/mesa/main/texstore.c |  2 +-
 src/mesa/state_tracker/st_cb_readpixels.c|  2 +-
 src/mesa/state_tracker/st_cb_texture.c   |  6 +--
 src/mesa/state_tracker/st_format.c   |  2 +-
 src/mesa/swrast/s_drawpix.c  |  2 +-
 12 files changed, 29 insertions(+), 59 deletions(-)

diff --git a/src/mesa/drivers/dri/i915/intel_pixel_read.c 
b/src/mesa/drivers/dri/i915/intel_pixel_read.c
index 149e921..e6fa8f2 100644
--- a/src/mesa/drivers/dri/i915/intel_pixel_read.c
+++ b/src/mesa/drivers/dri/i915/intel_pixel_read.c
@@ -91,7 +91,7 @@ do_blit_readpixels(struct gl_context * ctx,
 
if (ctx->_ImageTransferState ||
!_mesa_format_matches_format_and_type(irb->mt->format, format, type,
- false)) {
+ false, NULL)) {
   DBG("%s - bad format for blit\n", __func__);
   return false;
}
diff --git a/src/mesa/drivers/dri/i915/intel_tex_image.c 
b/src/mesa/drivers/dri/i915/intel_tex_image.c
index 0a213e9..5ab60d1 100644
--- a/src/mesa/drivers/dri/i915/intel_tex_image.c
+++ b/src/mesa/drivers/dri/i915/intel_tex_image.c
@@ -134,7 +134,7 @@ try_pbo_upload(struct gl_context *ctx,
}
 
if (!_mesa_format_matches_format_and_type(intelImage->mt->format,
- format, type, false)) {
+ format, type, false, NULL)) {
   DBG("%s: format mismatch (upload to %s with format 0x%x, type 0x%x)\n",
  __func__, _mesa_get_format_name(intelImage->mt->format),
  format, type);
diff --git a/src/mesa/main/formats.c b/src/mesa/main/formats.c
index e58b917..51ac76d 100644
--- a/src/mesa/main/formats.c
+++ b/src/mesa/main/formats.c
@@ -1432,15 +1432,18 @@ _mesa_uncompressed_format_to_type_and_comps(mesa_format 
format,
 GLboolean
 _mesa_format_matches_format_and_type(mesa_format mesa_format,
 GLenum format, GLenum type,
- GLboolean swapBytes)
+GLboolean swapBytes, GLenum *error)
 {
const GLboolean littleEndian = _mesa_little_endian();
+   GLenum local_error = GL_NO_ERROR;
 
/* Note: When reading a GL format/type combination, the format lists channel
 * assignments from most significant channel in the type to least
 * significant.  A type with _REV indicates that the assignments are
 * swapped, so they are listed from least significant to most significant.
 *
+* Compressed formats will fall through and return GL_FALSE.
+*
 * For sanity, please keep this switch statement ordered the same as the
 * enums in formats.h.
 */
@@ -1701,26 +1704,6 @@ _mesa_format_matches_format_and_type(mesa_format 
mesa_format,
case MESA_FORMAT_S_UINT8:
   return format == GL_STENCIL_INDEX && type == GL_UNSIGNED_BYTE;
 
-   case MESA_FORMAT_SRGB_DXT1:
-   case MESA_FORMAT_SRGBA_DXT1:
-   case MESA_FORMAT_SRGBA_DXT3:
-   case MESA_FORMAT_SRGBA_DXT5:
-  return GL_FALSE;
-
-   case MESA_FORMAT_RGB_FXT1:
-   case MESA_FORMAT_RGBA_FXT1:
-   case MESA_FORMAT_RGB_DXT1:
-   case MESA_FORMAT_RGBA_DXT1:
-   case MESA_FORMAT_RGBA_DXT3:
-   case MESA_FORMAT_RGBA_DXT5:
-  return GL_FALSE;
-
-   case MESA_FORMAT_BPTC_RGBA_UNORM:
-   case MESA_FORMAT_BPTC_SRGB_ALPHA_UNORM:
-   case MESA_FORMAT_BPTC_RGB_SIGNED_FLOAT:
-   case MESA_FORMAT_BPTC_RGB_UNSIGNED_FLOAT:
-  return GL_FALSE;
-
case MESA_FORMAT_RGBA_FLOAT32:
   return format == GL_RGBA && type == GL_FLOAT && !swapBytes;
case MESA_FORMAT_RGBA_FLOAT16:
@@ -1917,31 +1900,6 @@ _mesa_format_matches_format_and_type(mesa_format 
mesa_format,
   return format == GL_RGBA && type == GL_UNSIGNED_SHORT &&
  !swapBytes;
 
-   case MESA_FORMAT_R_RGTC1_UNORM:
-   case MESA_FORMAT_R_RGTC1_SNORM:
-   case MESA_FORMAT_RG_RGTC2_UNORM:
-   case MESA_FORMAT_RG_RGTC2_SNORM:
-  return GL_FALSE;
-
-   case MESA_FORMAT_L_LATC1_UNORM:
-   case MESA_FORMAT_L_LATC1_SNORM:
-   case MESA_FORMAT_LA_LATC2_UNORM:
-   case MESA_FORMAT_LA_LATC2_SNORM:
-  return GL_FALSE;
-
-   case MESA_FORMAT_ETC1_RGB8:
-   case MESA_FORMAT_ETC2_RGB8:
-   case MESA_FORMAT_ETC2_SRGB8:
-   cas

Re: [Mesa-dev] [PATCH 4/4] mesa/formats: refactor by globbing on types in switch statement

2015-08-19 Thread Nanley Chery
On Fri, Aug 14, 2015 at 4:09 PM, Chad Versace 
wrote:

> On Tue 11 Aug 2015, Nanley Chery wrote:
> > From: Nanley Chery 
> >
> > Combine the adjacent cases which have the same GL type in the switch
> statemnt.
> >
> > Signed-off-by: Nanley Chery 
> > ---
> >  src/mesa/main/formats.c | 152
> ++--
> >  1 file changed, 17 insertions(+), 135 deletions(-)
>
> I checked every line in this patch and found no errors.
>
> Patch 4/4 is
> Reviewed-by: Chad Versace 
>
> As an aside... Do you think the format's datatype be stored directly in
> the Mesa's format info table? It seems strange that Mesa maintains that
> bit of information outside the info table.
>

Thanks. I do think this is something that should be added to the format
info table. The only downsides I can see are that the csv would increase in
width and that the format info table would take up more memory, but I don't
think that'd be a real problem.
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Re: [Mesa-dev] [PATCH 09/25] glsl: Add support for image binding qualifiers.

2015-08-19 Thread Timothy Arceri
On Wed, 2015-08-19 at 13:52 +0300, Francisco Jerez wrote:
> Timothy Arceri  writes:
> 
> > On Mon, 2015-08-17 at 19:45 +0300, Francisco Jerez wrote:
> > > Support for binding an image to an image unit explicitly in the shader
> > > source is required by both GLSL 4.2 and GLSL ES 3.1, but not by the
> > > original ARB_shader_image_load_store extension.
> > > ---
> > >  src/glsl/ast_to_hir.cpp| 12 +++-
> > >  src/glsl/link_uniform_initializers.cpp | 24 +---
> > >  2 files changed, 28 insertions(+), 8 deletions(-)
> > > 
> > > diff --git a/src/glsl/ast_to_hir.cpp b/src/glsl/ast_to_hir.cpp
> > > index 06cd6a5..0bf7a1f 100644
> > > --- a/src/glsl/ast_to_hir.cpp
> > > +++ b/src/glsl/ast_to_hir.cpp
> > > @@ -2181,10 +2181,20 @@ validate_binding_qualifier(struct 
> > > _mesa_glsl_parse_state *state,
> > >  
> > >   return false;
> > >}
> > > +   } else if (state->is_version(420, 310) &&
> > > +  var->type->without_array()->is_image()) {
> > > +  assert(ctx->Const.MaxImageUnits <= MAX_IMAGE_UNITS);
> > > +  if (max_index >= ctx->Const.MaxImageUnits) {
> > > + _mesa_glsl_error(loc, state, "Image binding %d exceeds the "
> > > +  " maximum number of image units (%d)", 
> > > max_index,
> > > +  ctx->Const.MaxImageUnits);
> > > + return false;
> > > +  }
> > > +
> > > } else {
> > >_mesa_glsl_error(loc, state,
> > > "the \"binding\" qualifier only applies to 
> > > uniform "
> > > -   "blocks, samplers, atomic counters, or arrays 
> > > thereof");
> > > +   "blocks, opaque variables, or arrays thereof");
> > >return false;
> > > }
> > >  
> > > diff --git a/src/glsl/link_uniform_initializers.cpp 
> > > b/src/glsl/link_uniform_initializers.cpp
> > > index d61ae91..7c6269b 100644
> > > --- a/src/glsl/link_uniform_initializers.cpp
> > > +++ b/src/glsl/link_uniform_initializers.cpp
> > > @@ -101,7 +101,7 @@ copy_constant_to_storage(union gl_constant_value 
> > > *storage,
> > >  }
> > >  
> > >  void
> > > -set_sampler_binding(gl_shader_program *prog, const char *name, int 
> > > binding)
> > > +set_opaque_binding(gl_shader_program *prog, const char *name, int 
> > > binding)
> > 
> > I guess you could add a comment the atomics are handled elsewhere but not 
> > a
> > big deal.
> > 
> > Reviewed-by: Timothy Arceri 
> > 
> 
> > --- a/src/glsl/link_uniform_initializers.cpp
> > +++ b/src/glsl/link_uniform_initializers.cpp
> > @@ -100,6 +100,11 @@ copy_constant_to_storage(union gl_constant_value 
> > *storage,
> > }
> >  }
> > 
> > +/**
> > + * Initialize an opaque uniform from the value of an explicit binding
> > + * qualifier specified in the shader.  Atomic counters are different 
> > because
> > + * they have no storage and should be handled elsewhere.
> > + */
> >  void
> >  set_opaque_binding(gl_shader_program *prog, const char *name, int 
> > binding)
> >  {
> 
> Does that look okay for you?

Looks good to me, thanks.


> 
> Thanks.
> 
> > 
> > >  {
> > > struct gl_uniform_storage *const storage =
> > >get_storage(prog->UniformStorage, prog->NumUniformStorage, name);
> > > @@ -127,11 +127,20 @@ set_sampler_binding(gl_shader_program *prog, const 
> > > char *name, int binding)
> > > for (int sh = 0; sh < MESA_SHADER_STAGES; sh++) {
> > >gl_shader *shader = prog->_LinkedShaders[sh];
> > >  
> > > -  if (shader && storage->sampler[sh].active) {
> > > - for (unsigned i = 0; i < elements; i++) {
> > > -unsigned index = storage->sampler[sh].index + i;
> > > +  if (shader) {
> > > + if (storage->type->base_type == GLSL_TYPE_SAMPLER &&
> > > + storage->sampler[sh].active) {
> > > +for (unsigned i = 0; i < elements; i++) {
> > > +   const unsigned index = storage->sampler[sh].index + i;
> > > +   shader->SamplerUnits[index] = storage->storage[i].i;
> > > +}
> > >  
> > > -shader->SamplerUnits[index] = storage->storage[i].i;
> > > + } else if (storage->type->base_type == GLSL_TYPE_IMAGE &&
> > > +storage->image[sh].active) {
> > > +for (unsigned i = 0; i < elements; i++) {
> > > +   const unsigned index = storage->image[sh].index + i;
> > > +   shader->ImageUnits[index] = storage->storage[i].i;
> > > +}
> > >   }
> > >}
> > > }
> > > @@ -267,8 +276,9 @@ link_set_uniform_initializers(struct 
> > > gl_shader_program 
> > > *prog,
> > >   if (var->data.explicit_binding) {
> > >  const glsl_type *const type = var->type;
> > >  
> > > -if (type->without_array()->is_sampler()) {
> > > -   linker::set_sampler_binding(prog, var->name, var
> > > ->data.binding);
> > > +if (type->without_array()->is_sampler() ||
> > > + 

Re: [Mesa-dev] [PATCH 10/25] glsl: Require that all image uniforms have a format qualifier in GLSL ES.

2015-08-19 Thread Timothy Arceri
Reviewed-by: Timothy Arceri 
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[Mesa-dev] [PATCH] i965/fs: Split VGRFs after lowering pull constants

2015-08-19 Thread Jason Ekstrand
The split_virtual_grfs code doesn't properly rewrite reladdr so we need to
make sure that any uniform indirects are lowered away first.
---
 src/mesa/drivers/dri/i965/brw_fs.cpp | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp 
b/src/mesa/drivers/dri/i965/brw_fs.cpp
index 2a4cbff..3d55dc8 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs.cpp
@@ -4784,11 +4784,11 @@ fs_visitor::optimize()
 */
bld = fs_builder(this, 64);
 
-   split_virtual_grfs();
-
assign_constant_locations();
lower_constant_loads();
 
+   split_virtual_grfs();
+
 #define OPT(pass, args...) ({   \
   pass_num++;   \
   bool this_progress = pass(args);  \
-- 
2.4.3

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Re: [Mesa-dev] [PATCH] i965/fs: Split VGRFs after lowering pull constants

2015-08-19 Thread Jason Ekstrand
The following shader test exercises the bug:

[require]
GLSL >= 1.10

[vertex shader]
void main()
{
   gl_Position = gl_Vertex;
}

[fragment shader]
uniform float f[4];
uniform ivec4 s;

void main()
{
   gl_FragColor = vec4(f[s.x], f[s.y], f[s.z], f[s.w]);
}

[test]
uniform float f[0] 0.0
uniform float f[1] 1.0
uniform ivec4 s 0 1 0 1
draw rect -1 -1 2 2

On Wed, Aug 19, 2015 at 2:32 PM, Jason Ekstrand  wrote:
> The split_virtual_grfs code doesn't properly rewrite reladdr so we need to
> make sure that any uniform indirects are lowered away first.
> ---
>  src/mesa/drivers/dri/i965/brw_fs.cpp | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp 
> b/src/mesa/drivers/dri/i965/brw_fs.cpp
> index 2a4cbff..3d55dc8 100644
> --- a/src/mesa/drivers/dri/i965/brw_fs.cpp
> +++ b/src/mesa/drivers/dri/i965/brw_fs.cpp
> @@ -4784,11 +4784,11 @@ fs_visitor::optimize()
>  */
> bld = fs_builder(this, 64);
>
> -   split_virtual_grfs();
> -
> assign_constant_locations();
> lower_constant_loads();
>
> +   split_virtual_grfs();
> +
>  #define OPT(pass, args...) ({   \
>pass_num++;   \
>bool this_progress = pass(args);  \
> --
> 2.4.3
>
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Re: [Mesa-dev] [PATCH 12/25] glsl: Allow precision qualifiers on general opaque types.

2015-08-19 Thread Timothy Arceri
Reviewed-by: Timothy Arceri 
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Re: [Mesa-dev] [PATCH 13/25] glsl: Use a separate availability class for image atomic built-ins.

2015-08-19 Thread Timothy Arceri
Reviewed-by: Timothy Arceri 
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Re: [Mesa-dev] glClearColor is broken in a weird way if compiled with mangling enabled

2015-08-19 Thread Yuzhu Lu
It seems related to datatype GLclampf, which affects mglClearColor, 
mglBlendColor... If I replace it with double, everything works fine. Any ideas? 



Yuzhu 




- Original Message -

From: "Yuzhu Lu"  
To: mesa-dev@lists.freedesktop.org, mesa-us...@lists.freedesktop.org 
Sent: Friday, August 14, 2015 1:22:05 PM 
Subject: [Mesa-dev] glClearColor is broken in a weird way if compiled with 
mangling enabled 


Hi All, 

Since I need to load osmesa and system GL api at the same time on Linux, I need 
to compile 10.5.9 osmesa in a mangled way. After a simple fix in glapi.h: 

/* Is this needed? It is incomplete anyway. */ 
/* 
#ifdef USE_MGL_NAMESPACE 
#define _glapi_set_dispatch _mglapi_set_dispatch 
#define _glapi_get_dispatch _mglapi_get_dispatch 
#define _glapi_set_context _mglapi_set_context 
#define _glapi_get_context _mglapi_get_context 
#define _glapi_Dispatch _mglapi_Dispatch 
#define _glapi_Context _mglapi_Context 
#endif 
*/ 

Now it compiles fine and here is my configuration: 

./configure CFLAGS="-O2" CXXFLAGS="-O2" --disable-xvmc --disable-glx 
--disable-dri --with-dri-drivers="" --with-gallium-drivers="swrast" 
--enable-texture-float --enable-shared-glapi --disable-egl --enable-mangling 
--with-egl-platforms="" --enable-gallium-osmesa --enable-gallium-llvm=yes 
--disable-llvm-shared-libs --with-osmesa-bits=32 --with-max-width=65536 
--with-max-height=65536 

But glClearColor is broken in a weird way that the value passed in is revised 
internally. Here is my call: 
mglClearColor(0.5f, 0.3f, 0.3f, 0.3f); 

But if I print out the value in _mesa_ClearColor() method of Clear.c. It shows: 
ClearColor: 0.00, 2.00, 2.00, 2.00 

I totally have no idea why this is happening while everything works fine with 
mangling disabled. 

Also, the compiler complains that mglGetString returns int instead of const 
GLubyte*: 
osdemo32.c:441:1: warning: format ‘%s’ expects argument of type ‘char *’, but 
argument 2 has type ‘int’ [-Wformat=] 
printf("Version: %s\n", mglGetString(GL_VERSION)); 

And mglGetString(GL_SHADING_LANGUAGE_VERSION) will crash the application while 
other string works fine. 

I also try to compile it with disable-shared-glapi flag, but I get errors. I am 
not sure this is because gl_mangle.h is dated. (If I manually add the following 
functions in gl_mangle.h, it compiles fine but some functions like 
glCreateShader will be totally messed up.) 

I would really appreciate it if someone have solutions because this is a very 
important project for us. 



CXXLD libMangledOSMesa32.la 
../../../../src/mapi/glapi/.libs/libglapi.a(glapi_libglapi_la-glapi_getproc.o):(.data.rel.ro+0x5588):
 undefined reference to `glPointSizePointerOES' 
../../../../src/mapi/glapi/.libs/libglapi.a(glapi_libglapi_la-glapi_getproc.o):(.data.rel.ro+0x6ae8):
 undefined reference to `glPolygonOffsetClampEXT' 
../../../../src/mapi/glapi/.libs/libglapi.a(glapi_libglapi_la-glapi_getproc.o):(.data.rel.ro+0x6b78):
 undefined reference to `glAlphaFuncx' 
../../../../src/mapi/glapi/.libs/libglapi.a(glapi_libglapi_la-glapi_getproc.o):(.data.rel.ro+0x6b90):
 undefined reference to `glClearColorx' 
../../../../src/mapi/glapi/.libs/libglapi.a(glapi_libglapi_la-glapi_getproc.o):(.data.rel.ro+0x6ba8):
 undefined reference to `glClearDepthx' 
../../../../src/mapi/glapi/.libs/libglapi.a(glapi_libglapi_la-glapi_getproc.o):(.data.rel.ro+0x6bc0):
 undefined reference to `glColor4x' 
../../../../src/mapi/glapi/.libs/libglapi.a(glapi_libglapi_la-glapi_getproc.o):(.data.rel.ro+0x6bd8):
 undefined reference to `glDepthRangex' 
../../../../src/mapi/glapi/.libs/libglapi.a(glapi_libglapi_la-glapi_getproc.o):(.data.rel.ro+0x6bf0):
 undefined reference to `glFogx' 
../../../../src/mapi/glapi/.libs/libglapi.a(glapi_libglapi_la-glapi_getproc.o):(.data.rel.ro+0x6c08):
 undefined reference to `glFogxv' 
../../../../src/mapi/glapi/.libs/libglapi.a(glapi_libglapi_la-glapi_getproc.o):(.data.rel.ro+0x6c20):
 undefined reference to `glFrustumf' 
../../../../src/mapi/glapi/.libs/libglapi.a(glapi_libglapi_la-glapi_getproc.o):(.data.rel.ro+0x6c38):
 undefined reference to `glFrustumx' 
../../../../src/mapi/glapi/.libs/libglapi.a(glapi_libglapi_la-glapi_getproc.o):(.data.rel.ro+0x6c50):
 undefined reference to `glLightModelx' 
../../../../src/mapi/glapi/.libs/libglapi.a(glapi_libglapi_la-glapi_getproc.o):(.data.rel.ro+0x6c68):
 undefined reference to `glLightModelxv' 
../../../../src/mapi/glapi/.libs/libglapi.a(glapi_libglapi_la-glapi_getproc.o):(.data.rel.ro+0x6c80):
 undefined reference to `glLightx' 
../../../../src/mapi/glapi/.libs/libglapi.a(glapi_libglapi_la-glapi_getproc.o):(.data.rel.ro+0x6c98):
 undefined reference to `glLightxv' 
../../../../src/mapi/glapi/.libs/libglapi.a(glapi_libglapi_la-glapi_getproc.o):(.data.rel.ro+0x6cb0):
 undefined reference to `glLineWidthx' 
../../../../src/mapi/glapi/.libs/libglapi.a(glapi_libglapi_la-glapi_getproc.o):(.data.rel.ro+0x6cc8):
 undefined reference to `glLoadMatrixx' 
../../../../src/map

Re: [Mesa-dev] [PATCH v3] mesa: don't enable online compression for ASTC formats

2015-08-19 Thread Nanley Chery
Agreed. I've updated the patch. Thanks.

On Mon, Aug 17, 2015 at 11:39 AM, Chad Versace 
wrote:

> On Tue 11 Aug 2015, Nanley Chery wrote:
> > From: Nanley Chery 
> >
> > In agreement with the ASTC spec, this makes calls to TexImage*D
> unsuccessful.
> > Implied by the spec, Generate[Texture]Mipmap and [Copy]TexSubImage*D
> calls
> > must be unsuccessful as well.
> >
> > v2. actually force attempts to compress online to fail.
> > v3. indentation (Matt).
> >
> > Signed-off-by: Nanley Chery 
>
> I think your patch is missing a needed hunk. The patch updates 3 of the
> 5 callers of compressedteximage_only_format to use
> _mesa_format_no_online_compression isntead. Here are the 5 callers:
>
> ✓ texture_error_check (covers glTexImage*D)
> ✓ texsubimage_error_check
> ✓ copytexsubimage_error_check
> ✗ copytexture_error_check (covers glCopyTexImage*D)
> ✗ compressed_subtexture_error_check (covers glCompressedTexSubImage*D)
>
> I think you need to also update copytexture_error_check, because
> glCopyTexImage*D is unable copy pixels to an ASTC texture.
>
> Other than that, this patch looks good to me. Fix that and it's
> Reviewed-by: Chad Versace 
>
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Re: [Mesa-dev] [PATCH 1/2] mesa/texformat: enable ASTC formats for TexStorage

2015-08-19 Thread Nanley Chery
On Mon, Aug 17, 2015 at 11:54 AM, Chad Versace 
wrote:

> On Tue 28 Jul 2015, Nanley Chery wrote:
> > From: Nanley Chery 
> >
> > According to the spec, Tex*Storage* commands are supported if the GL
> > implementation has support for immutable textures.
> >
> > Signed-off-by: Nanley Chery 
> > ---
> >  src/mesa/main/texformat.c | 56
> +++
> >  1 file changed, 56 insertions(+)
>
> This patch's code looks correct to me, but I'm confused by the commit
> message. The commit message specifically calls out the glTexStorage*
> functions, but _mesa_choose_tex_format() is also used by many other
> non-storage glTex* functions.
>
> Why specifically mention the glTexStorage* function? Is there some
> larger context I'm missing?
>

I called out the glTex*Storage* functions because they were the only
commands that wouldn't work correctly during testing. Perhaps I missed some
cases (e.g., TextureViews). This patch is superseded by the following patch
(which needs review): "mesa/texformat: Use format conversion function in
_mesa_choose_tex_format"
http://lists.freedesktop.org/archives/mesa-dev/2015-August/091564.html

Regards,
Nanley
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[Mesa-dev] [PATCH] glsl: expose textureQueryLod in GLSL 4.00+ fragment shaders

2015-08-19 Thread Ilia Mirkin
Signed-off-by: Ilia Mirkin 
---
 src/glsl/builtin_functions.cpp | 119 -
 1 file changed, 82 insertions(+), 37 deletions(-)

diff --git a/src/glsl/builtin_functions.cpp b/src/glsl/builtin_functions.cpp
index 04ad617..9351f71 100644
--- a/src/glsl/builtin_functions.cpp
+++ b/src/glsl/builtin_functions.cpp
@@ -136,6 +136,13 @@ v140(const _mesa_glsl_parse_state *state)
 }
 
 static bool
+v400_fs_only(const _mesa_glsl_parse_state *state)
+{
+   return state->is_version(400, 0) &&
+  state->stage == MESA_SHADER_FRAGMENT;
+}
+
+static bool
 es31(const _mesa_glsl_parse_state *state)
 {
return state->is_version(0, 310);
@@ -670,7 +677,7 @@ private:
   const glsl_type *stream_type);
B0(barrier)
 
-   B2(textureQueryLod);
+   BA2(textureQueryLod);
B1(textureQueryLevels);
B1(dFdx);
B1(dFdy);
@@ -1951,40 +1958,77 @@ builtin_builder::create_builtins()
add_function("barrier", _barrier(), NULL);
 
add_function("textureQueryLOD",
-_textureQueryLod(glsl_type::sampler1D_type,  
glsl_type::float_type),
-_textureQueryLod(glsl_type::isampler1D_type, 
glsl_type::float_type),
-_textureQueryLod(glsl_type::usampler1D_type, 
glsl_type::float_type),
-
-_textureQueryLod(glsl_type::sampler2D_type,  
glsl_type::vec2_type),
-_textureQueryLod(glsl_type::isampler2D_type, 
glsl_type::vec2_type),
-_textureQueryLod(glsl_type::usampler2D_type, 
glsl_type::vec2_type),
-
-_textureQueryLod(glsl_type::sampler3D_type,  
glsl_type::vec3_type),
-_textureQueryLod(glsl_type::isampler3D_type, 
glsl_type::vec3_type),
-_textureQueryLod(glsl_type::usampler3D_type, 
glsl_type::vec3_type),
-
-_textureQueryLod(glsl_type::samplerCube_type,  
glsl_type::vec3_type),
-_textureQueryLod(glsl_type::isamplerCube_type, 
glsl_type::vec3_type),
-_textureQueryLod(glsl_type::usamplerCube_type, 
glsl_type::vec3_type),
-
-_textureQueryLod(glsl_type::sampler1DArray_type,  
glsl_type::float_type),
-_textureQueryLod(glsl_type::isampler1DArray_type, 
glsl_type::float_type),
-_textureQueryLod(glsl_type::usampler1DArray_type, 
glsl_type::float_type),
-
-_textureQueryLod(glsl_type::sampler2DArray_type,  
glsl_type::vec2_type),
-_textureQueryLod(glsl_type::isampler2DArray_type, 
glsl_type::vec2_type),
-_textureQueryLod(glsl_type::usampler2DArray_type, 
glsl_type::vec2_type),
-
-_textureQueryLod(glsl_type::samplerCubeArray_type,  
glsl_type::vec3_type),
-_textureQueryLod(glsl_type::isamplerCubeArray_type, 
glsl_type::vec3_type),
-_textureQueryLod(glsl_type::usamplerCubeArray_type, 
glsl_type::vec3_type),
-
-_textureQueryLod(glsl_type::sampler1DShadow_type, 
glsl_type::float_type),
-_textureQueryLod(glsl_type::sampler2DShadow_type, 
glsl_type::vec2_type),
-_textureQueryLod(glsl_type::samplerCubeShadow_type, 
glsl_type::vec3_type),
-_textureQueryLod(glsl_type::sampler1DArrayShadow_type, 
glsl_type::float_type),
-_textureQueryLod(glsl_type::sampler2DArrayShadow_type, 
glsl_type::vec2_type),
-_textureQueryLod(glsl_type::samplerCubeArrayShadow_type, 
glsl_type::vec3_type),
+_textureQueryLod(texture_query_lod, glsl_type::sampler1D_type, 
 glsl_type::float_type),
+_textureQueryLod(texture_query_lod, 
glsl_type::isampler1D_type, glsl_type::float_type),
+_textureQueryLod(texture_query_lod, 
glsl_type::usampler1D_type, glsl_type::float_type),
+
+_textureQueryLod(texture_query_lod, glsl_type::sampler2D_type, 
 glsl_type::vec2_type),
+_textureQueryLod(texture_query_lod, 
glsl_type::isampler2D_type, glsl_type::vec2_type),
+_textureQueryLod(texture_query_lod, 
glsl_type::usampler2D_type, glsl_type::vec2_type),
+
+_textureQueryLod(texture_query_lod, glsl_type::sampler3D_type, 
 glsl_type::vec3_type),
+_textureQueryLod(texture_query_lod, 
glsl_type::isampler3D_type, glsl_type::vec3_type),
+_textureQueryLod(texture_query_lod, 
glsl_type::usampler3D_type, glsl_type::vec3_type),
+
+_textureQueryLod(texture_query_lod, 
glsl_type::samplerCube_type,  glsl_type::vec3_type),
+_textureQueryLod(texture_query_lod, 
glsl_type::isamplerCube_type, glsl_type::vec3_type),
+_textureQueryLod(texture_query_lod, 
glsl_type::usamplerCube_type, glsl_type::vec3_type),
+
+_textureQueryLod(texture_query_lod, 
glsl_type::sampler1DArray_type,  glsl_type::float_type),
+_textureQueryLod(texture_query_lod, 
glsl_type::isampler1DArray_type, glsl_type::float_type),
+  

[Mesa-dev] [PATCH v3] mesa/formats: refactor by removing compressed formats

2015-08-19 Thread Nanley Chery
From: Nanley Chery 

All compressed formats return GL_FALSE and there isn't any evidence to
support that this behaviour would change. Remove all switch cases for
compressed formats.

v2. Since the exhaustive switch is removed, add a gtest to ensure
all formats are handled.
v3. Ensure that GL_NO_ERROR is set before returning.

Cc: Brian Paul 
Cc: Chad Versace 
Signed-off-by: Nanley Chery 
---
 src/mesa/drivers/dri/i915/intel_pixel_read.c |  2 +-
 src/mesa/drivers/dri/i915/intel_tex_image.c  |  2 +-
 src/mesa/main/formats.c  | 58 ++--
 src/mesa/main/formats.h  |  2 +-
 src/mesa/main/readpix.c  |  2 +-
 src/mesa/main/tests/mesa_formats.cpp |  7 +++-
 src/mesa/main/texgetimage.c  |  2 +-
 src/mesa/main/texstore.c |  2 +-
 src/mesa/state_tracker/st_cb_readpixels.c|  2 +-
 src/mesa/state_tracker/st_cb_texture.c   |  6 +--
 src/mesa/state_tracker/st_format.c   |  2 +-
 src/mesa/swrast/s_drawpix.c  |  2 +-
 12 files changed, 29 insertions(+), 60 deletions(-)

diff --git a/src/mesa/drivers/dri/i915/intel_pixel_read.c 
b/src/mesa/drivers/dri/i915/intel_pixel_read.c
index 149e921..e6fa8f2 100644
--- a/src/mesa/drivers/dri/i915/intel_pixel_read.c
+++ b/src/mesa/drivers/dri/i915/intel_pixel_read.c
@@ -91,7 +91,7 @@ do_blit_readpixels(struct gl_context * ctx,
 
if (ctx->_ImageTransferState ||
!_mesa_format_matches_format_and_type(irb->mt->format, format, type,
- false)) {
+ false, NULL)) {
   DBG("%s - bad format for blit\n", __func__);
   return false;
}
diff --git a/src/mesa/drivers/dri/i915/intel_tex_image.c 
b/src/mesa/drivers/dri/i915/intel_tex_image.c
index 0a213e9..5ab60d1 100644
--- a/src/mesa/drivers/dri/i915/intel_tex_image.c
+++ b/src/mesa/drivers/dri/i915/intel_tex_image.c
@@ -134,7 +134,7 @@ try_pbo_upload(struct gl_context *ctx,
}
 
if (!_mesa_format_matches_format_and_type(intelImage->mt->format,
- format, type, false)) {
+ format, type, false, NULL)) {
   DBG("%s: format mismatch (upload to %s with format 0x%x, type 0x%x)\n",
  __func__, _mesa_get_format_name(intelImage->mt->format),
  format, type);
diff --git a/src/mesa/main/formats.c b/src/mesa/main/formats.c
index e58b917..1f221f1 100644
--- a/src/mesa/main/formats.c
+++ b/src/mesa/main/formats.c
@@ -1432,15 +1432,19 @@ _mesa_uncompressed_format_to_type_and_comps(mesa_format 
format,
 GLboolean
 _mesa_format_matches_format_and_type(mesa_format mesa_format,
 GLenum format, GLenum type,
- GLboolean swapBytes)
+GLboolean swapBytes, GLenum *error)
 {
const GLboolean littleEndian = _mesa_little_endian();
+   if (error)
+  *error = GL_NO_ERROR;
 
/* Note: When reading a GL format/type combination, the format lists channel
 * assignments from most significant channel in the type to least
 * significant.  A type with _REV indicates that the assignments are
 * swapped, so they are listed from least significant to most significant.
 *
+* Compressed formats will fall through and return GL_FALSE.
+*
 * For sanity, please keep this switch statement ordered the same as the
 * enums in formats.h.
 */
@@ -1701,26 +1705,6 @@ _mesa_format_matches_format_and_type(mesa_format 
mesa_format,
case MESA_FORMAT_S_UINT8:
   return format == GL_STENCIL_INDEX && type == GL_UNSIGNED_BYTE;
 
-   case MESA_FORMAT_SRGB_DXT1:
-   case MESA_FORMAT_SRGBA_DXT1:
-   case MESA_FORMAT_SRGBA_DXT3:
-   case MESA_FORMAT_SRGBA_DXT5:
-  return GL_FALSE;
-
-   case MESA_FORMAT_RGB_FXT1:
-   case MESA_FORMAT_RGBA_FXT1:
-   case MESA_FORMAT_RGB_DXT1:
-   case MESA_FORMAT_RGBA_DXT1:
-   case MESA_FORMAT_RGBA_DXT3:
-   case MESA_FORMAT_RGBA_DXT5:
-  return GL_FALSE;
-
-   case MESA_FORMAT_BPTC_RGBA_UNORM:
-   case MESA_FORMAT_BPTC_SRGB_ALPHA_UNORM:
-   case MESA_FORMAT_BPTC_RGB_SIGNED_FLOAT:
-   case MESA_FORMAT_BPTC_RGB_UNSIGNED_FLOAT:
-  return GL_FALSE;
-
case MESA_FORMAT_RGBA_FLOAT32:
   return format == GL_RGBA && type == GL_FLOAT && !swapBytes;
case MESA_FORMAT_RGBA_FLOAT16:
@@ -1917,31 +1901,6 @@ _mesa_format_matches_format_and_type(mesa_format 
mesa_format,
   return format == GL_RGBA && type == GL_UNSIGNED_SHORT &&
  !swapBytes;
 
-   case MESA_FORMAT_R_RGTC1_UNORM:
-   case MESA_FORMAT_R_RGTC1_SNORM:
-   case MESA_FORMAT_RG_RGTC2_UNORM:
-   case MESA_FORMAT_RG_RGTC2_SNORM:
-  return GL_FALSE;
-
-   case MESA_FORMAT_L_LATC1_UNORM:
-   case MESA_FORMAT_L_LATC1_SNORM:
-   case MESA_FORMAT_LA_LATC2_UNORM:
-   case MESA_FORMAT_LA_LATC2_SNORM:
-  return GL_FALSE;
-
-   case MESA_FORMAT_ETC1_RGB8:
-   case MESA

Re: [Mesa-dev] glClearColor is broken in a weird way if compiled with mangling enabled

2015-08-19 Thread Yuzhu Lu
Update: 

All function with GLclampf and GLfloat are messed up. But pointer are fine. 
Other datatype works fine as well. I never had such a weird issue before. The 
work around to replace it with GLdouble. 


Yuzhu 



- Original Message -

From: "Yuzhu Lu"  
To: mesa-dev@lists.freedesktop.org, mesa-us...@lists.freedesktop.org 
Sent: Wednesday, August 19, 2015 5:15:46 PM 
Subject: Re: [Mesa-dev] glClearColor is broken in a weird way if compiled with 
mangling enabled 

It seems related to datatype GLclampf, which affects mglClearColor, 
mglBlendColor... If I replace it with double, everything works fine. Any ideas? 



Yuzhu 




- Original Message -

From: "Yuzhu Lu"  
To: mesa-dev@lists.freedesktop.org, mesa-us...@lists.freedesktop.org 
Sent: Friday, August 14, 2015 1:22:05 PM 
Subject: [Mesa-dev] glClearColor is broken in a weird way if compiled with 
mangling enabled 


Hi All, 

Since I need to load osmesa and system GL api at the same time on Linux, I need 
to compile 10.5.9 osmesa in a mangled way. After a simple fix in glapi.h: 

/* Is this needed? It is incomplete anyway. */ 
/* 
#ifdef USE_MGL_NAMESPACE 
#define _glapi_set_dispatch _mglapi_set_dispatch 
#define _glapi_get_dispatch _mglapi_get_dispatch 
#define _glapi_set_context _mglapi_set_context 
#define _glapi_get_context _mglapi_get_context 
#define _glapi_Dispatch _mglapi_Dispatch 
#define _glapi_Context _mglapi_Context 
#endif 
*/ 

Now it compiles fine and here is my configuration: 

./configure CFLAGS="-O2" CXXFLAGS="-O2" --disable-xvmc --disable-glx 
--disable-dri --with-dri-drivers="" --with-gallium-drivers="swrast" 
--enable-texture-float --enable-shared-glapi --disable-egl --enable-mangling 
--with-egl-platforms="" --enable-gallium-osmesa --enable-gallium-llvm=yes 
--disable-llvm-shared-libs --with-osmesa-bits=32 --with-max-width=65536 
--with-max-height=65536 

But glClearColor is broken in a weird way that the value passed in is revised 
internally. Here is my call: 
mglClearColor(0.5f, 0.3f, 0.3f, 0.3f); 

But if I print out the value in _mesa_ClearColor() method of Clear.c. It shows: 
ClearColor: 0.00, 2.00, 2.00, 2.00 

I totally have no idea why this is happening while everything works fine with 
mangling disabled. 

Also, the compiler complains that mglGetString returns int instead of const 
GLubyte*: 
osdemo32.c:441:1: warning: format ‘%s’ expects argument of type ‘char *’, but 
argument 2 has type ‘int’ [-Wformat=] 
printf("Version: %s\n", mglGetString(GL_VERSION)); 

And mglGetString(GL_SHADING_LANGUAGE_VERSION) will crash the application while 
other string works fine. 

I also try to compile it with disable-shared-glapi flag, but I get errors. I am 
not sure this is because gl_mangle.h is dated. (If I manually add the following 
functions in gl_mangle.h, it compiles fine but some functions like 
glCreateShader will be totally messed up.) 

I would really appreciate it if someone have solutions because this is a very 
important project for us. 



CXXLD libMangledOSMesa32.la 
../../../../src/mapi/glapi/.libs/libglapi.a(glapi_libglapi_la-glapi_getproc.o):(.data.rel.ro+0x5588):
 undefined reference to `glPointSizePointerOES' 
../../../../src/mapi/glapi/.libs/libglapi.a(glapi_libglapi_la-glapi_getproc.o):(.data.rel.ro+0x6ae8):
 undefined reference to `glPolygonOffsetClampEXT' 
../../../../src/mapi/glapi/.libs/libglapi.a(glapi_libglapi_la-glapi_getproc.o):(.data.rel.ro+0x6b78):
 undefined reference to `glAlphaFuncx' 
../../../../src/mapi/glapi/.libs/libglapi.a(glapi_libglapi_la-glapi_getproc.o):(.data.rel.ro+0x6b90):
 undefined reference to `glClearColorx' 
../../../../src/mapi/glapi/.libs/libglapi.a(glapi_libglapi_la-glapi_getproc.o):(.data.rel.ro+0x6ba8):
 undefined reference to `glClearDepthx' 
../../../../src/mapi/glapi/.libs/libglapi.a(glapi_libglapi_la-glapi_getproc.o):(.data.rel.ro+0x6bc0):
 undefined reference to `glColor4x' 
../../../../src/mapi/glapi/.libs/libglapi.a(glapi_libglapi_la-glapi_getproc.o):(.data.rel.ro+0x6bd8):
 undefined reference to `glDepthRangex' 
../../../../src/mapi/glapi/.libs/libglapi.a(glapi_libglapi_la-glapi_getproc.o):(.data.rel.ro+0x6bf0):
 undefined reference to `glFogx' 
../../../../src/mapi/glapi/.libs/libglapi.a(glapi_libglapi_la-glapi_getproc.o):(.data.rel.ro+0x6c08):
 undefined reference to `glFogxv' 
../../../../src/mapi/glapi/.libs/libglapi.a(glapi_libglapi_la-glapi_getproc.o):(.data.rel.ro+0x6c20):
 undefined reference to `glFrustumf' 
../../../../src/mapi/glapi/.libs/libglapi.a(glapi_libglapi_la-glapi_getproc.o):(.data.rel.ro+0x6c38):
 undefined reference to `glFrustumx' 
../../../../src/mapi/glapi/.libs/libglapi.a(glapi_libglapi_la-glapi_getproc.o):(.data.rel.ro+0x6c50):
 undefined reference to `glLightModelx' 
../../../../src/mapi/glapi/.libs/libglapi.a(glapi_libglapi_la-glapi_getproc.o):(.data.rel.ro+0x6c68):
 undefined reference to `glLightModelxv' 
../../../../src/mapi/glapi/.libs/libglapi.a(glapi_libglapi_la-glapi_getproc.o):(.data.rel.ro+0x6c8

[Mesa-dev] [PATCH V2 4/8] i965: Delete temporary variable 'src_pitch'

2015-08-19 Thread Anuj Phogat
Signed-off-by: Anuj Phogat 
---
 src/mesa/drivers/dri/i965/intel_blit.c | 6 +-
 1 file changed, 1 insertion(+), 5 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/intel_blit.c 
b/src/mesa/drivers/dri/i965/intel_blit.c
index f8606b8..c177eec 100644
--- a/src/mesa/drivers/dri/i965/intel_blit.c
+++ b/src/mesa/drivers/dri/i965/intel_blit.c
@@ -330,10 +330,6 @@ intel_miptree_blit(struct brw_context *brw,
if (dst_flip)
   dst_y = minify(dst_mt->physical_height0, dst_level - 
dst_mt->first_level) - dst_y - height;
 
-   int src_pitch = src_mt->pitch;
-   if (src_flip != dst_flip)
-  src_pitch = -src_pitch;
-
uint32_t src_image_x, src_image_y, dst_image_x, dst_image_y;
intel_miptree_get_image_offset(src_mt, src_level, src_slice,
   &src_image_x, &src_image_y);
@@ -356,7 +352,7 @@ intel_miptree_blit(struct brw_context *brw,
 
if (!intelEmitCopyBlit(brw,
   src_mt->cpp,
-  src_pitch,
+  src_flip == dst_flip ? src_mt->pitch : 
-src_mt->pitch,
   src_mt->bo, src_mt->offset,
   src_mt->tiling,
   src_mt->tr_mode,
-- 
2.4.3

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[Mesa-dev] [PATCH V2 1/8] i965: Add a helper function intel_get_tile_dims()

2015-08-19 Thread Anuj Phogat
V2:
- Do the tile width/height computations in the new helper
  function and use it later in intel_miptree_get_tile_masks().
- Change the name to intel_get_tile_dims().

Cc: Ben Widawsky 
Signed-off-by: Anuj Phogat 
---
 src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 81 +++
 src/mesa/drivers/dri/i965/intel_mipmap_tree.h |  4 ++
 2 files changed, 63 insertions(+), 22 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c 
b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
index e85c3f0..c282e94 100644
--- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
+++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
@@ -563,35 +563,15 @@ static unsigned long
 intel_get_yf_ys_bo_size(struct intel_mipmap_tree *mt, unsigned *alignment,
 unsigned long *pitch)
 {
-   const uint32_t bpp = mt->cpp * 8;
-   const uint32_t aspect_ratio = (bpp == 16 || bpp == 64) ? 2 : 1;
uint32_t tile_width, tile_height;
unsigned long stride, size, aligned_y;
 
assert(mt->tr_mode != INTEL_MIPTREE_TRMODE_NONE);
-
-   switch (bpp) {
-   case 8:
-  tile_height = 64;
-  break;
-   case 16:
-   case 32:
-  tile_height = 32;
-  break;
-   case 64:
-   case 128:
-  tile_height = 16;
-  break;
-   default:
-  unreachable("not reached");
-   }
-
-   if (mt->tr_mode == INTEL_MIPTREE_TRMODE_YS)
-  tile_height *= 4;
+   intel_get_tile_dims(mt->tiling, mt->tr_mode, mt->cpp,
+   &tile_width, &tile_height);
 
aligned_y = ALIGN(mt->total_height, tile_height);
stride = mt->total_width * mt->cpp;
-   tile_width = tile_height * mt->cpp * aspect_ratio;
stride = ALIGN(stride, tile_width);
size = stride * aligned_y;
 
@@ -1081,6 +1061,63 @@ intel_miptree_get_image_offset(const struct 
intel_mipmap_tree *mt,
*y = mt->level[level].slice[slice].y_offset;
 }
 
+
+/**
+ * This function computes the width and height in bytes of different tiling
+ * patterns. If the BO is untiled, the dimensions are set to cpp.
+ */
+void
+intel_get_tile_dims(uint32_t tiling, uint32_t tr_mode, uint32_t cpp,
+uint32_t *tile_w, uint32_t *tile_h)
+{
+   if (tr_mode == INTEL_MIPTREE_TRMODE_NONE) {
+  switch (tiling) {
+  case I915_TILING_X:
+ *tile_w = 512;
+ *tile_h = 8 * cpp;
+ break;
+  case I915_TILING_Y:
+ *tile_w = 128;
+ *tile_h = 32 * cpp;
+ break;
+  case I915_TILING_NONE:
+ *tile_w = cpp;
+ *tile_h = cpp;
+ break;
+  default:
+ unreachable("not reached");
+  }
+   } else {
+  uint32_t aspect_ratio = 1;
+  assert(_mesa_is_pow_two(cpp));
+
+  switch (cpp) {
+  case 1:
+ *tile_h = 64 * cpp;
+ break;
+  case 2:
+  case 4:
+ *tile_h = 32 * cpp;
+ break;
+  case 8:
+  case 16:
+ *tile_h = 16 * cpp;
+ break;
+  default:
+ unreachable("not reached");
+  }
+
+  if (cpp == 2 || cpp == 8)
+ aspect_ratio = 2;
+
+  if (tr_mode == INTEL_MIPTREE_TRMODE_YS)
+ *tile_h *= 4;
+
+  *tile_w = *tile_h * aspect_ratio;
+   }
+}
+
+
 /**
  * This function computes masks that may be used to select the bits of the X
  * and Y coordinates that indicate the offset within a tile.  If the BO is
diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.h 
b/src/mesa/drivers/dri/i965/intel_mipmap_tree.h
index 790d312..dc6a7a5 100644
--- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.h
+++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.h
@@ -626,6 +626,10 @@ intel_miptree_get_tile_masks(const struct 
intel_mipmap_tree *mt,
  uint32_t *mask_x, uint32_t *mask_y,
  bool map_stencil_as_y_tiled);
 
+void
+intel_get_tile_dims(uint32_t tiling, uint32_t tr_mode, uint32_t cpp,
+uint32_t *tile_w, uint32_t *tile_h);
+
 uint32_t
 intel_miptree_get_tile_offsets(const struct intel_mipmap_tree *mt,
GLuint level, GLuint slice,
-- 
2.4.3

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[Mesa-dev] [PATCH V2 6/8] i965: Fix {src, dst}_pitch alignment check for XY_SRC_COPY_BLT

2015-08-19 Thread Anuj Phogat
Current code checks the alignment restrictions only for Y tiling.
From Broadwell PRM vol 10:

 "pitch is of 512Byte granularity for Tile-X: This means the tiled-x
  surface pitch can be (512, 1024, 1536, 2048...)/4 (in Dwords)."

This patch adds the restriction for X tiling as well.

Signed-off-by: Anuj Phogat 
Reviewed-by: Ben Widawsky 
---
 src/mesa/drivers/dri/i965/intel_blit.c | 9 +++--
 1 file changed, 7 insertions(+), 2 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/intel_blit.c 
b/src/mesa/drivers/dri/i965/intel_blit.c
index d15a64d..df53e85 100644
--- a/src/mesa/drivers/dri/i965/intel_blit.c
+++ b/src/mesa/drivers/dri/i965/intel_blit.c
@@ -531,6 +531,8 @@ intelEmitCopyBlit(struct brw_context *brw,
bool dst_y_tiled = dst_tiling == I915_TILING_Y;
bool src_y_tiled = src_tiling == I915_TILING_Y;
bool use_fast_copy_blit = false;
+   uint32_t src_tile_w, src_tile_h;
+   uint32_t dst_tile_w, dst_tile_h;
 
if ((dst_y_tiled || src_y_tiled) && brw->gen < 6)
   return false;
@@ -559,6 +561,9 @@ intelEmitCopyBlit(struct brw_context *brw,
src_buffer, src_pitch, src_offset, src_x, src_y,
dst_buffer, dst_pitch, dst_offset, dst_x, dst_y, w, h);
 
+   intel_get_tile_dims(src_tiling, src_tr_mode, cpp, &src_tile_w, &src_tile_h);
+   intel_get_tile_dims(dst_tiling, dst_tr_mode, cpp, &dst_tile_w, &dst_tile_h);
+
use_fast_copy_blit = can_fast_copy_blit(brw,
src_buffer,
src_x, src_y,
@@ -597,8 +602,8 @@ intelEmitCopyBlit(struct brw_context *brw,
 cpp, use_fast_copy_blit);
 
} else {
-  assert(!dst_y_tiled || (dst_pitch % 128) == 0);
-  assert(!src_y_tiled || (src_pitch % 128) == 0);
+  assert(src_tiling == I915_TILING_NONE || (src_pitch % src_tile_w) == 0);
+  assert(dst_tiling == I915_TILING_NONE || (dst_pitch % dst_tile_w) == 0);
 
   /* For big formats (such as floating point), do the copy using 16 or
* 32bpp and multiply the coordinates.
-- 
2.4.3

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[Mesa-dev] [PATCH V2 8/8] i965: Rename intel_miptree_get_dimensions_for_image()

2015-08-19 Thread Anuj Phogat
This function isn't specific to miptrees. So, drop the "miptree"
from function name.

Signed-off-by: Anuj Phogat 
---
 src/mesa/drivers/dri/i965/intel_fbo.c  | 2 +-
 src/mesa/drivers/dri/i965/intel_mipmap_tree.c  | 6 +++---
 src/mesa/drivers/dri/i965/intel_mipmap_tree.h  | 4 ++--
 src/mesa/drivers/dri/i965/intel_tex_image.c| 3 +--
 src/mesa/drivers/dri/i965/intel_tex_validate.c | 3 +--
 5 files changed, 8 insertions(+), 10 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/intel_fbo.c 
b/src/mesa/drivers/dri/i965/intel_fbo.c
index 64d57e8..77c357e 100644
--- a/src/mesa/drivers/dri/i965/intel_fbo.c
+++ b/src/mesa/drivers/dri/i965/intel_fbo.c
@@ -1025,7 +1025,7 @@ intel_renderbuffer_move_to_temp(struct brw_context *brw,
uint32_t layout_flags = MIPTREE_LAYOUT_ACCELERATED_UPLOAD |
MIPTREE_LAYOUT_TILING_ANY;
 
-   intel_miptree_get_dimensions_for_image(rb->TexImage, &width, &height, 
&depth);
+   intel_get_image_dims(rb->TexImage, &width, &height, &depth);
 
new_mt = intel_miptree_create(brw, rb->TexImage->TexObject->Target,
  intel_image->base.Base.TexFormat,
diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c 
b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
index 13a33c6..dd51c91 100644
--- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
+++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
@@ -928,8 +928,8 @@ intel_miptree_release(struct intel_mipmap_tree **mt)
 }
 
 void
-intel_miptree_get_dimensions_for_image(struct gl_texture_image *image,
-   int *width, int *height, int *depth)
+intel_get_image_dims(struct gl_texture_image *image,
+ int *width, int *height, int *depth)
 {
switch (image->TexObject->Target) {
case GL_TEXTURE_1D_ARRAY:
@@ -976,7 +976,7 @@ intel_miptree_match_image(struct intel_mipmap_tree *mt,
if (image->TexFormat != mt_format)
   return false;
 
-   intel_miptree_get_dimensions_for_image(image, &width, &height, &depth);
+   intel_get_image_dims(image, &width, &height, &depth);
 
if (mt->target == GL_TEXTURE_CUBE_MAP)
   depth = 6;
diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.h 
b/src/mesa/drivers/dri/i965/intel_mipmap_tree.h
index d5e22df..06f4a15 100644
--- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.h
+++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.h
@@ -618,8 +618,8 @@ intel_miptree_get_image_offset(const struct 
intel_mipmap_tree *mt,
   GLuint *x, GLuint *y);
 
 void
-intel_miptree_get_dimensions_for_image(struct gl_texture_image *image,
-   int *width, int *height, int *depth);
+intel_get_image_dims(struct gl_texture_image *image,
+ int *width, int *height, int *depth);
 
 void
 intel_get_tile_masks(uint32_t tiling, uint32_t tr_mode, uint32_t cpp,
diff --git a/src/mesa/drivers/dri/i965/intel_tex_image.c 
b/src/mesa/drivers/dri/i965/intel_tex_image.c
index 93a8cde..34b91e8 100644
--- a/src/mesa/drivers/dri/i965/intel_tex_image.c
+++ b/src/mesa/drivers/dri/i965/intel_tex_image.c
@@ -42,8 +42,7 @@ intel_miptree_create_for_teximage(struct brw_context *brw,
int width, height, depth;
GLuint i;
 
-   intel_miptree_get_dimensions_for_image(&intelImage->base.Base,
-  &width, &height, &depth);
+   intel_get_image_dims(&intelImage->base.Base, &width, &height, &depth);
 
DBG("%s\n", __func__);
 
diff --git a/src/mesa/drivers/dri/i965/intel_tex_validate.c 
b/src/mesa/drivers/dri/i965/intel_tex_validate.c
index d3fb252..2cf9c13 100644
--- a/src/mesa/drivers/dri/i965/intel_tex_validate.c
+++ b/src/mesa/drivers/dri/i965/intel_tex_validate.c
@@ -128,8 +128,7 @@ intel_finalize_mipmap_tree(struct brw_context *brw, GLuint 
unit)
/* May need to create a new tree:
 */
if (!intelObj->mt) {
-  intel_miptree_get_dimensions_for_image(&firstImage->base.Base,
-&width, &height, &depth);
+  intel_get_image_dims(&firstImage->base.Base, &width, &height, &depth);
 
   perf_debug("Creating new %s %dx%dx%d %d-level miptree to handle "
  "finalized texture miptree.\n",
-- 
2.4.3

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[Mesa-dev] [PATCH V2 7/8] i965/gen9: Fix {src, dst}_pitch alignment check for XY_FAST_COPY_BLT

2015-08-19 Thread Anuj Phogat
I misinterpreted the alignmnet restriction in XY_FAST_COPY_BLT earlier.
Instead of checking pitch for 64KB alignmnet we need to check it for
tile widh alignment.

Signed-off-by: Anuj Phogat 
Cc: Ben Widawsky 
---
 src/mesa/drivers/dri/i965/intel_blit.c | 18 +++---
 1 file changed, 7 insertions(+), 11 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/intel_blit.c 
b/src/mesa/drivers/dri/i965/intel_blit.c
index df53e85..c9c1a47 100644
--- a/src/mesa/drivers/dri/i965/intel_blit.c
+++ b/src/mesa/drivers/dri/i965/intel_blit.c
@@ -448,14 +448,6 @@ can_fast_copy_blit(struct brw_context *brw,
(dst_tiling_none && dst_pitch % 16 != 0))
   return false;
 
-   /* For Tiled surfaces, the pitch has to be a multiple of the Tile width
-* (X direction width of the Tile). This means the pitch value will
-* always be Cache Line aligned (64byte multiple).
-*/
-   if ((!dst_tiling_none && dst_pitch % 64 != 0) ||
-   (!src_tiling_none && src_pitch % 64 != 0))
-  return false;
-
return true;
 }
 
@@ -564,6 +556,13 @@ intelEmitCopyBlit(struct brw_context *brw,
intel_get_tile_dims(src_tiling, src_tr_mode, cpp, &src_tile_w, &src_tile_h);
intel_get_tile_dims(dst_tiling, dst_tr_mode, cpp, &dst_tile_w, &dst_tile_h);
 
+   /* For Tiled surfaces, the pitch has to be a multiple of the Tile width
+* (X direction width of the Tile). This is ensured while allocating the
+* buffer object.
+*/
+   assert(src_tiling == I915_TILING_NONE || (src_pitch % src_tile_w) == 0);
+   assert(dst_tiling == I915_TILING_NONE || (dst_pitch % dst_tile_w) == 0);
+
use_fast_copy_blit = can_fast_copy_blit(brw,
src_buffer,
src_x, src_y,
@@ -602,9 +601,6 @@ intelEmitCopyBlit(struct brw_context *brw,
 cpp, use_fast_copy_blit);
 
} else {
-  assert(src_tiling == I915_TILING_NONE || (src_pitch % src_tile_w) == 0);
-  assert(dst_tiling == I915_TILING_NONE || (dst_pitch % dst_tile_w) == 0);
-
   /* For big formats (such as floating point), do the copy using 16 or
* 32bpp and multiply the coordinates.
*/
-- 
2.4.3

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[Mesa-dev] [PATCH V2 3/8] i965: Use helper function intel_get_tile_dims() in surface setup

2015-08-19 Thread Anuj Phogat
It takes care of using the correct tile width if we later use other
tiling patterns for aux miptree.

V2: Remove the comment about using Yf for aux miptree.

Cc: Ben Widawsky 
Signed-off-by: Anuj Phogat 
---
 src/mesa/drivers/dri/i965/gen8_surface_state.c | 14 --
 1 file changed, 12 insertions(+), 2 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/gen8_surface_state.c 
b/src/mesa/drivers/dri/i965/gen8_surface_state.c
index 6c4d3e1..aadea1a 100644
--- a/src/mesa/drivers/dri/i965/gen8_surface_state.c
+++ b/src/mesa/drivers/dri/i965/gen8_surface_state.c
@@ -262,8 +262,13 @@ gen8_emit_texture_surface_state(struct brw_context *brw,
}
 
if (aux_mt) {
+  uint32_t tile_w, tile_h;
+  assert(aux_mt->tiling == I915_TILING_Y);
+  intel_get_tile_dims(aux_mt->tiling, aux_mt->tr_mode,
+  aux_mt->cpp, &tile_w, &tile_h);
   surf[6] = SET_FIELD(mt->qpitch / 4, GEN8_SURFACE_AUX_QPITCH) |
-SET_FIELD((aux_mt->pitch / 128) - 1, GEN8_SURFACE_AUX_PITCH) |
+SET_FIELD((aux_mt->pitch / tile_w) - 1,
+  GEN8_SURFACE_AUX_PITCH) |
 aux_mode;
} else {
   surf[6] = 0;
@@ -487,8 +492,13 @@ gen8_update_renderbuffer_surface(struct brw_context *brw,
}
 
if (aux_mt) {
+  uint32_t tile_w, tile_h;
+  assert(aux_mt->tiling == I915_TILING_Y);
+  intel_get_tile_dims(aux_mt->tiling, aux_mt->tr_mode,
+  aux_mt->cpp, &tile_w, &tile_h);
   surf[6] = SET_FIELD(mt->qpitch / 4, GEN8_SURFACE_AUX_QPITCH) |
-SET_FIELD((aux_mt->pitch / 128) - 1, GEN8_SURFACE_AUX_PITCH) |
+SET_FIELD((aux_mt->pitch / tile_w) - 1,
+  GEN8_SURFACE_AUX_PITCH) |
 aux_mode;
} else {
   surf[6] = 0;
-- 
2.4.3

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[Mesa-dev] [PATCH V2 5/8] i965: Move conversion of {src, dst}_pitch to dwords outside if/else

2015-08-19 Thread Anuj Phogat
Signed-off-by: Anuj Phogat 
---
 src/mesa/drivers/dri/i965/intel_blit.c | 25 +
 1 file changed, 9 insertions(+), 16 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/intel_blit.c 
b/src/mesa/drivers/dri/i965/intel_blit.c
index c177eec..d15a64d 100644
--- a/src/mesa/drivers/dri/i965/intel_blit.c
+++ b/src/mesa/drivers/dri/i965/intel_blit.c
@@ -596,15 +596,6 @@ intelEmitCopyBlit(struct brw_context *brw,
 dst_tiling, dst_tr_mode,
 cpp, use_fast_copy_blit);
 
-  /* For tiled source and destination, pitch value should be specified
-   * as a number of Dwords.
-   */
-  if (dst_tiling != I915_TILING_NONE)
- dst_pitch /= 4;
-
-  if (src_tiling != I915_TILING_NONE)
- src_pitch /= 4;
-
} else {
   assert(!dst_y_tiled || (dst_pitch % 128) == 0);
   assert(!src_y_tiled || (src_pitch % 128) == 0);
@@ -645,17 +636,19 @@ intelEmitCopyBlit(struct brw_context *brw,
   CMD = xy_blit_cmd(src_tiling, src_tr_mode,
 dst_tiling, dst_tr_mode,
 cpp, use_fast_copy_blit);
+   }
 
-  if (dst_tiling != I915_TILING_NONE)
- dst_pitch /= 4;
+   /* For tiled source and destination, pitch value should be specified
+* as a number of Dwords.
+*/
+   if (dst_tiling != I915_TILING_NONE)
+  dst_pitch /= 4;
 
-  if (src_tiling != I915_TILING_NONE)
- src_pitch /= 4;
-   }
+   if (src_tiling != I915_TILING_NONE)
+  src_pitch /= 4;
 
-   if (dst_y2 <= dst_y || dst_x2 <= dst_x) {
+   if (dst_y2 <= dst_y || dst_x2 <= dst_x)
   return true;
-   }
 
assert(dst_x < dst_x2);
assert(dst_y < dst_y2);
-- 
2.4.3

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[Mesa-dev] [PATCH V2 2/8] i965: Use intel_get_tile_dims() to get tile masks

2015-08-19 Thread Anuj Phogat
This will require change in the parameters passed to
intel_miptree_get_tile_masks().

V2: Rearrange the order of parameters. (Ben)
Change the name to intel_get_tile_masks(). (Topi)

Cc: Ben Widawsky 
Cc: Topi Pohjolainen 
Signed-off-by: Anuj Phogat 
---
 src/mesa/drivers/dri/i965/brw_blorp.cpp   |  4 +++-
 src/mesa/drivers/dri/i965/brw_misc_state.c| 20 +++---
 src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 30 +++
 src/mesa/drivers/dri/i965/intel_mipmap_tree.h |  6 +++---
 4 files changed, 27 insertions(+), 33 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_blorp.cpp 
b/src/mesa/drivers/dri/i965/brw_blorp.cpp
index eac1f00..df2969d 100644
--- a/src/mesa/drivers/dri/i965/brw_blorp.cpp
+++ b/src/mesa/drivers/dri/i965/brw_blorp.cpp
@@ -144,7 +144,9 @@ brw_blorp_surface_info::compute_tile_offsets(uint32_t 
*tile_x,
 {
uint32_t mask_x, mask_y;
 
-   intel_miptree_get_tile_masks(mt, &mask_x, &mask_y, map_stencil_as_y_tiled);
+   intel_get_tile_masks(mt->tiling, mt->tr_mode, mt->cpp,
+map_stencil_as_y_tiled,
+&mask_x, &mask_y);
 
*tile_x = x_offset & mask_x;
*tile_y = y_offset & mask_y;
diff --git a/src/mesa/drivers/dri/i965/brw_misc_state.c 
b/src/mesa/drivers/dri/i965/brw_misc_state.c
index e9d9467..2a3195a 100644
--- a/src/mesa/drivers/dri/i965/brw_misc_state.c
+++ b/src/mesa/drivers/dri/i965/brw_misc_state.c
@@ -174,13 +174,17 @@ brw_get_depthstencil_tile_masks(struct intel_mipmap_tree 
*depth_mt,
uint32_t tile_mask_x = 0, tile_mask_y = 0;
 
if (depth_mt) {
-  intel_miptree_get_tile_masks(depth_mt, &tile_mask_x, &tile_mask_y, 
false);
+  intel_get_tile_masks(depth_mt->tiling, depth_mt->tr_mode,
+   depth_mt->cpp, false,
+   &tile_mask_x, &tile_mask_y);
 
   if (intel_miptree_level_has_hiz(depth_mt, depth_level)) {
  uint32_t hiz_tile_mask_x, hiz_tile_mask_y;
- intel_miptree_get_tile_masks(depth_mt->hiz_buf->mt,
-  &hiz_tile_mask_x, &hiz_tile_mask_y,
-  false);
+ intel_get_tile_masks(depth_mt->hiz_buf->mt->tiling,
+  depth_mt->hiz_buf->mt->tr_mode,
+  depth_mt->hiz_buf->mt->cpp,
+  false, &hiz_tile_mask_x,
+  &hiz_tile_mask_y);
 
  /* Each HiZ row represents 2 rows of pixels */
  hiz_tile_mask_y = hiz_tile_mask_y << 1 | 1;
@@ -200,9 +204,11 @@ brw_get_depthstencil_tile_masks(struct intel_mipmap_tree 
*depth_mt,
  tile_mask_y |= 63;
   } else {
  uint32_t stencil_tile_mask_x, stencil_tile_mask_y;
- intel_miptree_get_tile_masks(stencil_mt,
-  &stencil_tile_mask_x,
-  &stencil_tile_mask_y, false);
+ intel_get_tile_masks(stencil_mt->tiling,
+  stencil_mt->tr_mode,
+  stencil_mt->cpp,
+  false, &stencil_tile_mask_x,
+  &stencil_tile_mask_y);
 
  tile_mask_x |= stencil_tile_mask_x;
  tile_mask_y |= stencil_tile_mask_y;
diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c 
b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
index c282e94..13a33c6 100644
--- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
+++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
@@ -1124,31 +1124,17 @@ intel_get_tile_dims(uint32_t tiling, uint32_t tr_mode, 
uint32_t cpp,
  * untiled, the masks are set to 0.
  */
 void
-intel_miptree_get_tile_masks(const struct intel_mipmap_tree *mt,
- uint32_t *mask_x, uint32_t *mask_y,
- bool map_stencil_as_y_tiled)
+intel_get_tile_masks(uint32_t tiling, uint32_t tr_mode, uint32_t cpp,
+ bool map_stencil_as_y_tiled,
+ uint32_t *mask_x, uint32_t *mask_y)
 {
-   int cpp = mt->cpp;
-   uint32_t tiling = mt->tiling;
-
if (map_stencil_as_y_tiled)
   tiling = I915_TILING_Y;
 
-   switch (tiling) {
-   default:
-  unreachable("not reached");
-   case I915_TILING_NONE:
-  *mask_x = *mask_y = 0;
-  break;
-   case I915_TILING_X:
-  *mask_x = 512 / cpp - 1;
-  *mask_y = 7;
-  break;
-   case I915_TILING_Y:
-  *mask_x = 128 / cpp - 1;
-  *mask_y = 31;
-  break;
-   }
+   intel_get_tile_dims(tiling, tr_mode, cpp, mask_x, mask_y);
+
+   *mask_x = *mask_x / cpp - 1;
+   *mask_y = *mask_y / cpp - 1;
 }
 
 /**
@@ -1213,7 +1199,7 @@ intel_miptree_get_tile_offsets(const struct 
intel_mipmap_tree *mt,
uint32_t x, y;
uint32_t mask_x, mask_y;
 
-   intel_miptree_get_tile_masks(mt, &mask_x, &mask_y, false);
+   intel_get_tile_masks(mt->tiling, mt->cpp, mt->tr_mode, false, &mask_x, 
&mask_y);
intel_miptree_get_image_offset(mt, level, slice, &x, 

Re: [Mesa-dev] [PATCH v2] i965: Refactor image uniform setup

2015-08-19 Thread Jason Ekstrand
On Wed, Aug 19, 2015 at 6:48 AM, Jason Ekstrand  wrote:
>
> On Aug 19, 2015 6:45 AM, "Francisco Jerez"  wrote:
>>
>> Jason Ekstrand  writes:
>>
>> > On Aug 19, 2015 2:56 AM, "Francisco Jerez" 
>> > wrote:
>> >>
>> >> Jason Ekstrand  writes:
>> >>
>> >> > Previously, setting up image uniforms relied on being called after
>> >> > fs_visitor::uniforms was set and with fs_visitor::uniforms not
>> > allocating
>> >> > space for it.  This made sense in an ir_visitor world because the
>> > visitor
>> >> > assigns locations and uploads data as it walks through the variables.
>> > In
>> >> > NIR it also happened to work because nir_lower_io assumed zero space
>> >> > for
>> >> > images.  In the near future, we will be able to reserve space using
>> >> > nir_lower_io and these invariants will be broken.
>> >> >
>> >> > This commit makes setup_image_uniforms take a pointer to the location
>> >> > in
>> >> > the prog_data params array that indicates where the image uniforms
>> > should
>> >> > be stored.  This way it can be called from anywhere in the shader
>> >> > setup.
>> >> >
>> >> > v2: Fix nir_setup_uniform to correctly correspond with this change
>> >> > (rebase fail)
>> >> >
>> >> > Cc: Francisco Jerez 
>> >> > Cc: Kenneth Graunke 
>> >> > ---
>> >> >  src/mesa/drivers/dri/i965/brw_fs.cpp | 12 
>> >> >  src/mesa/drivers/dri/i965/brw_fs.h   |  3 ---
>> >> >  src/mesa/drivers/dri/i965/brw_fs_nir.cpp |  6 --
>> >> >  src/mesa/drivers/dri/i965/brw_shader.cpp | 28
>> > +---
>> >> >  src/mesa/drivers/dri/i965/brw_shader.h   |  5 ++---
>> >> >  5 files changed, 27 insertions(+), 27 deletions(-)
>> >> >
>> >> > diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp
>> > b/src/mesa/drivers/dri/i965/brw_fs.cpp
>> >> > index 82cb499..d1550e6 100644
>> >> > --- a/src/mesa/drivers/dri/i965/brw_fs.cpp
>> >> > +++ b/src/mesa/drivers/dri/i965/brw_fs.cpp
>> >> > @@ -942,18 +942,6 @@ fs_visitor::import_uniforms(fs_visitor *v)
>> >> > this->param_size = v->param_size;
>> >> >  }
>> >> >
>> >> > -void
>> >> > -fs_visitor::setup_vector_uniform_values(const gl_constant_value
>> > *values, unsigned n)
>> >> > -{
>> >> > -   static const gl_constant_value zero = { 0 };
>> >> > -
>> >> > -   for (unsigned i = 0; i < n; ++i)
>> >> > -  stage_prog_data->param[uniforms++] = &values[i];
>> >> > -
>> >> > -   for (unsigned i = n; i < 4; ++i)
>> >> > -  stage_prog_data->param[uniforms++] = &zero;
>> >> > -}
>> >> > -
>> >> >  fs_reg *
>> >> >  fs_visitor::emit_fragcoord_interpolation(bool pixel_center_integer,
>> >> >   bool origin_upper_left)
>> >> > diff --git a/src/mesa/drivers/dri/i965/brw_fs.h
>> > b/src/mesa/drivers/dri/i965/brw_fs.h
>> >> > index 975183e..28fcfa3 100644
>> >> > --- a/src/mesa/drivers/dri/i965/brw_fs.h
>> >> > +++ b/src/mesa/drivers/dri/i965/brw_fs.h
>> >> > @@ -291,9 +291,6 @@ public:
>> >> >
>> >> > struct brw_reg interp_reg(int location, int channel);
>> >> >
>> >> > -   virtual void setup_vector_uniform_values(const gl_constant_value
>> > *values,
>> >> > -unsigned n);
>> >> > -
>> >> > int implied_mrf_writes(fs_inst *inst);
>> >> >
>> >> > virtual void dump_instructions();
>> >> > diff --git a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
>> > b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
>> >> > index ce4153d..c8ea649 100644
>> >> > --- a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
>> >> > +++ b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
>> >> > @@ -244,10 +244,12 @@ fs_visitor::nir_setup_uniform(nir_variable
>> >> > *var)
>> >> >* space for them here at the end of the parameter array.
>> >> >*/
>> >> >   var->data.driver_location = uniforms;
>> >> > - param_size[uniforms] =
>> >> > + unsigned size =
>> >> >  BRW_IMAGE_PARAM_SIZE * MAX2(storage->array_elements, 1);
>> >> >
>> >> > - setup_image_uniform_values(storage);
>> >> > + setup_image_uniform_values(stage_prog_data->param +
>> >> > uniforms,
>> > storage);
>> >> > + param_size[uniforms] = size;
>> >> > + uniforms += size;
>> >> >} else {
>> >> >   unsigned slots = storage->type->component_slots();
>> >> >   if (storage->array_elements)
>> >> > diff --git a/src/mesa/drivers/dri/i965/brw_shader.cpp
>> > b/src/mesa/drivers/dri/i965/brw_shader.cpp
>> >> > index 6b92806..b31ae9b 100644
>> >> > --- a/src/mesa/drivers/dri/i965/brw_shader.cpp
>> >> > +++ b/src/mesa/drivers/dri/i965/brw_shader.cpp
>> >> > @@ -1419,8 +1419,22 @@
>> > backend_shader::assign_common_binding_table_offsets(uint32_t
>> > next_binding_table_
>> >> > /* prog_data->base.binding_table.size will be set by
>> > brw_mark_surface_used. */
>> >> >  }
>> >> >
>> >> > +static void
>> >> > +setup_vector_uniform_values(const gl_constant_value ***dst,
>> >> > +const gl_constant_value *values,
>> >> > unsigned
>> > n)

[Mesa-dev] [PATCH 2/6] i965: Remove horizontal bars from file header comments

2015-08-19 Thread Ian Romanick
From: Ian Romanick 

Why was that ever a thing?

Signed-off-by: Ian Romanick 
---
 src/mesa/drivers/dri/i965/brw_clear.c| 6 ++
 src/mesa/drivers/dri/i965/brw_draw.c | 6 ++
 src/mesa/drivers/dri/i965/brw_draw.h | 6 ++
 src/mesa/drivers/dri/i965/brw_draw_upload.c  | 6 ++
 src/mesa/drivers/dri/i965/intel_batchbuffer.c| 6 ++
 src/mesa/drivers/dri/i965/intel_blit.c   | 7 ++-
 src/mesa/drivers/dri/i965/intel_blit.h   | 6 ++
 src/mesa/drivers/dri/i965/intel_buffer_objects.c | 6 ++
 src/mesa/drivers/dri/i965/intel_buffer_objects.h | 6 ++
 src/mesa/drivers/dri/i965/intel_buffers.c| 6 ++
 src/mesa/drivers/dri/i965/intel_buffers.h| 7 ++-
 src/mesa/drivers/dri/i965/intel_extensions.c | 6 ++
 src/mesa/drivers/dri/i965/intel_fbo.c| 7 ++-
 src/mesa/drivers/dri/i965/intel_fbo.h| 6 ++
 src/mesa/drivers/dri/i965/intel_image.h  | 6 ++
 src/mesa/drivers/dri/i965/intel_mipmap_tree.c| 6 ++
 src/mesa/drivers/dri/i965/intel_mipmap_tree.h| 6 ++
 src/mesa/drivers/dri/i965/intel_pixel.c  | 6 ++
 src/mesa/drivers/dri/i965/intel_pixel.h  | 6 ++
 src/mesa/drivers/dri/i965/intel_pixel_bitmap.c   | 6 ++
 src/mesa/drivers/dri/i965/intel_pixel_copy.c | 6 ++
 src/mesa/drivers/dri/i965/intel_pixel_draw.c | 6 ++
 src/mesa/drivers/dri/i965/intel_pixel_read.c | 6 ++
 src/mesa/drivers/dri/i965/intel_reg.h| 6 ++
 src/mesa/drivers/dri/i965/intel_screen.c | 6 ++
 src/mesa/drivers/dri/i965/intel_screen.h | 6 ++
 src/mesa/drivers/dri/i965/intel_state.c  | 7 ++-
 src/mesa/drivers/dri/i965/intel_tex.h| 6 ++
 src/mesa/drivers/dri/i965/intel_tex_copy.c   | 6 ++
 src/mesa/drivers/dri/i965/intel_tex_obj.h| 6 ++
 src/mesa/drivers/dri/i965/intel_tex_subimage.c   | 7 ++-
 31 files changed, 62 insertions(+), 129 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_clear.c 
b/src/mesa/drivers/dri/i965/brw_clear.c
index f981388..51f76f4 100644
--- a/src/mesa/drivers/dri/i965/brw_clear.c
+++ b/src/mesa/drivers/dri/i965/brw_clear.c
@@ -1,5 +1,4 @@
-/**
- *
+/*
  * Copyright 2003 VMware, Inc.
  * Copyright 2009, 2012 Intel Corporation.
  * All Rights Reserved.
@@ -23,8 +22,7 @@
  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- *
- **/
+ */
 
 #include "main/glheader.h"
 #include "main/mtypes.h"
diff --git a/src/mesa/drivers/dri/i965/brw_draw.c 
b/src/mesa/drivers/dri/i965/brw_draw.c
index e092ef4..9850af1 100644
--- a/src/mesa/drivers/dri/i965/brw_draw.c
+++ b/src/mesa/drivers/dri/i965/brw_draw.c
@@ -1,5 +1,4 @@
-/**
- *
+/*
  * Copyright 2003 VMware, Inc.
  * All Rights Reserved.
  *
@@ -22,8 +21,7 @@
  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- *
- **/
+ */
 
 #include 
 
diff --git a/src/mesa/drivers/dri/i965/brw_draw.h 
b/src/mesa/drivers/dri/i965/brw_draw.h
index f994726..3634b82 100644
--- a/src/mesa/drivers/dri/i965/brw_draw.h
+++ b/src/mesa/drivers/dri/i965/brw_draw.h
@@ -1,5 +1,4 @@
- /**
- *
+/*
  * Copyright 2005 VMware, Inc.
  * All Rights Reserved.
  *
@@ -22,8 +21,7 @@
  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- *
- **/
+ */
 
 #ifndef BRW_DRAW_H
 #define BRW_DRAW_H
diff --git a/src/mesa/drivers/dri/i965/brw_draw_upload.c 
b/src/mesa/drivers/dri/i965/brw_draw_upload.c
index cbfd585..769b9f1 100644
--- a/src/mesa/drivers/dri/i965/brw_draw_upload.c
+++ b/src/mesa/drivers/dri/i965/brw_draw_upload.c
@@ -1,5 +1,4 @@
-/**
- *
+/*
  * Copyright 2003 VMware, Inc.
  * All Rights Reserved.
  *
@@ -22,8 +21,7 @@
  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- *
- **/
+ */
 
 #include "main/glheader.h"
 #include "main/bufferobj.h"
diff 

[Mesa-dev] [PATCH 3/6] i965: Fix typos in license

2015-08-19 Thread Ian Romanick
From: Ian Romanick 

grep -lr 'sub license' | while read f; do \
sed --in-place -e 's/sub license/sublicense/' $f ;\
done

grep -lr 'NON-INFRINGEMENT' | while read f; do \
sed --in-place -e 's/NON-INFRINGEMENT/NONINFRINGEMENT/' $f ;\
done

Signed-off-by: Ian Romanick 
---
 src/mesa/drivers/dri/i965/brw_clear.c| 4 ++--
 src/mesa/drivers/dri/i965/brw_draw.c | 4 ++--
 src/mesa/drivers/dri/i965/brw_draw.h | 4 ++--
 src/mesa/drivers/dri/i965/brw_draw_upload.c  | 4 ++--
 src/mesa/drivers/dri/i965/intel_batchbuffer.c| 4 ++--
 src/mesa/drivers/dri/i965/intel_blit.c   | 4 ++--
 src/mesa/drivers/dri/i965/intel_blit.h   | 4 ++--
 src/mesa/drivers/dri/i965/intel_buffer_objects.c | 4 ++--
 src/mesa/drivers/dri/i965/intel_buffer_objects.h | 4 ++--
 src/mesa/drivers/dri/i965/intel_buffers.c| 4 ++--
 src/mesa/drivers/dri/i965/intel_buffers.h| 4 ++--
 src/mesa/drivers/dri/i965/intel_extensions.c | 4 ++--
 src/mesa/drivers/dri/i965/intel_fbo.c| 4 ++--
 src/mesa/drivers/dri/i965/intel_fbo.h| 4 ++--
 src/mesa/drivers/dri/i965/intel_image.h  | 4 ++--
 src/mesa/drivers/dri/i965/intel_mipmap_tree.c| 4 ++--
 src/mesa/drivers/dri/i965/intel_mipmap_tree.h| 4 ++--
 src/mesa/drivers/dri/i965/intel_pixel.c  | 4 ++--
 src/mesa/drivers/dri/i965/intel_pixel.h  | 4 ++--
 src/mesa/drivers/dri/i965/intel_pixel_bitmap.c   | 4 ++--
 src/mesa/drivers/dri/i965/intel_pixel_copy.c | 4 ++--
 src/mesa/drivers/dri/i965/intel_pixel_draw.c | 4 ++--
 src/mesa/drivers/dri/i965/intel_pixel_read.c | 4 ++--
 src/mesa/drivers/dri/i965/intel_reg.h| 4 ++--
 src/mesa/drivers/dri/i965/intel_screen.c | 4 ++--
 src/mesa/drivers/dri/i965/intel_screen.h | 4 ++--
 src/mesa/drivers/dri/i965/intel_state.c  | 4 ++--
 src/mesa/drivers/dri/i965/intel_tex.h| 4 ++--
 src/mesa/drivers/dri/i965/intel_tex_copy.c   | 4 ++--
 src/mesa/drivers/dri/i965/intel_tex_obj.h| 4 ++--
 src/mesa/drivers/dri/i965/intel_tex_subimage.c   | 4 ++--
 src/mesa/drivers/dri/i965/intel_tiled_memcpy.c   | 4 ++--
 src/mesa/drivers/dri/i965/intel_tiled_memcpy.h   | 4 ++--
 33 files changed, 66 insertions(+), 66 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_clear.c 
b/src/mesa/drivers/dri/i965/brw_clear.c
index 51f76f4..17a745d 100644
--- a/src/mesa/drivers/dri/i965/brw_clear.c
+++ b/src/mesa/drivers/dri/i965/brw_clear.c
@@ -7,7 +7,7 @@
  * copy of this software and associated documentation files (the
  * "Software"), to deal in the Software without restriction, including
  * without limitation the rights to use, copy, modify, merge, publish,
- * distribute, sub license, and/or sell copies of the Software, and to
+ * distribute, sublicense, and/or sell copies of the Software, and to
  * permit persons to whom the Software is furnished to do so, subject to
  * the following conditions:
  *
@@ -17,7 +17,7 @@
  *
  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR
  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
diff --git a/src/mesa/drivers/dri/i965/brw_draw.c 
b/src/mesa/drivers/dri/i965/brw_draw.c
index 9850af1..08e729d 100644
--- a/src/mesa/drivers/dri/i965/brw_draw.c
+++ b/src/mesa/drivers/dri/i965/brw_draw.c
@@ -6,7 +6,7 @@
  * copy of this software and associated documentation files (the
  * "Software"), to deal in the Software without restriction, including
  * without limitation the rights to use, copy, modify, merge, publish,
- * distribute, sub license, and/or sell copies of the Software, and to
+ * distribute, sublicense, and/or sell copies of the Software, and to
  * permit persons to whom the Software is furnished to do so, subject to
  * the following conditions:
  *
@@ -16,7 +16,7 @@
  *
  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR
  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
diff --git a/src/mesa/drivers/dri/i965/brw_draw.h 
b/src/mesa/drivers/dri/i965/brw_draw.h
index 3634b82..695973b 100644
--- a/src/mesa/drivers/dri/i965/brw_draw.h
+++ b/src/mesa/drivers/dri/i965/brw_draw.h
@@ -6,7 +6,7 @@
  * copy of this software and associated documentation files (the
  * "

[Mesa-dev] [PATCH 0/6] Copyright / license pet peeves

2015-08-19 Thread Ian Romanick
My justification for these patches is that I was annoyed. :)

After this series, the following script tells me that the differences in
the license / copyright headers of all the files in
src/mesa/drivers/dri/i965 is pretty minimal.  I have summarized the
differences below.

#! /bin/bash
j=brw_binding_tables.c
for i in *.c *.h *.cpp; do
echo diff -ud $j $i
diff -ud \
 <(head -$(grep -n '^ [*]/' $j | head -1 | cut -d: -f1) $j) \
 <(head -$(grep -n '^ [*]/' $i | head -1 | cut -d: -f1) $i | \
 sed 's/ 20.. Intel Corporation$/ 2013 Intel Corporation/')
echo
done

The following files have no license or copyright information:

intel_batchbuffer.h
intel_tex.c
intel_tex_image.c

brw_disasm.c has a completely different license (2 clause BSD?).  I'm
not sure why keithp picked that... or kept the copyright to himself.

Many files contain the following diff:

- * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER

Many files contain the following diff:

- * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
+ * DAMAGES OR OTHER

intel_copy_image contains the following diff:

- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.

gen6_gs_visitor.cpp has an extra note on the license:

+ *
+ * This code is based on original work by Ilia Mirkin.

I hope that I can just "fix" all of the differences except perhaps
brw_disasm.c.  I'm not a lawyer (and you probably aren't either), so I'm
just going to ask one what I'm allowed to do.

In case the patches never make it to the list (some are quite large), I
have put this all on the i965-license-header branch of my fd.o tree.

Ian Romanick (6):
  i965: Remove by-lines from file headers
  i965: Remove horizontal bars from file header comments
  i965: Fix typos in license
  i965: Re-wrap lines in the license, part 1
  i965: Various trivial changes to file headers
  i965: Re-wrap lines in the license, part 2

___
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[Mesa-dev] [PATCH 5/6] i965: Various trivial changes to file headers

2015-08-19 Thread Ian Romanick
From: Ian Romanick 

Signed-off-by: Ian Romanick 
---
 src/mesa/drivers/dri/i965/brw_cs.cpp |  2 +-
 src/mesa/drivers/dri/i965/brw_device_info.h  | 45 
 src/mesa/drivers/dri/i965/brw_vec4_cse.cpp   |  2 +-
 src/mesa/drivers/dri/i965/brw_vec4_generator.cpp |  3 +-
 src/mesa/drivers/dri/i965/gen6_depth_state.c |  2 +-
 src/mesa/drivers/dri/i965/gen6_gs_visitor.h  |  1 -
 src/mesa/drivers/dri/i965/gen6_surface_state.c   |  2 +-
 src/mesa/drivers/dri/i965/intel_tiled_memcpy.h   |  2 +-
 8 files changed, 29 insertions(+), 30 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_cs.cpp 
b/src/mesa/drivers/dri/i965/brw_cs.cpp
index cd7e094..181fdcf 100644
--- a/src/mesa/drivers/dri/i965/brw_cs.cpp
+++ b/src/mesa/drivers/dri/i965/brw_cs.cpp
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2014 - 2015 Intel Corporation
+ * Copyright © 2014, 2015 Intel Corporation
  *
  * Permission is hereby granted, free of charge, to any person obtaining a
  * copy of this software and associated documentation files (the "Software"),
diff --git a/src/mesa/drivers/dri/i965/brw_device_info.h 
b/src/mesa/drivers/dri/i965/brw_device_info.h
index 2a73e93..b341181 100644
--- a/src/mesa/drivers/dri/i965/brw_device_info.h
+++ b/src/mesa/drivers/dri/i965/brw_device_info.h
@@ -1,26 +1,25 @@
- /*
-  * Copyright © 2013 Intel Corporation
-  *
-  * Permission is hereby granted, free of charge, to any person obtaining a
-  * copy of this software and associated documentation files (the "Software"),
-  * to deal in the Software without restriction, including without limitation
-  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
-  * and/or sell copies of the Software, and to permit persons to whom the
-  * Software is furnished to do so, subject to the following conditions:
-  *
-  * The above copyright notice and this permission notice (including the next
-  * paragraph) shall be included in all copies or substantial portions of the
-  * Software.
-  *
-  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
-  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
-  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
-  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
-  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
-  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 
DEALINGS
-  * IN THE SOFTWARE.
-  *
-  */
+/*
+ * Copyright © 2013 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ */
 
 #pragma once
 #include 
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_cse.cpp 
b/src/mesa/drivers/dri/i965/brw_vec4_cse.cpp
index dd4df10..2ea29ba 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4_cse.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_cse.cpp
@@ -1,5 +1,5 @@
 /*
- * Copyright © 2012, 2013, 2014 Intel Corporation
+ * Copyright © 2012-2014 Intel Corporation
  *
  * Permission is hereby granted, free of charge, to any person obtaining a
  * copy of this software and associated documentation files (the "Software"),
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp 
b/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp
index 89e3fd6..6ad27ff 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp
@@ -1,4 +1,5 @@
-/* Copyright © 2011 Intel Corporation
+/*
+ * Copyright © 2011 Intel Corporation
  *
  * Permission is hereby granted, free of charge, to any person obtaining a
  * copy of this software and associated documentation files (the "Software"),
diff --git a/src/mesa/drivers/dri/i965/gen6_depth_state.c 
b/src/mesa/drivers/dri/i965/gen6_depth_state.c
index 00e77d2..6f195c9 100644
--- a/src/mesa/drivers/dri/i965/gen6_depth_state.c
+++ b/src/mesa/drivers/dri/i965/gen6_depth_state.c
@@ -1,5 +1,5 @@

[Mesa-dev] [PATCH 4/6] i965: Re-wrap lines in the license, part 1

2015-08-19 Thread Ian Romanick
From: Ian Romanick 

grep -lr '^ [*] IN THE SOFTWARE.$' | while read f; do \
sed --in-place \
-e 's/THE USE OR OTHER DEALINGS$/THE USE OR OTHER/' \
-e 's/^ \* IN THE SOFTWARE.$/ * DEALINGS IN THE SOFTWARE./' \
$f
done

Signed-off-by: Ian Romanick 
---
 src/mesa/drivers/dri/i965/brw_binding_tables.c | 4 ++--
 src/mesa/drivers/dri/i965/brw_blorp.cpp| 4 ++--
 src/mesa/drivers/dri/i965/brw_blorp.h  | 4 ++--
 src/mesa/drivers/dri/i965/brw_blorp_blit.cpp   | 4 ++--
 src/mesa/drivers/dri/i965/brw_blorp_blit_eu.cpp| 4 ++--
 src/mesa/drivers/dri/i965/brw_blorp_blit_eu.h  | 4 ++--
 src/mesa/drivers/dri/i965/brw_cfg.cpp  | 4 ++--
 src/mesa/drivers/dri/i965/brw_cfg.h| 4 ++--
 src/mesa/drivers/dri/i965/brw_conditional_render.c | 4 ++--
 src/mesa/drivers/dri/i965/brw_dead_control_flow.cpp| 4 ++--
 src/mesa/drivers/dri/i965/brw_dead_control_flow.h  | 4 ++--
 src/mesa/drivers/dri/i965/brw_device_info.c| 4 ++--
 src/mesa/drivers/dri/i965/brw_eu_compact.c | 4 ++--
 src/mesa/drivers/dri/i965/brw_fs.cpp   | 4 ++--
 src/mesa/drivers/dri/i965/brw_fs.h | 4 ++--
 src/mesa/drivers/dri/i965/brw_fs_builder.h | 4 ++--
 src/mesa/drivers/dri/i965/brw_fs_cmod_propagation.cpp  | 4 ++--
 src/mesa/drivers/dri/i965/brw_fs_combine_constants.cpp | 4 ++--
 src/mesa/drivers/dri/i965/brw_fs_copy_propagation.cpp  | 4 ++--
 src/mesa/drivers/dri/i965/brw_fs_cse.cpp   | 4 ++--
 src/mesa/drivers/dri/i965/brw_fs_dead_code_eliminate.cpp   | 4 ++--
 src/mesa/drivers/dri/i965/brw_fs_generator.cpp | 4 ++--
 src/mesa/drivers/dri/i965/brw_fs_live_variables.cpp| 4 ++--
 src/mesa/drivers/dri/i965/brw_fs_live_variables.h  | 4 ++--
 src/mesa/drivers/dri/i965/brw_fs_nir.cpp   | 4 ++--
 src/mesa/drivers/dri/i965/brw_fs_peephole_predicated_break.cpp | 4 ++--
 src/mesa/drivers/dri/i965/brw_fs_reg_allocate.cpp  | 4 ++--
 src/mesa/drivers/dri/i965/brw_fs_register_coalesce.cpp | 4 ++--
 src/mesa/drivers/dri/i965/brw_fs_saturate_propagation.cpp  | 4 ++--
 src/mesa/drivers/dri/i965/brw_fs_sel_peephole.cpp  | 4 ++--
 src/mesa/drivers/dri/i965/brw_fs_surface_builder.cpp   | 4 ++--
 src/mesa/drivers/dri/i965/brw_fs_surface_builder.h | 4 ++--
 src/mesa/drivers/dri/i965/brw_fs_visitor.cpp   | 4 ++--
 src/mesa/drivers/dri/i965/brw_gs_surface_state.c   | 4 ++--
 src/mesa/drivers/dri/i965/brw_inst.h   | 4 ++--
 src/mesa/drivers/dri/i965/brw_interpolation_map.c  | 4 ++--
 src/mesa/drivers/dri/i965/brw_ir_allocator.h   | 4 ++--
 src/mesa/drivers/dri/i965/brw_ir_fs.h  | 4 ++--
 src/mesa/drivers/dri/i965/brw_ir_vec4.h| 4 ++--
 src/mesa/drivers/dri/i965/brw_meta_fast_clear.c| 4 ++--
 src/mesa/drivers/dri/i965/brw_meta_stencil_blit.c  | 4 ++--
 src/mesa/drivers/dri/i965/brw_meta_updownsample.c  | 4 ++--
 src/mesa/drivers/dri/i965/brw_meta_util.c  | 4 ++--
 src/mesa/drivers/dri/i965/brw_meta_util.h  | 4 ++--
 src/mesa/drivers/dri/i965/brw_multisample_state.h  | 4 ++--
 src/mesa/drivers/dri/i965/brw_nir.c| 4 ++--
 src/mesa/drivers/dri/i965/brw_nir.h| 4 ++--
 src/mesa/drivers/dri/i965/brw_nir_analyze_boolean_resolves.c   | 4 ++--
 src/mesa/drivers/dri/i965/brw_object_purgeable.c   | 4 ++--
 src/mesa/drivers/dri/i965/brw_packed_float.c   | 4 ++--
 src/mesa/drivers/dri/i965/brw_pipe_control.c   | 4 ++--
 src/mesa/drivers/dri/i965/brw_primitive_restart.c  | 4 ++--
 src/mesa/drivers/dri/i965/brw_program.h| 4 ++--
 src/mesa/drivers/dri/i965/brw_queryobj.c   | 4 ++--
 src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp| 4 ++--
 src/mesa/drivers/dri/i965/brw_shader.cpp   | 4 ++--
 src/mesa/drivers/dri/i965/brw_shader.h | 4 ++--
 src/mesa/drivers/dri/i965/brw_state_dump.c | 4 ++--
 src/mesa/drivers/dri/i965/brw_surface_formats.c| 4 ++--
 src/mesa/drivers/dri/i965/brw_vec4.cpp | 4 ++--
 src/mesa/drivers/dri/i965/brw_vec4.h   | 4 ++--
 src/mesa/drivers/dri/i965/brw_vec4_copy_propagation.cpp| 4 ++--
 src/mesa/drivers/dri/i965/brw_vec4_cse.cpp | 4 ++--
 src/mesa/drivers/dri/i965/brw_vec4_dead_code_eliminate.cpp | 4 ++--
 src/mesa/drivers/dri/i965/brw_vec4_generator.c

Re: [Mesa-dev] big endian: r600g

2015-08-19 Thread Michel Dänzer
On 19.08.2015 16:34, Christian Zigotzky wrote:
> 
> Thank you for your answer. I don't have an idea anymore. Could you
> tell me which files we have to modify?

If I knew exactly what needs to be done where, I probably would have
done it myself. :) That said, I suspect changes to the driver
(src/gallium/drivers/{radeon,r600}/ as well as to the Gallium DRI state
tracker (src/gallium/state_trackers/dri/ code might be necessary at least.


> Is it possible to port the AMD Catalyst driver to the PowerPC
> platform?

The avenues suggested by Dragomir and Martin make more sense to me.


-- 
Earthling Michel Dänzer   |   http://www.amd.com
Libre software enthusiast | Mesa and X developer
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Re: [Mesa-dev] [PATCH 3/6] i965: Fix typos in license

2015-08-19 Thread Matt Turner
On Wed, Aug 19, 2015 at 7:49 PM, Ian Romanick  wrote:
> From: Ian Romanick 
>
> grep -lr 'sub license' | while read f; do \
> sed --in-place -e 's/sub license/sublicense/' $f ;\
> done
>
> grep -lr 'NON-INFRINGEMENT' | while read f; do \
> sed --in-place -e 's/NON-INFRINGEMENT/NONINFRINGEMENT/' $f ;\
> done

Indeed, both of these changes match the MIT license text found at
http://opensource.org/licenses/MIT
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Re: [Mesa-dev] [PATCH 0/6] Copyright / license pet peeves

2015-08-19 Thread Matt Turner
Patches 1 and 6 were too large for the mailing list, so I checked them
in your tree. Patch 6 has some diffs that leave lines badly wrapped:

+ * THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
+ * DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING

other than that, all this looks like an improvement to me.

There are some instances of "VMWARE" and "THE COPYRIGHT OWNER(S)
AND/OR ITS SUPPLIERS" that don't match the license
(http://opensource.org/licenses/MIT) that I think should be changed.
In particular, "VMWARE" is odd since they're not the copyright holder.
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[Mesa-dev] Last try at AoA for Mesa 11 v4

2015-08-19 Thread Timothy Arceri
Changes in v4:
- Desktop support (see patch 18 for limitations)
- Image support
- Much faster constant optimisation pass (patch 11)

Changes in v3:
- Rebased on the tessellation and subroutine changes
- Atomic counter AoA now working including indirect indexing (previously I had 
broken piglit tests that were always passing as long as the shader compiled)
- Included fix for atomic counters with binding other than 0
- Split the program interface query chages for easier review

Changes in v2:
- Reworked how uniform AoA are handled which simplified things greatly.
- Transform feedback and program interface query now working with AoA.
- Speed up glsl optimisation pass via improvement to dead code elimination.
- Some smaller reviewed patches pushed.

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[Mesa-dev] [PATCH 15/25] i965: support atomic counter AoA

2015-08-19 Thread Timothy Arceri
---
 src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp | 22 +-
 1 file changed, 17 insertions(+), 5 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp 
b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
index 9062bcc..0701403 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
@@ -2440,11 +2440,23 @@ vec4_visitor::visit_atomic_counter_intrinsic(ir_call 
*ir)
src_reg offset(this, glsl_type::uint_type);
ir_dereference_array *deref_array = deref->as_dereference_array();
if (deref_array) {
-  deref_array->array_index->accept(this);
-
-  src_reg tmp(this, glsl_type::uint_type);
-  emit(MUL(dst_reg(tmp), this->result, ATOMIC_COUNTER_SIZE));
-  emit(ADD(dst_reg(offset), tmp, location->data.atomic.offset));
+  emit(MOV(dst_reg(offset), location->data.atomic.offset));
+  while (deref_array) {
+ deref_array->array_index->accept(this);
+
+ unsigned size;
+ if (deref_array->array->type->fields.array->is_array()) {
+size =
+   deref_array->array->type->fields.array->arrays_of_arrays_size() 
*
+   ATOMIC_COUNTER_SIZE;
+ } else {
+size = ATOMIC_COUNTER_SIZE;
+ }
+ src_reg tmp(this, glsl_type::uint_type);
+ emit(MUL(dst_reg(tmp), this->result, size));
+ emit(ADD(dst_reg(offset), tmp, offset));
+ deref_array = deref_array->array->as_dereference_array();
+  }
} else {
   offset = location->data.atomic.offset;
}
-- 
2.4.3

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[Mesa-dev] [PATCH 07/25] glsl: add helper for calculating size of AoA

2015-08-19 Thread Timothy Arceri
V2: return 0 if not array rather than -1

Reviewed-by: Tapani Pälli 
---
 src/glsl/glsl_types.h | 19 +++
 1 file changed, 19 insertions(+)

diff --git a/src/glsl/glsl_types.h b/src/glsl/glsl_types.h
index e7c73da..469ee3e 100644
--- a/src/glsl/glsl_types.h
+++ b/src/glsl/glsl_types.h
@@ -550,6 +550,25 @@ struct glsl_type {
}
 
/**
+* Return the total number of elements in an array including the elements
+* in arrays of arrays.
+*/
+   unsigned arrays_of_arrays_size() const
+   {
+  if (!is_array())
+ return 0;
+
+  unsigned size = length;
+  const glsl_type *base_type = fields.array;
+
+  while (base_type->is_array()) {
+ size = size * base_type->length;
+ base_type = base_type->fields.array;
+  }
+  return size;
+   }
+
+   /**
 * Return the amount of atomic counter storage required for a type.
 */
unsigned atomic_size() const
-- 
2.4.3

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[Mesa-dev] [PATCH 16/25] i965: fix atomic buffer index for bindings other than 0

2015-08-19 Thread Timothy Arceri
Since commit c0cd5b var->data.binding was being used as a replacement
for atomic buffer index, but they don't have to be the same value they
just happen to end up the same when binding is 0.

Now that we store the atomic uniform location in var->data.location
we can use this to lookup the atomic buffer index in uniform storage.

For arrays of arrays the outer arrays have separate uniform locations
however they all share the same buffer so we can get the buffer index
using the base uniform location.

Cc: Alejandro Piñeiro 
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90175
---
 src/glsl/nir/glsl_to_nir.cpp   |  2 --
 src/glsl/nir/nir.h |  4 ++--
 src/glsl/nir/nir_lower_atomics.c   | 18 --
 src/mesa/drivers/dri/i965/brw_nir.c|  6 --
 src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp |  2 +-
 5 files changed, 19 insertions(+), 13 deletions(-)

diff --git a/src/glsl/nir/glsl_to_nir.cpp b/src/glsl/nir/glsl_to_nir.cpp
index 77327b6..6cb23c0 100644
--- a/src/glsl/nir/glsl_to_nir.cpp
+++ b/src/glsl/nir/glsl_to_nir.cpp
@@ -326,8 +326,6 @@ nir_visitor::visit(ir_variable *ir)
 
var->data.index = ir->data.index;
var->data.binding = ir->data.binding;
-   /* XXX Get rid of buffer_index */
-   var->data.atomic.buffer_index = ir->data.binding;
var->data.atomic.offset = ir->data.atomic.offset;
var->data.image.read_only = ir->data.image_read_only;
var->data.image.write_only = ir->data.image_write_only;
diff --git a/src/glsl/nir/nir.h b/src/glsl/nir/nir.h
index 083413a..d5afcfa 100644
--- a/src/glsl/nir/nir.h
+++ b/src/glsl/nir/nir.h
@@ -308,7 +308,6 @@ typedef struct {
* Location an atomic counter is stored at.
*/
   struct {
- unsigned buffer_index;
  unsigned offset;
   } atomic;
 
@@ -1667,7 +1666,8 @@ void nir_lower_system_values(nir_shader *shader);
 void nir_lower_tex_projector(nir_shader *shader);
 void nir_lower_idiv(nir_shader *shader);
 
-void nir_lower_atomics(nir_shader *shader);
+void nir_lower_atomics(nir_shader *shader,
+   const struct gl_shader_program *shader_program);
 void nir_lower_to_source_mods(nir_shader *shader);
 
 void nir_normalize_cubemap_coords(nir_shader *shader);
diff --git a/src/glsl/nir/nir_lower_atomics.c b/src/glsl/nir/nir_lower_atomics.c
index ea63474..55230b6 100644
--- a/src/glsl/nir/nir_lower_atomics.c
+++ b/src/glsl/nir/nir_lower_atomics.c
@@ -25,6 +25,7 @@
  *
  */
 
+#include "ir_uniform.h"
 #include "nir.h"
 #include "main/config.h"
 #include 
@@ -35,7 +36,8 @@
  */
 
 static void
-lower_instr(nir_intrinsic_instr *instr, nir_function_impl *impl)
+lower_instr(nir_intrinsic_instr *instr,
+const struct gl_shader_program *shader_program)
 {
nir_intrinsic_op op;
switch (instr->intrinsic) {
@@ -60,10 +62,11 @@ lower_instr(nir_intrinsic_instr *instr, nir_function_impl 
*impl)
   return; /* atomics passed as function arguments can't be lowered */
 
void *mem_ctx = ralloc_parent(instr);
+   unsigned uniform_loc = instr->variables[0]->var->data.location;
 
nir_intrinsic_instr *new_instr = nir_intrinsic_instr_create(mem_ctx, op);
new_instr->const_index[0] =
-  (int) instr->variables[0]->var->data.atomic.buffer_index;
+  shader_program->UniformStorage[uniform_loc].atomic_buffer_index;
 
nir_load_const_instr *offset_const = nir_load_const_instr_create(mem_ctx, 
1);
offset_const->value.u[0] = instr->variables[0]->var->data.atomic.offset;
@@ -129,22 +132,25 @@ lower_instr(nir_intrinsic_instr *instr, nir_function_impl 
*impl)
 }
 
 static bool
-lower_block(nir_block *block, void *state)
+lower_block(nir_block *block, void *prog)
 {
nir_foreach_instr_safe(block, instr) {
   if (instr->type == nir_instr_type_intrinsic)
- lower_instr(nir_instr_as_intrinsic(instr), state);
+ lower_instr(nir_instr_as_intrinsic(instr),
+ (const struct gl_shader_program *) prog);
}
 
return true;
 }
 
 void
-nir_lower_atomics(nir_shader *shader)
+nir_lower_atomics(nir_shader *shader,
+  const struct gl_shader_program *shader_program)
 {
nir_foreach_overload(shader, overload) {
   if (overload->impl) {
- nir_foreach_block(overload->impl, lower_block, overload->impl);
+ nir_foreach_block(overload->impl, lower_block,
+   (void *) shader_program);
  nir_metadata_preserve(overload->impl, nir_metadata_block_index |
nir_metadata_dominance);
   }
diff --git a/src/mesa/drivers/dri/i965/brw_nir.c 
b/src/mesa/drivers/dri/i965/brw_nir.c
index b5788fa..c21d971 100644
--- a/src/mesa/drivers/dri/i965/brw_nir.c
+++ b/src/mesa/drivers/dri/i965/brw_nir.c
@@ -140,8 +140,10 @@ brw_create_nir(struct brw_context *brw,
nir_lower_system_values(nir);
nir_validate_shader(nir);
 
-   nir_lower_atomics(nir);
-   nir_validate_shader(nir);
+   if

[Mesa-dev] [PATCH 09/25] glsl: allow AoA to be sized by initializer or constructor

2015-08-19 Thread Timothy Arceri
From Section 4.1.9 of the GLSL ES 3.10 spec:

"Arrays are sized either at compile-time or at run-time.
To size an array at compile-time, either the size
must be specified within the brackets as above or
must be inferred from the type of the initializer."
---
 src/glsl/ast.h   | 21 +++-
 src/glsl/ast_array_index.cpp |  7 ++--
 src/glsl/ast_function.cpp| 33 +-
 src/glsl/ast_to_hir.cpp  | 79 ++--
 src/glsl/glsl_parser.yy  | 11 +++---
 5 files changed, 106 insertions(+), 45 deletions(-)

diff --git a/src/glsl/ast.h b/src/glsl/ast.h
index ab94cb2..464ae4e 100644
--- a/src/glsl/ast.h
+++ b/src/glsl/ast.h
@@ -181,6 +181,7 @@ enum ast_operators {
ast_post_dec,
ast_field_selection,
ast_array_index,
+   ast_unsized_array_dim,
 
ast_function_call,
 
@@ -318,16 +319,7 @@ public:
 
 class ast_array_specifier : public ast_node {
 public:
-   /** Unsized array specifier ([]) */
-   explicit ast_array_specifier(const struct YYLTYPE &locp)
- : is_unsized_array(true)
-   {
-  set_location(locp);
-   }
-
-   /** Sized array specifier ([dim]) */
ast_array_specifier(const struct YYLTYPE &locp, ast_expression *dim)
- : is_unsized_array(false)
{
   set_location(locp);
   array_dimensions.push_tail(&dim->link);
@@ -340,19 +332,14 @@ public:
 
bool is_single_dimension()
{
-  return (this->is_unsized_array && this->array_dimensions.is_empty()) ||
- (!this->is_unsized_array &&
-  this->array_dimensions.tail_pred->prev != NULL &&
-  this->array_dimensions.tail_pred->prev->is_head_sentinel());
+  return this->array_dimensions.tail_pred->prev != NULL &&
+ this->array_dimensions.tail_pred->prev->is_head_sentinel();
}
 
virtual void print(void) const;
 
-   /* If true, this means that the array has an unsized outermost dimension. */
-   bool is_unsized_array;
-
/* This list contains objects of type ast_node containing the
-* sized dimensions only, in outermost-to-innermost order.
+* array dimensions in outermost-to-innermost order.
 */
exec_list array_dimensions;
 };
diff --git a/src/glsl/ast_array_index.cpp b/src/glsl/ast_array_index.cpp
index 27e84d1..567fa7b 100644
--- a/src/glsl/ast_array_index.cpp
+++ b/src/glsl/ast_array_index.cpp
@@ -28,13 +28,10 @@
 void
 ast_array_specifier::print(void) const
 {
-   if (this->is_unsized_array) {
-  printf("[ ] ");
-   }
-
foreach_list_typed (ast_node, array_dimension, link, 
&this->array_dimensions) {
   printf("[ ");
-  array_dimension->print();
+  if (((ast_expression*)array_dimension)->oper != ast_unsized_array_dim)
+ array_dimension->print();
   printf("] ");
}
 }
diff --git a/src/glsl/ast_function.cpp b/src/glsl/ast_function.cpp
index 803edf5..d003655 100644
--- a/src/glsl/ast_function.cpp
+++ b/src/glsl/ast_function.cpp
@@ -908,6 +908,7 @@ process_array_constructor(exec_list *instructions,
}
 
bool all_parameters_are_constant = true;
+   const glsl_type *element_type = constructor_type->fields.array;
 
/* Type cast each parameter and, if possible, fold constants. */
foreach_in_list_safe(ir_rvalue, ir, &actual_parameters) {
@@ -934,12 +935,34 @@ process_array_constructor(exec_list *instructions,
 }
   }
 
-  if (result->type != constructor_type->fields.array) {
+  if (constructor_type->fields.array->is_unsized_array()) {
+ /* As the inner parameters of the constructor are created without
+  * knowledge of each other we need to check to make sure unsized
+  * parameters of unsized constructors all end up with the same size.
+  *
+  * e.g we make sure to fail for a constructor like this:
+  * vec4[][] a = vec4[][](vec4[](vec4(0.0), vec4(1.0)),
+  *   vec4[](vec4(0.0), vec4(1.0), vec4(1.0)),
+  *   vec4[](vec4(0.0), vec4(1.0)));
+  */
+ if (element_type->is_unsized_array()) {
+ /* This is the first parameter so just get the type */
+element_type = result->type;
+ } else if (element_type != result->type) {
+_mesa_glsl_error(loc, state, "type error in array constructor: "
+ "expected: %s, found %s",
+ element_type->name,
+ result->type->name);
+return ir_rvalue::error_value(ctx);
+ }
+  } else if (result->type != constructor_type->fields.array) {
 _mesa_glsl_error(loc, state, "type error in array constructor: "
  "expected: %s, found %s",
  constructor_type->fields.array->name,
  result->type->name);
  return ir_rvalue::error_value(ctx);
+  } else {
+ element_type = result->type;
   }
 
   /* Attempt to convert the parameter to a constant value

[Mesa-dev] [PATCH 04/25] glsl: Add support for linking uniform arrays of arrays

2015-08-19 Thread Timothy Arceri
V2: Handle arrays of arrays in the same way structures are handled

The ARB_arrays_of_arrays spec doesn't give very many details on how
AoA uniforms are intended to be implemented. However in the
ARB_program_interface_query spec there are details that show AoA are
intended to be handled in a similar way to structs.

Issues 7 from the ARB_program_interface_query spec:

 We define rules consistent with our enumeration rules for
 other complex types.  For existing one-dimensional arrays, we enumerate
 a single entry if the array is an array of basic types, or separate
 entries for each array element if the array is an array of structures.
 We follow similar rules here.  For a uniform array such as:

   uniform vec4 a[5][4][3];

 we enumerate twenty different entries ("a[0][0][0]" through
 "a[4][3][0]"), each of which is treated as an array with three elements.
 This is morally equivalent to what you'd get if you worked around the
 limitation in current GLSL via:

struct ArrayBottom { vec4 c[3]; };
struct ArrayMid{ ArrayBottom b[3]; };
uniform ArrayMid   a[5];

 which would enumerate "a[0].b[0].c[0]" through "a[4].b[3].c[0]".
---
 src/glsl/link_uniform_initializers.cpp |  4 +++-
 src/glsl/link_uniforms.cpp | 13 +
 2 files changed, 12 insertions(+), 5 deletions(-)

diff --git a/src/glsl/link_uniform_initializers.cpp 
b/src/glsl/link_uniform_initializers.cpp
index d61ae91..0cc79d9 100644
--- a/src/glsl/link_uniform_initializers.cpp
+++ b/src/glsl/link_uniform_initializers.cpp
@@ -165,6 +165,7 @@ set_uniform_initializer(void *mem_ctx, gl_shader_program 
*prog,
const char *name, const glsl_type *type,
 ir_constant *val, unsigned int boolean_true)
 {
+   const glsl_type *t_without_array = type->without_array();
if (type->is_record()) {
   ir_constant *field_constant;
 
@@ -179,7 +180,8 @@ set_uniform_initializer(void *mem_ctx, gl_shader_program 
*prog,
 field_constant = (ir_constant *)field_constant->next;
   }
   return;
-   } else if (type->is_array() && type->fields.array->is_record()) {
+   } else if (t_without_array->is_record() ||
+  (type->is_array() && type->fields.array->is_array())) {
   const glsl_type *const element_type = type->fields.array;
 
   for (unsigned int i = 0; i < type->length; i++) {
diff --git a/src/glsl/link_uniforms.cpp b/src/glsl/link_uniforms.cpp
index 42f75e9..61b47c9 100644
--- a/src/glsl/link_uniforms.cpp
+++ b/src/glsl/link_uniforms.cpp
@@ -138,7 +138,8 @@ program_resource_visitor::process(ir_variable *var)
*/
   recursion(var->type, &name, strlen(name), row_major, NULL, false);
   ralloc_free(name);
-   } else if (t->without_array()->is_record()) {
+   } else if (t_without_array->is_record() ||
+  (t->is_array() && t->fields.array->is_array())) {
   char *name = ralloc_strdup(NULL, var->name);
   recursion(var->type, &name, strlen(name), row_major, NULL, false);
   ralloc_free(name);
@@ -215,7 +216,8 @@ program_resource_visitor::recursion(const glsl_type *t, 
char **name,
  this->leave_record(t, *name, row_major);
   }
} else if (t->without_array()->is_record()
-  || t->without_array()->is_interface()) {
+  || t->without_array()->is_interface()
+  || (t->is_array() && t->fields.array->is_array())) {
   if (record_type == NULL && t->fields.array->is_record())
  record_type = t->fields.array;
 
@@ -344,6 +346,7 @@ private:
{
   assert(!type->without_array()->is_record());
   assert(!type->without_array()->is_interface());
+  assert(!(type->is_array() && type->fields.array->is_array()));
 
   (void) row_major;
 
@@ -594,6 +597,7 @@ private:
{
   assert(!type->without_array()->is_record());
   assert(!type->without_array()->is_interface());
+  assert(!(type->is_array() && type->fields.array->is_array()));
 
   unsigned id;
   bool found = this->map->get(id, name);
@@ -666,7 +670,7 @@ private:
 
 if (type->is_array()) {
this->uniforms[id].array_stride =
-  glsl_align(type->fields.array->std140_size(row_major), 16);
+  glsl_align(type->without_array()->std140_size(row_major), 16);
 } else {
this->uniforms[id].array_stride = 0;
 }
@@ -807,7 +811,8 @@ link_update_uniform_buffer_variables(struct gl_shader 
*shader)
 
   if (var->type->is_record()) {
  sentinel = '.';
-  } else if (var->type->without_array()->is_record()) {
+  } else if (var->type->is_array() && (var->type->fields.array->is_array()
+ || var->type->fields.array->is_record())) {
  sentinel = '[';
   }
 
-- 
2.4.3

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[Mesa-dev] [PATCH 01/25] glsl: calculate component size for arrays of arrays when varying packing disabled

2015-08-19 Thread Timothy Arceri
Signed-off-by: Timothy Arceri 
Reviewed-by: Ilia Mirkin 
---
 src/glsl/link_varyings.cpp | 13 ++---
 1 file changed, 10 insertions(+), 3 deletions(-)

diff --git a/src/glsl/link_varyings.cpp b/src/glsl/link_varyings.cpp
index f7a7b8c..0d343d6 100644
--- a/src/glsl/link_varyings.cpp
+++ b/src/glsl/link_varyings.cpp
@@ -956,9 +956,16 @@ varying_matches::record(ir_variable *producer_var, 
ir_variable *consumer_var)
  type = type->fields.array;
   }
 
-  slots = (type->is_array()
-? (type->length * type->fields.array->matrix_columns)
-: type->matrix_columns);
+  if (type->is_array()) {
+ slots = 1;
+ while (type->is_array()) {
+slots *= type->length;
+type = type->fields.array;
+ }
+ slots *= type->matrix_columns;
+  } else {
+ slots = var->type->matrix_columns;
+  }
   this->matches[this->num_matches].num_components = 4 * slots;
} else {
   this->matches[this->num_matches].num_components
-- 
2.4.3

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[Mesa-dev] [PATCH 12/25] glsl: add AoA support for atmoic counters

2015-08-19 Thread Timothy Arceri
This marks all counters in an AoA as active.

For AoA all but the innermost array are threated as separate
counters/uniforms. The Nvidia binary also goes further and
finds inactive counters in the AoA, in future we should do
this too, however this gets things working for the time being.

This change also removes the use of UniformHash for atomic counters,
this avoids having to generate name strings used as hash keys.
---
 src/glsl/ir.h  |  1 +
 src/glsl/link_atomics.cpp  | 77 --
 src/glsl/link_uniforms.cpp |  7 +
 src/glsl/nir/nir.h |  1 +
 4 files changed, 63 insertions(+), 23 deletions(-)

diff --git a/src/glsl/ir.h b/src/glsl/ir.h
index ede8caa..f5e80ec 100644
--- a/src/glsl/ir.h
+++ b/src/glsl/ir.h
@@ -819,6 +819,7 @@ public:
*   - Fragment shader output: one of the values from \c gl_frag_result.
*   - Uniforms: Per-stage uniform slot number for default uniform block.
*   - Uniforms: Index within the uniform block definition for UBO 
members.
+   *   - Atomic Counter: Uniform slot number.
*   - Other: This field is not currently used.
*
* If the variable is a uniform, shader input, or shader output, and the
diff --git a/src/glsl/link_atomics.cpp b/src/glsl/link_atomics.cpp
index 100d03c..70ef0e1 100644
--- a/src/glsl/link_atomics.cpp
+++ b/src/glsl/link_atomics.cpp
@@ -33,7 +33,7 @@ namespace {
 * Atomic counter as seen by the program.
 */
struct active_atomic_counter {
-  unsigned id;
+  unsigned uniform_loc;
   ir_variable *var;
};
 
@@ -52,7 +52,7 @@ namespace {
  free(counters);
   }
 
-  void push_back(unsigned id, ir_variable *var)
+  void push_back(unsigned uniform_loc, ir_variable *var)
   {
  active_atomic_counter *new_counters;
 
@@ -66,7 +66,7 @@ namespace {
  }
 
  counters = new_counters;
- counters[num_counters].id = id;
+ counters[num_counters].uniform_loc = uniform_loc;
  counters[num_counters].var = var;
  num_counters++;
   }
@@ -95,6 +95,50 @@ namespace {
y->data.atomic.offset < x->data.atomic.offset + 
x->type->atomic_size()));
}
 
+   void
+   process_atomic_variable(const glsl_type *t, struct gl_shader_program *prog,
+   unsigned *uniform_loc, ir_variable *var,
+   active_atomic_buffer *const buffers,
+   unsigned *num_buffers, int *offset,
+   const unsigned shader_stage)
+   {
+  /* FIXME: Arrays of arrays get counted separately. For example:
+   * x1[3][3][2] = 9 counters
+   * x2[3][2]= 3 counters
+   * x3[2]   = 1 counter
+   *
+   * However this code marks all the counters as active even when they
+   * might not be used.
+   */
+  if (t->is_array() && t->fields.array->is_array()) {
+ for (unsigned i = 0; i < t->length; i++) {
+process_atomic_variable(t->fields.array, prog, uniform_loc,
+var, buffers, num_buffers, offset,
+shader_stage);
+ }
+  } else {
+ active_atomic_buffer *buf = &buffers[var->data.binding];
+ gl_uniform_storage *const storage =
+&prog->UniformStorage[*uniform_loc];
+
+ /* If this is the first time the buffer is used, increment
+  * the counter of buffers used.
+  */
+ if (buf->size == 0)
+(*num_buffers)++;
+
+ buf->push_back(*uniform_loc, var);
+
+ buf->stage_references[shader_stage]++;
+ buf->size = MAX2(buf->size, *offset + t->atomic_size());
+
+ storage->offset = *offset;
+ *offset += t->atomic_size();
+
+ (*uniform_loc)++;
+  }
+   }
+
active_atomic_buffer *
find_active_atomic_counters(struct gl_context *ctx,
struct gl_shader_program *prog,
@@ -114,23 +158,10 @@ namespace {
 ir_variable *var = node->as_variable();
 
 if (var && var->type->contains_atomic()) {
-   unsigned id = 0;
-   bool found = prog->UniformHash->get(id, var->name);
-   assert(found);
-   (void) found;
-   active_atomic_buffer *buf = &buffers[var->data.binding];
-
-   /* If this is the first time the buffer is used, increment
-* the counter of buffers used.
-*/
-   if (buf->size == 0)
-  (*num_buffers)++;
-
-   buf->push_back(id, var);
-
-   buf->stage_references[i]++;
-   buf->size = MAX2(buf->size, var->data.atomic.offset +
-var->type->atomic_size());
+   int offset = var->data.atomic.offset;
+   unsigned uniform_loc = var->data.location;
+   process_atomic_variable(var->type, 

[Mesa-dev] [PATCH 14/25] nir: add atomic lowering support for AoA

2015-08-19 Thread Timothy Arceri
---
 src/glsl/nir/nir_lower_atomics.c | 22 --
 1 file changed, 12 insertions(+), 10 deletions(-)

diff --git a/src/glsl/nir/nir_lower_atomics.c b/src/glsl/nir/nir_lower_atomics.c
index ce3615a..ea63474 100644
--- a/src/glsl/nir/nir_lower_atomics.c
+++ b/src/glsl/nir/nir_lower_atomics.c
@@ -72,20 +72,22 @@ lower_instr(nir_intrinsic_instr *instr, nir_function_impl 
*impl)
 
nir_ssa_def *offset_def = &offset_const->def;
 
-   if (instr->variables[0]->deref.child != NULL) {
-  assert(instr->variables[0]->deref.child->deref_type ==
- nir_deref_type_array);
-  nir_deref_array *deref_array =
- nir_deref_as_array(instr->variables[0]->deref.child);
-  assert(deref_array->deref.child == NULL);
+   nir_deref *tail = &instr->variables[0]->deref;
+   while (tail->child != NULL) {
+  assert(tail->child->deref_type == nir_deref_type_array);
+  nir_deref_array *deref_array = nir_deref_as_array(tail->child);
+  tail = tail->child;
 
-  offset_const->value.u[0] +=
- deref_array->base_offset * ATOMIC_COUNTER_SIZE;
+  unsigned child_array_elements = tail->child != NULL ?
+ glsl_get_aoa_size(tail->type) : 1;
+
+  offset_const->value.u[0] += deref_array->base_offset *
+ child_array_elements * ATOMIC_COUNTER_SIZE;
 
   if (deref_array->deref_array_type == nir_deref_array_type_indirect) {
  nir_load_const_instr *atomic_counter_size =
nir_load_const_instr_create(mem_ctx, 1);
- atomic_counter_size->value.u[0] = ATOMIC_COUNTER_SIZE;
+ atomic_counter_size->value.u[0] = child_array_elements * 
ATOMIC_COUNTER_SIZE;
  nir_instr_insert_before(&instr->instr, &atomic_counter_size->instr);
 
  nir_alu_instr *mul = nir_alu_instr_create(mem_ctx, nir_op_imul);
@@ -102,7 +104,7 @@ lower_instr(nir_intrinsic_instr *instr, nir_function_impl 
*impl)
  add->src[0].src.is_ssa = true;
  add->src[0].src.ssa = &mul->dest.dest.ssa;
  add->src[1].src.is_ssa = true;
- add->src[1].src.ssa = &offset_const->def;
+ add->src[1].src.ssa = offset_def;
  nir_instr_insert_before(&instr->instr, &add->instr);
 
  offset_def = &add->dest.dest.ssa;
-- 
2.4.3

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[Mesa-dev] [PATCH 10/25] glsl: remove dead code in a single pass

2015-08-19 Thread Timothy Arceri
Currently only one ir assignment is removed for each var in a single
dead code optimisation pass. This means if a var has more than one
assignment, then it requires all the glsl optimisations to be run again
for each additional assignment to be removed.
Another pass is also required to remove the variable itself.

With this change all assignments and the variable are removed in a single
pass.

Some of the arrays of arrays conformance tests that were looping
through 8 dimensions ended up with a var with hundreds of assignments.

This change helps ES31-CTS.arrays_of_arrays.InteractionFunctionCalls1
go from around 3 min 20 sec -> 2 min

ES31-CTS.arrays_of_arrays.InteractionFunctionCalls2 went from
around 9 min 20 sec to 7 min 30 sec

I had difficulty getting the public shader-db to give a constent result
with or without this change but the results seemed unchanged at between
15-20 seconds.

Thomas Helland measured change with shader-db on his machine from
approx 117 secs to 112 secs.

V2: Add assert to be sure references are counted before assignments.

Tested-By: Thomas Helland 
---
 src/glsl/ir_variable_refcount.cpp | 28 +---
 src/glsl/ir_variable_refcount.h   | 13 -
 src/glsl/opt_dead_code.cpp| 33 ++---
 src/glsl/opt_tree_grafting.cpp|  2 --
 4 files changed, 59 insertions(+), 17 deletions(-)

diff --git a/src/glsl/ir_variable_refcount.cpp 
b/src/glsl/ir_variable_refcount.cpp
index e4d825c..4ca492e 100644
--- a/src/glsl/ir_variable_refcount.cpp
+++ b/src/glsl/ir_variable_refcount.cpp
@@ -46,6 +46,16 @@ static void
 free_entry(struct hash_entry *entry)
 {
ir_variable_refcount_entry *ivre = (ir_variable_refcount_entry *) 
entry->data;
+
+   /* Free assignment list */
+   while (!ivre->assign_list.is_empty()) {
+  struct assignment_entry *assignment_entry =
+ exec_node_data(struct assignment_entry,
+ivre->assign_list.head, link);
+  assignment_entry->link.remove();
+  free(assignment_entry);
+   }
+
delete ivre;
 }
 
@@ -59,7 +69,6 @@ ir_variable_refcount_visitor::~ir_variable_refcount_visitor()
 ir_variable_refcount_entry::ir_variable_refcount_entry(ir_variable *var)
 {
this->var = var;
-   assign = NULL;
assigned_count = 0;
declaration = false;
referenced_count = 0;
@@ -125,8 +134,21 @@ ir_variable_refcount_visitor::visit_leave(ir_assignment 
*ir)
entry = this->get_variable_entry(ir->lhs->variable_referenced());
if (entry) {
   entry->assigned_count++;
-  if (entry->assign == NULL)
-entry->assign = ir;
+
+  /**
+   * Build a list for dead code optimisation. Dont add assingment if it
+   * was declared out of scope (outside the instruction stream). Also dont
+   * bother adding any more to the list if there are more references then
+   * assignments as this means the variable is used and won't be optimised
+   * out.
+   */
+  assert(entry->referenced_count >= entry->assigned_count);
+  if (entry->referenced_count == entry->assigned_count) {
+ struct assignment_entry *assignment_entry =
+(struct assignment_entry *)calloc(1, sizeof(*assignment_entry));
+ assignment_entry->assign = ir;
+ entry->assign_list.push_head(&assignment_entry->link);
+  }
}
 
return visit_continue;
diff --git a/src/glsl/ir_variable_refcount.h b/src/glsl/ir_variable_refcount.h
index c15e8110..5c74c31 100644
--- a/src/glsl/ir_variable_refcount.h
+++ b/src/glsl/ir_variable_refcount.h
@@ -33,13 +33,24 @@
 #include "ir_visitor.h"
 #include "glsl_types.h"
 
+struct assignment_entry {
+   exec_node link;
+   ir_assignment *assign;
+};
+
 class ir_variable_refcount_entry
 {
 public:
ir_variable_refcount_entry(ir_variable *var);
 
ir_variable *var; /* The key: the variable's pointer. */
-   ir_assignment *assign; /* An assignment to the variable, if any */
+
+   /**
+* List of assignments to the variable, if any.
+* This is intended to be used for dead code optimisation and may
+* not be a complete list.
+*/
+   exec_list assign_list;
 
/** Number of times the variable is referenced, including assignments. */
unsigned referenced_count;
diff --git a/src/glsl/opt_dead_code.cpp b/src/glsl/opt_dead_code.cpp
index e4bf874..d95e69b 100644
--- a/src/glsl/opt_dead_code.cpp
+++ b/src/glsl/opt_dead_code.cpp
@@ -75,24 +75,35 @@ do_dead_code(exec_list *instructions, bool 
uniform_locations_assigned)
  || !entry->declaration)
 continue;
 
-  if (entry->assign) {
-/* Remove a single dead assignment to the variable we found.
- * Don't do so if it's a shader or function output or a shader
- * storage variable though.
+  if (!entry->assign_list.is_empty()) {
+/* Remove all the dead assignments to the variable we found.
+ * Don't do so if it's a shader or function output, though.
  */
 if (entry->var->dat

[Mesa-dev] [PATCH 02/25] glsl: dont allow gl_PerVertex to be redeclared as an array of arrays

2015-08-19 Thread Timothy Arceri
V2: move single dimensional array detection into a helper

Signed-off-by: Timothy Arceri 
Reviewed-by: Samuel Iglesias Gonsálvez 
---
 src/glsl/ast.h  | 8 
 src/glsl/ast_to_hir.cpp | 3 ++-
 2 files changed, 10 insertions(+), 1 deletion(-)

diff --git a/src/glsl/ast.h b/src/glsl/ast.h
index d8c6cea..ab94cb2 100644
--- a/src/glsl/ast.h
+++ b/src/glsl/ast.h
@@ -338,6 +338,14 @@ public:
   array_dimensions.push_tail(&dim->link);
}
 
+   bool is_single_dimension()
+   {
+  return (this->is_unsized_array && this->array_dimensions.is_empty()) ||
+ (!this->is_unsized_array &&
+  this->array_dimensions.tail_pred->prev != NULL &&
+  this->array_dimensions.tail_pred->prev->is_head_sentinel());
+   }
+
virtual void print(void) const;
 
/* If true, this means that the array has an unsized outermost dimension. */
diff --git a/src/glsl/ast_to_hir.cpp b/src/glsl/ast_to_hir.cpp
index 06cd6a5..5ee02ed 100644
--- a/src/glsl/ast_to_hir.cpp
+++ b/src/glsl/ast_to_hir.cpp
@@ -5962,7 +5962,8 @@ ast_interface_block::hir(exec_list *instructions,
  _mesa_shader_stage_to_string(state->stage));
  }
  if (this->instance_name == NULL ||
- strcmp(this->instance_name, "gl_in") != 0 || 
this->array_specifier == NULL) {
+ strcmp(this->instance_name, "gl_in") != 0 || 
this->array_specifier == NULL ||
+ !this->array_specifier->is_single_dimension()) {
 _mesa_glsl_error(&loc, state,
  "gl_PerVertex input must be redeclared as "
  "gl_in[]");
-- 
2.4.3

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[Mesa-dev] [PATCH 03/25] glsl: clean-up link uniform code

2015-08-19 Thread Timothy Arceri
These changes are also needed to allow linking of
struct and interface arrays of arrays.
---
 src/glsl/link_uniforms.cpp | 16 ++--
 1 file changed, 6 insertions(+), 10 deletions(-)

diff --git a/src/glsl/link_uniforms.cpp b/src/glsl/link_uniforms.cpp
index 254086d..42f75e9 100644
--- a/src/glsl/link_uniforms.cpp
+++ b/src/glsl/link_uniforms.cpp
@@ -72,6 +72,7 @@ void
 program_resource_visitor::process(ir_variable *var)
 {
const glsl_type *t = var->type;
+   const glsl_type *t_without_array = var->type->without_array();
const bool row_major =
   var->data.matrix_layout == GLSL_MATRIX_LAYOUT_ROW_MAJOR;
 
@@ -141,12 +142,8 @@ program_resource_visitor::process(ir_variable *var)
   char *name = ralloc_strdup(NULL, var->name);
   recursion(var->type, &name, strlen(name), row_major, NULL, false);
   ralloc_free(name);
-   } else if (t->is_interface()) {
-  char *name = ralloc_strdup(NULL, var->type->name);
-  recursion(var->type, &name, strlen(name), row_major, NULL, false);
-  ralloc_free(name);
-   } else if (t->is_array() && t->fields.array->is_interface()) {
-  char *name = ralloc_strdup(NULL, var->type->fields.array->name);
+   } else if (t_without_array->is_interface()) {
+  char *name = ralloc_strdup(NULL, t_without_array->name);
   recursion(var->type, &name, strlen(name), row_major, NULL, false);
   ralloc_free(name);
} else {
@@ -217,8 +214,8 @@ program_resource_visitor::recursion(const glsl_type *t, 
char **name,
  (*name)[name_length] = '\0';
  this->leave_record(t, *name, row_major);
   }
-   } else if (t->is_array() && (t->fields.array->is_record()
-|| t->fields.array->is_interface())) {
+   } else if (t->without_array()->is_record()
+  || t->without_array()->is_interface()) {
   if (record_type == NULL && t->fields.array->is_record())
  record_type = t->fields.array;
 
@@ -810,8 +807,7 @@ link_update_uniform_buffer_variables(struct gl_shader 
*shader)
 
   if (var->type->is_record()) {
  sentinel = '.';
-  } else if (var->type->is_array()
- && var->type->fields.array->is_record()) {
+  } else if (var->type->without_array()->is_record()) {
  sentinel = '[';
   }
 
-- 
2.4.3

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[Mesa-dev] [PATCH 13/25] nir: wrapper for glsl_type arrays_of_arrays_size()

2015-08-19 Thread Timothy Arceri
Reviewed-by: Tapani Pälli 
---
 src/glsl/nir/nir_types.cpp | 6 ++
 src/glsl/nir/nir_types.h   | 2 ++
 2 files changed, 8 insertions(+)

diff --git a/src/glsl/nir/nir_types.cpp b/src/glsl/nir/nir_types.cpp
index 940c676..da7015b 100644
--- a/src/glsl/nir/nir_types.cpp
+++ b/src/glsl/nir/nir_types.cpp
@@ -106,6 +106,12 @@ glsl_get_length(const struct glsl_type *type)
return type->is_matrix() ? type->matrix_columns : type->length;
 }
 
+unsigned
+glsl_get_aoa_size(const struct glsl_type *type)
+{
+   return type->arrays_of_arrays_size();
+}
+
 const char *
 glsl_get_struct_elem_name(const struct glsl_type *type, unsigned index)
 {
diff --git a/src/glsl/nir/nir_types.h b/src/glsl/nir/nir_types.h
index a8ff8f2..5d16d3a 100644
--- a/src/glsl/nir/nir_types.h
+++ b/src/glsl/nir/nir_types.h
@@ -59,6 +59,8 @@ unsigned glsl_get_matrix_columns(const struct glsl_type 
*type);
 
 unsigned glsl_get_length(const struct glsl_type *type);
 
+unsigned glsl_get_aoa_size(const struct glsl_type *type);
+
 const char *glsl_get_struct_elem_name(const struct glsl_type *type,
   unsigned index);
 
-- 
2.4.3

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[Mesa-dev] [PATCH 05/25] glsl: add support for initialising sampler AoA

2015-08-19 Thread Timothy Arceri
---
 src/glsl/link_uniform_initializers.cpp | 68 --
 1 file changed, 41 insertions(+), 27 deletions(-)

diff --git a/src/glsl/link_uniform_initializers.cpp 
b/src/glsl/link_uniform_initializers.cpp
index 0cc79d9..d6a6ab7 100644
--- a/src/glsl/link_uniform_initializers.cpp
+++ b/src/glsl/link_uniform_initializers.cpp
@@ -101,42 +101,54 @@ copy_constant_to_storage(union gl_constant_value *storage,
 }
 
 void
-set_sampler_binding(gl_shader_program *prog, const char *name, int binding)
+set_sampler_binding(void *mem_ctx, gl_shader_program *prog,
+const glsl_type *type, const char *name, int *binding)
 {
-   struct gl_uniform_storage *const storage =
-  get_storage(prog->UniformStorage, prog->NumUniformStorage, name);
 
-   if (storage == NULL) {
-  assert(storage != NULL);
-  return;
-   }
+   if (type->is_array() && type->fields.array->is_array()) {
+  const glsl_type *const element_type = type->fields.array;
 
-   const unsigned elements = MAX2(storage->array_elements, 1);
+  for (unsigned int i = 0; i < type->length; i++) {
+const char *element_name = ralloc_asprintf(mem_ctx, "%s[%d]", name, i);
 
-   /* Section 4.4.4 (Opaque-Uniform Layout Qualifiers) of the GLSL 4.20 spec
-* says:
-*
-* "If the binding identifier is used with an array, the first element
-* of the array takes the specified unit and each subsequent element
-* takes the next consecutive unit."
-*/
-   for (unsigned int i = 0; i < elements; i++) {
-  storage->storage[i].i = binding + i;
-   }
+set_sampler_binding(mem_ctx, prog, element_type,
+ element_name, binding);
+  }
+   } else {
+  struct gl_uniform_storage *const storage =
+ get_storage(prog->UniformStorage, prog->NumUniformStorage, name);
 
-   for (int sh = 0; sh < MESA_SHADER_STAGES; sh++) {
-  gl_shader *shader = prog->_LinkedShaders[sh];
+  if (storage == NULL) {
+ assert(storage != NULL);
+ return;
+  }
+
+  const unsigned elements = MAX2(storage->array_elements, 1);
+
+  /* Section 4.4.4 (Opaque-Uniform Layout Qualifiers) of the GLSL 4.20 spec
+   * says:
+   *
+   * "If the binding identifier is used with an array, the first 
element
+   * of the array takes the specified unit and each subsequent element
+   * takes the next consecutive unit."
+   */
+  for (unsigned int i = 0; i < elements; i++) {
+ storage->storage[i].i = (*binding)++;
+  }
 
-  if (shader && storage->sampler[sh].active) {
- for (unsigned i = 0; i < elements; i++) {
-unsigned index = storage->sampler[sh].index + i;
+  for (int sh = 0; sh < MESA_SHADER_STAGES; sh++) {
+gl_shader *shader = prog->_LinkedShaders[sh];
 
-shader->SamplerUnits[index] = storage->storage[i].i;
+ if (shader && storage->sampler[sh].active) {
+for (unsigned i = 0; i < elements; i++) {
+   unsigned index = storage->sampler[sh].index + i;
+
+   shader->SamplerUnits[index] = storage->storage[i].i;
+}
  }
   }
+  storage->initialized = true;
}
-
-   storage->initialized = true;
 }
 
 void
@@ -270,7 +282,9 @@ link_set_uniform_initializers(struct gl_shader_program 
*prog,
 const glsl_type *const type = var->type;
 
 if (type->without_array()->is_sampler()) {
-   linker::set_sampler_binding(prog, var->name, var->data.binding);
+   int binding = var->data.binding;
+   linker::set_sampler_binding(mem_ctx, prog, var->type,
+   var->name, &binding);
 } else if (var->is_in_buffer_block()) {
const glsl_type *const iface_type = var->get_interface_type();
 
-- 
2.4.3

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[Mesa-dev] [PATCH 08/25] glsl: validate binding qualifier for AoA

2015-08-19 Thread Timothy Arceri
Reviewed-by: Tapani Pälli 
---
 src/glsl/ast_to_hir.cpp | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/glsl/ast_to_hir.cpp b/src/glsl/ast_to_hir.cpp
index ee5ff9d..54569a8 100644
--- a/src/glsl/ast_to_hir.cpp
+++ b/src/glsl/ast_to_hir.cpp
@@ -2114,7 +2114,7 @@ validate_binding_qualifier(struct _mesa_glsl_parse_state 
*state,
}
 
const struct gl_context *const ctx = state->ctx;
-   unsigned elements = type->is_array() ? type->length : 1;
+   unsigned elements = type->is_array() ? type->arrays_of_arrays_size() : 1;
unsigned max_index = qual->binding + elements - 1;
const glsl_type *base_type = type->without_array();
 
-- 
2.4.3

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[Mesa-dev] [PATCH 18/25] glsl: disable interface block AoA

2015-08-19 Thread Timothy Arceri
Desktop GL supports interface block AoA however AMD and Nvidia
dont support it in their drivers curently so we can get away
with disabling it for now.
---
 src/glsl/ast_to_hir.cpp | 10 ++
 1 file changed, 6 insertions(+), 4 deletions(-)

diff --git a/src/glsl/ast_to_hir.cpp b/src/glsl/ast_to_hir.cpp
index af69ffd..c8e695a 100644
--- a/src/glsl/ast_to_hir.cpp
+++ b/src/glsl/ast_to_hir.cpp
@@ -6225,15 +6225,17 @@ ast_interface_block::hir(exec_list *instructions,
 }
  }
 
-  /* From section 4.3.9 (Interface Blocks) of the GLSL ES 3.10 spec:
+ /* From section 4.3.9 (Interface Blocks) of the GLSL ES 3.10 spec:
   *
   * * Arrays of arrays of blocks are not allowed
   */
- if (state->es_shader && block_array_type->is_array() &&
+ /* FIXME: Desktop GL allows interface AoA */
+ if (block_array_type->is_array() &&
  block_array_type->fields.array->is_array()) {
 _mesa_glsl_error(&loc, state,
- "arrays of arrays interface blocks are "
- "not allowed");
+ "arrays of arrays interface blocks are %s",
+ state->es_shader ? "not allowed" :
+ "not currently supported");
  }
 
  if (this->layout.flags.q.explicit_binding)
-- 
2.4.3

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[Mesa-dev] [PATCH 11/25] glsl: interleave constant propagation and folding

2015-08-19 Thread Timothy Arceri
The constant folding pass can take a long time to complete
so rather than running throught the entire pass each time
a new constant is propagated (and vice versa) interleave them.

This change helps ES31-CTS.arrays_of_arrays.InteractionFunctionCalls1
go from around 2 min -> 23 sec.
---
 src/glsl/opt_constant_propagation.cpp | 46 +--
 1 file changed, 44 insertions(+), 2 deletions(-)

diff --git a/src/glsl/opt_constant_propagation.cpp 
b/src/glsl/opt_constant_propagation.cpp
index 10be8e8..ebe30d9 100644
--- a/src/glsl/opt_constant_propagation.cpp
+++ b/src/glsl/opt_constant_propagation.cpp
@@ -110,6 +110,8 @@ public:
virtual ir_visitor_status visit_enter(class ir_if *);
 
void add_constant(ir_assignment *ir);
+   void constant_folding(ir_rvalue **rvalue);
+   void constant_propagation(ir_rvalue **rvalue);
void kill(ir_variable *ir, unsigned write_mask);
void handle_if_block(exec_list *instructions);
void handle_rvalue(ir_rvalue **rvalue);
@@ -132,8 +134,39 @@ public:
 
 
 void
-ir_constant_propagation_visitor::handle_rvalue(ir_rvalue **rvalue)
-{
+ir_constant_propagation_visitor::constant_folding(ir_rvalue **rvalue) {
+
+   if (*rvalue == NULL || (*rvalue)->ir_type == ir_type_constant)
+  return;
+
+   /* Note that we do rvalue visitoring on leaving.  So if an
+* expression has a non-constant operand, no need to go looking
+* down it to find if it's constant.  This cuts the time of this
+* pass down drastically.
+*/
+   ir_expression *expr = (*rvalue)->as_expression();
+   if (expr) {
+  for (unsigned int i = 0; i < expr->get_num_operands(); i++) {
+if (!expr->operands[i]->as_constant())
+   return;
+  }
+   }
+
+   /* Ditto for swizzles. */
+   ir_swizzle *swiz = (*rvalue)->as_swizzle();
+   if (swiz && !swiz->val->as_constant())
+  return;
+
+   ir_constant *constant = (*rvalue)->constant_expression_value();
+   if (constant) {
+  *rvalue = constant;
+  this->progress = true;
+   }
+}
+
+void
+ir_constant_propagation_visitor::constant_propagation(ir_rvalue **rvalue) {
+
if (this->in_assignee || !*rvalue)
   return;
 
@@ -216,6 +249,13 @@ ir_constant_propagation_visitor::handle_rvalue(ir_rvalue 
**rvalue)
this->progress = true;
 }
 
+void
+ir_constant_propagation_visitor::handle_rvalue(ir_rvalue **rvalue)
+{
+   constant_propagation(rvalue);
+   constant_folding(rvalue);
+}
+
 ir_visitor_status
 ir_constant_propagation_visitor::visit_enter(ir_function_signature *ir)
 {
@@ -243,6 +283,8 @@ 
ir_constant_propagation_visitor::visit_enter(ir_function_signature *ir)
 ir_visitor_status
 ir_constant_propagation_visitor::visit_leave(ir_assignment *ir)
 {
+  constant_folding(&ir->rhs);
+
if (this->in_assignee)
   return visit_continue;
 
-- 
2.4.3

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