[llvm-commits] [llvm] r45696 - in /llvm/trunk/include/llvm/Target: TargetInstrDesc.h TargetInstrInfo.h
Author: lattner
Date: Mon Jan 7 01:33:08 2008
New Revision: 45696
URL: http://llvm.org/viewvc/llvm-project?rev=45696&view=rev
Log:
split TargetInstrDesc out into its own header file.
Added:
llvm/trunk/include/llvm/Target/TargetInstrDesc.h
Modified:
llvm/trunk/include/llvm/Target/TargetInstrInfo.h
Added: llvm/trunk/include/llvm/Target/TargetInstrDesc.h
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetInstrDesc.h?rev=45696&view=auto
==
--- llvm/trunk/include/llvm/Target/TargetInstrDesc.h (added)
+++ llvm/trunk/include/llvm/Target/TargetInstrDesc.h Mon Jan 7 01:33:08 2008
@@ -0,0 +1,414 @@
+//===-- llvm/Target/TargetInstrDesc.h - Instruction Descriptors -*- C++
-*-===//
+//
+// The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===--===//
+//
+// This file defines the TargetOperandInfo and TargetInstrDesc classes, which
+// are used to describe target instructions and their operands.
+//
+//===--===//
+
+#ifndef LLVM_TARGET_TARGETINSTRDESC_H
+#define LLVM_TARGET_TARGETINSTRDESC_H
+
+#include
+
+namespace llvm {
+
+//===--===//
+// Machine Operand Flags and Description
+//===--===//
+
+namespace TOI {
+ // Operand constraints: only "tied_to" for now.
+ enum OperandConstraint {
+TIED_TO = 0 // Must be allocated the same register as.
+ };
+
+ /// OperandFlags - These are flags set on operands, but should be considered
+ /// private, all access should go through the TargetOperandInfo accessors.
+ /// See the accessors for a description of what these are.
+ enum OperandFlags {
+LookupPtrRegClass = 0,
+Predicate,
+OptionalDef
+ };
+}
+
+/// TargetOperandInfo - This holds information about one operand of a machine
+/// instruction, indicating the register class for register operands, etc.
+///
+class TargetOperandInfo {
+public:
+ /// RegClass - This specifies the register class enumeration of the operand
+ /// if the operand is a register. If not, this contains 0.
+ unsigned short RegClass;
+ unsigned short Flags;
+ /// Lower 16 bits are used to specify which constraints are set. The higher
16
+ /// bits are used to specify the value of constraints (4 bits each).
+ unsigned int Constraints;
+ /// Currently no other information.
+
+ /// isLookupPtrRegClass - Set if this operand is a pointer value and it
+ /// requires a callback to look up its register class.
+ bool isLookupPtrRegClass() const { return Flags&(1
<> Pos) & 0xf;
+}
+return -1;
+ }
+
+ /// findTiedToSrcOperand - Returns the operand that is tied to the specified
+ /// dest operand. Returns -1 if there isn't one.
+ int findTiedToSrcOperand(unsigned OpNum) const;
+
+ /// getOpcode - Return the opcode number for this descriptor.
+ unsigned getOpcode() const {
+return Opcode;
+ }
+
+ /// getName - Return the name of the record in the .td file for this
+ /// instruction, for example "ADD8ri".
+ const char *getName() const {
+return Name;
+ }
+
+ /// getNumOperands - Return the number of declared MachineOperands for this
+ /// MachineInstruction. Note that variadic (isVariadic() returns true)
+ /// instructions may have additional operands at the end of the list, and
note
+ /// that the machine instruction may include implicit register def/uses as
+ /// well.
+ unsigned getNumOperands() const {
+return NumOperands;
+ }
+
+ /// getNumDefs - Return the number of MachineOperands that are register
+ /// definitions. Register definitions always occur at the start of the
+ /// machine operand list. This is the number of "outs" in the .td file.
+ unsigned getNumDefs() const {
+return NumDefs;
+ }
+
+ /// isVariadic - Return true if this instruction can have a variable number
of
+ /// operands. In this case, the variable operands will be after the normal
+ /// operands but before the implicit definitions and uses (if any are
+ /// present).
+ bool isVariadic() const {
+return Flags & (1 << TID::Variadic);
+ }
+
+ /// hasOptionalDef - Set if this instruction has an optional definition, e.g.
+ /// ARM instructions which can set condition code if 's' bit is set.
+ bool hasOptionalDef() const {
+return Flags & (1 << TID::HasOptionalDef);
+ }
+
+ /// getImplicitUses - Return a list of machine operands that are potentially
+ /// read by any instance of this machine instruction. For example, on X86,
+ /// the "adc" instruction adds two register operands and adds the carry bit
in
+ /// from the flags register. In this case, t
[llvm-commits] [llvm] r45697 - in /llvm/trunk/lib/CodeGen: MachineBasicBlock.cpp MachineInstr.cpp MachineModuleInfo.cpp
Author: lattner Date: Mon Jan 7 01:42:25 2008 New Revision: 45697 URL: http://llvm.org/viewvc/llvm-project?rev=45697&view=rev Log: remove #includage Modified: llvm/trunk/lib/CodeGen/MachineBasicBlock.cpp llvm/trunk/lib/CodeGen/MachineInstr.cpp llvm/trunk/lib/CodeGen/MachineModuleInfo.cpp Modified: llvm/trunk/lib/CodeGen/MachineBasicBlock.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineBasicBlock.cpp?rev=45697&r1=45696&r2=45697&view=diff == --- llvm/trunk/lib/CodeGen/MachineBasicBlock.cpp (original) +++ llvm/trunk/lib/CodeGen/MachineBasicBlock.cpp Mon Jan 7 01:42:25 2008 @@ -16,7 +16,7 @@ #include "llvm/CodeGen/MachineFunction.h" #include "llvm/Target/MRegisterInfo.h" #include "llvm/Target/TargetData.h" -#include "llvm/Target/TargetInstrInfo.h" +#include "llvm/Target/TargetInstrDesc.h" #include "llvm/Target/TargetMachine.h" #include "llvm/Support/LeakDetector.h" #include Modified: llvm/trunk/lib/CodeGen/MachineInstr.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineInstr.cpp?rev=45697&r1=45696&r2=45697&view=diff == --- llvm/trunk/lib/CodeGen/MachineInstr.cpp (original) +++ llvm/trunk/lib/CodeGen/MachineInstr.cpp Mon Jan 7 01:42:25 2008 @@ -16,7 +16,7 @@ #include "llvm/CodeGen/MachineFunction.h" #include "llvm/CodeGen/MachineRegisterInfo.h" #include "llvm/Target/TargetMachine.h" -#include "llvm/Target/TargetInstrInfo.h" +#include "llvm/Target/TargetInstrDesc.h" #include "llvm/Target/MRegisterInfo.h" #include "llvm/Support/LeakDetector.h" #include "llvm/Support/Streams.h" Modified: llvm/trunk/lib/CodeGen/MachineModuleInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineModuleInfo.cpp?rev=45697&r1=45696&r2=45697&view=diff == --- llvm/trunk/lib/CodeGen/MachineModuleInfo.cpp (original) +++ llvm/trunk/lib/CodeGen/MachineModuleInfo.cpp Mon Jan 7 01:42:25 2008 @@ -1875,9 +1875,6 @@ // Get machine module info. MachineModuleInfo *MMI = getAnalysisToUpdate(); if (!MMI) return false; - // Get target instruction info. - const TargetInstrInfo *TII = MF.getTarget().getInstrInfo(); - if (!TII) return false; // Track if change is made. bool MadeChange = false; ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] [llvm] r45698 - /llvm/trunk/lib/Target/README.txt
Author: lattner Date: Mon Jan 7 01:46:23 2008 New Revision: 45698 URL: http://llvm.org/viewvc/llvm-project?rev=45698&view=rev Log: add a note Modified: llvm/trunk/lib/Target/README.txt Modified: llvm/trunk/lib/Target/README.txt URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/README.txt?rev=45698&r1=45697&r2=45698&view=diff == --- llvm/trunk/lib/Target/README.txt (original) +++ llvm/trunk/lib/Target/README.txt Mon Jan 7 01:46:23 2008 @@ -2,6 +2,13 @@ //===-===// +We should make the various target's "IMPLICIT_DEF" instructions be a single +target-independent opcode like TargetInstrInfo::INLINEASM. This would allow +us to eliminate the TargetInstrDesc::isImplicitDef() method, and would allow +us to avoid having to define this for every target for every register class. + +//===-===// + With the recent changes to make the implicit def/use set explicit in machineinstrs, we should change the target descriptions for 'call' instructions so that the .td files don't list all the call-clobbered registers as implicit ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
Re: [llvm-commits] [llvm] r45626 - /llvm/trunk/lib/Target/X86/X86InstrInfo.cpp
On Jan 6, 2008, at 10:20 PM, Chris Lattner wrote: > On Jan 6, 2008, at 6:45 PM, Evan Cheng wrote: > >> By the way. This check is still not quite right. >> >> // Loads from stubs of global addresses are side effect free. >> if (Reg != 0 && MRegisterInfo::isVirtualRegister(Reg) && >> >> In dynamic-no-pic mode, Reg can be 0. So it should be Reg == 0 || ... > > Why is this code even looking at that operand? > Um...because it was given to me in the feedback for my patch. :-) Actually on thinking about it now, it shouldn't matter. I'll remove it. -bw ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] [llvm] r45699 - /llvm/trunk/lib/Target/X86/X86InstrInfo.cpp
Author: void
Date: Mon Jan 7 02:05:29 2008
New Revision: 45699
URL: http://llvm.org/viewvc/llvm-project?rev=45699&view=rev
Log:
Operand 1 should be a register. We don't care if it's a preg, vreg, or 0.
Modified:
llvm/trunk/lib/Target/X86/X86InstrInfo.cpp
Modified: llvm/trunk/lib/Target/X86/X86InstrInfo.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrInfo.cpp?rev=45699&r1=45698&r2=45699&view=diff
==
--- llvm/trunk/lib/Target/X86/X86InstrInfo.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86InstrInfo.cpp Mon Jan 7 02:05:29 2008
@@ -771,19 +771,15 @@
switch (MI->getOpcode()) {
default: break;
case X86::MOV32rm:
-if (MI->getOperand(1).isRegister()) {
- unsigned Reg = MI->getOperand(1).getReg();
- const X86Subtarget &ST = TM.getSubtarget();
-
- // Loads from stubs of global addresses are side effect free.
- if (Reg != 0 && MRegisterInfo::isVirtualRegister(Reg) &&
- MI->getOperand(2).isImm() && MI->getOperand(3).isReg() &&
- MI->getOperand(4).isGlobal() &&
- ST.GVRequiresExtraLoad(MI->getOperand(4).getGlobal(), TM, false) &&
- MI->getOperand(2).getImm() == 1 &&
- MI->getOperand(3).getReg() == 0)
-return true;
-}
+// Loads from stubs of global addresses are side effect free.
+if (MI->getOperand(1).isReg() &&
+MI->getOperand(2).isImm() && MI->getOperand(3).isReg() &&
+MI->getOperand(4).isGlobal() &&
+TM.getSubtarget().GVRequiresExtraLoad
+ (MI->getOperand(4).getGlobal(), TM, false) &&
+MI->getOperand(2).getImm() == 1 &&
+MI->getOperand(3).getReg() == 0)
+ return true;
// FALLTHROUGH
case X86::MOV8rm:
case X86::MOV16rm:
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Re: [llvm-commits] [llvm] r45676 - in /llvm/trunk: include/llvm/CallingConv.h include/llvm/CodeGen/LinkAllCodegenComponents.h lib/CodeGen/OcamlCollector.cpp test/CodeGen/Generic/GC/frame_size.ll test/
On 2008-01-06, at 21:31, Gordon Henriksen wrote: > Author: gordon > Date: Sun Jan 6 20:31:11 2008 > New Revision: 45676 > > URL: http://llvm.org/viewvc/llvm-project?rev=45676&view=rev > Log: > Setting GlobalDirective in TargetAsmInfo by default rather than > providing a misleading facility. It's used once in the MIPS backend > and hardcoded as "\t.globl\t" everywhere else. > > Added: >llvm/trunk/lib/CodeGen/OcamlCollector.cpp >llvm/trunk/test/CodeGen/Generic/GC/frame_size.ll >llvm/trunk/test/CodeGen/Generic/GC/simple_ocaml.ll > Modified: >llvm/trunk/include/llvm/CallingConv.h >llvm/trunk/include/llvm/CodeGen/LinkAllCodegenComponents.h Oops. Here's the correct message for this commit: The new OcamlCollector emits the Ocaml frametable data structure and related symbols. Example output: $ llvm-as -o simple_ocaml.bc simple_ocaml.ll $ llc -gc=ocaml -asm-verbose -o - simple_ocaml.bc .text _camlSimple_ocaml__code_begin: .data _camlSimple_ocaml__data_begin: .text .align 4,0x90 .globl _fun _fun: subl$12, %esp movl$0, 4(%esp) movl$0, 8(%esp) movl16(%esp), %eax movl%eax, 4(%esp) LBB1_1: # bb.loop movl4(%esp), %eax movl4(%eax), %eax testl %eax, %eax je LBB1_1 # bb.loop LBB1_2: # bb.end movl$8, (%esp) callL_malloc$stub Llabel1: movl%eax, 8(%esp) movl4(%esp), %ecx movl%ecx, 4(%ecx) addl$12, %esp ret .section __IMPORT,__jump_table,symbol_stubs,self_modifying_code +pure_instructions,5 L_malloc$stub: .indirect_symbol _malloc hlt ; hlt ; hlt ; hlt ; hlt .subsections_via_symbols .text _camlSimple_ocaml__code_end: .data _camlSimple_ocaml__data_end: .long 0 _camlSimple_ocaml__frametable: # live roots for fun .long Llabel1 # call return address .short 0xc # stack frame size .short 0x2 # live root count .word 4 # stack offset .word 8 # stack offset .align 2 — Gordon > Modified: llvm/trunk/include/llvm/CallingConv.h > URL: > http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CallingConv.h?rev=45676&r1=45675&r2=45676&view=diff > > = > = > = > = > = > = > = > = > == > --- llvm/trunk/include/llvm/CallingConv.h (original) > +++ llvm/trunk/include/llvm/CallingConv.h Sun Jan 6 20:31:11 2008 > @@ -57,7 +57,12 @@ > /// X86_FastCall - 'fast' analog of X86_StdCall. Passes first > two arguments > /// in ECX:EDX registers, others - via stack. Callee is > responsible for > /// stack cleaning. > -X86_FastCall = 65 > +X86_FastCall = 65, > + > +/// X86_Ocaml - This is a weird ABI used by Objective Caml. > Formally, it > +/// supports only one to six integer/address arguments, all in- > reg. It also > +/// supports tail call emission. > +X86_Ocaml = 66 > }; > } // End CallingConv namespace > > > Modified: llvm/trunk/include/llvm/CodeGen/LinkAllCodegenComponents.h > URL: > http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/LinkAllCodegenComponents.h?rev=45676&r1=45675&r2=45676&view=diff > > = > = > = > = > = > = > = > = > == > --- llvm/trunk/include/llvm/CodeGen/LinkAllCodegenComponents.h > (original) > +++ llvm/trunk/include/llvm/CodeGen/LinkAllCodegenComponents.h Sun > Jan 6 20:31:11 2008 > @@ -36,6 +36,7 @@ > > (void) llvm::createSimpleRegisterCoalescer(); > > + (void) llvm::createOcamlCollector(); > (void) llvm::createShadowStackCollector(); > > (void) llvm::createBURRListDAGScheduler(NULL, NULL, NULL); > > Added: llvm/trunk/lib/CodeGen/OcamlCollector.cpp > URL: > http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/OcamlCollector.cpp?rev=45676&view=auto > > = > = > = > = > = > = > = > = > == > --- llvm/trunk/lib/CodeGen/OcamlCollector.cpp (added) > +++ llvm/trunk/lib/CodeGen/OcamlCollector.cpp Sun Jan 6 20:31:11 2008 > @@ -0,0 +1,177 @@ > +//===-- OcamlCollector.cpp - Ocaml frametable emitter > -===// > +// > +// The LLVM Compiler Infrastructure > +// > +// This file is distributed under the University of Illinois Open > Source > +// License. See LICENSE.TXT for details. > +// > +// > = > = > = > --= > ==// > +// > +// This file implements lowering for the llvm.gc* intrinsics > compatible with > +// Objective Caml 3.10.0, which uses a liveness-accurate static > stack map. > +// > +// > = > = > = > --
[llvm-commits] [llvm] r45700 - in /llvm/trunk/lib/CodeGen: OcamlCollector.cpp ShadowStackCollector.cpp
Author: gordon Date: Mon Jan 7 07:30:38 2008 New Revision: 45700 URL: http://llvm.org/viewvc/llvm-project?rev=45700&view=rev Log: Pruning includes. Modified: llvm/trunk/lib/CodeGen/OcamlCollector.cpp llvm/trunk/lib/CodeGen/ShadowStackCollector.cpp Modified: llvm/trunk/lib/CodeGen/OcamlCollector.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/OcamlCollector.cpp?rev=45700&r1=45699&r2=45700&view=diff == --- llvm/trunk/lib/CodeGen/OcamlCollector.cpp (original) +++ llvm/trunk/lib/CodeGen/OcamlCollector.cpp Mon Jan 7 07:30:38 2008 @@ -13,18 +13,12 @@ //===--===// #include "llvm/CodeGen/Collectors.h" -#include "llvm/ADT/DenseMap.h" #include "llvm/CodeGen/AsmPrinter.h" #include "llvm/CodeGen/Collector.h" -#include "llvm/CodeGen/CollectorMetadata.h" -#include "llvm/Function.h" #include "llvm/Module.h" -#include "llvm/PassManager.h" -#include "llvm/Support/Compiler.h" #include "llvm/Target/TargetAsmInfo.h" #include "llvm/Target/TargetData.h" #include "llvm/Target/TargetMachine.h" -#include using namespace llvm; Modified: llvm/trunk/lib/CodeGen/ShadowStackCollector.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/ShadowStackCollector.cpp?rev=45700&r1=45699&r2=45700&view=diff == --- llvm/trunk/lib/CodeGen/ShadowStackCollector.cpp (original) +++ llvm/trunk/lib/CodeGen/ShadowStackCollector.cpp Mon Jan 7 07:30:38 2008 @@ -27,19 +27,11 @@ #define DEBUG_TYPE "shadowstackgc" #include "llvm/CodeGen/Collectors.h" -#include "llvm/ADT/SmallVector.h" #include "llvm/ADT/StringExtras.h" #include "llvm/CodeGen/Collector.h" -#include "llvm/Constants.h" -#include "llvm/DerivedTypes.h" -#include "llvm/Instructions.h" #include "llvm/IntrinsicInst.h" #include "llvm/Module.h" -#include "llvm/Pass.h" -#include "llvm/Support/Compiler.h" #include "llvm/Support/LLVMBuilder.h" -#include "llvm/Analysis/Verifier.h" -#include using namespace llvm; ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] [llvm] r45701 - /llvm/trunk/lib/Target/X86/X86CallingConv.td
Author: baldrick Date: Mon Jan 7 07:44:22 2008 New Revision: 45701 URL: http://llvm.org/viewvc/llvm-project?rev=45701&view=rev Log: Fix long double support on x86-32 linux. Modified: llvm/trunk/lib/Target/X86/X86CallingConv.td Modified: llvm/trunk/lib/Target/X86/X86CallingConv.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86CallingConv.td?rev=45701&r1=45700&r2=45701&view=diff == --- llvm/trunk/lib/Target/X86/X86CallingConv.td (original) +++ llvm/trunk/lib/Target/X86/X86CallingConv.td Mon Jan 7 07:44:22 2008 @@ -183,7 +183,7 @@ // Long doubles get slots whose size and alignment depends on the // subtarget. - CCIfType<[f80], CCAssignToStack<16, 4>>, + CCIfType<[f80], CCAssignToStack<0, 0>>, // The first 4 vector arguments are passed in XMM registers. CCIfType<[v16i8, v8i16, v4i32, v2i64, v4f32, v2f64], ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] [test-suite] r45702 - /test-suite/trunk/SingleSource/Regression/C/2008-01-07-LongDouble.c
Author: baldrick
Date: Mon Jan 7 08:49:30 2008
New Revision: 45702
URL: http://llvm.org/viewvc/llvm-project?rev=45702&view=rev
Log:
Check implementation of the x86 long double ABI.
Added:
test-suite/trunk/SingleSource/Regression/C/2008-01-07-LongDouble.c
Added: test-suite/trunk/SingleSource/Regression/C/2008-01-07-LongDouble.c
URL:
http://llvm.org/viewvc/llvm-project/test-suite/trunk/SingleSource/Regression/C/2008-01-07-LongDouble.c?rev=45702&view=auto
==
--- test-suite/trunk/SingleSource/Regression/C/2008-01-07-LongDouble.c (added)
+++ test-suite/trunk/SingleSource/Regression/C/2008-01-07-LongDouble.c Mon Jan
7 08:49:30 2008
@@ -0,0 +1,6 @@
+#include
+int main(void) {
+ long double x = 1.0;
+ printf("%Lf %Lf\n", x, x);
+ return 0;
+}
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[llvm-commits] Patch for compiling with Mingw/Cygwin
Hello, The attached patch makes it possible to compile LLVM under Mingw/Cygwin (that is, with "gcc -mno-cygwin" under Cygwin). The only problem which I could not address with configure flags is that the tblgen tool expect Windows paths, whereas the build system uses Cygwin paths. The patch introduce a Gnu Make function SYSPATH which performs the translation if needed. Ideally, the SYSPATH variable in Makefile.config should be set by the configure script when given a special option (the same option could also set the other needed options -- see below). As I didn't want to play with autoconf, the current solution requires an explicit argument to be passed to make for the compilation. With the patch, I was able to compile with the following commands: ./configure --build=i686-pc-mingw32 CC="gcc -mno-cygwin" CXX="g++ -mno-cygwin" ac_cv_search_dlopen=no ac_cv_lib_dl_dlopen=no make USE_CYGPATH=1 Alain Index: Makefile.config.in === --- Makefile.config.in (revision 45701) +++ Makefile.config.in (working copy) @@ -265,3 +265,10 @@ ALL_BINDINGS := @ALL_BINDINGS@ OCAML_LIBDIR := @OCAML_LIBDIR@ +USE_CYGPATH := false + +ifeq ($(USE_CYGPATH), true) + SYSPATH := $(shell echo $(1) | cygpath -m -f -) +else + SYSPATH := $(1) +endif Index: lib/VMCore/Makefile === --- lib/VMCore/Makefile (revision 45701) +++ lib/VMCore/Makefile (working copy) @@ -21,7 +21,7 @@ $(ObjDir)/Intrinsics.gen.tmp: $(ObjDir)/.dir $(INTRINSICTDS) $(TBLGEN) $(Echo) Building Intrinsics.gen.tmp from Intrinsics.td - $(Verb) $(TableGen) $(INTRINSICTD) -o $@ -gen-intrinsic + $(Verb) $(TableGen) $(call SYSPATH, $(INTRINSICTD)) -o $(call SYSPATH, $@) -gen-intrinsic $(GENFILE): $(ObjDir)/Intrinsics.gen.tmp $(Verb) $(CMP) -s $@ $< || ( $(CP) $< $@ && \ Index: Makefile.rules === --- Makefile.rules (revision 45701) +++ Makefile.rules (working copy) @@ -483,8 +483,9 @@ ProgInstall = $(INSTALL) $(Install.StripFlag) -m 0755 ScriptInstall = $(INSTALL) -m 0755 DataInstall = $(INSTALL) -m 0644 -TableGen = $(TBLGEN) -I $(PROJ_SRC_DIR) -I$(PROJ_SRC_ROOT)/include \ --I $(PROJ_SRC_ROOT)/lib/Target +TableGen = $(TBLGEN) -I $(call SYSPATH, $(PROJ_SRC_DIR)) \ +-I $(call SYSPATH, $(PROJ_SRC_ROOT)/include) \ +-I $(call SYSPATH, $(PROJ_SRC_ROOT)/lib/Target) Archive = $(AR) $(AR.Flags) LArchive = $(LLVMToolDir)/llvm-ar rcsf ifdef RANLIB @@ -1248,57 +1249,57 @@ $(TARGET:%=$(ObjDir)/%GenRegisterNames.inc.tmp): \ $(ObjDir)/%GenRegisterNames.inc.tmp : %.td $(ObjDir)/.dir $(Echo) "Building $(___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] [llvm] r45703 - /llvm/trunk/lib/Target/X86/X86CallingConv.td
Author: baldrick Date: Mon Jan 7 10:36:38 2008 New Revision: 45703 URL: http://llvm.org/viewvc/llvm-project?rev=45703&view=rev Log: Unbreak x86-32 darwin long double! Modified: llvm/trunk/lib/Target/X86/X86CallingConv.td Modified: llvm/trunk/lib/Target/X86/X86CallingConv.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86CallingConv.td?rev=45703&r1=45702&r2=45703&view=diff == --- llvm/trunk/lib/Target/X86/X86CallingConv.td (original) +++ llvm/trunk/lib/Target/X86/X86CallingConv.td Mon Jan 7 10:36:38 2008 @@ -181,9 +181,8 @@ // Doubles get 8-byte slots that are 4-byte aligned. CCIfType<[f64], CCAssignToStack<8, 4>>, - // Long doubles get slots whose size and alignment depends on the - // subtarget. - CCIfType<[f80], CCAssignToStack<0, 0>>, + // Long doubles get slots whose size depends on the subtarget. + CCIfType<[f80], CCAssignToStack<0, 4>>, // The first 4 vector arguments are passed in XMM registers. CCIfType<[v16i8, v8i16, v4i32, v2i64, v4f32, v2f64], ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] [llvm] r45575 - in /llvm/trunk: include/llvm/CodeGen/MachineRelocation.h include/llvm/Target/TargetJITInfo.h lib/ExecutionEngine/JIT/JITEmitter.cpp lib/Target/X86/X86CodeEmitter.cpp lib
Author: evancheng
Date: Fri Jan 4 04:46:51 2008
New Revision: 45575
URL: http://llvm.org/viewvc/llvm-project?rev=45575&view=rev
Log:
X86 PIC JIT support fixes: encoding bugs, add lazy pointer stubs support.
Modified:
llvm/trunk/include/llvm/CodeGen/MachineRelocation.h
llvm/trunk/include/llvm/Target/TargetJITInfo.h
llvm/trunk/lib/ExecutionEngine/JIT/JITEmitter.cpp
llvm/trunk/lib/Target/X86/X86CodeEmitter.cpp
llvm/trunk/lib/Target/X86/X86JITInfo.cpp
llvm/trunk/lib/Target/X86/X86JITInfo.h
Modified: llvm/trunk/include/llvm/CodeGen/MachineRelocation.h
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/MachineRelocation.h?rev=45575&r1=45574&r2=45575&view=diff
==
--- llvm/trunk/include/llvm/CodeGen/MachineRelocation.h (original)
+++ llvm/trunk/include/llvm/CodeGen/MachineRelocation.h Fri Jan 4 04:46:51 2008
@@ -39,6 +39,7 @@
enum AddressType {
isResult, // Relocation has be transformed into its result pointer.
isGV, // The Target.GV field is valid.
+isGVLazyPtr, // Relocation of a lazily resolved GV address.
isBB, // Relocation of BB address.
isExtSym, // The Target.ExtSym field is valid.
isConstPool, // Relocation of constant pool address.
@@ -55,7 +56,7 @@
union {
void *Result; // If this has been resolved to a resolved pointer
-GlobalValue *GV;// If this is a pointer to an LLVM global
+GlobalValue *GV;// If this is a pointer to a GV or a GV lazy ptr
MachineBasicBlock *MBB; // If this is a pointer to a LLVM BB
const char *ExtSym; // If this is a pointer to a named symbol
unsigned Index; // Constant pool / jump table index
@@ -93,6 +94,25 @@
return Result;
}
+ /// MachineRelocation::getGVLazyPtr - Return a relocation entry for a
+ /// lazily resolved GlobalValue address.
+ static MachineRelocation getGVLazyPtr(intptr_t offset,
+ unsigned RelocationType,
+ GlobalValue *GV, intptr_t cst = 0,
+ bool NeedStub = 0,
+ bool GOTrelative = 0) {
+assert((RelocationType & ~63) == 0 && "Relocation type too large!");
+MachineRelocation Result;
+Result.Offset = offset;
+Result.ConstantVal = cst;
+Result.TargetReloType = RelocationType;
+Result.AddrType = isGVLazyPtr;
+Result.NeedStub = NeedStub;
+Result.GOTRelative = GOTrelative;
+Result.Target.GV = GV;
+return Result;
+ }
+
/// MachineRelocation::getBB - Return a relocation entry for a BB.
///
static MachineRelocation getBB(intptr_t offset,unsigned RelocationType,
@@ -193,6 +213,12 @@
return AddrType == isGV;
}
+ /// isGlobalValueVLazyPtr - Return true if this relocation is the address
+ /// of a lazily resolved GlobalValue.
+ bool isGlobalValueLazyPtr() const {
+return AddrType == isGVLazyPtr;
+ }
+
/// isBasicBlock - Return true if this relocation is a basic block reference.
///
bool isBasicBlock() const {
@@ -234,7 +260,8 @@
/// getGlobalValue - If this is a global value reference, return the
/// referenced global.
GlobalValue *getGlobalValue() const {
-assert(isGlobalValue() && "This is not a global value reference!");
+assert((isGlobalValue() || isGlobalValueLazyPtr()) &&
+ "This is not a global value reference!");
return Target.GV;
}
Modified: llvm/trunk/include/llvm/Target/TargetJITInfo.h
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetJITInfo.h?rev=45575&r1=45574&r2=45575&view=diff
==
--- llvm/trunk/include/llvm/Target/TargetJITInfo.h (original)
+++ llvm/trunk/include/llvm/Target/TargetJITInfo.h Fri Jan 4 04:46:51 2008
@@ -40,6 +40,13 @@
///
virtual void replaceMachineCodeForFunction(void *Old, void *New) = 0;
+/// emitGlobalValueLazyPtr - Use the specified MachineCodeEmitter object to
+/// emit a lazy pointer which contains the address of the specified GV.
+virtual void *emitGlobalValueLazyPtr(void *GV, MachineCodeEmitter &MCE) {
+ assert(0 && "This target doesn't implement emitGlobalValueLazyPtr!");
+ return 0;
+}
+
/// emitFunctionStub - Use the specified MachineCodeEmitter object to emit
a
/// small native function that simply calls the function at the specified
/// address. Return the address of the resultant function.
Modified: llvm/trunk/lib/ExecutionEngine/JIT/JITEmitter.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/ExecutionEngine/JIT/JITEmitter.cpp?rev=45575&r1=45574&r2=45575&view=diff
==
--- llvm/trunk/lib/ExecutionEngine/JIT/JITEmitter.cpp (original)
+++ llvm/trunk/lib/Execu
[llvm-commits] [llvm] r45576 - /llvm/trunk/lib/Target/X86/X86CodeEmitter.cpp
Author: evancheng
Date: Fri Jan 4 04:50:28 2008
New Revision: 45576
URL: http://llvm.org/viewvc/llvm-project?rev=45576&view=rev
Log:
Unbreak tailcall opt in JIT.
Modified:
llvm/trunk/lib/Target/X86/X86CodeEmitter.cpp
Modified: llvm/trunk/lib/Target/X86/X86CodeEmitter.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86CodeEmitter.cpp?rev=45576&r1=45575&r2=45576&view=diff
==
--- llvm/trunk/lib/Target/X86/X86CodeEmitter.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86CodeEmitter.cpp Fri Jan 4 04:50:28 2008
@@ -619,7 +619,8 @@
if (MO.isMachineBasicBlock()) {
emitPCRelativeBlockAddress(MO.getMBB());
} else if (MO.isGlobalAddress()) {
-bool NeedStub = Is64BitMode && TM.getCodeModel() == CodeModel::Large;
+bool NeedStub = (Is64BitMode && TM.getCodeModel() == CodeModel::Large)
+ || Opcode == X86::TAILJMPd;
emitGlobalAddress(MO.getGlobal(), X86::reloc_pcrel_word,
0, 0, NeedStub);
} else if (MO.isExternalSymbol()) {
___
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[llvm-commits] Suggested patch to the Language Reference: align attribute for load/store
Hello, (Following a discussion on irc.) The attached patch adds to LangRef an explanation for the align attribute on the load/store opeations. -- Alain Index: LangRef.html === --- LangRef.html(revision 45574) +++ LangRef.html(working copy) @@ -2843,6 +2843,16 @@ the number or order of execution of this load with other volatile load and store instructions. + +The optional "align" argument specifies the alignment of the operation +(that is, the alignment of the memory address). A value of 0 or an +omitted "align" argument means that the operation has the preferential +alignment for the target. It is the responsibility of the code emitter +to ensure that the alignment information is correct. Overestimating +the alignment results in an undefined behavior. Underestimating the +alignment may produce less efficient code. An alignment of 1 is always +safe. + Semantics: The location of memory pointed to is loaded. Examples: @@ -2870,6 +2880,16 @@ optimizer is not allowed to modify the number or order of execution of this store with other volatile load and store instructions. + +The optional "align" argument specifies the alignment of the operation +(that is, the alignment of the memory address). A value of 0 or an +omitted "align" argument means that the operation has the preferential +alignment for the target. It is the responsibility of the code emitter +to ensure that the alignment information is correct. Overestimating +the alignment results in an undefined behavior. Underestimating the +alignment may produce less efficient code. An alignment of 1 is always +safe. + Semantics: The contents of memory are updated to contain '' at the location specified by the ' ' operand. ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] [llvm-gcc-4.2] r45577 - /llvm-gcc-4.2/trunk/build_gcc
Author: void Date: Fri Jan 4 05:29:31 2008 New Revision: 45577 URL: http://llvm.org/viewvc/llvm-project?rev=45577&view=rev Log: The cross-compilation executables were built 1-way instead of 2-way. This is because the lipo wasn't getting all of the executables. The gcc build_gcc script had this change in it. Once applied, it now creates the correct 2-way executables. Modified: llvm-gcc-4.2/trunk/build_gcc Modified: llvm-gcc-4.2/trunk/build_gcc URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/build_gcc?rev=45577&r1=45576&r2=45577&view=diff == --- llvm-gcc-4.2/trunk/build_gcc (original) +++ llvm-gcc-4.2/trunk/build_gcc Fri Jan 4 05:29:31 2008 @@ -370,10 +370,10 @@ for t in $TARGETS ; do # APPLE LOCAL LLVM build_gcc bug with non-/usr $DEST_ROOT lipo -output .$DEST_ROOT/bin/$t-apple-darwin$DARWIN_VERS-llvm-gcc-$MAJ_VERS -create \ -$DIR/dst-*-$t/$DEST_ROOT/bin/$t-apple-darwin$DARWIN_VERS-gcc || exit 1 +$DIR/dst-*-$t/$DEST_ROOT/bin/$t-apple-darwin$DARWIN_VERS-gcc-$VERS || exit 1 # APPLE LOCAL LLVM build_gcc bug with non-/usr $DEST_ROOT lipo -output .$DEST_ROOT/bin/$t-apple-darwin$DARWIN_VERS-llvm-g++-$MAJ_VERS -create \ -$DIR/dst-*-$t/$DEST_ROOT/bin/$t-apple-darwin$DARWIN_VERS-g++ || exit 1 +$DIR/dst-*-$t/$DEST_ROOT/bin/$t-apple-darwin$DARWIN_VERS-g++* || exit 1 done # lib ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] [llvm-gcc-4.2] r45578 - /llvm-gcc-4.2/tags/Apple/llvmgcc42-2005/
Author: void Date: Fri Jan 4 05:42:15 2008 New Revision: 45578 URL: http://llvm.org/viewvc/llvm-project?rev=45578&view=rev Log: Creating llvmgcc42-2005 tag Added: llvm-gcc-4.2/tags/Apple/llvmgcc42-2005/ - copied from r45577, llvm-gcc-4.2/trunk/ ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] [llvm] r45579 - /llvm/tags/Apple/llvmCore-2006/
Author: void Date: Fri Jan 4 05:43:32 2008 New Revision: 45579 URL: http://llvm.org/viewvc/llvm-project?rev=45579&view=rev Log: Creating llvmCore-2006 branch Added: llvm/tags/Apple/llvmCore-2006/ - copied from r45578, llvm/trunk/ ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] [llvm] r45580 - /llvm/trunk/bindings/ocaml/Makefile.ocaml
Author: gordon Date: Fri Jan 4 05:55:57 2008 New Revision: 45580 URL: http://llvm.org/viewvc/llvm-project?rev=45580&view=rev Log: Quote a path in the Ocaml makefile which is likely to include spaces on Windows. Modified: llvm/trunk/bindings/ocaml/Makefile.ocaml Modified: llvm/trunk/bindings/ocaml/Makefile.ocaml URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/bindings/ocaml/Makefile.ocaml?rev=45580&r1=45579&r2=45580&view=diff == --- llvm/trunk/bindings/ocaml/Makefile.ocaml (original) +++ llvm/trunk/bindings/ocaml/Makefile.ocaml Fri Jan 4 05:55:57 2008 @@ -20,7 +20,7 @@ include $(LEVEL)/Makefile.config # CFLAGS needs to be set before Makefile.rules is included. -CFLAGS += -I$(shell $(OCAMLC) -where) +CFLAGS += -I"$(shell $(OCAMLC) -where)" include $(LEVEL)/Makefile.common ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] [llvm] r45581 - /llvm/trunk/docs/GetElementPtr.html
Author: void
Date: Fri Jan 4 06:04:32 2008
New Revision: 45581
URL: http://llvm.org/viewvc/llvm-project?rev=45581&view=rev
Log:
doc_code-ify some code in this doc.
Modified:
llvm/trunk/docs/GetElementPtr.html
Modified: llvm/trunk/docs/GetElementPtr.html
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/GetElementPtr.html?rev=45581&r1=45580&r2=45581&view=diff
==
--- llvm/trunk/docs/GetElementPtr.html (original)
+++ llvm/trunk/docs/GetElementPtr.html Fri Jan 4 06:04:32 2008
@@ -53,7 +53,7 @@
When people are first confronted with the GEP instruction, they tend to
relate it to known concepts from other programming paradigms, most notably C
array indexing and field selection. However, GEP is a little different and
- this leads to the following questions, all of which are answered in the
+ this leads to the following questions; all of which are answered in the
following sections.
What is the first index of the GEP instruction?
@@ -74,10 +74,15 @@
The confusion with the first index usually arises from thinking about
the GetElementPtr instruction as if it was a C index operator. They aren't
the
same. For example, when we write, in "C":
-
- AType* Foo;
- ...
- X = &Foo->F;
+
+
+
+AType *Foo;
+...
+X = &Foo->F;
+
+
+
it is natural to think that there is only one index, the selection of the
field F. However, in this example, Foo is a pointer. That
pointer must be indexed explicitly in LLVM. C, on the other hand, indexs
@@ -85,8 +90,13 @@
code, you would provide the GEP instruction with two index operands. The
first operand indexes through the pointer; the second operand indexes the
field F of the structure, just as if you wrote:
-
- X = &Foo[0].F;
+
+
+
+X = &Foo[0].F;
+
+
+
Sometimes this question gets rephrased as:
Why is it okay to index through the first pointer, but
subsequent pointers won't be dereferenced?
@@ -96,19 +106,23 @@
the GEP instruction as an operand without any need for accessing memory. It
must, therefore be indexed and requires an index operand. Consider this
example:
-
- struct munger_struct {
-int f1;
-int f2;
- };
- void munge(struct munger_struct *P)
- {
-P[0].f1 = P[1].f1 + P[2].f2;
- }
- ...
- munger_struct Array[3];
- ...
- munge(Array);
+
+
+
+struct munger_struct {
+ int f1;
+ int f2;
+};
+void munge(struct munger_struct *P) {
+ P[0].f1 = P[1].f1 + P[2].f2;
+}
+...
+munger_struct Array[3];
+...
+munge(Array);
+
+
+
In this "C" example, the front end compiler (llvm-gcc) will generate three
GEP instructions for the three indices through "P" in the assignment
statement. The function argument P will be the first operand of
each
@@ -117,36 +131,50 @@
struct munger_struct type, for either the f1 or
f2 field. So, in LLVM assembly the munge function looks
like:
-
- void %munge(%struct.munger_struct* %P) {
- entry:
-%tmp = getelementptr %struct.munger_struct* %P, i32 1, i32 0
-%tmp = load i32* %tmp
-%tmp6 = getelementptr %struct.munger_struct* %P, i32 2, i32 1
-%tmp7 = load i32* %tmp6
-%tmp8 = add i32 %tmp7, %tmp
-%tmp9 = getelementptr %struct.munger_struct* %P, i32 0, i32 0
-store i32 %tmp8, i32* %tmp9
-ret void
- }
+
+
+
+void %munge(%struct.munger_struct* %P) {
+entry:
+ %tmp = getelementptr %struct.munger_struct* %P, i32 1, i32 0
+ %tmp = load i32* %tmp
+ %tmp6 = getelementptr %struct.munger_struct* %P, i32 2, i32 1
+ %tmp7 = load i32* %tmp6
+ %tmp8 = add i32 %tmp7, %tmp
+ %tmp9 = getelementptr %struct.munger_struct* %P, i32 0, i32 0
+ store i32 %tmp8, i32* %tmp9
+ ret void
+}
+
+
+
In each case the first operand is the pointer through which the GEP
instruction starts. The same is true whether the first operand is an
argument, allocated memory, or a global variable.
To make this clear, let's consider a more obtuse example:
-
- %MyVar = unintialized global i32
- ...
- %idx1 = getelementptr i32* %MyVar, i64 0
- %idx2 = getelementptr i32* %MyVar, i64 1
- %idx3 = getelementptr i32* %MyVar, i64 2
+
+
+
+%MyVar = unintialized global i32
+...
+%idx1 = getelementptr i32* %MyVar, i64 0
+%idx2 = getelementptr i32* %MyVar, i64 1
+%idx3 = getelementptr i32* %MyVar, i64 2
+
+
+
These GEP instructions are simply making address computations from the
base address of MyVar. They compute, as follows (using C syntax):
-
- idx1 = (char*) &MyVar + 0
- idx2 = (char*) &MyVar + 4
- idx3 = (char*) &MyVar + 8
-
+
+
+
+idx1 = (char*) &MyVar + 0
+idx2 = (char*) &MyVar + 4
+idx3 = (char*) &MyVar + 8
+
+
+
Since the type i32 is known to be four bytes long, the indices
0, 1 and 2 translate into memory offsets of 0, 4, and 8, respectively. No
memory is accessed to make these computations because the address of
@@ -168,10 +196,16 @@
Quick answer: there are no superfluous indices.
This que
[llvm-commits] [llvm-gcc-4.2] r45582 - /llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp
Author: baldrick
Date: Fri Jan 4 07:15:13 2008
New Revision: 45582
URL: http://llvm.org/viewvc/llvm-project?rev=45582&view=rev
Log:
Fix PR1386. Accessing, say, an i8 bitfield at
bits 7 .. 8 would crash the compiler because
the bitfield is not entirely contained in an i8!
This could be fixed by loading an i16 instead,
however consider an i64 bitfield at bits 2 .. 65.
It is impossible to load this in one 64 bit load.
If i128 codegen was working we could load it using
an i128, but unfortunately using i128 here crashes
the code generator. So teach load and store to
perform multiple loads and stores if necessary (it
will perform at most two, though the code works for
any number). Also, fix some bogus logic in the
lvalue code which would also cause crashes for
examples of this type. It is important to get this
working because (1) gcc can handle it, and (2) the
Ada front-end won't build without it.
Modified:
llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp
Modified: llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp?rev=45582&r1=45581&r2=45582&view=diff
==
--- llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp (original)
+++ llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp Fri Jan 4 07:15:13 2008
@@ -2126,44 +2126,78 @@
}
} else {
// This is a bitfield reference.
-LoadInst *LI = Builder.CreateLoad(LV.Ptr, isVolatile, "tmp");
-LI->setAlignment(Alignment);
+if (!LV.BitSize)
+ return Constant::getNullValue(Ty);
-Value *Val = LI;
-unsigned ValSizeInBits = Val->getType()->getPrimitiveSizeInBits();
-
-assert(Val->getType()->isInteger() && "Invalid bitfield lvalue!");
+const Type *ValTy = cast(LV.Ptr->getType())->getElementType();
+unsigned ValSizeInBits = ValTy->getPrimitiveSizeInBits();
+
+// The number of loads needed to read the entire bitfield.
+unsigned Strides = 1 + (LV.BitStart + LV.BitSize - 1) / ValSizeInBits;
+
+assert(ValTy->isInteger() && "Invalid bitfield lvalue!");
+assert(ValSizeInBits > LV.BitStart && "Bad bitfield lvalue!");
assert(ValSizeInBits >= LV.BitSize && "Bad bitfield lvalue!");
-assert(ValSizeInBits >= LV.BitSize+LV.BitStart && "Bad bitfield lvalue!");
+assert(2*ValSizeInBits > LV.BitSize+LV.BitStart && "Bad bitfield lvalue!");
-// Mask the bits out by shifting left first, then shifting right. The
-// LLVM optimizer will turn this into an AND if this is an unsigned
-// expression.
-
-// If this target has bitfields laid out in big-endian order, invert the
bit
-// in the word if needed.
-if (BITS_BIG_ENDIAN)
- LV.BitStart = ValSizeInBits-LV.BitStart-LV.BitSize;
-
-if (LV.BitStart+LV.BitSize != ValSizeInBits) {
- Value *ShAmt = ConstantInt::get(Val->getType(),
- ValSizeInBits-(LV.BitStart+LV.BitSize));
- Val = Builder.CreateShl(Val, ShAmt, "tmp");
-}
-
-// Shift right required?
-if (ValSizeInBits-LV.BitSize) {
- Value *ShAmt = ConstantInt::get(Val->getType(),
ValSizeInBits-LV.BitSize);
- if (TYPE_UNSIGNED(TREE_TYPE(exp)))
-Val = Builder.CreateLShr(Val, ShAmt, "tmp");
- else
-Val = Builder.CreateAShr(Val, ShAmt, "tmp");
+Value *Result = NULL;
+
+for (unsigned I = 0; I < Strides; I++) {
+ unsigned Index = BYTES_BIG_ENDIAN ? I : Strides - I - 1; // MSB first
+ unsigned ThisFirstBit = Index * ValSizeInBits;
+ unsigned ThisLastBitPlusOne = ThisFirstBit + ValSizeInBits;
+ if (ThisFirstBit < LV.BitStart)
+ThisFirstBit = LV.BitStart;
+ if (ThisLastBitPlusOne > LV.BitStart+LV.BitSize)
+ThisLastBitPlusOne = LV.BitStart+LV.BitSize;
+
+ Value *Ptr = Index ?
+Builder.CreateGEP(LV.Ptr, ConstantInt::get(Type::Int32Ty, Index),
+ "tmp") : LV.Ptr;
+ LoadInst *LI = Builder.CreateLoad(Ptr, isVolatile, "tmp");
+ LI->setAlignment(Alignment);
+ Value *Val = LI;
+
+ unsigned BitsInVal = ThisLastBitPlusOne - ThisFirstBit;
+ unsigned FirstBitInVal = ThisFirstBit % ValSizeInBits;
+
+ // If this target has bitfields laid out in big-endian order, invert the
bit
+ // in the word if needed.
+ if (BITS_BIG_ENDIAN)
+FirstBitInVal = ValSizeInBits-FirstBitInVal-BitsInVal;
+
+ // Mask the bits out by shifting left first, then shifting right. The
+ // LLVM optimizer will turn this into an AND if this is an unsigned
+ // expression.
+
+ if (FirstBitInVal+BitsInVal != ValSizeInBits) {
+Value *ShAmt = ConstantInt::get(ValTy,
+
ValSizeInBits-(FirstBitInVal+BitsInVal));
+Val = Builder.CreateShl(Val, ShAmt, "tmp");
+ }
+
+ // Shift right required?
+ if (ValSizeInBits != BitsInVal) {
+bool AddSignBits = !TYPE_UNSIGNED(TREE_TYPE(exp)) && !Result;
+
[llvm-commits] [llvm] r45583 - /llvm/trunk/test/CFrontend/2008-01-04-WideBitfield.c
Author: baldrick
Date: Fri Jan 4 07:15:39 2008
New Revision: 45583
URL: http://llvm.org/viewvc/llvm-project?rev=45583&view=rev
Log:
Testcase for PR1386.
Added:
llvm/trunk/test/CFrontend/2008-01-04-WideBitfield.c
Added: llvm/trunk/test/CFrontend/2008-01-04-WideBitfield.c
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CFrontend/2008-01-04-WideBitfield.c?rev=45583&view=auto
==
--- llvm/trunk/test/CFrontend/2008-01-04-WideBitfield.c (added)
+++ llvm/trunk/test/CFrontend/2008-01-04-WideBitfield.c Fri Jan 4 07:15:39 2008
@@ -0,0 +1,13 @@
+// RUN: %llvmgcc -S -o - %s
+// PR1386
+#include
+
+struct X {
+ unsigned char pad : 4;
+ uint64_t a : 64;
+} __attribute__((packed)) x;
+
+uint64_t f(void)
+{
+ return x.a;
+}
___
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[llvm-commits] [test-suite] r45584 - /test-suite/trunk/SingleSource/Regression/C/PR1386.c
Author: baldrick
Date: Fri Jan 4 07:16:17 2008
New Revision: 45584
URL: http://llvm.org/viewvc/llvm-project?rev=45584&view=rev
Log:
Testcase for PR1386.
Added:
test-suite/trunk/SingleSource/Regression/C/PR1386.c
Added: test-suite/trunk/SingleSource/Regression/C/PR1386.c
URL:
http://llvm.org/viewvc/llvm-project/test-suite/trunk/SingleSource/Regression/C/PR1386.c?rev=45584&view=auto
==
--- test-suite/trunk/SingleSource/Regression/C/PR1386.c (added)
+++ test-suite/trunk/SingleSource/Regression/C/PR1386.c Fri Jan 4 07:16:17 2008
@@ -0,0 +1,22 @@
+#include
+#include
+
+struct X {
+ unsigned char pad : 4;
+ uint64_t a : 64;
+ uint64_t b : 60;
+} __attribute__((packed));
+
+int main (void)
+{
+ struct X x;
+ uint64_t bad_bits;
+
+ x.pad = 255;
+ x.a = -1ULL;
+ x.b = -1ULL;
+
+ bad_bits = ((uint64_t)-1ULL) ^ *(1+(uint64_t *) &x);
+ printf("bad bits: %llx\n", bad_bits);
+ return bad_bits != 0;
+}
___
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[llvm-commits] [llvm] r45585 - /llvm/trunk/bindings/ocaml/llvm/llvm.mli
Author: gordon Date: Fri Jan 4 07:21:02 2008 New Revision: 45585 URL: http://llvm.org/viewvc/llvm-project?rev=45585&view=rev Log: Fix a typo in llvm.mli noticed by Alain Frisch. Modified: llvm/trunk/bindings/ocaml/llvm/llvm.mli Modified: llvm/trunk/bindings/ocaml/llvm/llvm.mli URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/bindings/ocaml/llvm/llvm.mli?rev=45585&r1=45584&r2=45585&view=diff == --- llvm/trunk/bindings/ocaml/llvm/llvm.mli (original) +++ llvm/trunk/bindings/ocaml/llvm/llvm.mli Fri Jan 4 07:21:02 2008 @@ -1132,7 +1132,7 @@ external build_store : llvalue -> llvalue -> llbuilder -> llvalue = "llvm_build_store" -(** [build_store p indices name b] creates a +(** [build_gep p indices name b] creates a [%name = gep %p, indices...] instruction at the position specified by the instruction builder [b]. See the method [llvm::LLVMBuilder::CreateGetElementPtr]. **) ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] [llvm-gcc-4.0] r45586 - /llvm-gcc-4.0/trunk/gcc/llvm-convert.cpp
Author: baldrick
Date: Fri Jan 4 08:15:44 2008
New Revision: 45586
URL: http://llvm.org/viewvc/llvm-project?rev=45586&view=rev
Log:
Fix PR1386. Accessing, say, an i8 bitfield at
bits 7 .. 8 would crash the compiler because
the bitfield is not entirely contained in an i8!
This could be fixed by loading an i16 instead,
however consider an i64 bitfield at bits 2 .. 65.
It is impossible to load this in one 64 bit load.
If i128 codegen was working we could load it using
an i128, but unfortunately using i128 here crashes
the code generator. So teach load and store to
perform multiple loads and stores if necessary (it
will perform at most two, though the code works for
any number). Also, fix some bogus logic in the
lvalue code which would also cause crashes for
examples of this type. It is important to get this
working because (1) gcc can handle it, and (2) the
Ada front-end won't build without it.
Modified:
llvm-gcc-4.0/trunk/gcc/llvm-convert.cpp
Modified: llvm-gcc-4.0/trunk/gcc/llvm-convert.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm-gcc-4.0/trunk/gcc/llvm-convert.cpp?rev=45586&r1=45585&r2=45586&view=diff
==
--- llvm-gcc-4.0/trunk/gcc/llvm-convert.cpp (original)
+++ llvm-gcc-4.0/trunk/gcc/llvm-convert.cpp Fri Jan 4 08:15:44 2008
@@ -2591,44 +2591,78 @@
}
} else {
// This is a bitfield reference.
-LoadInst *LI = Builder.CreateLoad(LV.Ptr, isVolatile, "tmp");
-LI->setAlignment(Alignment);
+if (!LV.BitSize)
+ return Constant::getNullValue(Ty);
-Value *Val = LI;
-unsigned ValSizeInBits = Val->getType()->getPrimitiveSizeInBits();
-
-assert(Val->getType()->isInteger() && "Invalid bitfield lvalue!");
+const Type *ValTy = cast(LV.Ptr->getType())->getElementType();
+unsigned ValSizeInBits = ValTy->getPrimitiveSizeInBits();
+
+// The number of loads needed to read the entire bitfield.
+unsigned Strides = 1 + (LV.BitStart + LV.BitSize - 1) / ValSizeInBits;
+
+assert(ValTy->isInteger() && "Invalid bitfield lvalue!");
+assert(ValSizeInBits > LV.BitStart && "Bad bitfield lvalue!");
assert(ValSizeInBits >= LV.BitSize && "Bad bitfield lvalue!");
-assert(ValSizeInBits >= LV.BitSize+LV.BitStart && "Bad bitfield lvalue!");
+assert(2*ValSizeInBits > LV.BitSize+LV.BitStart && "Bad bitfield lvalue!");
-// Mask the bits out by shifting left first, then shifting right. The
-// LLVM optimizer will turn this into an AND if this is an unsigned
-// expression.
-
-// If this target has bitfields laid out in big-endian order, invert the
bit
-// in the word if needed.
-if (BITS_BIG_ENDIAN)
- LV.BitStart = ValSizeInBits-LV.BitStart-LV.BitSize;
-
-if (LV.BitStart+LV.BitSize != ValSizeInBits) {
- Value *ShAmt = ConstantInt::get(Val->getType(),
- ValSizeInBits-(LV.BitStart+LV.BitSize));
- Val = Builder.CreateShl(Val, ShAmt, "tmp");
-}
-
-// Shift right required?
-if (ValSizeInBits-LV.BitSize) {
- Value *ShAmt = ConstantInt::get(Val->getType(),
ValSizeInBits-LV.BitSize);
- if (TYPE_UNSIGNED(TREE_TYPE(exp)))
-Val = Builder.CreateLShr(Val, ShAmt, "tmp");
- else
-Val = Builder.CreateAShr(Val, ShAmt, "tmp");
+Value *Result = NULL;
+
+for (unsigned I = 0; I < Strides; I++) {
+ unsigned Index = BYTES_BIG_ENDIAN ? I : Strides - I - 1; // MSB first
+ unsigned ThisFirstBit = Index * ValSizeInBits;
+ unsigned ThisLastBitPlusOne = ThisFirstBit + ValSizeInBits;
+ if (ThisFirstBit < LV.BitStart)
+ThisFirstBit = LV.BitStart;
+ if (ThisLastBitPlusOne > LV.BitStart+LV.BitSize)
+ThisLastBitPlusOne = LV.BitStart+LV.BitSize;
+
+ Value *Ptr = Index ?
+Builder.CreateGEP(LV.Ptr, ConstantInt::get(Type::Int32Ty, Index),
+ "tmp") : LV.Ptr;
+ LoadInst *LI = Builder.CreateLoad(Ptr, isVolatile, "tmp");
+ LI->setAlignment(Alignment);
+ Value *Val = LI;
+
+ unsigned BitsInVal = ThisLastBitPlusOne - ThisFirstBit;
+ unsigned FirstBitInVal = ThisFirstBit % ValSizeInBits;
+
+ // If this target has bitfields laid out in big-endian order, invert the
bit
+ // in the word if needed.
+ if (BITS_BIG_ENDIAN)
+FirstBitInVal = ValSizeInBits-FirstBitInVal-BitsInVal;
+
+ // Mask the bits out by shifting left first, then shifting right. The
+ // LLVM optimizer will turn this into an AND if this is an unsigned
+ // expression.
+
+ if (FirstBitInVal+BitsInVal != ValSizeInBits) {
+Value *ShAmt = ConstantInt::get(ValTy,
+
ValSizeInBits-(FirstBitInVal+BitsInVal));
+Val = Builder.CreateShl(Val, ShAmt, "tmp");
+ }
+
+ // Shift right required?
+ if (ValSizeInBits != BitsInVal) {
+bool AddSignBits = !TYPE_UNSIGNED(TREE_TYPE(exp)) && !Result;
+
Re: [llvm-commits] [LLVMdev] x86 calling conventions refactoring
Anton,
Going back to the list now that it's working. :)
On 2008-01-04, at 08:22, Anton Korobeynikov wrote:
Hello, Gordon.
Here goes quick review.
+// Determines whether a CALL node uses struct return semantics.
+static bool CallIsStructReturn(SDOperand Op)
I like these predicates, because later we can move them to the
autogenerated code.
Yes!
+ // Decoarate the function name.
Typo
Okay.
+ if (Is64Bit && CC == CallingConv::X86_FastCall &&
+ !Subtarget->isTargetCygMing() && !Subtarget-
>isTargetWindows() &&
+ (StackSize & 7) == 0)
and
+ if (!Is64Bit && CC == CallingConv::X86_FastCall &&
+ !Subtarget->isTargetCygMing() && !Subtarget-
>isTargetWindows() &&
+ (NumBytes & 7) == 0)
+NumBytes += 4;
The former is also a typo. It should definitely be !Is64Bit.
That's pretty interesting.
Indeed. I made some mechanical transformations where the rationale or
invariants were unclear.
The source code was:
- if (!Subtarget->isTargetCygMing() && !Subtarget-
>isTargetWindows()) {
-// Make sure the instruction takes 8n+4 bytes to make sure the
start of the
-// arguments and the arguments after the retaddr has been
pushed are
-// aligned.
-if ((NumBytes & 7) == 0)
- NumBytes += 4;
- }
-
Actually this is a hunk from the times, when fastcall and fastcc
shared the same LowerFORMAL_ARGUMENTS call.
History tends to repeat itself. :)
The "funny" thing is that fastcall can be seen only on windows (32
bit!) targets, so the condition is twice bogus. Most probably the
whole hunk should be just eliminated.
If you're sure, I'll happily delete the lot. But it doesn't look
necessarily inert to me once the typo is fixed.
I think this should be sunken into GetAlignedArgumentStackSize if it
remains, since it's always called something like this:
unsigned NumBytes = CCInfo.getNextStackOffset();
if (CC == CallingConv::Fast)
NumBytes = GetAlignedArgumentStackSize(NumBytes, DAG);
+ // Make sure the instruction takes 8n+4 bytes to make sure the
start of the
+ // arguments and the arguments after the retaddr has been pushed
are aligned.
+ if (!Is64Bit && CC == CallingConv::X86_FastCall &&
+ !Subtarget->isTargetCygMing() && !Subtarget->isTargetWindows() &&
+ (NumBytes & 7) == 0)
+NumBytes += 4;
Where GetAlignedArgumentStackSize is documented to…
/// GetAlignedArgumentStackSize - Make the stack size align e.g 16n +
12 aligned
/// for a 16 byte align requirement.
And is coded fairly generically, although I didn't dig deep enough to
figure out whether GetAlignedArgumentStackSize would DTRT in this
particular case. (getNextStackOffset won't; it's just an accumulator.)
Ultimately, I think GetAlignedArgumentStackSize should do this bit's
job, and the lot should be sunk into getNextStackOffset—but I was
trying to be safe and incremental.
+ if (IsCalleePop(Op)) {
+BytesToPopOnReturn = StackSize; // Callee pops everything.
Maybe it will be better to make function return amount of bytes to
pop and fold ArgsAreStructReturn() call there?
Maybe something like that. This logic is essentially duplicated in
LowerCALL and LowerFORMAL_ARGUMENTS, except for the SDNode passed to
IsStructReturn is of differing type. (IsCalleePop just happens to be
looking at bits of FORMAL_ARGUMENTS or CALL nodes which are
structurally identical; CallIsStructReturn and ArgsAreStructReturn
don't have that luxury, though they could consult the SDNode's type.)
The relevant passages:
// Some CCs need callee pop.
if (IsCalleePop(Op)) {
BytesToPopOnReturn = StackSize; // Callee pops everything.
BytesCallerReserves = 0;
} else {
BytesToPopOnReturn = 0; // Callee pops nothing.
// If this is an sret function, the return should pop the hidden
pointer.
if (!Is64Bit && ArgsAreStructReturn(Op))
BytesToPopOnReturn = 4;
BytesCallerReserves = StackSize;
}
-
// Create the CALLSEQ_END node.
unsigned NumBytesForCalleeToPush;
if (IsCalleePop(Op))
NumBytesForCalleeToPush = NumBytes;// Callee pops everything
else if (!Is64Bit && CallIsStructReturn(Op))
// If this is is a call to a struct-return function, the callee
// pops the hidden struct pointer, so we have to push it back.
// This is common for Darwin/X86, Linux & Mingw32 targets.
NumBytesForCalleeToPush = 4;
else
NumBytesForCalleeToPush = 0; // Callee pops nothing.
+if (IsTailCall || !Is64Bit ||
+getTargetMachine().getCodeModel() != CodeModel::Large)
+ Callee = DAG.getTargetExternalSymbol(S->getSymbol(),
getPointerTy());
I myself feel somehow inconvenient to have such condition here
(mixing predicates of different sorts).
I don't like repeatedly consulting either PerformTailCallOpt/
IsTailCall or !Subtarget->is64Bit(). Rather, I'd prefer to have a
table-driven system. I think that's a follow
Re: [llvm-commits] Suggested patch to the Language Reference
Applied, thanks! -Chris http://nondot.org/sabre http://llvm.org On Jan 3, 2008, at 3:16 PM, Alain Frisch <[EMAIL PROTECTED]> wrote: > Hello, > > (Following a discussion on irc.) > > The current version of the Language Reference still mentions integer > types as being primitive. It also fails to mention three floating > point types. The attached patch (in the docs/ subdir) fixes these > issues. > > > -- Alain > Index: LangRef.html > === > --- LangRef.html(revision 45557) > +++ LangRef.html(working copy) > @@ -33,9 +33,12 @@ > > Type System > > + Type Classifications > Primitive Types > > - Type Classifications a> > + Floating Point Types > + Void Type > + Label Type > > > Derived Types > @@ -974,59 +977,49 @@ > > > > - Primitive Types a> > - > -The primitive types are the fundamental building blocks of the > LLVM > -system. The current set of primitive types is as follows: > - > - > - > - > - > - > -TypeDescription > -voidNo > value > -labelBranch destination > - > - > - > - > - > - > - TypeDescription > - float32-bit floating point > value > - double64-bit floating point > value > - > - > - > - > - > - > - > - > - Type > + Type > Classifications > > -These different primitive types fall into a few useful > +The types fall into a few useful > classifications: > > > > ClassificationTypes > > - integer > + integer > i1, i2, i3, ... i8, ... i16, ... i32, ... i64, ... tt> > > > - floating point > - float, double > + floating point > + float, double, x86_fp80, fp128, ppc_fp128 > > > first class > - i1, ..., float, double, > - pointer, href="#t_vector">vector > + integer, > + floating point, > + pointer, > + vector > > > + > + primitive > + label, > + void, > + integer, > + floating point. > + > + > + derived > + integer, > + array, > + function, > + pointer, > + structure, > + packed structure, > + vector, > + opaque. > + > > > > @@ -1038,6 +1031,57 @@ > > > > + Primitive Types a> > + > +The primitive types are the fundamental building blocks of the > LLVM > +system. > + > + > + Floating Point > Types > + > + > + > + > + TypeDescription > + float32-bit floating point > value > + double64-bit floating point > value > + fp128128-bit floating point > value (112-bit mantissa) > + x86_fp8080-bit floating point > value (X87) > + ppc_fp128128-bit floating point > value (two 64-bits) > + > + > + > + > + > + Void Type > + > + > +Overview: > +The void type does not represent any value and has no size. > + > +Syntax: > + > + > + void > + > + > + > + > + Label Type div> > + > + > +Overview: > +The label type represents code labels. > + > +Syntax: > + > + > + label > + > + > + > + > + > Derived Types div> > > > ___ > llvm-commits mailing list > llvm-commits@cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] [llvm] r45588 - /llvm/trunk/test/FrontendAda/non_bitfield.ads
Author: baldrick Date: Fri Jan 4 11:31:56 2008 New Revision: 45588 URL: http://llvm.org/viewvc/llvm-project?rev=45588&view=rev Log: Testcase with non-integer "bitfields" (in quotes, since they didn't actually need to be bitfields, though they are marked as such). Added: llvm/trunk/test/FrontendAda/non_bitfield.ads Added: llvm/trunk/test/FrontendAda/non_bitfield.ads URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/FrontendAda/non_bitfield.ads?rev=45588&view=auto == --- llvm/trunk/test/FrontendAda/non_bitfield.ads (added) +++ llvm/trunk/test/FrontendAda/non_bitfield.ads Fri Jan 4 11:31:56 2008 @@ -0,0 +1,12 @@ +-- RUN: %llvmgcc -c %s +package Non_Bitfield is + type SP is access String; + type E is (A, B, C); + type T (D : E) is record + case D is + when A => X : Boolean; + when B => Y : SP; + when C => Z : String (1 .. 2); + end case; + end record; +end; ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] [llvm-gcc-4.2] r45590 - in /llvm-gcc-4.2/trunk/gcc: llvm-abi.h llvm-convert.cpp llvm-debug.cpp llvm-internal.h llvm-types.cpp
Author: baldrick
Date: Fri Jan 4 12:09:09 2008
New Revision: 45590
URL: http://llvm.org/viewvc/llvm-project?rev=45590&view=rev
Log:
If a struct field is marked as a bitfield but
didn't need to be, treat it like an ordinary
field. The Ada front-end likes to mark fields
as bitfields preemptively, so this can occur
quite often for Ada. What is more, it can
mark non-integer fields as bitfields. In all
examples I came across so far, these non-integer
bitfields can be treated like ordinary fields.
With this patch, the Ada front-end builds (but
does not bootstrap)! It is true that the problem
of non-integer bitfields could be handled in the
Ada front-end, but since ignoring silly bitfields
seems like a good idea for all front-ends I chose
to solve it in the generic code.
Modified:
llvm-gcc-4.2/trunk/gcc/llvm-abi.h
llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp
llvm-gcc-4.2/trunk/gcc/llvm-debug.cpp
llvm-gcc-4.2/trunk/gcc/llvm-internal.h
llvm-gcc-4.2/trunk/gcc/llvm-types.cpp
Modified: llvm-gcc-4.2/trunk/gcc/llvm-abi.h
URL:
http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/llvm-abi.h?rev=45590&r1=45589&r2=45590&view=diff
==
--- llvm-gcc-4.2/trunk/gcc/llvm-abi.h (original)
+++ llvm-gcc-4.2/trunk/gcc/llvm-abi.h Fri Jan 4 12:09:09 2008
@@ -106,7 +106,7 @@
for (tree Field = TYPE_FIELDS(type); Field; Field = TREE_CHAIN(Field))
if (TREE_CODE(Field) == FIELD_DECL) {
if (!FoundField)
- FoundField = TREE_TYPE(Field);
+ FoundField = getDeclaredType(Field);
else
return 0; // More than one field.
}
@@ -206,9 +206,9 @@
if (TREE_CODE(Field) == FIELD_DECL) {
unsigned FNo = GetFieldIndex(Field);
assert(FNo != ~0U && "Case not handled yet!");
-
+
C.EnterField(FNo, Ty);
- HandleArgument(TREE_TYPE(Field));
+ HandleArgument(getDeclaredType(Field));
C.ExitField();
}
} else if (TREE_CODE(type) == COMPLEX_TYPE) {
Modified: llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp?rev=45590&r1=45589&r2=45590&view=diff
==
--- llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp (original)
+++ llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp Fri Jan 4 12:09:09 2008
@@ -5071,8 +5071,8 @@
StructAddrLV.Ptr = BitCastToType(StructAddrLV.Ptr,
PointerType::getUnqual(StructTy));
- const Type *FieldTy = ConvertType(TREE_TYPE(FieldDecl));
-
+ const Type *FieldTy = ConvertType(getDeclaredType(FieldDecl));
+
// BitStart - This is the actual offset of the field from the start of the
// struct, in bits. For bitfields this may be on a non-byte boundary.
unsigned BitStart = getComponentRefOffsetInBits(exp);
@@ -5114,7 +5114,7 @@
PointerType::getUnqual(FieldTy));
}
- if (tree DeclaredType = DECL_BIT_FIELD_TYPE(FieldDecl)) {
+ if (isBitfield(FieldDecl)) {
assert(DECL_SIZE(FieldDecl) &&
TREE_CODE(DECL_SIZE(FieldDecl)) == INTEGER_CST &&
"Variable sized bitfield?");
@@ -5124,7 +5124,6 @@
cast(FieldPtr->getType())->getElementType();
// If this is a bitfield, the declared type must be an integral type.
-FieldTy = ConvertType(DeclaredType);
// If the field result is a bool, cast to a ubyte instead. It is not
// possible to access all bits of a memory object with a bool (only the low
// bit) but it is possible to access them with a byte.
@@ -5970,7 +5969,7 @@
// If the field is a bitfield, it could be spread across multiple fields
and
// may start at some bit offset.
-if (DECL_BIT_FIELD_TYPE(Field)) {
+if (isBitfield(Field)) {
ProcessBitFieldInitialization(Field, Val, STy, ResultElts);
} else {
// If not, things are much simpler.
@@ -5978,7 +5977,7 @@
assert(FieldNo < ResultElts.size() && "Invalid struct field number!");
// Example: struct X { int A; char C[]; } x = { 4, "foo" };
- assert(TYPE_SIZE(TREE_TYPE(Field)) ||
+ assert(TYPE_SIZE(getDeclaredType(Field)) ||
(FieldNo == ResultElts.size()-1 &&
isStructWithVarSizeArrayAtEnd(STy))
&& "field with no size is not array at end of struct!");
@@ -5993,7 +5992,7 @@
// integer. The struct field will have type [4 x ubyte] instead of
// "int" for example. If we ignored this, we would lay out the
// initializer wrong.
- if (TYPE_SIZE(TREE_TYPE(Field)) &&
+ if (TYPE_SIZE(getDeclaredType(Field)) &&
Val->getType() != STy->getElementType(FieldNo))
Val = ConvertStructFieldInitializerToType(Val,
STy->getElementType(FieldNo));
@@ -6220,7 +6219,7 @@
StructAddrLV = ConstantExpr::ge
[llvm-commits] [llvm-gcc-4.2] r45592 - /llvm-gcc-4.2/trunk/gcc/ada/utils2.c
Author: baldrick Date: Fri Jan 4 12:26:23 2008 New Revision: 45592 URL: http://llvm.org/viewvc/llvm-project?rev=45592&view=rev Log: Make sure that global constants are marked constant in some tricky cases. Testcase is FrontendAda/unc_constructor.adb. Modified: llvm-gcc-4.2/trunk/gcc/ada/utils2.c Modified: llvm-gcc-4.2/trunk/gcc/ada/utils2.c URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/ada/utils2.c?rev=45592&r1=45591&r2=45592&view=diff == --- llvm-gcc-4.2/trunk/gcc/ada/utils2.c (original) +++ llvm-gcc-4.2/trunk/gcc/ada/utils2.c Fri Jan 4 12:26:23 2008 @@ -1163,7 +1163,7 @@ result = fold (build1 (ADDR_EXPR, operation_type, operand)); } - TREE_CONSTANT (result) = staticp (operand) || TREE_CONSTANT (operand); + TREE_CONSTANT (result) |= staticp (operand) || TREE_CONSTANT (operand); break; case INDIRECT_REF: ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] [llvm] r45594 - /llvm/trunk/lib/Transforms/Scalar/LoopUnroll.cpp
Author: wmat
Date: Fri Jan 4 14:02:18 2008
New Revision: 45594
URL: http://llvm.org/viewvc/llvm-project?rev=45594&view=rev
Log:
fix typo
Modified:
llvm/trunk/lib/Transforms/Scalar/LoopUnroll.cpp
Modified: llvm/trunk/lib/Transforms/Scalar/LoopUnroll.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/LoopUnroll.cpp?rev=45594&r1=45593&r2=45594&view=diff
==
--- llvm/trunk/lib/Transforms/Scalar/LoopUnroll.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/LoopUnroll.cpp Fri Jan 4 14:02:18 2008
@@ -207,7 +207,7 @@
<< "] Loop %" << Header->getName() << "\n";
if (!BI || BI->isUnconditional()) {
-// The loop-rorate pass can be helpful to avoid this in many cases.
+// The loop-rotate pass can be helpful to avoid this in many cases.
DOUT << " Can't unroll; loop not terminated by a conditional branch.\n";
return false;
}
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[llvm-commits] [llvm] r45704 - in /llvm/trunk: include/llvm/ParameterAttributes.h lib/Transforms/IPO/DeadArgumentElimination.cpp lib/Transforms/Scalar/InstructionCombining.cpp lib/VMCore/ParameterAttr
Author: baldrick
Date: Mon Jan 7 11:16:06 2008
New Revision: 45704
URL: http://llvm.org/viewvc/llvm-project?rev=45704&view=rev
Log:
Small cleanup for handling of type/parameter attribute
incompatibility.
Modified:
llvm/trunk/include/llvm/ParameterAttributes.h
llvm/trunk/lib/Transforms/IPO/DeadArgumentElimination.cpp
llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp
llvm/trunk/lib/VMCore/ParameterAttributes.cpp
llvm/trunk/lib/VMCore/Verifier.cpp
Modified: llvm/trunk/include/llvm/ParameterAttributes.h
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/ParameterAttributes.h?rev=45704&r1=45703&r2=45704&view=diff
==
--- llvm/trunk/include/llvm/ParameterAttributes.h (original)
+++ llvm/trunk/include/llvm/ParameterAttributes.h Mon Jan 7 11:16:06 2008
@@ -52,12 +52,6 @@
/// @brief Attributes that only apply to function return values.
const uint16_t ReturnOnly = NoReturn | NoUnwind | ReadNone | ReadOnly;
-/// @brief Attributes that only apply to integers.
-const uint16_t IntegerTypeOnly = SExt | ZExt;
-
-/// @brief Attributes that only apply to pointers.
-const uint16_t PointerTypeOnly = ByVal | Nest | NoAlias | StructRet;
-
/// @brief Attributes that are mutually incompatible.
const uint16_t MutuallyIncompatible[3] = {
ByVal | InReg | Nest | StructRet,
@@ -65,8 +59,8 @@
ReadNone | ReadOnly
};
-/// @brief Which of the given attributes do not apply to the type.
-uint16_t incompatibleWithType (const Type *Ty, uint16_t attrs);
+/// @brief Which attributes cannot be applied to a type.
+uint16_t typeIncompatible (const Type *Ty);
} // end namespace ParamAttr
Modified: llvm/trunk/lib/Transforms/IPO/DeadArgumentElimination.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/IPO/DeadArgumentElimination.cpp?rev=45704&r1=45703&r2=45704&view=diff
==
--- llvm/trunk/lib/Transforms/IPO/DeadArgumentElimination.cpp (original)
+++ llvm/trunk/lib/Transforms/IPO/DeadArgumentElimination.cpp Mon Jan 7
11:16:06 2008
@@ -505,7 +505,7 @@
const Type *RetTy = FTy->getReturnType();
if (DeadRetVal.count(F)) {
RetTy = Type::VoidTy;
-RAttrs &= ~ParamAttr::incompatibleWithType(RetTy, RAttrs);
+RAttrs &= ~ParamAttr::typeIncompatible(RetTy);
DeadRetVal.erase(F);
}
@@ -561,7 +561,7 @@
// The call return attributes.
uint16_t RAttrs = PAL ? PAL->getParamAttrs(0) : 0;
// Adjust in case the function was changed to return void.
-RAttrs &= ~ParamAttr::incompatibleWithType(NF->getReturnType(), RAttrs);
+RAttrs &= ~ParamAttr::typeIncompatible(NF->getReturnType());
if (RAttrs)
ParamAttrsVec.push_back(ParamAttrsWithIndex::get(0, RAttrs));
Modified: llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp?rev=45704&r1=45703&r2=45704&view=diff
==
--- llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp Mon Jan 7
11:16:06 2008
@@ -8097,10 +8097,11 @@
FT->getReturnType() != Type::VoidTy)
return false; // Cannot transform this return value.
-if (!Caller->use_empty() && CallerPAL &&
-ParamAttr::incompatibleWithType(FT->getReturnType(),
-CallerPAL->getParamAttrs(0)))
- return false; // Attribute not compatible with transformed value.
+if (CallerPAL && !Caller->use_empty()) {
+ uint16_t RAttrs = CallerPAL->getParamAttrs(0);
+ if (RAttrs & ParamAttr::typeIncompatible(FT->getReturnType()))
+return false; // Attribute not compatible with transformed value.
+}
// If the callsite is an invoke instruction, and the return value is used
by
// a PHI node in a successor, we cannot change the return type of the call
@@ -8127,9 +8128,11 @@
if (!CastInst::isCastable(ActTy, ParamTy))
return false; // Cannot transform this parameter value.
-if (CallerPAL &&
-ParamAttr::incompatibleWithType(ParamTy,
CallerPAL->getParamAttrs(i+1)))
- return false; // Attribute not compatible with transformed value.
+if (CallerPAL) {
+ uint16_t PAttrs = CallerPAL->getParamAttrs(i + 1);
+ if (PAttrs & ParamAttr::typeIncompatible(ParamTy))
+return false; // Attribute not compatible with transformed value.
+}
ConstantInt *c = dyn_cast(*AI);
// Some conversions are safe even if we do not have a body.
@@ -8168,7 +8171,7 @@
// If the return value is not being used, the type may not be compatible
// with the existing attributes. Wipe out any problematic attributes.
- RAttrs &= ~ParamAttr::incompatibleWithType(FT->getReturnType(), RAttrs);
+ RAt
[llvm-commits] [llvm] r45705 - /llvm/trunk/test/CodeGen/X86/vec_insert-2.ll
Author: sampo Date: Mon Jan 7 11:49:23 2008 New Revision: 45705 URL: http://llvm.org/viewvc/llvm-project?rev=45705&view=rev Log: Update test to catch recent x86 insert regression and improvements Modified: llvm/trunk/test/CodeGen/X86/vec_insert-2.ll Modified: llvm/trunk/test/CodeGen/X86/vec_insert-2.ll URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vec_insert-2.ll?rev=45705&r1=45704&r2=45705&view=diff == --- llvm/trunk/test/CodeGen/X86/vec_insert-2.ll (original) +++ llvm/trunk/test/CodeGen/X86/vec_insert-2.ll Mon Jan 7 11:49:23 2008 @@ -1,3 +1,6 @@ +; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep '\$132,' | count 2 +; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep '\$2,' | count 2 +; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep shufps | count 4 ; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep pinsrw | count 1 ; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep movhpd | count 1 ; RUN: llvm-as < %s | llc -march=x86-64 -mattr=+sse2 | grep unpcklpd | count 1 ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] [llvm] r45707 - /llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h
Author: sampo Date: Mon Jan 7 11:52:24 2008 New Revision: 45707 URL: http://llvm.org/viewvc/llvm-project?rev=45707&view=rev Log: Update the comment on scalar to vector to be a bit more clear. Modified: llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h Modified: llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h?rev=45707&r1=45706&r2=45707&view=diff == --- llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h (original) +++ llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h Mon Jan 7 11:52:24 2008 @@ -309,8 +309,8 @@ VECTOR_SHUFFLE, /// SCALAR_TO_VECTOR(VAL) - This represents the operation of loading a -/// scalar value into the low element of the resultant vector type. The top -/// elements of the vector are undefined. +/// scalar value into element 0 of the resultant vector type. The top +/// elements 1 to N-1 of the N-element vector are undefined. SCALAR_TO_VECTOR, // EXTRACT_SUBREG - This node is used to extract a sub-register value. ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
Re: [llvm-commits] [llvm] r45701 - /llvm/trunk/lib/Target/X86/X86CallingConv.td
On Jan 7, 2008, at 5:44 AM, Duncan Sands wrote: > Author: baldrick > Date: Mon Jan 7 07:44:22 2008 > New Revision: 45701 > > URL: http://llvm.org/viewvc/llvm-project?rev=45701&view=rev > Log: > Fix long double support on x86-32 linux. Sorry! I think we've finally got it right now. ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
Re: [llvm-commits] Patch for compiling with Mingw/Cygwin
On Jan 7, 2008, at 8:12 AM, Alain Frisch wrote: > The attached patch makes it possible to compile LLVM under Mingw/ > Cygwin (that is, with "gcc -mno-cygwin" under Cygwin). The only > problem which I could not address with configure flags is that the > tblgen tool expect Windows paths, whereas the build system uses > Cygwin paths. The patch introduce a Gnu Make function SYSPATH which > performs the translation if needed. > > Ideally, the SYSPATH variable in Makefile.config should be set by > the configure script when given a special option (the same option > could also set the other needed options -- see below). As I didn't > want to play with autoconf, the current solution requires an > explicit argument to be passed to make for the compilation. > > With the patch, I was able to compile with the following commands: > > ./configure --build=i686-pc-mingw32 CC="gcc -mno-cygwin" CXX="g++ - > mno-cygwin" ac_cv_search_dlopen=no ac_cv_lib_dl_dlopen=no > > make USE_CYGPATH=1 hi Alain, A couple of comments: You really need to add some comments in Makefile.config.in over the stuff that sets SYSPATH to indicate what it is used for, and probably over the TableGen = ... line in Makefile.rules. If you don't do this, someone may break this in the future. Another thing: does it work to add something like this to makefile.rules? ifeq ($(OS),Cygwin) USE_CYGPATH := true # Actually, it would be better to do the syspath stuff here and remove USE_CYGPATH endif The issue is that I don't really want a magic make variable floating around that people need to know to use. Maybe there is some reason that this can't be made to work, if that's the case, please do figure out the autoconf stuff. Thanks! -Chris ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
Re: [llvm-commits] [llvm] r45669 - in /llvm/trunk: include/llvm/CodeGen/AsmPrinter.h include/llvm/CodeGen/SelectionDAGISel.h lib/CodeGen/AsmPrinter.cpp lib/CodeGen/README.txt lib/CodeGen/SelectionDAG/
On Jan 6, 2008, at 5:30 PM, Gordon Henriksen wrote:
Hi Gordon,
I don't know much about the GC work. But it is really necessary for
AsmPrinter to use any analysis info? That seems odd to me.
Evan
> Author: gordon
>
>
> =
> =
> =
> =
> =
> =
> =
> =
> ==
> --- llvm/trunk/include/llvm/CodeGen/AsmPrinter.h (original)
> +++ llvm/trunk/include/llvm/CodeGen/AsmPrinter.h Sun Jan 6 19:30:38
> 2008
> @@ -118,6 +118,10 @@
> std::string getCurrentFunctionEHName(const MachineFunction *MF);
>
> protected:
> +/// getAnalysisUsage - Record analysis usage.
> +///
> +void getAnalysisUsage(AnalysisUsage &AU) const;
> +
> /// doInitialization - Set up the AsmPrinter when we are working
> on a new
> /// module. If your pass overrides this, it must make sure to
> explicitly
> /// call this implementation.
>
> Modified: llvm/trunk/lib/CodeGen/AsmPrinter.cpp
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/AsmPrinter.cpp?rev=45669&r1=45668&r2=45669&view=diff
>
> =
> =
> =
> =
> =
> =
> =
> =
> ==
> --- llvm/trunk/lib/CodeGen/AsmPrinter.cpp (original)
> +++ llvm/trunk/lib/CodeGen/AsmPrinter.cpp Sun Jan 6 19:30:38 2008
> @@ -16,6 +16,8 @@
> #include "llvm/DerivedTypes.h"
> #include "llvm/Constants.h"
> #include "llvm/Module.h"
> +#include "llvm/CodeGen/Collector.h"
> +#include "llvm/CodeGen/CollectorMetadata.h"
> #include "llvm/CodeGen/MachineConstantPool.h"
> #include "llvm/CodeGen/MachineJumpTableInfo.h"
> #include "llvm/CodeGen/MachineModuleInfo.h"
> @@ -94,9 +96,20 @@
> }
>
>
> +void AsmPrinter::getAnalysisUsage(AnalysisUsage &AU) const {
> + MachineFunctionPass::getAnalysisUsage(AU);
> + AU.addRequired();
> +}
> +
> bool AsmPrinter::doInitialization(Module &M) {
> Mang = new Mangler(M, TAI->getGlobalPrefix());
>
> + CollectorModuleMetadata *CMM =
> getAnalysisToUpdate();
> + assert(CMM && "AsmPrinter didn't require
> CollectorModuleMetadata?");
> + for (CollectorModuleMetadata::iterator I = CMM->begin(),
> + E = CMM->end(); I != E; ++I)
> +(*I)->beginAssembly(O, *this, *TAI);
> +
> if (!M.getModuleInlineAsm().empty())
> O << TAI->getCommentString() << " Start of file scope inline
> assembly\n"
> << M.getModuleInlineAsm()
> @@ -158,6 +171,12 @@
> }
> }
>
> + CollectorModuleMetadata *CMM =
> getAnalysisToUpdate();
> + assert(CMM && "AsmPrinter didn't require
> CollectorModuleMetadata?");
> + for (CollectorModuleMetadata::iterator I = CMM->end(),
> + E = CMM->begin(); I != E; )
> +(*--I)->finishAssembly(O, *this, *TAI);
> +
> delete Mang; Mang = 0;
> return false;
> }
>
> Modified: llvm/trunk/lib/CodeGen/README.txt
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/README.txt?rev=45669&r1=45668&r2=45669&view=diff
>
> =
> =
> =
> =
> =
> =
> =
> =
> ==
> --- llvm/trunk/lib/CodeGen/README.txt (original)
> +++ llvm/trunk/lib/CodeGen/README.txt Sun Jan 6 19:30:38 2008
> @@ -187,3 +187,8 @@
> assembly.
>
> //
> =
> =
> =
> -
> ===//
> +
> +It would be good to detect collector/target compatibility instead
> of silently
> +doing the wrong thing.
> +
> +//
> =
> =
> =
> -
> ===//
>
> Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp?rev=45669&r1=45668&r2=45669&view=diff
>
> =
> =
> =
> =
> =
> =
> =
> =
> ==
> --- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
> (original)
> +++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp Sun
> Jan 6 19:30:38 2008
> @@ -26,6 +26,7 @@
> #include "llvm/Intrinsics.h"
> #include "llvm/IntrinsicInst.h"
> #include "llvm/ParameterAttributes.h"
> +#include "llvm/CodeGen/Collector.h"
> #include "llvm/CodeGen/MachineFunction.h"
> #include "llvm/CodeGen/MachineFrameInfo.h"
> #include "llvm/CodeGen/MachineInstrBuilder.h"
> @@ -426,12 +427,16 @@
> /// FuncInfo - Information about the function as a whole.
> ///
> FunctionLoweringInfo &FuncInfo;
> +
> + /// GCI - Garbage collection metadata for the function.
> + CollectorMetadata *GCI;
>
> SelectionDAGLowering(SelectionDAG &dag, TargetLowering &tli,
>AliasAnalysis &aa,
> - FunctionLoweringInfo &funcinfo)
> + FunctionLoweringInfo &funcinfo,
> + CollectorMetadata *gci)
> : TLI(tli), DAG(dag), TD(DAG.getTarget().getTargetData()), AA(aa),
> - FuncInfo(funcinfo) {
> +
[llvm-commits] [llvm] r45712 - /llvm/trunk/lib/Target/Sparc/SparcInstrInfo.cpp
Author: baldrick Date: Mon Jan 7 13:13:36 2008 New Revision: 45712 URL: http://llvm.org/viewvc/llvm-project?rev=45712&view=rev Log: Add missing newline at EOF. Modified: llvm/trunk/lib/Target/Sparc/SparcInstrInfo.cpp Modified: llvm/trunk/lib/Target/Sparc/SparcInstrInfo.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Sparc/SparcInstrInfo.cpp?rev=45712&r1=45711&r2=45712&view=diff == --- llvm/trunk/lib/Target/Sparc/SparcInstrInfo.cpp (original) +++ llvm/trunk/lib/Target/Sparc/SparcInstrInfo.cpp Mon Jan 7 13:13:36 2008 @@ -258,4 +258,4 @@ if (NewMI) NewMI->copyKillDeadInfo(MI); return NewMI; -} \ No newline at end of file +} ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] [llvm] r45714 - /llvm/trunk/lib/ExecutionEngine/ExecutionEngineBindings.cpp
Author: baldrick
Date: Mon Jan 7 13:14:42 2008
New Revision: 45714
URL: http://llvm.org/viewvc/llvm-project?rev=45714&view=rev
Log:
I doubt the address of the Error string was intended
to be used for the force_interpreter parameter...
Spotted by gcc-4.2.
Modified:
llvm/trunk/lib/ExecutionEngine/ExecutionEngineBindings.cpp
Modified: llvm/trunk/lib/ExecutionEngine/ExecutionEngineBindings.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/ExecutionEngine/ExecutionEngineBindings.cpp?rev=45714&r1=45713&r2=45714&view=diff
==
--- llvm/trunk/lib/ExecutionEngine/ExecutionEngineBindings.cpp (original)
+++ llvm/trunk/lib/ExecutionEngine/ExecutionEngineBindings.cpp Mon Jan 7
13:14:42 2008
@@ -101,7 +101,8 @@
LLVMModuleProviderRef MP,
char **OutError) {
std::string Error;
- if (ExecutionEngine *Interp = ExecutionEngine::create(unwrap(MP), &Error)) {
+ if (ExecutionEngine *Interp =
+ ExecutionEngine::create(unwrap(MP), false, &Error)) {
*OutInterp = wrap(Interp);
return 0;
}
___
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[llvm-commits] [llvm] r45718 - /llvm/trunk/lib/CodeGen/StrongPHIElimination.cpp
Author: resistor
Date: Mon Jan 7 15:30:40 2008
New Revision: 45718
URL: http://llvm.org/viewvc/llvm-project?rev=45718&view=rev
Log:
Make some predicates static.
Modified:
llvm/trunk/lib/CodeGen/StrongPHIElimination.cpp
Modified: llvm/trunk/lib/CodeGen/StrongPHIElimination.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/StrongPHIElimination.cpp?rev=45718&r1=45717&r2=45718&view=diff
==
--- llvm/trunk/lib/CodeGen/StrongPHIElimination.cpp (original)
+++ llvm/trunk/lib/CodeGen/StrongPHIElimination.cpp Mon Jan 7 15:30:40 2008
@@ -231,7 +231,7 @@
/// isLiveIn - helper method that determines, from a VarInfo, if a register
/// is live into a block
-bool isLiveIn(LiveVariables::VarInfo& V, MachineBasicBlock* MBB) {
+static bool isLiveIn(LiveVariables::VarInfo& V, MachineBasicBlock* MBB) {
if (V.AliveBlocks.test(MBB->getNumber()))
return true;
@@ -244,7 +244,7 @@
/// isLiveOut - help method that determines, from a VarInfo, if a register is
/// live out of a block.
-bool isLiveOut(LiveVariables::VarInfo& V, MachineBasicBlock* MBB) {
+static bool isLiveOut(LiveVariables::VarInfo& V, MachineBasicBlock* MBB) {
if (MBB == V.DefInst->getParent() ||
V.UsedBlocks.test(MBB->getNumber())) {
for (std::vector::iterator I = V.Kills.begin(),
@@ -260,7 +260,7 @@
/// isKillInst - helper method that determines, from a VarInfo, if an
/// instruction kills a given register
-bool isKillInst(LiveVariables::VarInfo& V, MachineInstr* MI) {
+static bool isKillInst(LiveVariables::VarInfo& V, MachineInstr* MI) {
return std::find(V.Kills.begin(), V.Kills.end(), MI) != V.Kills.end();
}
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[llvm-commits] [llvm] r45719 - /llvm/trunk/lib/CodeGen/StrongPHIElimination.cpp
Author: resistor
Date: Mon Jan 7 15:32:09 2008
New Revision: 45719
URL: http://llvm.org/viewvc/llvm-project?rev=45719&view=rev
Log:
Oops, missed one.
Modified:
llvm/trunk/lib/CodeGen/StrongPHIElimination.cpp
Modified: llvm/trunk/lib/CodeGen/StrongPHIElimination.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/StrongPHIElimination.cpp?rev=45719&r1=45718&r2=45719&view=diff
==
--- llvm/trunk/lib/CodeGen/StrongPHIElimination.cpp (original)
+++ llvm/trunk/lib/CodeGen/StrongPHIElimination.cpp Mon Jan 7 15:32:09 2008
@@ -268,7 +268,7 @@
/// trick parameter is 'mode' which tells it the relationship of the two
/// registers. 0 - defined in the same block, 1 - first properly dominates
/// second, 2 - second properly dominates first
-bool interferes(LiveVariables::VarInfo& First, LiveVariables::VarInfo& Second,
+static bool interferes(LiveVariables::VarInfo& First, LiveVariables::VarInfo&
Second,
MachineBasicBlock* scan, unsigned mode) {
MachineInstr* def = 0;
MachineInstr* kill = 0;
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[llvm-commits] [llvm] r45720 - /llvm/trunk/lib/Target/README.txt
Author: lattner Date: Mon Jan 7 15:38:14 2008 New Revision: 45720 URL: http://llvm.org/viewvc/llvm-project?rev=45720&view=rev Log: possible switch lowering improvement. Modified: llvm/trunk/lib/Target/README.txt Modified: llvm/trunk/lib/Target/README.txt URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/README.txt?rev=45720&r1=45719&r2=45720&view=diff == --- llvm/trunk/lib/Target/README.txt (original) +++ llvm/trunk/lib/Target/README.txt Mon Jan 7 15:38:14 2008 @@ -519,3 +519,8 @@ In this case, whole-function-isel would also handle this. //===-===// + +Investigate lowering of sparse switch statements into perfect hash tables: +http://burtleburtle.net/bob/hash/perfect.html + +//===-===// ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] [llvm] r45723 - /llvm/trunk/lib/Target/X86/README.txt
Author: lattner Date: Mon Jan 7 15:59:58 2008 New Revision: 45723 URL: http://llvm.org/viewvc/llvm-project?rev=45723&view=rev Log: add a note that is important for some fp apps. Modified: llvm/trunk/lib/Target/X86/README.txt Modified: llvm/trunk/lib/Target/X86/README.txt URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/README.txt?rev=45723&r1=45722&r2=45723&view=diff == --- llvm/trunk/lib/Target/X86/README.txt (original) +++ llvm/trunk/lib/Target/X86/README.txt Mon Jan 7 15:59:58 2008 @@ -1597,3 +1597,24 @@ This would result in smaller code and more efficient microops. //===-===// + +In SSE mode, we turn abs and neg into a load from the constant pool plus a xor +or and instruction, for example: + + xorpd LCPI2_0-"L2$pb"(%esi), %xmm2 + +However, if xmm2 gets spilled, we end up with really ugly code like this: + + %xmm2 = reload [mem] + xorpd LCPI2_0-"L2$pb"(%esi), %xmm2 + store %xmm2 -> [mem] + +Since we 'know' that this is a 'neg', we can actually "fold" the spill into +the neg/abs instruction, turning it into an *integer* operation, like this: + + xorl 2147483648, [mem+4] ## 2147483648 = (1 << 31) + +you could also use xorb, but xorl is less likely to lead to a partial register +stall. + +//===-===// ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] [llvm] r45725 - /llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
Author: evancheng Date: Mon Jan 7 17:08:23 2008 New Revision: 45725 URL: http://llvm.org/viewvc/llvm-project?rev=45725&view=rev Log: Unbreak x86-64. Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=45725&r1=45724&r2=45725&view=diff == --- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original) +++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Mon Jan 7 17:08:23 2008 @@ -1478,10 +1478,9 @@ // Add argument registers to the end of the list so that they are known live // into the call. - if (IsTailCall) -for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) - Ops.push_back(DAG.getRegister(RegsToPass[i].first, -RegsToPass[i].second.getValueType())); + for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) +Ops.push_back(DAG.getRegister(RegsToPass[i].first, + RegsToPass[i].second.getValueType())); if (InFlag.Val) Ops.push_back(InFlag); ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] [llvm] r45726 - /llvm/trunk/lib/Target/Target.td
Author: lattner Date: Mon Jan 7 17:16:55 2008 New Revision: 45726 URL: http://llvm.org/viewvc/llvm-project?rev=45726&view=rev Log: add a new bit. Modified: llvm/trunk/lib/Target/Target.td Modified: llvm/trunk/lib/Target/Target.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Target.td?rev=45726&r1=45725&r2=45726&view=diff == --- llvm/trunk/lib/Target/Target.td (original) +++ llvm/trunk/lib/Target/Target.td Mon Jan 7 17:16:55 2008 @@ -190,7 +190,8 @@ bit isBarrier= 0; // Can control flow fall through this instruction? bit isCall = 0; // Is this instruction a call instruction? bit isSimpleLoad = 0; // Is this just a load instruction? - bit mayStore = 0; // Can this instruction modify memory? + bit mayLoad = 0; // Is it possible for this inst to read memory? + bit mayStore = 0; // Is it possible for this inst to write memory? bit isImplicitDef = 0;// Is this instruction an implicit def instruction? bit isTwoAddress = 0; // Is this a two address instruction? bit isConvertibleToThreeAddress = 0; // Can this 2-addr instruction promote? ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] [llvm] r45727 - in /llvm/trunk/lib/Target/ARM: ARMInstrInfo.cpp ARMInstrInfo.td ARMInstrThumb.td ARMInstrVFP.td
Author: evancheng
Date: Mon Jan 7 17:56:57 2008
New Revision: 45727
URL: http://llvm.org/viewvc/llvm-project?rev=45727&view=rev
Log:
Only mark instructions that load a single value without extension as
isSimpleLoad = 1.
Modified:
llvm/trunk/lib/Target/ARM/ARMInstrInfo.cpp
llvm/trunk/lib/Target/ARM/ARMInstrInfo.td
llvm/trunk/lib/Target/ARM/ARMInstrThumb.td
llvm/trunk/lib/Target/ARM/ARMInstrVFP.td
Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrInfo.cpp?rev=45727&r1=45726&r2=45727&view=diff
==
--- llvm/trunk/lib/Target/ARM/ARMInstrInfo.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMInstrInfo.cpp Mon Jan 7 17:56:57 2008
@@ -202,7 +202,7 @@
unsigned AddrMode = (TSFlags & ARMII::AddrModeMask);
const TargetInstrDesc &TID = MI->getDesc();
unsigned NumOps = TID.getNumOperands();
- bool isLoad = TID.isSimpleLoad();
+ bool isLoad = !TID.mayStore();
const MachineOperand &WB = isLoad ? MI->getOperand(1) : MI->getOperand(0);
const MachineOperand &Base = MI->getOperand(2);
const MachineOperand &Offset = MI->getOperand(NumOps-3);
Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.td
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrInfo.td?rev=45727&r1=45726&r2=45727&view=diff
==
--- llvm/trunk/lib/Target/ARM/ARMInstrInfo.td (original)
+++ llvm/trunk/lib/Target/ARM/ARMInstrInfo.td Mon Jan 7 17:56:57 2008
@@ -684,7 +684,8 @@
Pseudo, "$cp:\n\tadd$p $dst, pc, $a",
[(set GPR:$dst, (ARMpic_add GPR:$a, imm:$cp))]>;
-let isSimpleLoad = 1, AddedComplexity = 10 in {
+let AddedComplexity = 10 in {
+let isSimpleLoad = 1 in
def PICLD : AXI2<0x0, (outs GPR:$dst), (ins addrmodepc:$addr, pred:$p),
Pseudo, "${addr:label}:\n\tldr$p $dst, $addr",
[(set GPR:$dst, (load addrmodepc:$addr))]>;
@@ -738,7 +739,7 @@
// FIXME: remove when we have a way to marking a MI with these properties.
// FIXME: $dst1 should be a def. But the extra ops must be in the end of the
// operand list.
-let isSimpleLoad = 1, isReturn = 1, isTerminator = 1 in
+let isReturn = 1, isTerminator = 1 in
def LDM_RET : AXI4<0x0, (outs),
(ins addrmode4:$addr, pred:$p, reglist:$dst1,
variable_ops),
LdFrm, "ldm${p}${addr:submode} $addr, $dst1",
@@ -802,13 +803,13 @@
//
// Load
-let isSimpleLoad = 1 in {
+let isSimpleLoad = 1 in
def LDR : AI2<0x0, (outs GPR:$dst), (ins addrmode2:$addr), LdFrm,
"ldr", " $dst, $addr",
[(set GPR:$dst, (load addrmode2:$addr))]>;
// Special LDR for loads from non-pc-relative constpools.
-let isReMaterializable = 1 in
+let isSimpleLoad = 1, isReMaterializable = 1 in
def LDRcp : AI2<0x0, (outs GPR:$dst), (ins addrmode2:$addr), LdFrm,
"ldr", " $dst, $addr", []>;
@@ -875,7 +876,6 @@
def LDRSB_POST: AI3po<0xD, (outs GPR:$dst, GPR:$base_wb),
(ins GPR:$base,am3offset:$offset), LdFrm,
"ldr", "sb $dst, [$base], $offset", "$base = $base_wb",
[]>;
-} // isSimpleLoad
// Store
def STR : AI2<0x0, (outs), (ins GPR:$src, addrmode2:$addr), StFrm,
@@ -939,7 +939,6 @@
//
// FIXME: $dst1 should be a def.
-let isSimpleLoad = 1 in
def LDM : AXI4<0x0, (outs),
(ins addrmode4:$addr, pred:$p, reglist:$dst1, variable_ops),
LdFrm, "ldm${p}${addr:submode} $addr, $dst1",
Modified: llvm/trunk/lib/Target/ARM/ARMInstrThumb.td
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrThumb.td?rev=45727&r1=45726&r2=45727&view=diff
==
--- llvm/trunk/lib/Target/ARM/ARMInstrThumb.td (original)
+++ llvm/trunk/lib/Target/ARM/ARMInstrThumb.td Mon Jan 7 17:56:57 2008
@@ -188,7 +188,7 @@
}
// FIXME: remove when we have a way to marking a MI with these properties.
-let isSimpleLoad = 1, isReturn = 1, isTerminator = 1 in
+let isReturn = 1, isTerminator = 1 in
def tPOP_RET : TI<(outs reglist:$dst1, variable_ops), (ins),
"pop $dst1", []>;
@@ -237,7 +237,7 @@
// Load Store Instructions.
//
-let isSimpleLoad = 1 in {
+let isSimpleLoad = 1 in
def tLDR : TI4<(outs GPR:$dst), (ins t_addrmode_s4:$addr),
"ldr $dst, $addr",
[(set GPR:$dst, (load t_addrmode_s4:$addr))]>;
@@ -258,25 +258,27 @@
"ldrsh $dst, $addr",
[(set GPR:$dst, (sextloadi16 t_addrmode_rr:$addr))]>;
+let isSimpleLoad = 1 in
def tLDRspi : TIs<(outs GPR:$dst), (ins t_addrmode_sp:$addr),
"ldr $dst, $addr",
[(set GPR:$dst, (load t_addrmode_sp:$addr))]>;
// Special instruction for restore. It cannot clobber condition register
//
